omap_wdt.c 11 KB

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  1. /*
  2. * omap_wdt.c
  3. *
  4. * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
  5. *
  6. * Author: MontaVista Software, Inc.
  7. * <gdavis@mvista.com> or <source@mvista.com>
  8. *
  9. * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10. * terms of the GNU General Public License version 2. This program is
  11. * licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. *
  14. * History:
  15. *
  16. * 20030527: George G. Davis <gdavis@mvista.com>
  17. * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18. * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19. * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20. *
  21. * Copyright (c) 2004 Texas Instruments.
  22. * 1. Modified to support OMAP1610 32-KHz watchdog timer
  23. * 2. Ported to 2.6 kernel
  24. *
  25. * Copyright (c) 2005 David Brownell
  26. * Use the driver model and standard identifiers; handle bigger timeouts.
  27. */
  28. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29. #include <linux/module.h>
  30. #include <linux/types.h>
  31. #include <linux/kernel.h>
  32. #include <linux/fs.h>
  33. #include <linux/mm.h>
  34. #include <linux/miscdevice.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/reboot.h>
  37. #include <linux/init.h>
  38. #include <linux/err.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/bitops.h>
  42. #include <linux/io.h>
  43. #include <linux/uaccess.h>
  44. #include <linux/slab.h>
  45. #include <linux/pm_runtime.h>
  46. #include <mach/hardware.h>
  47. #include <plat/prcm.h>
  48. #include "omap_wdt.h"
  49. static struct platform_device *omap_wdt_dev;
  50. static unsigned timer_margin;
  51. module_param(timer_margin, uint, 0);
  52. MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  53. static unsigned int wdt_trgr_pattern = 0x1234;
  54. static DEFINE_SPINLOCK(wdt_lock);
  55. struct omap_wdt_dev {
  56. void __iomem *base; /* physical */
  57. struct device *dev;
  58. int omap_wdt_users;
  59. struct resource *mem;
  60. struct miscdevice omap_wdt_miscdev;
  61. };
  62. static void omap_wdt_ping(struct omap_wdt_dev *wdev)
  63. {
  64. void __iomem *base = wdev->base;
  65. /* wait for posted write to complete */
  66. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  67. cpu_relax();
  68. wdt_trgr_pattern = ~wdt_trgr_pattern;
  69. __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  70. /* wait for posted write to complete */
  71. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  72. cpu_relax();
  73. /* reloaded WCRR from WLDR */
  74. }
  75. static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  76. {
  77. void __iomem *base = wdev->base;
  78. /* Sequence to enable the watchdog */
  79. __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  80. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  81. cpu_relax();
  82. __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  83. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  84. cpu_relax();
  85. }
  86. static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  87. {
  88. void __iomem *base = wdev->base;
  89. /* sequence required to disable watchdog */
  90. __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  91. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  92. cpu_relax();
  93. __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  94. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  95. cpu_relax();
  96. }
  97. static void omap_wdt_adjust_timeout(unsigned new_timeout)
  98. {
  99. if (new_timeout < TIMER_MARGIN_MIN)
  100. new_timeout = TIMER_MARGIN_DEFAULT;
  101. if (new_timeout > TIMER_MARGIN_MAX)
  102. new_timeout = TIMER_MARGIN_MAX;
  103. timer_margin = new_timeout;
  104. }
  105. static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
  106. {
  107. u32 pre_margin = GET_WLDR_VAL(timer_margin);
  108. void __iomem *base = wdev->base;
  109. pm_runtime_get_sync(wdev->dev);
  110. /* just count up at 32 KHz */
  111. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  112. cpu_relax();
  113. __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
  114. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  115. cpu_relax();
  116. pm_runtime_put_sync(wdev->dev);
  117. }
  118. /*
  119. * Allow only one task to hold it open
  120. */
  121. static int omap_wdt_open(struct inode *inode, struct file *file)
  122. {
  123. struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
  124. void __iomem *base = wdev->base;
  125. if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
  126. return -EBUSY;
  127. pm_runtime_get_sync(wdev->dev);
  128. /* initialize prescaler */
  129. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  130. cpu_relax();
  131. __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
  132. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  133. cpu_relax();
  134. file->private_data = (void *) wdev;
  135. omap_wdt_set_timeout(wdev);
  136. omap_wdt_ping(wdev); /* trigger loading of new timeout value */
  137. omap_wdt_enable(wdev);
  138. pm_runtime_put_sync(wdev->dev);
  139. return nonseekable_open(inode, file);
  140. }
  141. static int omap_wdt_release(struct inode *inode, struct file *file)
  142. {
  143. struct omap_wdt_dev *wdev = file->private_data;
  144. /*
  145. * Shut off the timer unless NOWAYOUT is defined.
  146. */
  147. #ifndef CONFIG_WATCHDOG_NOWAYOUT
  148. pm_runtime_get_sync(wdev->dev);
  149. omap_wdt_disable(wdev);
  150. pm_runtime_put_sync(wdev->dev);
  151. #else
  152. pr_crit("Unexpected close, not stopping!\n");
  153. #endif
  154. wdev->omap_wdt_users = 0;
  155. return 0;
  156. }
  157. static ssize_t omap_wdt_write(struct file *file, const char __user *data,
  158. size_t len, loff_t *ppos)
  159. {
  160. struct omap_wdt_dev *wdev = file->private_data;
  161. /* Refresh LOAD_TIME. */
  162. if (len) {
  163. pm_runtime_get_sync(wdev->dev);
  164. spin_lock(&wdt_lock);
  165. omap_wdt_ping(wdev);
  166. spin_unlock(&wdt_lock);
  167. pm_runtime_put_sync(wdev->dev);
  168. }
  169. return len;
  170. }
  171. static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
  172. unsigned long arg)
  173. {
  174. struct omap_wdt_dev *wdev;
  175. int new_margin;
  176. static const struct watchdog_info ident = {
  177. .identity = "OMAP Watchdog",
  178. .options = WDIOF_SETTIMEOUT,
  179. .firmware_version = 0,
  180. };
  181. wdev = file->private_data;
  182. switch (cmd) {
  183. case WDIOC_GETSUPPORT:
  184. return copy_to_user((struct watchdog_info __user *)arg, &ident,
  185. sizeof(ident));
  186. case WDIOC_GETSTATUS:
  187. return put_user(0, (int __user *)arg);
  188. case WDIOC_GETBOOTSTATUS:
  189. if (cpu_is_omap16xx())
  190. return put_user(__raw_readw(ARM_SYSST),
  191. (int __user *)arg);
  192. if (cpu_is_omap24xx())
  193. return put_user(omap_prcm_get_reset_sources(),
  194. (int __user *)arg);
  195. return put_user(0, (int __user *)arg);
  196. case WDIOC_KEEPALIVE:
  197. pm_runtime_get_sync(wdev->dev);
  198. spin_lock(&wdt_lock);
  199. omap_wdt_ping(wdev);
  200. spin_unlock(&wdt_lock);
  201. pm_runtime_put_sync(wdev->dev);
  202. return 0;
  203. case WDIOC_SETTIMEOUT:
  204. if (get_user(new_margin, (int __user *)arg))
  205. return -EFAULT;
  206. omap_wdt_adjust_timeout(new_margin);
  207. pm_runtime_get_sync(wdev->dev);
  208. spin_lock(&wdt_lock);
  209. omap_wdt_disable(wdev);
  210. omap_wdt_set_timeout(wdev);
  211. omap_wdt_enable(wdev);
  212. omap_wdt_ping(wdev);
  213. spin_unlock(&wdt_lock);
  214. pm_runtime_put_sync(wdev->dev);
  215. /* Fall */
  216. case WDIOC_GETTIMEOUT:
  217. return put_user(timer_margin, (int __user *)arg);
  218. default:
  219. return -ENOTTY;
  220. }
  221. }
  222. static const struct file_operations omap_wdt_fops = {
  223. .owner = THIS_MODULE,
  224. .write = omap_wdt_write,
  225. .unlocked_ioctl = omap_wdt_ioctl,
  226. .open = omap_wdt_open,
  227. .release = omap_wdt_release,
  228. .llseek = no_llseek,
  229. };
  230. static int __devinit omap_wdt_probe(struct platform_device *pdev)
  231. {
  232. struct resource *res, *mem;
  233. struct omap_wdt_dev *wdev;
  234. int ret;
  235. /* reserve static register mappings */
  236. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  237. if (!res) {
  238. ret = -ENOENT;
  239. goto err_get_resource;
  240. }
  241. if (omap_wdt_dev) {
  242. ret = -EBUSY;
  243. goto err_busy;
  244. }
  245. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  246. if (!mem) {
  247. ret = -EBUSY;
  248. goto err_busy;
  249. }
  250. wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
  251. if (!wdev) {
  252. ret = -ENOMEM;
  253. goto err_kzalloc;
  254. }
  255. wdev->omap_wdt_users = 0;
  256. wdev->mem = mem;
  257. wdev->dev = &pdev->dev;
  258. wdev->base = ioremap(res->start, resource_size(res));
  259. if (!wdev->base) {
  260. ret = -ENOMEM;
  261. goto err_ioremap;
  262. }
  263. platform_set_drvdata(pdev, wdev);
  264. pm_runtime_enable(wdev->dev);
  265. pm_runtime_get_sync(wdev->dev);
  266. omap_wdt_disable(wdev);
  267. omap_wdt_adjust_timeout(timer_margin);
  268. wdev->omap_wdt_miscdev.parent = &pdev->dev;
  269. wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
  270. wdev->omap_wdt_miscdev.name = "watchdog";
  271. wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
  272. ret = misc_register(&(wdev->omap_wdt_miscdev));
  273. if (ret)
  274. goto err_misc;
  275. pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
  276. __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
  277. timer_margin);
  278. pm_runtime_put_sync(wdev->dev);
  279. omap_wdt_dev = pdev;
  280. return 0;
  281. err_misc:
  282. pm_runtime_disable(wdev->dev);
  283. platform_set_drvdata(pdev, NULL);
  284. iounmap(wdev->base);
  285. err_ioremap:
  286. wdev->base = NULL;
  287. kfree(wdev);
  288. err_kzalloc:
  289. release_mem_region(res->start, resource_size(res));
  290. err_busy:
  291. err_get_resource:
  292. return ret;
  293. }
  294. static void omap_wdt_shutdown(struct platform_device *pdev)
  295. {
  296. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  297. if (wdev->omap_wdt_users) {
  298. pm_runtime_get_sync(wdev->dev);
  299. omap_wdt_disable(wdev);
  300. pm_runtime_put_sync(wdev->dev);
  301. }
  302. }
  303. static int __devexit omap_wdt_remove(struct platform_device *pdev)
  304. {
  305. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  306. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  307. pm_runtime_disable(wdev->dev);
  308. if (!res)
  309. return -ENOENT;
  310. misc_deregister(&(wdev->omap_wdt_miscdev));
  311. release_mem_region(res->start, resource_size(res));
  312. platform_set_drvdata(pdev, NULL);
  313. iounmap(wdev->base);
  314. kfree(wdev);
  315. omap_wdt_dev = NULL;
  316. return 0;
  317. }
  318. #ifdef CONFIG_PM
  319. /* REVISIT ... not clear this is the best way to handle system suspend; and
  320. * it's very inappropriate for selective device suspend (e.g. suspending this
  321. * through sysfs rather than by stopping the watchdog daemon). Also, this
  322. * may not play well enough with NOWAYOUT...
  323. */
  324. static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
  325. {
  326. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  327. if (wdev->omap_wdt_users) {
  328. pm_runtime_get_sync(wdev->dev);
  329. omap_wdt_disable(wdev);
  330. pm_runtime_put_sync(wdev->dev);
  331. }
  332. return 0;
  333. }
  334. static int omap_wdt_resume(struct platform_device *pdev)
  335. {
  336. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  337. if (wdev->omap_wdt_users) {
  338. pm_runtime_get_sync(wdev->dev);
  339. omap_wdt_enable(wdev);
  340. omap_wdt_ping(wdev);
  341. pm_runtime_put_sync(wdev->dev);
  342. }
  343. return 0;
  344. }
  345. #else
  346. #define omap_wdt_suspend NULL
  347. #define omap_wdt_resume NULL
  348. #endif
  349. static struct platform_driver omap_wdt_driver = {
  350. .probe = omap_wdt_probe,
  351. .remove = __devexit_p(omap_wdt_remove),
  352. .shutdown = omap_wdt_shutdown,
  353. .suspend = omap_wdt_suspend,
  354. .resume = omap_wdt_resume,
  355. .driver = {
  356. .owner = THIS_MODULE,
  357. .name = "omap_wdt",
  358. },
  359. };
  360. module_platform_driver(omap_wdt_driver);
  361. MODULE_AUTHOR("George G. Davis");
  362. MODULE_LICENSE("GPL");
  363. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  364. MODULE_ALIAS("platform:omap_wdt");