panel-picodlp.c 13 KB

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  1. /*
  2. * picodlp panel driver
  3. * picodlp_i2c_driver: i2c_client driver
  4. *
  5. * Copyright (C) 2009-2011 Texas Instruments
  6. * Author: Mythri P K <mythripk@ti.com>
  7. * Mayuresh Janorkar <mayur@ti.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published by
  11. * the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/input.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/firmware.h>
  26. #include <linux/slab.h>
  27. #include <linux/mutex.h>
  28. #include <linux/i2c.h>
  29. #include <linux/delay.h>
  30. #include <linux/gpio.h>
  31. #include <video/omapdss.h>
  32. #include <video/omap-panel-picodlp.h>
  33. #include "panel-picodlp.h"
  34. struct picodlp_data {
  35. struct mutex lock;
  36. struct i2c_client *picodlp_i2c_client;
  37. };
  38. static struct i2c_board_info picodlp_i2c_board_info = {
  39. I2C_BOARD_INFO("picodlp_i2c_driver", 0x1b),
  40. };
  41. struct picodlp_i2c_data {
  42. struct mutex xfer_lock;
  43. };
  44. static struct i2c_device_id picodlp_i2c_id[] = {
  45. { "picodlp_i2c_driver", 0 },
  46. };
  47. struct picodlp_i2c_command {
  48. u8 reg;
  49. u32 value;
  50. };
  51. static struct omap_video_timings pico_ls_timings = {
  52. .x_res = 864,
  53. .y_res = 480,
  54. .hsw = 7,
  55. .hfp = 11,
  56. .hbp = 7,
  57. .pixel_clock = 19200,
  58. .vsw = 2,
  59. .vfp = 3,
  60. .vbp = 14,
  61. };
  62. static inline struct picodlp_panel_data
  63. *get_panel_data(const struct omap_dss_device *dssdev)
  64. {
  65. return (struct picodlp_panel_data *) dssdev->data;
  66. }
  67. static u32 picodlp_i2c_read(struct i2c_client *client, u8 reg)
  68. {
  69. u8 read_cmd[] = {READ_REG_SELECT, reg}, data[4];
  70. struct picodlp_i2c_data *picodlp_i2c_data = i2c_get_clientdata(client);
  71. struct i2c_msg msg[2];
  72. mutex_lock(&picodlp_i2c_data->xfer_lock);
  73. msg[0].addr = client->addr;
  74. msg[0].flags = 0;
  75. msg[0].len = 2;
  76. msg[0].buf = read_cmd;
  77. msg[1].addr = client->addr;
  78. msg[1].flags = I2C_M_RD;
  79. msg[1].len = 4;
  80. msg[1].buf = data;
  81. i2c_transfer(client->adapter, msg, 2);
  82. mutex_unlock(&picodlp_i2c_data->xfer_lock);
  83. return (data[3] | (data[2] << 8) | (data[1] << 16) | (data[0] << 24));
  84. }
  85. static int picodlp_i2c_write_block(struct i2c_client *client,
  86. u8 *data, int len)
  87. {
  88. struct i2c_msg msg;
  89. int i, r, msg_count = 1;
  90. struct picodlp_i2c_data *picodlp_i2c_data = i2c_get_clientdata(client);
  91. if (len < 1 || len > 32) {
  92. dev_err(&client->dev,
  93. "too long syn_write_block len %d\n", len);
  94. return -EIO;
  95. }
  96. mutex_lock(&picodlp_i2c_data->xfer_lock);
  97. msg.addr = client->addr;
  98. msg.flags = 0;
  99. msg.len = len;
  100. msg.buf = data;
  101. r = i2c_transfer(client->adapter, &msg, msg_count);
  102. mutex_unlock(&picodlp_i2c_data->xfer_lock);
  103. /*
  104. * i2c_transfer returns:
  105. * number of messages sent in case of success
  106. * a negative error number in case of failure
  107. */
  108. if (r != msg_count)
  109. goto err;
  110. /* In case of success */
  111. for (i = 0; i < len; i++)
  112. dev_dbg(&client->dev,
  113. "addr %x bw 0x%02x[%d]: 0x%02x\n",
  114. client->addr, data[0] + i, i, data[i]);
  115. return 0;
  116. err:
  117. dev_err(&client->dev, "picodlp_i2c_write error\n");
  118. return r;
  119. }
  120. static int picodlp_i2c_write(struct i2c_client *client, u8 reg, u32 value)
  121. {
  122. u8 data[5];
  123. int i;
  124. data[0] = reg;
  125. for (i = 1; i < 5; i++)
  126. data[i] = (value >> (32 - (i) * 8)) & 0xFF;
  127. return picodlp_i2c_write_block(client, data, 5);
  128. }
  129. static int picodlp_i2c_write_array(struct i2c_client *client,
  130. const struct picodlp_i2c_command commands[],
  131. int count)
  132. {
  133. int i, r = 0;
  134. for (i = 0; i < count; i++) {
  135. r = picodlp_i2c_write(client, commands[i].reg,
  136. commands[i].value);
  137. if (r)
  138. return r;
  139. }
  140. return r;
  141. }
  142. static int picodlp_wait_for_dma_done(struct i2c_client *client)
  143. {
  144. u8 trial = 100;
  145. do {
  146. msleep(1);
  147. if (!trial--)
  148. return -ETIMEDOUT;
  149. } while (picodlp_i2c_read(client, MAIN_STATUS) & DMA_STATUS);
  150. return 0;
  151. }
  152. /**
  153. * picodlp_i2c_init: i2c_initialization routine
  154. * client: i2c_client for communication
  155. *
  156. * return
  157. * 0 : Success, no error
  158. * error code : Failure
  159. */
  160. static int picodlp_i2c_init(struct i2c_client *client)
  161. {
  162. int r;
  163. static const struct picodlp_i2c_command init_cmd_set1[] = {
  164. {SOFT_RESET, 1},
  165. {DMD_PARK_TRIGGER, 1},
  166. {MISC_REG, 5},
  167. {SEQ_CONTROL, 0},
  168. {SEQ_VECTOR, 0x100},
  169. {DMD_BLOCK_COUNT, 7},
  170. {DMD_VCC_CONTROL, 0x109},
  171. {DMD_PARK_PULSE_COUNT, 0xA},
  172. {DMD_PARK_PULSE_WIDTH, 0xB},
  173. {DMD_PARK_DELAY, 0x2ED},
  174. {DMD_SHADOW_ENABLE, 0},
  175. {FLASH_OPCODE, 0xB},
  176. {FLASH_DUMMY_BYTES, 1},
  177. {FLASH_ADDR_BYTES, 3},
  178. {PBC_CONTROL, 0},
  179. {FLASH_START_ADDR, CMT_LUT_0_START_ADDR},
  180. {FLASH_READ_BYTES, CMT_LUT_0_SIZE},
  181. {CMT_SPLASH_LUT_START_ADDR, 0},
  182. {CMT_SPLASH_LUT_DEST_SELECT, CMT_LUT_ALL},
  183. {PBC_CONTROL, 1},
  184. };
  185. static const struct picodlp_i2c_command init_cmd_set2[] = {
  186. {PBC_CONTROL, 0},
  187. {CMT_SPLASH_LUT_DEST_SELECT, 0},
  188. {PBC_CONTROL, 0},
  189. {FLASH_START_ADDR, SEQUENCE_0_START_ADDR},
  190. {FLASH_READ_BYTES, SEQUENCE_0_SIZE},
  191. {SEQ_RESET_LUT_START_ADDR, 0},
  192. {SEQ_RESET_LUT_DEST_SELECT, SEQ_SEQ_LUT},
  193. {PBC_CONTROL, 1},
  194. };
  195. static const struct picodlp_i2c_command init_cmd_set3[] = {
  196. {PBC_CONTROL, 0},
  197. {SEQ_RESET_LUT_DEST_SELECT, 0},
  198. {PBC_CONTROL, 0},
  199. {FLASH_START_ADDR, DRC_TABLE_0_START_ADDR},
  200. {FLASH_READ_BYTES, DRC_TABLE_0_SIZE},
  201. {SEQ_RESET_LUT_START_ADDR, 0},
  202. {SEQ_RESET_LUT_DEST_SELECT, SEQ_DRC_LUT_ALL},
  203. {PBC_CONTROL, 1},
  204. };
  205. static const struct picodlp_i2c_command init_cmd_set4[] = {
  206. {PBC_CONTROL, 0},
  207. {SEQ_RESET_LUT_DEST_SELECT, 0},
  208. {SDC_ENABLE, 1},
  209. {AGC_CTRL, 7},
  210. {CCA_C1A, 0x100},
  211. {CCA_C1B, 0x0},
  212. {CCA_C1C, 0x0},
  213. {CCA_C2A, 0x0},
  214. {CCA_C2B, 0x100},
  215. {CCA_C2C, 0x0},
  216. {CCA_C3A, 0x0},
  217. {CCA_C3B, 0x0},
  218. {CCA_C3C, 0x100},
  219. {CCA_C7A, 0x100},
  220. {CCA_C7B, 0x100},
  221. {CCA_C7C, 0x100},
  222. {CCA_ENABLE, 1},
  223. {CPU_IF_MODE, 1},
  224. {SHORT_FLIP, 1},
  225. {CURTAIN_CONTROL, 0},
  226. {DMD_PARK_TRIGGER, 0},
  227. {R_DRIVE_CURRENT, 0x298},
  228. {G_DRIVE_CURRENT, 0x298},
  229. {B_DRIVE_CURRENT, 0x298},
  230. {RGB_DRIVER_ENABLE, 7},
  231. {SEQ_CONTROL, 0},
  232. {ACTGEN_CONTROL, 0x10},
  233. {SEQUENCE_MODE, SEQ_LOCK},
  234. {DATA_FORMAT, RGB888},
  235. {INPUT_RESOLUTION, WVGA_864_LANDSCAPE},
  236. {INPUT_SOURCE, PARALLEL_RGB},
  237. {CPU_IF_SYNC_METHOD, 1},
  238. {SEQ_CONTROL, 1}
  239. };
  240. r = picodlp_i2c_write_array(client, init_cmd_set1,
  241. ARRAY_SIZE(init_cmd_set1));
  242. if (r)
  243. return r;
  244. r = picodlp_wait_for_dma_done(client);
  245. if (r)
  246. return r;
  247. r = picodlp_i2c_write_array(client, init_cmd_set2,
  248. ARRAY_SIZE(init_cmd_set2));
  249. if (r)
  250. return r;
  251. r = picodlp_wait_for_dma_done(client);
  252. if (r)
  253. return r;
  254. r = picodlp_i2c_write_array(client, init_cmd_set3,
  255. ARRAY_SIZE(init_cmd_set3));
  256. if (r)
  257. return r;
  258. r = picodlp_wait_for_dma_done(client);
  259. if (r)
  260. return r;
  261. r = picodlp_i2c_write_array(client, init_cmd_set4,
  262. ARRAY_SIZE(init_cmd_set4));
  263. if (r)
  264. return r;
  265. return 0;
  266. }
  267. static int picodlp_i2c_probe(struct i2c_client *client,
  268. const struct i2c_device_id *id)
  269. {
  270. struct picodlp_i2c_data *picodlp_i2c_data;
  271. picodlp_i2c_data = kzalloc(sizeof(struct picodlp_i2c_data), GFP_KERNEL);
  272. if (!picodlp_i2c_data)
  273. return -ENOMEM;
  274. mutex_init(&picodlp_i2c_data->xfer_lock);
  275. i2c_set_clientdata(client, picodlp_i2c_data);
  276. return 0;
  277. }
  278. static int picodlp_i2c_remove(struct i2c_client *client)
  279. {
  280. struct picodlp_i2c_data *picodlp_i2c_data =
  281. i2c_get_clientdata(client);
  282. kfree(picodlp_i2c_data);
  283. return 0;
  284. }
  285. static struct i2c_driver picodlp_i2c_driver = {
  286. .driver = {
  287. .name = "picodlp_i2c_driver",
  288. },
  289. .probe = picodlp_i2c_probe,
  290. .remove = picodlp_i2c_remove,
  291. .id_table = picodlp_i2c_id,
  292. };
  293. static int picodlp_panel_power_on(struct omap_dss_device *dssdev)
  294. {
  295. int r, trial = 100;
  296. struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev);
  297. struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev);
  298. if (dssdev->platform_enable) {
  299. r = dssdev->platform_enable(dssdev);
  300. if (r)
  301. return r;
  302. }
  303. gpio_set_value(picodlp_pdata->pwrgood_gpio, 0);
  304. msleep(1);
  305. gpio_set_value(picodlp_pdata->pwrgood_gpio, 1);
  306. while (!gpio_get_value(picodlp_pdata->emu_done_gpio)) {
  307. if (!trial--) {
  308. dev_err(&dssdev->dev, "emu_done signal not"
  309. " going high\n");
  310. return -ETIMEDOUT;
  311. }
  312. msleep(5);
  313. }
  314. /*
  315. * As per dpp2600 programming guide,
  316. * it is required to sleep for 1000ms after emu_done signal goes high
  317. * then only i2c commands can be successfully sent to dpp2600
  318. */
  319. msleep(1000);
  320. r = omapdss_dpi_display_enable(dssdev);
  321. if (r) {
  322. dev_err(&dssdev->dev, "failed to enable DPI\n");
  323. goto err1;
  324. }
  325. r = picodlp_i2c_init(picod->picodlp_i2c_client);
  326. if (r)
  327. goto err;
  328. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  329. return r;
  330. err:
  331. omapdss_dpi_display_disable(dssdev);
  332. err1:
  333. if (dssdev->platform_disable)
  334. dssdev->platform_disable(dssdev);
  335. return r;
  336. }
  337. static void picodlp_panel_power_off(struct omap_dss_device *dssdev)
  338. {
  339. struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev);
  340. omapdss_dpi_display_disable(dssdev);
  341. gpio_set_value(picodlp_pdata->emu_done_gpio, 0);
  342. gpio_set_value(picodlp_pdata->pwrgood_gpio, 0);
  343. if (dssdev->platform_disable)
  344. dssdev->platform_disable(dssdev);
  345. }
  346. static int picodlp_panel_probe(struct omap_dss_device *dssdev)
  347. {
  348. struct picodlp_data *picod;
  349. struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev);
  350. struct i2c_adapter *adapter;
  351. struct i2c_client *picodlp_i2c_client;
  352. int r = 0, picodlp_adapter_id;
  353. dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_ONOFF |
  354. OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IVS;
  355. dssdev->panel.acb = 0x0;
  356. dssdev->panel.timings = pico_ls_timings;
  357. picod = kzalloc(sizeof(struct picodlp_data), GFP_KERNEL);
  358. if (!picod)
  359. return -ENOMEM;
  360. mutex_init(&picod->lock);
  361. picodlp_adapter_id = picodlp_pdata->picodlp_adapter_id;
  362. adapter = i2c_get_adapter(picodlp_adapter_id);
  363. if (!adapter) {
  364. dev_err(&dssdev->dev, "can't get i2c adapter\n");
  365. r = -ENODEV;
  366. goto err;
  367. }
  368. picodlp_i2c_client = i2c_new_device(adapter, &picodlp_i2c_board_info);
  369. if (!picodlp_i2c_client) {
  370. dev_err(&dssdev->dev, "can't add i2c device::"
  371. " picodlp_i2c_client is NULL\n");
  372. r = -ENODEV;
  373. goto err;
  374. }
  375. picod->picodlp_i2c_client = picodlp_i2c_client;
  376. dev_set_drvdata(&dssdev->dev, picod);
  377. return r;
  378. err:
  379. kfree(picod);
  380. return r;
  381. }
  382. static void picodlp_panel_remove(struct omap_dss_device *dssdev)
  383. {
  384. struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev);
  385. i2c_unregister_device(picod->picodlp_i2c_client);
  386. dev_set_drvdata(&dssdev->dev, NULL);
  387. dev_dbg(&dssdev->dev, "removing picodlp panel\n");
  388. kfree(picod);
  389. }
  390. static int picodlp_panel_enable(struct omap_dss_device *dssdev)
  391. {
  392. struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev);
  393. int r;
  394. dev_dbg(&dssdev->dev, "enabling picodlp panel\n");
  395. mutex_lock(&picod->lock);
  396. if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) {
  397. mutex_unlock(&picod->lock);
  398. return -EINVAL;
  399. }
  400. r = picodlp_panel_power_on(dssdev);
  401. mutex_unlock(&picod->lock);
  402. return r;
  403. }
  404. static void picodlp_panel_disable(struct omap_dss_device *dssdev)
  405. {
  406. struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev);
  407. mutex_lock(&picod->lock);
  408. /* Turn off DLP Power */
  409. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  410. picodlp_panel_power_off(dssdev);
  411. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  412. mutex_unlock(&picod->lock);
  413. dev_dbg(&dssdev->dev, "disabling picodlp panel\n");
  414. }
  415. static int picodlp_panel_suspend(struct omap_dss_device *dssdev)
  416. {
  417. struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev);
  418. mutex_lock(&picod->lock);
  419. /* Turn off DLP Power */
  420. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) {
  421. mutex_unlock(&picod->lock);
  422. dev_err(&dssdev->dev, "unable to suspend picodlp panel,"
  423. " panel is not ACTIVE\n");
  424. return -EINVAL;
  425. }
  426. picodlp_panel_power_off(dssdev);
  427. dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
  428. mutex_unlock(&picod->lock);
  429. dev_dbg(&dssdev->dev, "suspending picodlp panel\n");
  430. return 0;
  431. }
  432. static int picodlp_panel_resume(struct omap_dss_device *dssdev)
  433. {
  434. struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev);
  435. int r;
  436. mutex_lock(&picod->lock);
  437. if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED) {
  438. mutex_unlock(&picod->lock);
  439. dev_err(&dssdev->dev, "unable to resume picodlp panel,"
  440. " panel is not ACTIVE\n");
  441. return -EINVAL;
  442. }
  443. r = picodlp_panel_power_on(dssdev);
  444. mutex_unlock(&picod->lock);
  445. dev_dbg(&dssdev->dev, "resuming picodlp panel\n");
  446. return r;
  447. }
  448. static void picodlp_get_resolution(struct omap_dss_device *dssdev,
  449. u16 *xres, u16 *yres)
  450. {
  451. *xres = dssdev->panel.timings.x_res;
  452. *yres = dssdev->panel.timings.y_res;
  453. }
  454. static struct omap_dss_driver picodlp_driver = {
  455. .probe = picodlp_panel_probe,
  456. .remove = picodlp_panel_remove,
  457. .enable = picodlp_panel_enable,
  458. .disable = picodlp_panel_disable,
  459. .get_resolution = picodlp_get_resolution,
  460. .suspend = picodlp_panel_suspend,
  461. .resume = picodlp_panel_resume,
  462. .driver = {
  463. .name = "picodlp_panel",
  464. .owner = THIS_MODULE,
  465. },
  466. };
  467. static int __init picodlp_init(void)
  468. {
  469. int r = 0;
  470. r = i2c_add_driver(&picodlp_i2c_driver);
  471. if (r) {
  472. printk(KERN_WARNING "picodlp_i2c_driver" \
  473. " registration failed\n");
  474. return r;
  475. }
  476. r = omap_dss_register_driver(&picodlp_driver);
  477. if (r)
  478. i2c_del_driver(&picodlp_i2c_driver);
  479. return r;
  480. }
  481. static void __exit picodlp_exit(void)
  482. {
  483. i2c_del_driver(&picodlp_i2c_driver);
  484. omap_dss_unregister_driver(&picodlp_driver);
  485. }
  486. module_init(picodlp_init);
  487. module_exit(picodlp_exit);
  488. MODULE_AUTHOR("Mythri P K <mythripk@ti.com>");
  489. MODULE_DESCRIPTION("picodlp driver");
  490. MODULE_LICENSE("GPL");