mpt2sas_base.c 130 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int missing_delay[2] = {-1, -1};
  74. module_param_array(missing_delay, int, NULL, 0);
  75. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  76. static int mpt2sas_fwfault_debug;
  77. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  78. "and halt firmware - (default=0)");
  79. static int disable_discovery = -1;
  80. module_param(disable_discovery, int, 0);
  81. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  82. /**
  83. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  84. *
  85. */
  86. static int
  87. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  88. {
  89. int ret = param_set_int(val, kp);
  90. struct MPT2SAS_ADAPTER *ioc;
  91. if (ret)
  92. return ret;
  93. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  94. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  95. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  96. return 0;
  97. }
  98. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  99. param_get_int, &mpt2sas_fwfault_debug, 0644);
  100. /**
  101. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  102. * @arg: input argument, used to derive ioc
  103. *
  104. * Return 0 if controller is removed from pci subsystem.
  105. * Return -1 for other case.
  106. */
  107. static int mpt2sas_remove_dead_ioc_func(void *arg)
  108. {
  109. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  110. struct pci_dev *pdev;
  111. if ((ioc == NULL))
  112. return -1;
  113. pdev = ioc->pdev;
  114. if ((pdev == NULL))
  115. return -1;
  116. pci_stop_and_remove_bus_device(pdev);
  117. return 0;
  118. }
  119. /**
  120. * _base_fault_reset_work - workq handling ioc fault conditions
  121. * @work: input argument, used to derive ioc
  122. * Context: sleep.
  123. *
  124. * Return nothing.
  125. */
  126. static void
  127. _base_fault_reset_work(struct work_struct *work)
  128. {
  129. struct MPT2SAS_ADAPTER *ioc =
  130. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  131. unsigned long flags;
  132. u32 doorbell;
  133. int rc;
  134. struct task_struct *p;
  135. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  136. if (ioc->shost_recovery)
  137. goto rearm_timer;
  138. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  139. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  140. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  141. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  142. ioc->name, __func__);
  143. /*
  144. * Call _scsih_flush_pending_cmds callback so that we flush all
  145. * pending commands back to OS. This call is required to aovid
  146. * deadlock at block layer. Dead IOC will fail to do diag reset,
  147. * and this call is safe since dead ioc will never return any
  148. * command back from HW.
  149. */
  150. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  151. /*
  152. * Set remove_host flag early since kernel thread will
  153. * take some time to execute.
  154. */
  155. ioc->remove_host = 1;
  156. /*Remove the Dead Host */
  157. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  158. "mpt2sas_dead_ioc_%d", ioc->id);
  159. if (IS_ERR(p)) {
  160. printk(MPT2SAS_ERR_FMT
  161. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  162. ioc->name, __func__);
  163. } else {
  164. printk(MPT2SAS_ERR_FMT
  165. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  166. ioc->name, __func__);
  167. }
  168. return; /* don't rearm timer */
  169. }
  170. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  171. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  172. FORCE_BIG_HAMMER);
  173. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  174. __func__, (rc == 0) ? "success" : "failed");
  175. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  176. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  177. mpt2sas_base_fault_info(ioc, doorbell &
  178. MPI2_DOORBELL_DATA_MASK);
  179. }
  180. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  181. rearm_timer:
  182. if (ioc->fault_reset_work_q)
  183. queue_delayed_work(ioc->fault_reset_work_q,
  184. &ioc->fault_reset_work,
  185. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  186. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  187. }
  188. /**
  189. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  190. * @ioc: per adapter object
  191. * Context: sleep.
  192. *
  193. * Return nothing.
  194. */
  195. void
  196. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  197. {
  198. unsigned long flags;
  199. if (ioc->fault_reset_work_q)
  200. return;
  201. /* initialize fault polling */
  202. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  203. snprintf(ioc->fault_reset_work_q_name,
  204. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  205. ioc->fault_reset_work_q =
  206. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  207. if (!ioc->fault_reset_work_q) {
  208. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  209. ioc->name, __func__, __LINE__);
  210. return;
  211. }
  212. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  213. if (ioc->fault_reset_work_q)
  214. queue_delayed_work(ioc->fault_reset_work_q,
  215. &ioc->fault_reset_work,
  216. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  217. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  218. }
  219. /**
  220. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  221. * @ioc: per adapter object
  222. * Context: sleep.
  223. *
  224. * Return nothing.
  225. */
  226. void
  227. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  228. {
  229. unsigned long flags;
  230. struct workqueue_struct *wq;
  231. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  232. wq = ioc->fault_reset_work_q;
  233. ioc->fault_reset_work_q = NULL;
  234. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  235. if (wq) {
  236. if (!cancel_delayed_work(&ioc->fault_reset_work))
  237. flush_workqueue(wq);
  238. destroy_workqueue(wq);
  239. }
  240. }
  241. /**
  242. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  243. * @ioc: per adapter object
  244. * @fault_code: fault code
  245. *
  246. * Return nothing.
  247. */
  248. void
  249. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  250. {
  251. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  252. ioc->name, fault_code);
  253. }
  254. /**
  255. * mpt2sas_halt_firmware - halt's mpt controller firmware
  256. * @ioc: per adapter object
  257. *
  258. * For debugging timeout related issues. Writing 0xCOFFEE00
  259. * to the doorbell register will halt controller firmware. With
  260. * the purpose to stop both driver and firmware, the enduser can
  261. * obtain a ring buffer from controller UART.
  262. */
  263. void
  264. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  265. {
  266. u32 doorbell;
  267. if (!ioc->fwfault_debug)
  268. return;
  269. dump_stack();
  270. doorbell = readl(&ioc->chip->Doorbell);
  271. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  272. mpt2sas_base_fault_info(ioc , doorbell);
  273. else {
  274. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  275. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  276. "timeout\n", ioc->name);
  277. }
  278. panic("panic in %s\n", __func__);
  279. }
  280. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  281. /**
  282. * _base_sas_ioc_info - verbose translation of the ioc status
  283. * @ioc: per adapter object
  284. * @mpi_reply: reply mf payload returned from firmware
  285. * @request_hdr: request mf
  286. *
  287. * Return nothing.
  288. */
  289. static void
  290. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  291. MPI2RequestHeader_t *request_hdr)
  292. {
  293. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  294. MPI2_IOCSTATUS_MASK;
  295. char *desc = NULL;
  296. u16 frame_sz;
  297. char *func_str = NULL;
  298. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  299. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  300. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  301. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  302. return;
  303. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  304. return;
  305. switch (ioc_status) {
  306. /****************************************************************************
  307. * Common IOCStatus values for all replies
  308. ****************************************************************************/
  309. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  310. desc = "invalid function";
  311. break;
  312. case MPI2_IOCSTATUS_BUSY:
  313. desc = "busy";
  314. break;
  315. case MPI2_IOCSTATUS_INVALID_SGL:
  316. desc = "invalid sgl";
  317. break;
  318. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  319. desc = "internal error";
  320. break;
  321. case MPI2_IOCSTATUS_INVALID_VPID:
  322. desc = "invalid vpid";
  323. break;
  324. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  325. desc = "insufficient resources";
  326. break;
  327. case MPI2_IOCSTATUS_INVALID_FIELD:
  328. desc = "invalid field";
  329. break;
  330. case MPI2_IOCSTATUS_INVALID_STATE:
  331. desc = "invalid state";
  332. break;
  333. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  334. desc = "op state not supported";
  335. break;
  336. /****************************************************************************
  337. * Config IOCStatus values
  338. ****************************************************************************/
  339. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  340. desc = "config invalid action";
  341. break;
  342. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  343. desc = "config invalid type";
  344. break;
  345. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  346. desc = "config invalid page";
  347. break;
  348. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  349. desc = "config invalid data";
  350. break;
  351. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  352. desc = "config no defaults";
  353. break;
  354. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  355. desc = "config cant commit";
  356. break;
  357. /****************************************************************************
  358. * SCSI IO Reply
  359. ****************************************************************************/
  360. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  361. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  362. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  363. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  364. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  365. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  366. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  367. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  368. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  369. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  370. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  371. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  372. break;
  373. /****************************************************************************
  374. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  375. ****************************************************************************/
  376. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  377. desc = "eedp guard error";
  378. break;
  379. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  380. desc = "eedp ref tag error";
  381. break;
  382. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  383. desc = "eedp app tag error";
  384. break;
  385. /****************************************************************************
  386. * SCSI Target values
  387. ****************************************************************************/
  388. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  389. desc = "target invalid io index";
  390. break;
  391. case MPI2_IOCSTATUS_TARGET_ABORTED:
  392. desc = "target aborted";
  393. break;
  394. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  395. desc = "target no conn retryable";
  396. break;
  397. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  398. desc = "target no connection";
  399. break;
  400. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  401. desc = "target xfer count mismatch";
  402. break;
  403. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  404. desc = "target data offset error";
  405. break;
  406. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  407. desc = "target too much write data";
  408. break;
  409. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  410. desc = "target iu too short";
  411. break;
  412. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  413. desc = "target ack nak timeout";
  414. break;
  415. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  416. desc = "target nak received";
  417. break;
  418. /****************************************************************************
  419. * Serial Attached SCSI values
  420. ****************************************************************************/
  421. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  422. desc = "smp request failed";
  423. break;
  424. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  425. desc = "smp data overrun";
  426. break;
  427. /****************************************************************************
  428. * Diagnostic Buffer Post / Diagnostic Release values
  429. ****************************************************************************/
  430. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  431. desc = "diagnostic released";
  432. break;
  433. default:
  434. break;
  435. }
  436. if (!desc)
  437. return;
  438. switch (request_hdr->Function) {
  439. case MPI2_FUNCTION_CONFIG:
  440. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  441. func_str = "config_page";
  442. break;
  443. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  444. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  445. func_str = "task_mgmt";
  446. break;
  447. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  448. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  449. func_str = "sas_iounit_ctl";
  450. break;
  451. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  452. frame_sz = sizeof(Mpi2SepRequest_t);
  453. func_str = "enclosure";
  454. break;
  455. case MPI2_FUNCTION_IOC_INIT:
  456. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  457. func_str = "ioc_init";
  458. break;
  459. case MPI2_FUNCTION_PORT_ENABLE:
  460. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  461. func_str = "port_enable";
  462. break;
  463. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  464. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  465. func_str = "smp_passthru";
  466. break;
  467. default:
  468. frame_sz = 32;
  469. func_str = "unknown";
  470. break;
  471. }
  472. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  473. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  474. _debug_dump_mf(request_hdr, frame_sz/4);
  475. }
  476. /**
  477. * _base_display_event_data - verbose translation of firmware asyn events
  478. * @ioc: per adapter object
  479. * @mpi_reply: reply mf payload returned from firmware
  480. *
  481. * Return nothing.
  482. */
  483. static void
  484. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  485. Mpi2EventNotificationReply_t *mpi_reply)
  486. {
  487. char *desc = NULL;
  488. u16 event;
  489. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  490. return;
  491. event = le16_to_cpu(mpi_reply->Event);
  492. switch (event) {
  493. case MPI2_EVENT_LOG_DATA:
  494. desc = "Log Data";
  495. break;
  496. case MPI2_EVENT_STATE_CHANGE:
  497. desc = "Status Change";
  498. break;
  499. case MPI2_EVENT_HARD_RESET_RECEIVED:
  500. desc = "Hard Reset Received";
  501. break;
  502. case MPI2_EVENT_EVENT_CHANGE:
  503. desc = "Event Change";
  504. break;
  505. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  506. desc = "Device Status Change";
  507. break;
  508. case MPI2_EVENT_IR_OPERATION_STATUS:
  509. if (!ioc->hide_ir_msg)
  510. desc = "IR Operation Status";
  511. break;
  512. case MPI2_EVENT_SAS_DISCOVERY:
  513. {
  514. Mpi2EventDataSasDiscovery_t *event_data =
  515. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  516. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  517. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  518. "start" : "stop");
  519. if (event_data->DiscoveryStatus)
  520. printk("discovery_status(0x%08x)",
  521. le32_to_cpu(event_data->DiscoveryStatus));
  522. printk("\n");
  523. return;
  524. }
  525. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  526. desc = "SAS Broadcast Primitive";
  527. break;
  528. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  529. desc = "SAS Init Device Status Change";
  530. break;
  531. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  532. desc = "SAS Init Table Overflow";
  533. break;
  534. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  535. desc = "SAS Topology Change List";
  536. break;
  537. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  538. desc = "SAS Enclosure Device Status Change";
  539. break;
  540. case MPI2_EVENT_IR_VOLUME:
  541. if (!ioc->hide_ir_msg)
  542. desc = "IR Volume";
  543. break;
  544. case MPI2_EVENT_IR_PHYSICAL_DISK:
  545. if (!ioc->hide_ir_msg)
  546. desc = "IR Physical Disk";
  547. break;
  548. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  549. if (!ioc->hide_ir_msg)
  550. desc = "IR Configuration Change List";
  551. break;
  552. case MPI2_EVENT_LOG_ENTRY_ADDED:
  553. if (!ioc->hide_ir_msg)
  554. desc = "Log Entry Added";
  555. break;
  556. }
  557. if (!desc)
  558. return;
  559. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  560. }
  561. #endif
  562. /**
  563. * _base_sas_log_info - verbose translation of firmware log info
  564. * @ioc: per adapter object
  565. * @log_info: log info
  566. *
  567. * Return nothing.
  568. */
  569. static void
  570. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  571. {
  572. union loginfo_type {
  573. u32 loginfo;
  574. struct {
  575. u32 subcode:16;
  576. u32 code:8;
  577. u32 originator:4;
  578. u32 bus_type:4;
  579. } dw;
  580. };
  581. union loginfo_type sas_loginfo;
  582. char *originator_str = NULL;
  583. sas_loginfo.loginfo = log_info;
  584. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  585. return;
  586. /* each nexus loss loginfo */
  587. if (log_info == 0x31170000)
  588. return;
  589. /* eat the loginfos associated with task aborts */
  590. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  591. 0x31140000 || log_info == 0x31130000))
  592. return;
  593. switch (sas_loginfo.dw.originator) {
  594. case 0:
  595. originator_str = "IOP";
  596. break;
  597. case 1:
  598. originator_str = "PL";
  599. break;
  600. case 2:
  601. if (!ioc->hide_ir_msg)
  602. originator_str = "IR";
  603. else
  604. originator_str = "WarpDrive";
  605. break;
  606. }
  607. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  608. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  609. originator_str, sas_loginfo.dw.code,
  610. sas_loginfo.dw.subcode);
  611. }
  612. /**
  613. * _base_display_reply_info -
  614. * @ioc: per adapter object
  615. * @smid: system request message index
  616. * @msix_index: MSIX table index supplied by the OS
  617. * @reply: reply message frame(lower 32bit addr)
  618. *
  619. * Return nothing.
  620. */
  621. static void
  622. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  623. u32 reply)
  624. {
  625. MPI2DefaultReply_t *mpi_reply;
  626. u16 ioc_status;
  627. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  628. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  629. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  630. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  631. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  632. _base_sas_ioc_info(ioc , mpi_reply,
  633. mpt2sas_base_get_msg_frame(ioc, smid));
  634. }
  635. #endif
  636. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  637. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  638. }
  639. /**
  640. * mpt2sas_base_done - base internal command completion routine
  641. * @ioc: per adapter object
  642. * @smid: system request message index
  643. * @msix_index: MSIX table index supplied by the OS
  644. * @reply: reply message frame(lower 32bit addr)
  645. *
  646. * Return 1 meaning mf should be freed from _base_interrupt
  647. * 0 means the mf is freed from this function.
  648. */
  649. u8
  650. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  651. u32 reply)
  652. {
  653. MPI2DefaultReply_t *mpi_reply;
  654. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  655. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  656. return 1;
  657. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  658. return 1;
  659. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  660. if (mpi_reply) {
  661. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  662. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  663. }
  664. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  665. complete(&ioc->base_cmds.done);
  666. return 1;
  667. }
  668. /**
  669. * _base_async_event - main callback handler for firmware asyn events
  670. * @ioc: per adapter object
  671. * @msix_index: MSIX table index supplied by the OS
  672. * @reply: reply message frame(lower 32bit addr)
  673. *
  674. * Return 1 meaning mf should be freed from _base_interrupt
  675. * 0 means the mf is freed from this function.
  676. */
  677. static u8
  678. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  679. {
  680. Mpi2EventNotificationReply_t *mpi_reply;
  681. Mpi2EventAckRequest_t *ack_request;
  682. u16 smid;
  683. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  684. if (!mpi_reply)
  685. return 1;
  686. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  687. return 1;
  688. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  689. _base_display_event_data(ioc, mpi_reply);
  690. #endif
  691. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  692. goto out;
  693. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  694. if (!smid) {
  695. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  696. ioc->name, __func__);
  697. goto out;
  698. }
  699. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  700. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  701. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  702. ack_request->Event = mpi_reply->Event;
  703. ack_request->EventContext = mpi_reply->EventContext;
  704. ack_request->VF_ID = 0; /* TODO */
  705. ack_request->VP_ID = 0;
  706. mpt2sas_base_put_smid_default(ioc, smid);
  707. out:
  708. /* scsih callback handler */
  709. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  710. /* ctl callback handler */
  711. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  712. return 1;
  713. }
  714. /**
  715. * _base_get_cb_idx - obtain the callback index
  716. * @ioc: per adapter object
  717. * @smid: system request message index
  718. *
  719. * Return callback index.
  720. */
  721. static u8
  722. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  723. {
  724. int i;
  725. u8 cb_idx;
  726. if (smid < ioc->hi_priority_smid) {
  727. i = smid - 1;
  728. cb_idx = ioc->scsi_lookup[i].cb_idx;
  729. } else if (smid < ioc->internal_smid) {
  730. i = smid - ioc->hi_priority_smid;
  731. cb_idx = ioc->hpr_lookup[i].cb_idx;
  732. } else if (smid <= ioc->hba_queue_depth) {
  733. i = smid - ioc->internal_smid;
  734. cb_idx = ioc->internal_lookup[i].cb_idx;
  735. } else
  736. cb_idx = 0xFF;
  737. return cb_idx;
  738. }
  739. /**
  740. * _base_mask_interrupts - disable interrupts
  741. * @ioc: per adapter object
  742. *
  743. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  744. *
  745. * Return nothing.
  746. */
  747. static void
  748. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  749. {
  750. u32 him_register;
  751. ioc->mask_interrupts = 1;
  752. him_register = readl(&ioc->chip->HostInterruptMask);
  753. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  754. writel(him_register, &ioc->chip->HostInterruptMask);
  755. readl(&ioc->chip->HostInterruptMask);
  756. }
  757. /**
  758. * _base_unmask_interrupts - enable interrupts
  759. * @ioc: per adapter object
  760. *
  761. * Enabling only Reply Interrupts
  762. *
  763. * Return nothing.
  764. */
  765. static void
  766. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  767. {
  768. u32 him_register;
  769. him_register = readl(&ioc->chip->HostInterruptMask);
  770. him_register &= ~MPI2_HIM_RIM;
  771. writel(him_register, &ioc->chip->HostInterruptMask);
  772. ioc->mask_interrupts = 0;
  773. }
  774. union reply_descriptor {
  775. u64 word;
  776. struct {
  777. u32 low;
  778. u32 high;
  779. } u;
  780. };
  781. /**
  782. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  783. * @irq: irq number (not used)
  784. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  785. * @r: pt_regs pointer (not used)
  786. *
  787. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  788. */
  789. static irqreturn_t
  790. _base_interrupt(int irq, void *bus_id)
  791. {
  792. struct adapter_reply_queue *reply_q = bus_id;
  793. union reply_descriptor rd;
  794. u32 completed_cmds;
  795. u8 request_desript_type;
  796. u16 smid;
  797. u8 cb_idx;
  798. u32 reply;
  799. u8 msix_index = reply_q->msix_index;
  800. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  801. Mpi2ReplyDescriptorsUnion_t *rpf;
  802. u8 rc;
  803. if (ioc->mask_interrupts)
  804. return IRQ_NONE;
  805. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  806. return IRQ_NONE;
  807. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  808. request_desript_type = rpf->Default.ReplyFlags
  809. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  810. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  811. atomic_dec(&reply_q->busy);
  812. return IRQ_NONE;
  813. }
  814. completed_cmds = 0;
  815. cb_idx = 0xFF;
  816. do {
  817. rd.word = le64_to_cpu(rpf->Words);
  818. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  819. goto out;
  820. reply = 0;
  821. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  822. if (request_desript_type ==
  823. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  824. reply = le32_to_cpu
  825. (rpf->AddressReply.ReplyFrameAddress);
  826. if (reply > ioc->reply_dma_max_address ||
  827. reply < ioc->reply_dma_min_address)
  828. reply = 0;
  829. } else if (request_desript_type ==
  830. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  831. goto next;
  832. else if (request_desript_type ==
  833. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  834. goto next;
  835. if (smid)
  836. cb_idx = _base_get_cb_idx(ioc, smid);
  837. if (smid && cb_idx != 0xFF) {
  838. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  839. reply);
  840. if (reply)
  841. _base_display_reply_info(ioc, smid, msix_index,
  842. reply);
  843. if (rc)
  844. mpt2sas_base_free_smid(ioc, smid);
  845. }
  846. if (!smid)
  847. _base_async_event(ioc, msix_index, reply);
  848. /* reply free queue handling */
  849. if (reply) {
  850. ioc->reply_free_host_index =
  851. (ioc->reply_free_host_index ==
  852. (ioc->reply_free_queue_depth - 1)) ?
  853. 0 : ioc->reply_free_host_index + 1;
  854. ioc->reply_free[ioc->reply_free_host_index] =
  855. cpu_to_le32(reply);
  856. wmb();
  857. writel(ioc->reply_free_host_index,
  858. &ioc->chip->ReplyFreeHostIndex);
  859. }
  860. next:
  861. rpf->Words = cpu_to_le64(ULLONG_MAX);
  862. reply_q->reply_post_host_index =
  863. (reply_q->reply_post_host_index ==
  864. (ioc->reply_post_queue_depth - 1)) ? 0 :
  865. reply_q->reply_post_host_index + 1;
  866. request_desript_type =
  867. reply_q->reply_post_free[reply_q->reply_post_host_index].
  868. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  869. completed_cmds++;
  870. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  871. goto out;
  872. if (!reply_q->reply_post_host_index)
  873. rpf = reply_q->reply_post_free;
  874. else
  875. rpf++;
  876. } while (1);
  877. out:
  878. if (!completed_cmds) {
  879. atomic_dec(&reply_q->busy);
  880. return IRQ_NONE;
  881. }
  882. wmb();
  883. if (ioc->is_warpdrive) {
  884. writel(reply_q->reply_post_host_index,
  885. ioc->reply_post_host_index[msix_index]);
  886. atomic_dec(&reply_q->busy);
  887. return IRQ_HANDLED;
  888. }
  889. writel(reply_q->reply_post_host_index | (msix_index <<
  890. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  891. atomic_dec(&reply_q->busy);
  892. return IRQ_HANDLED;
  893. }
  894. /**
  895. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  896. * @ioc: per adapter object
  897. *
  898. */
  899. static inline int
  900. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  901. {
  902. return (ioc->facts.IOCCapabilities &
  903. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  904. }
  905. /**
  906. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  907. * @ioc: per adapter object
  908. * Context: ISR conext
  909. *
  910. * Called when a Task Management request has completed. We want
  911. * to flush the other reply queues so all the outstanding IO has been
  912. * completed back to OS before we process the TM completetion.
  913. *
  914. * Return nothing.
  915. */
  916. void
  917. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  918. {
  919. struct adapter_reply_queue *reply_q;
  920. /* If MSIX capability is turned off
  921. * then multi-queues are not enabled
  922. */
  923. if (!_base_is_controller_msix_enabled(ioc))
  924. return;
  925. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  926. if (ioc->shost_recovery)
  927. return;
  928. /* TMs are on msix_index == 0 */
  929. if (reply_q->msix_index == 0)
  930. continue;
  931. _base_interrupt(reply_q->vector, (void *)reply_q);
  932. }
  933. }
  934. /**
  935. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  936. * @cb_idx: callback index
  937. *
  938. * Return nothing.
  939. */
  940. void
  941. mpt2sas_base_release_callback_handler(u8 cb_idx)
  942. {
  943. mpt_callbacks[cb_idx] = NULL;
  944. }
  945. /**
  946. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  947. * @cb_func: callback function
  948. *
  949. * Returns cb_func.
  950. */
  951. u8
  952. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  953. {
  954. u8 cb_idx;
  955. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  956. if (mpt_callbacks[cb_idx] == NULL)
  957. break;
  958. mpt_callbacks[cb_idx] = cb_func;
  959. return cb_idx;
  960. }
  961. /**
  962. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  963. *
  964. * Return nothing.
  965. */
  966. void
  967. mpt2sas_base_initialize_callback_handler(void)
  968. {
  969. u8 cb_idx;
  970. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  971. mpt2sas_base_release_callback_handler(cb_idx);
  972. }
  973. /**
  974. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  975. * @ioc: per adapter object
  976. * @paddr: virtual address for SGE
  977. *
  978. * Create a zero length scatter gather entry to insure the IOCs hardware has
  979. * something to use if the target device goes brain dead and tries
  980. * to send data even when none is asked for.
  981. *
  982. * Return nothing.
  983. */
  984. void
  985. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  986. {
  987. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  988. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  989. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  990. MPI2_SGE_FLAGS_SHIFT);
  991. ioc->base_add_sg_single(paddr, flags_length, -1);
  992. }
  993. /**
  994. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  995. * @paddr: virtual address for SGE
  996. * @flags_length: SGE flags and data transfer length
  997. * @dma_addr: Physical address
  998. *
  999. * Return nothing.
  1000. */
  1001. static void
  1002. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1003. {
  1004. Mpi2SGESimple32_t *sgel = paddr;
  1005. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1006. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1007. sgel->FlagsLength = cpu_to_le32(flags_length);
  1008. sgel->Address = cpu_to_le32(dma_addr);
  1009. }
  1010. /**
  1011. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1012. * @paddr: virtual address for SGE
  1013. * @flags_length: SGE flags and data transfer length
  1014. * @dma_addr: Physical address
  1015. *
  1016. * Return nothing.
  1017. */
  1018. static void
  1019. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1020. {
  1021. Mpi2SGESimple64_t *sgel = paddr;
  1022. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1023. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1024. sgel->FlagsLength = cpu_to_le32(flags_length);
  1025. sgel->Address = cpu_to_le64(dma_addr);
  1026. }
  1027. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1028. /**
  1029. * _base_config_dma_addressing - set dma addressing
  1030. * @ioc: per adapter object
  1031. * @pdev: PCI device struct
  1032. *
  1033. * Returns 0 for success, non-zero for failure.
  1034. */
  1035. static int
  1036. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1037. {
  1038. struct sysinfo s;
  1039. char *desc = NULL;
  1040. if (sizeof(dma_addr_t) > 4) {
  1041. const uint64_t required_mask =
  1042. dma_get_required_mask(&pdev->dev);
  1043. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1044. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1045. DMA_BIT_MASK(64))) {
  1046. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1047. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1048. desc = "64";
  1049. goto out;
  1050. }
  1051. }
  1052. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1053. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1054. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1055. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1056. desc = "32";
  1057. } else
  1058. return -ENODEV;
  1059. out:
  1060. si_meminfo(&s);
  1061. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1062. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1063. return 0;
  1064. }
  1065. /**
  1066. * _base_check_enable_msix - checks MSIX capabable.
  1067. * @ioc: per adapter object
  1068. *
  1069. * Check to see if card is capable of MSIX, and set number
  1070. * of available msix vectors
  1071. */
  1072. static int
  1073. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1074. {
  1075. int base;
  1076. u16 message_control;
  1077. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1078. if (!base) {
  1079. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1080. "supported\n", ioc->name));
  1081. return -EINVAL;
  1082. }
  1083. /* get msix vector count */
  1084. /* NUMA_IO not supported for older controllers */
  1085. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1086. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1087. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1088. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1089. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1090. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1091. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1092. ioc->msix_vector_count = 1;
  1093. else {
  1094. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1095. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1096. }
  1097. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1098. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1099. return 0;
  1100. }
  1101. /**
  1102. * _base_free_irq - free irq
  1103. * @ioc: per adapter object
  1104. *
  1105. * Freeing respective reply_queue from the list.
  1106. */
  1107. static void
  1108. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1109. {
  1110. struct adapter_reply_queue *reply_q, *next;
  1111. if (list_empty(&ioc->reply_queue_list))
  1112. return;
  1113. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1114. list_del(&reply_q->list);
  1115. synchronize_irq(reply_q->vector);
  1116. free_irq(reply_q->vector, reply_q);
  1117. kfree(reply_q);
  1118. }
  1119. }
  1120. /**
  1121. * _base_request_irq - request irq
  1122. * @ioc: per adapter object
  1123. * @index: msix index into vector table
  1124. * @vector: irq vector
  1125. *
  1126. * Inserting respective reply_queue into the list.
  1127. */
  1128. static int
  1129. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1130. {
  1131. struct adapter_reply_queue *reply_q;
  1132. int r;
  1133. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1134. if (!reply_q) {
  1135. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1136. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1137. return -ENOMEM;
  1138. }
  1139. reply_q->ioc = ioc;
  1140. reply_q->msix_index = index;
  1141. reply_q->vector = vector;
  1142. atomic_set(&reply_q->busy, 0);
  1143. if (ioc->msix_enable)
  1144. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1145. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1146. else
  1147. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1148. MPT2SAS_DRIVER_NAME, ioc->id);
  1149. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1150. reply_q);
  1151. if (r) {
  1152. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1153. reply_q->name, vector);
  1154. kfree(reply_q);
  1155. return -EBUSY;
  1156. }
  1157. INIT_LIST_HEAD(&reply_q->list);
  1158. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1159. return 0;
  1160. }
  1161. /**
  1162. * _base_assign_reply_queues - assigning msix index for each cpu
  1163. * @ioc: per adapter object
  1164. *
  1165. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1166. *
  1167. * It would nice if we could call irq_set_affinity, however it is not
  1168. * an exported symbol
  1169. */
  1170. static void
  1171. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1172. {
  1173. struct adapter_reply_queue *reply_q;
  1174. int cpu_id;
  1175. int cpu_grouping, loop, grouping, grouping_mod;
  1176. if (!_base_is_controller_msix_enabled(ioc))
  1177. return;
  1178. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1179. /* when there are more cpus than available msix vectors,
  1180. * then group cpus togeather on same irq
  1181. */
  1182. if (ioc->cpu_count > ioc->msix_vector_count) {
  1183. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1184. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1185. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1186. cpu_grouping = 2;
  1187. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1188. cpu_grouping = 4;
  1189. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1190. cpu_grouping = 8;
  1191. else
  1192. cpu_grouping = 16;
  1193. } else
  1194. cpu_grouping = 0;
  1195. loop = 0;
  1196. reply_q = list_entry(ioc->reply_queue_list.next,
  1197. struct adapter_reply_queue, list);
  1198. for_each_online_cpu(cpu_id) {
  1199. if (!cpu_grouping) {
  1200. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1201. reply_q = list_entry(reply_q->list.next,
  1202. struct adapter_reply_queue, list);
  1203. } else {
  1204. if (loop < cpu_grouping) {
  1205. ioc->cpu_msix_table[cpu_id] =
  1206. reply_q->msix_index;
  1207. loop++;
  1208. } else {
  1209. reply_q = list_entry(reply_q->list.next,
  1210. struct adapter_reply_queue, list);
  1211. ioc->cpu_msix_table[cpu_id] =
  1212. reply_q->msix_index;
  1213. loop = 1;
  1214. }
  1215. }
  1216. }
  1217. }
  1218. /**
  1219. * _base_disable_msix - disables msix
  1220. * @ioc: per adapter object
  1221. *
  1222. */
  1223. static void
  1224. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1225. {
  1226. if (ioc->msix_enable) {
  1227. pci_disable_msix(ioc->pdev);
  1228. ioc->msix_enable = 0;
  1229. }
  1230. }
  1231. /**
  1232. * _base_enable_msix - enables msix, failback to io_apic
  1233. * @ioc: per adapter object
  1234. *
  1235. */
  1236. static int
  1237. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1238. {
  1239. struct msix_entry *entries, *a;
  1240. int r;
  1241. int i;
  1242. u8 try_msix = 0;
  1243. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1244. if (msix_disable == -1 || msix_disable == 0)
  1245. try_msix = 1;
  1246. if (!try_msix)
  1247. goto try_ioapic;
  1248. if (_base_check_enable_msix(ioc) != 0)
  1249. goto try_ioapic;
  1250. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1251. ioc->msix_vector_count);
  1252. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1253. GFP_KERNEL);
  1254. if (!entries) {
  1255. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1256. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1257. __LINE__, __func__));
  1258. goto try_ioapic;
  1259. }
  1260. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1261. a->entry = i;
  1262. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1263. if (r) {
  1264. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1265. "failed (r=%d) !!!\n", ioc->name, r));
  1266. kfree(entries);
  1267. goto try_ioapic;
  1268. }
  1269. ioc->msix_enable = 1;
  1270. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1271. r = _base_request_irq(ioc, i, a->vector);
  1272. if (r) {
  1273. _base_free_irq(ioc);
  1274. _base_disable_msix(ioc);
  1275. kfree(entries);
  1276. goto try_ioapic;
  1277. }
  1278. }
  1279. kfree(entries);
  1280. return 0;
  1281. /* failback to io_apic interrupt routing */
  1282. try_ioapic:
  1283. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1284. return r;
  1285. }
  1286. /**
  1287. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1288. * @ioc: per adapter object
  1289. *
  1290. * Returns 0 for success, non-zero for failure.
  1291. */
  1292. int
  1293. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1294. {
  1295. struct pci_dev *pdev = ioc->pdev;
  1296. u32 memap_sz;
  1297. u32 pio_sz;
  1298. int i, r = 0;
  1299. u64 pio_chip = 0;
  1300. u64 chip_phys = 0;
  1301. struct adapter_reply_queue *reply_q;
  1302. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1303. ioc->name, __func__));
  1304. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1305. if (pci_enable_device_mem(pdev)) {
  1306. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1307. "failed\n", ioc->name);
  1308. return -ENODEV;
  1309. }
  1310. if (pci_request_selected_regions(pdev, ioc->bars,
  1311. MPT2SAS_DRIVER_NAME)) {
  1312. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1313. "failed\n", ioc->name);
  1314. r = -ENODEV;
  1315. goto out_fail;
  1316. }
  1317. /* AER (Advanced Error Reporting) hooks */
  1318. pci_enable_pcie_error_reporting(pdev);
  1319. pci_set_master(pdev);
  1320. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1321. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1322. ioc->name, pci_name(pdev));
  1323. r = -ENODEV;
  1324. goto out_fail;
  1325. }
  1326. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1327. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1328. if (pio_sz)
  1329. continue;
  1330. pio_chip = (u64)pci_resource_start(pdev, i);
  1331. pio_sz = pci_resource_len(pdev, i);
  1332. } else {
  1333. if (memap_sz)
  1334. continue;
  1335. /* verify memory resource is valid before using */
  1336. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1337. ioc->chip_phys = pci_resource_start(pdev, i);
  1338. chip_phys = (u64)ioc->chip_phys;
  1339. memap_sz = pci_resource_len(pdev, i);
  1340. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1341. if (ioc->chip == NULL) {
  1342. printk(MPT2SAS_ERR_FMT "unable to map "
  1343. "adapter memory!\n", ioc->name);
  1344. r = -EINVAL;
  1345. goto out_fail;
  1346. }
  1347. }
  1348. }
  1349. }
  1350. _base_mask_interrupts(ioc);
  1351. r = _base_enable_msix(ioc);
  1352. if (r)
  1353. goto out_fail;
  1354. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1355. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1356. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1357. "IO-APIC enabled"), reply_q->vector);
  1358. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1359. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1360. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1361. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1362. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1363. pci_save_state(pdev);
  1364. return 0;
  1365. out_fail:
  1366. if (ioc->chip_phys)
  1367. iounmap(ioc->chip);
  1368. ioc->chip_phys = 0;
  1369. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1370. pci_disable_pcie_error_reporting(pdev);
  1371. pci_disable_device(pdev);
  1372. return r;
  1373. }
  1374. /**
  1375. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1376. * @ioc: per adapter object
  1377. * @smid: system request message index(smid zero is invalid)
  1378. *
  1379. * Returns virt pointer to message frame.
  1380. */
  1381. void *
  1382. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1383. {
  1384. return (void *)(ioc->request + (smid * ioc->request_sz));
  1385. }
  1386. /**
  1387. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1388. * @ioc: per adapter object
  1389. * @smid: system request message index
  1390. *
  1391. * Returns virt pointer to sense buffer.
  1392. */
  1393. void *
  1394. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1395. {
  1396. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1397. }
  1398. /**
  1399. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1400. * @ioc: per adapter object
  1401. * @smid: system request message index
  1402. *
  1403. * Returns phys pointer to the low 32bit address of the sense buffer.
  1404. */
  1405. __le32
  1406. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1407. {
  1408. return cpu_to_le32(ioc->sense_dma +
  1409. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1410. }
  1411. /**
  1412. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1413. * @ioc: per adapter object
  1414. * @phys_addr: lower 32 physical addr of the reply
  1415. *
  1416. * Converts 32bit lower physical addr into a virt address.
  1417. */
  1418. void *
  1419. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1420. {
  1421. if (!phys_addr)
  1422. return NULL;
  1423. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1424. }
  1425. /**
  1426. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1427. * @ioc: per adapter object
  1428. * @cb_idx: callback index
  1429. *
  1430. * Returns smid (zero is invalid)
  1431. */
  1432. u16
  1433. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1434. {
  1435. unsigned long flags;
  1436. struct request_tracker *request;
  1437. u16 smid;
  1438. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1439. if (list_empty(&ioc->internal_free_list)) {
  1440. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1441. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1442. ioc->name, __func__);
  1443. return 0;
  1444. }
  1445. request = list_entry(ioc->internal_free_list.next,
  1446. struct request_tracker, tracker_list);
  1447. request->cb_idx = cb_idx;
  1448. smid = request->smid;
  1449. list_del(&request->tracker_list);
  1450. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1451. return smid;
  1452. }
  1453. /**
  1454. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1455. * @ioc: per adapter object
  1456. * @cb_idx: callback index
  1457. * @scmd: pointer to scsi command object
  1458. *
  1459. * Returns smid (zero is invalid)
  1460. */
  1461. u16
  1462. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1463. struct scsi_cmnd *scmd)
  1464. {
  1465. unsigned long flags;
  1466. struct scsiio_tracker *request;
  1467. u16 smid;
  1468. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1469. if (list_empty(&ioc->free_list)) {
  1470. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1471. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1472. ioc->name, __func__);
  1473. return 0;
  1474. }
  1475. request = list_entry(ioc->free_list.next,
  1476. struct scsiio_tracker, tracker_list);
  1477. request->scmd = scmd;
  1478. request->cb_idx = cb_idx;
  1479. smid = request->smid;
  1480. list_del(&request->tracker_list);
  1481. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1482. return smid;
  1483. }
  1484. /**
  1485. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1486. * @ioc: per adapter object
  1487. * @cb_idx: callback index
  1488. *
  1489. * Returns smid (zero is invalid)
  1490. */
  1491. u16
  1492. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1493. {
  1494. unsigned long flags;
  1495. struct request_tracker *request;
  1496. u16 smid;
  1497. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1498. if (list_empty(&ioc->hpr_free_list)) {
  1499. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1500. return 0;
  1501. }
  1502. request = list_entry(ioc->hpr_free_list.next,
  1503. struct request_tracker, tracker_list);
  1504. request->cb_idx = cb_idx;
  1505. smid = request->smid;
  1506. list_del(&request->tracker_list);
  1507. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1508. return smid;
  1509. }
  1510. /**
  1511. * mpt2sas_base_free_smid - put smid back on free_list
  1512. * @ioc: per adapter object
  1513. * @smid: system request message index
  1514. *
  1515. * Return nothing.
  1516. */
  1517. void
  1518. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1519. {
  1520. unsigned long flags;
  1521. int i;
  1522. struct chain_tracker *chain_req, *next;
  1523. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1524. if (smid < ioc->hi_priority_smid) {
  1525. /* scsiio queue */
  1526. i = smid - 1;
  1527. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1528. list_for_each_entry_safe(chain_req, next,
  1529. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1530. list_del_init(&chain_req->tracker_list);
  1531. list_add_tail(&chain_req->tracker_list,
  1532. &ioc->free_chain_list);
  1533. }
  1534. }
  1535. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1536. ioc->scsi_lookup[i].scmd = NULL;
  1537. ioc->scsi_lookup[i].direct_io = 0;
  1538. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1539. &ioc->free_list);
  1540. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1541. /*
  1542. * See _wait_for_commands_to_complete() call with regards
  1543. * to this code.
  1544. */
  1545. if (ioc->shost_recovery && ioc->pending_io_count) {
  1546. if (ioc->pending_io_count == 1)
  1547. wake_up(&ioc->reset_wq);
  1548. ioc->pending_io_count--;
  1549. }
  1550. return;
  1551. } else if (smid < ioc->internal_smid) {
  1552. /* hi-priority */
  1553. i = smid - ioc->hi_priority_smid;
  1554. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1555. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1556. &ioc->hpr_free_list);
  1557. } else if (smid <= ioc->hba_queue_depth) {
  1558. /* internal queue */
  1559. i = smid - ioc->internal_smid;
  1560. ioc->internal_lookup[i].cb_idx = 0xFF;
  1561. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1562. &ioc->internal_free_list);
  1563. }
  1564. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1565. }
  1566. /**
  1567. * _base_writeq - 64 bit write to MMIO
  1568. * @ioc: per adapter object
  1569. * @b: data payload
  1570. * @addr: address in MMIO space
  1571. * @writeq_lock: spin lock
  1572. *
  1573. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1574. * care of 32 bit environment where its not quarenteed to send the entire word
  1575. * in one transfer.
  1576. */
  1577. #ifndef writeq
  1578. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1579. spinlock_t *writeq_lock)
  1580. {
  1581. unsigned long flags;
  1582. __u64 data_out = cpu_to_le64(b);
  1583. spin_lock_irqsave(writeq_lock, flags);
  1584. writel((u32)(data_out), addr);
  1585. writel((u32)(data_out >> 32), (addr + 4));
  1586. spin_unlock_irqrestore(writeq_lock, flags);
  1587. }
  1588. #else
  1589. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1590. spinlock_t *writeq_lock)
  1591. {
  1592. writeq(cpu_to_le64(b), addr);
  1593. }
  1594. #endif
  1595. static inline u8
  1596. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1597. {
  1598. return ioc->cpu_msix_table[smp_processor_id()];
  1599. }
  1600. /**
  1601. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1602. * @ioc: per adapter object
  1603. * @smid: system request message index
  1604. * @handle: device handle
  1605. *
  1606. * Return nothing.
  1607. */
  1608. void
  1609. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1610. {
  1611. Mpi2RequestDescriptorUnion_t descriptor;
  1612. u64 *request = (u64 *)&descriptor;
  1613. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1614. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1615. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1616. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1617. descriptor.SCSIIO.LMID = 0;
  1618. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1619. &ioc->scsi_lookup_lock);
  1620. }
  1621. /**
  1622. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1623. * @ioc: per adapter object
  1624. * @smid: system request message index
  1625. *
  1626. * Return nothing.
  1627. */
  1628. void
  1629. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1630. {
  1631. Mpi2RequestDescriptorUnion_t descriptor;
  1632. u64 *request = (u64 *)&descriptor;
  1633. descriptor.HighPriority.RequestFlags =
  1634. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1635. descriptor.HighPriority.MSIxIndex = 0;
  1636. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1637. descriptor.HighPriority.LMID = 0;
  1638. descriptor.HighPriority.Reserved1 = 0;
  1639. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1640. &ioc->scsi_lookup_lock);
  1641. }
  1642. /**
  1643. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1644. * @ioc: per adapter object
  1645. * @smid: system request message index
  1646. *
  1647. * Return nothing.
  1648. */
  1649. void
  1650. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1651. {
  1652. Mpi2RequestDescriptorUnion_t descriptor;
  1653. u64 *request = (u64 *)&descriptor;
  1654. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1655. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1656. descriptor.Default.SMID = cpu_to_le16(smid);
  1657. descriptor.Default.LMID = 0;
  1658. descriptor.Default.DescriptorTypeDependent = 0;
  1659. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1660. &ioc->scsi_lookup_lock);
  1661. }
  1662. /**
  1663. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1664. * @ioc: per adapter object
  1665. * @smid: system request message index
  1666. * @io_index: value used to track the IO
  1667. *
  1668. * Return nothing.
  1669. */
  1670. void
  1671. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1672. u16 io_index)
  1673. {
  1674. Mpi2RequestDescriptorUnion_t descriptor;
  1675. u64 *request = (u64 *)&descriptor;
  1676. descriptor.SCSITarget.RequestFlags =
  1677. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1678. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1679. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1680. descriptor.SCSITarget.LMID = 0;
  1681. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1682. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1683. &ioc->scsi_lookup_lock);
  1684. }
  1685. /**
  1686. * _base_display_dell_branding - Disply branding string
  1687. * @ioc: per adapter object
  1688. *
  1689. * Return nothing.
  1690. */
  1691. static void
  1692. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1693. {
  1694. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1695. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1696. return;
  1697. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1698. switch (ioc->pdev->subsystem_device) {
  1699. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1700. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1701. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1702. break;
  1703. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1704. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1705. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1706. break;
  1707. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1708. strncpy(dell_branding,
  1709. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1710. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1711. break;
  1712. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1713. strncpy(dell_branding,
  1714. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1715. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1716. break;
  1717. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1718. strncpy(dell_branding,
  1719. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1720. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1721. break;
  1722. case MPT2SAS_DELL_PERC_H200_SSDID:
  1723. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1724. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1725. break;
  1726. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1727. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1728. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1729. break;
  1730. default:
  1731. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1732. break;
  1733. }
  1734. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1735. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1736. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1737. ioc->pdev->subsystem_device);
  1738. }
  1739. /**
  1740. * _base_display_intel_branding - Display branding string
  1741. * @ioc: per adapter object
  1742. *
  1743. * Return nothing.
  1744. */
  1745. static void
  1746. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1747. {
  1748. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1749. return;
  1750. switch (ioc->pdev->device) {
  1751. case MPI2_MFGPAGE_DEVID_SAS2008:
  1752. switch (ioc->pdev->subsystem_device) {
  1753. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1754. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1755. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1756. break;
  1757. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1758. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1759. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1760. break;
  1761. case MPT2SAS_INTEL_RAMSDALE_SSDID:
  1762. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1763. MPT2SAS_INTEL_RAMSDALE_BRANDING);
  1764. break;
  1765. default:
  1766. break;
  1767. }
  1768. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1769. switch (ioc->pdev->subsystem_device) {
  1770. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1771. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1772. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1773. break;
  1774. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1775. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1776. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1777. break;
  1778. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1779. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1780. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1781. break;
  1782. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1783. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1784. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1785. break;
  1786. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1787. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1788. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1789. break;
  1790. default:
  1791. break;
  1792. }
  1793. default:
  1794. break;
  1795. }
  1796. }
  1797. /**
  1798. * _base_display_hp_branding - Display branding string
  1799. * @ioc: per adapter object
  1800. *
  1801. * Return nothing.
  1802. */
  1803. static void
  1804. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1805. {
  1806. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1807. return;
  1808. switch (ioc->pdev->device) {
  1809. case MPI2_MFGPAGE_DEVID_SAS2004:
  1810. switch (ioc->pdev->subsystem_device) {
  1811. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1812. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1813. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1814. break;
  1815. default:
  1816. break;
  1817. }
  1818. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1819. switch (ioc->pdev->subsystem_device) {
  1820. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1821. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1822. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1823. break;
  1824. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1825. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1826. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1827. break;
  1828. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1829. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1830. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1831. break;
  1832. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1833. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1834. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1835. break;
  1836. default:
  1837. break;
  1838. }
  1839. default:
  1840. break;
  1841. }
  1842. }
  1843. /**
  1844. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1845. * @ioc: per adapter object
  1846. *
  1847. * Return nothing.
  1848. */
  1849. static void
  1850. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1851. {
  1852. int i = 0;
  1853. char desc[16];
  1854. u32 iounit_pg1_flags;
  1855. u32 bios_version;
  1856. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1857. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1858. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1859. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1860. ioc->name, desc,
  1861. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1862. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1863. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1864. ioc->facts.FWVersion.Word & 0x000000FF,
  1865. ioc->pdev->revision,
  1866. (bios_version & 0xFF000000) >> 24,
  1867. (bios_version & 0x00FF0000) >> 16,
  1868. (bios_version & 0x0000FF00) >> 8,
  1869. bios_version & 0x000000FF);
  1870. _base_display_dell_branding(ioc);
  1871. _base_display_intel_branding(ioc);
  1872. _base_display_hp_branding(ioc);
  1873. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1874. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1875. printk("Initiator");
  1876. i++;
  1877. }
  1878. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1879. printk("%sTarget", i ? "," : "");
  1880. i++;
  1881. }
  1882. i = 0;
  1883. printk("), ");
  1884. printk("Capabilities=(");
  1885. if (!ioc->hide_ir_msg) {
  1886. if (ioc->facts.IOCCapabilities &
  1887. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1888. printk("Raid");
  1889. i++;
  1890. }
  1891. }
  1892. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1893. printk("%sTLR", i ? "," : "");
  1894. i++;
  1895. }
  1896. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1897. printk("%sMulticast", i ? "," : "");
  1898. i++;
  1899. }
  1900. if (ioc->facts.IOCCapabilities &
  1901. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1902. printk("%sBIDI Target", i ? "," : "");
  1903. i++;
  1904. }
  1905. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1906. printk("%sEEDP", i ? "," : "");
  1907. i++;
  1908. }
  1909. if (ioc->facts.IOCCapabilities &
  1910. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1911. printk("%sSnapshot Buffer", i ? "," : "");
  1912. i++;
  1913. }
  1914. if (ioc->facts.IOCCapabilities &
  1915. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1916. printk("%sDiag Trace Buffer", i ? "," : "");
  1917. i++;
  1918. }
  1919. if (ioc->facts.IOCCapabilities &
  1920. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1921. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1922. i++;
  1923. }
  1924. if (ioc->facts.IOCCapabilities &
  1925. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1926. printk("%sTask Set Full", i ? "," : "");
  1927. i++;
  1928. }
  1929. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1930. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1931. printk("%sNCQ", i ? "," : "");
  1932. i++;
  1933. }
  1934. printk(")\n");
  1935. }
  1936. /**
  1937. * _base_update_missing_delay - change the missing delay timers
  1938. * @ioc: per adapter object
  1939. * @device_missing_delay: amount of time till device is reported missing
  1940. * @io_missing_delay: interval IO is returned when there is a missing device
  1941. *
  1942. * Return nothing.
  1943. *
  1944. * Passed on the command line, this function will modify the device missing
  1945. * delay, as well as the io missing delay. This should be called at driver
  1946. * load time.
  1947. */
  1948. static void
  1949. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1950. u16 device_missing_delay, u8 io_missing_delay)
  1951. {
  1952. u16 dmd, dmd_new, dmd_orignal;
  1953. u8 io_missing_delay_original;
  1954. u16 sz;
  1955. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1956. Mpi2ConfigReply_t mpi_reply;
  1957. u8 num_phys = 0;
  1958. u16 ioc_status;
  1959. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1960. if (!num_phys)
  1961. return;
  1962. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1963. sizeof(Mpi2SasIOUnit1PhyData_t));
  1964. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1965. if (!sas_iounit_pg1) {
  1966. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1967. ioc->name, __FILE__, __LINE__, __func__);
  1968. goto out;
  1969. }
  1970. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1971. sas_iounit_pg1, sz))) {
  1972. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1973. ioc->name, __FILE__, __LINE__, __func__);
  1974. goto out;
  1975. }
  1976. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1977. MPI2_IOCSTATUS_MASK;
  1978. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1979. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1980. ioc->name, __FILE__, __LINE__, __func__);
  1981. goto out;
  1982. }
  1983. /* device missing delay */
  1984. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1985. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1986. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1987. else
  1988. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1989. dmd_orignal = dmd;
  1990. if (device_missing_delay > 0x7F) {
  1991. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1992. device_missing_delay;
  1993. dmd = dmd / 16;
  1994. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1995. } else
  1996. dmd = device_missing_delay;
  1997. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1998. /* io missing delay */
  1999. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2000. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2001. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2002. sz)) {
  2003. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2004. dmd_new = (dmd &
  2005. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2006. else
  2007. dmd_new =
  2008. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2009. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2010. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2011. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2012. "new(%d)\n", ioc->name, io_missing_delay_original,
  2013. io_missing_delay);
  2014. ioc->device_missing_delay = dmd_new;
  2015. ioc->io_missing_delay = io_missing_delay;
  2016. }
  2017. out:
  2018. kfree(sas_iounit_pg1);
  2019. }
  2020. /**
  2021. * _base_static_config_pages - static start of day config pages
  2022. * @ioc: per adapter object
  2023. *
  2024. * Return nothing.
  2025. */
  2026. static void
  2027. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2028. {
  2029. Mpi2ConfigReply_t mpi_reply;
  2030. u32 iounit_pg1_flags;
  2031. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2032. if (ioc->ir_firmware)
  2033. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2034. &ioc->manu_pg10);
  2035. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2036. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2037. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2038. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2039. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2040. _base_display_ioc_capabilities(ioc);
  2041. /*
  2042. * Enable task_set_full handling in iounit_pg1 when the
  2043. * facts capabilities indicate that its supported.
  2044. */
  2045. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2046. if ((ioc->facts.IOCCapabilities &
  2047. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2048. iounit_pg1_flags &=
  2049. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2050. else
  2051. iounit_pg1_flags |=
  2052. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2053. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2054. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2055. }
  2056. /**
  2057. * _base_release_memory_pools - release memory
  2058. * @ioc: per adapter object
  2059. *
  2060. * Free memory allocated from _base_allocate_memory_pools.
  2061. *
  2062. * Return nothing.
  2063. */
  2064. static void
  2065. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2066. {
  2067. int i;
  2068. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2069. __func__));
  2070. if (ioc->request) {
  2071. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2072. ioc->request, ioc->request_dma);
  2073. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2074. ": free\n", ioc->name, ioc->request));
  2075. ioc->request = NULL;
  2076. }
  2077. if (ioc->sense) {
  2078. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2079. if (ioc->sense_dma_pool)
  2080. pci_pool_destroy(ioc->sense_dma_pool);
  2081. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2082. ": free\n", ioc->name, ioc->sense));
  2083. ioc->sense = NULL;
  2084. }
  2085. if (ioc->reply) {
  2086. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2087. if (ioc->reply_dma_pool)
  2088. pci_pool_destroy(ioc->reply_dma_pool);
  2089. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2090. ": free\n", ioc->name, ioc->reply));
  2091. ioc->reply = NULL;
  2092. }
  2093. if (ioc->reply_free) {
  2094. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2095. ioc->reply_free_dma);
  2096. if (ioc->reply_free_dma_pool)
  2097. pci_pool_destroy(ioc->reply_free_dma_pool);
  2098. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2099. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2100. ioc->reply_free = NULL;
  2101. }
  2102. if (ioc->reply_post_free) {
  2103. pci_pool_free(ioc->reply_post_free_dma_pool,
  2104. ioc->reply_post_free, ioc->reply_post_free_dma);
  2105. if (ioc->reply_post_free_dma_pool)
  2106. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2107. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2108. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2109. ioc->reply_post_free));
  2110. ioc->reply_post_free = NULL;
  2111. }
  2112. if (ioc->config_page) {
  2113. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2114. "config_page(0x%p): free\n", ioc->name,
  2115. ioc->config_page));
  2116. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2117. ioc->config_page, ioc->config_page_dma);
  2118. }
  2119. if (ioc->scsi_lookup) {
  2120. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2121. ioc->scsi_lookup = NULL;
  2122. }
  2123. kfree(ioc->hpr_lookup);
  2124. kfree(ioc->internal_lookup);
  2125. if (ioc->chain_lookup) {
  2126. for (i = 0; i < ioc->chain_depth; i++) {
  2127. if (ioc->chain_lookup[i].chain_buffer)
  2128. pci_pool_free(ioc->chain_dma_pool,
  2129. ioc->chain_lookup[i].chain_buffer,
  2130. ioc->chain_lookup[i].chain_buffer_dma);
  2131. }
  2132. if (ioc->chain_dma_pool)
  2133. pci_pool_destroy(ioc->chain_dma_pool);
  2134. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2135. ioc->chain_lookup = NULL;
  2136. }
  2137. }
  2138. /**
  2139. * _base_allocate_memory_pools - allocate start of day memory pools
  2140. * @ioc: per adapter object
  2141. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2142. *
  2143. * Returns 0 success, anything else error
  2144. */
  2145. static int
  2146. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2147. {
  2148. struct mpt2sas_facts *facts;
  2149. u16 max_sge_elements;
  2150. u16 chains_needed_per_io;
  2151. u32 sz, total_sz, reply_post_free_sz;
  2152. u32 retry_sz;
  2153. u16 max_request_credit;
  2154. int i;
  2155. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2156. __func__));
  2157. retry_sz = 0;
  2158. facts = &ioc->facts;
  2159. /* command line tunables for max sgl entries */
  2160. if (max_sgl_entries != -1) {
  2161. ioc->shost->sg_tablesize = (max_sgl_entries <
  2162. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2163. MPT2SAS_SG_DEPTH;
  2164. } else {
  2165. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2166. }
  2167. /* command line tunables for max controller queue depth */
  2168. if (max_queue_depth != -1)
  2169. max_request_credit = (max_queue_depth < facts->RequestCredit)
  2170. ? max_queue_depth : facts->RequestCredit;
  2171. else
  2172. max_request_credit = min_t(u16, facts->RequestCredit,
  2173. MAX_HBA_QUEUE_DEPTH);
  2174. ioc->hba_queue_depth = max_request_credit;
  2175. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2176. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2177. /* request frame size */
  2178. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2179. /* reply frame size */
  2180. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2181. retry_allocation:
  2182. total_sz = 0;
  2183. /* calculate number of sg elements left over in the 1st frame */
  2184. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2185. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2186. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2187. /* now do the same for a chain buffer */
  2188. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2189. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2190. ioc->chain_offset_value_for_main_message =
  2191. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2192. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2193. /*
  2194. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2195. */
  2196. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2197. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2198. + 1;
  2199. if (chains_needed_per_io > facts->MaxChainDepth) {
  2200. chains_needed_per_io = facts->MaxChainDepth;
  2201. ioc->shost->sg_tablesize = min_t(u16,
  2202. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2203. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2204. }
  2205. ioc->chains_needed_per_io = chains_needed_per_io;
  2206. /* reply free queue sizing - taking into account for 64 FW events */
  2207. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2208. /* align the reply post queue on the next 16 count boundary */
  2209. if (!ioc->reply_free_queue_depth % 16)
  2210. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
  2211. else
  2212. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
  2213. 32 - (ioc->reply_free_queue_depth % 16);
  2214. if (ioc->reply_post_queue_depth >
  2215. facts->MaxReplyDescriptorPostQueueDepth) {
  2216. ioc->reply_post_queue_depth = min_t(u16,
  2217. (facts->MaxReplyDescriptorPostQueueDepth -
  2218. (facts->MaxReplyDescriptorPostQueueDepth % 16)),
  2219. (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
  2220. ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
  2221. ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
  2222. }
  2223. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2224. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2225. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2226. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2227. ioc->chains_needed_per_io));
  2228. ioc->scsiio_depth = ioc->hba_queue_depth -
  2229. ioc->hi_priority_depth - ioc->internal_depth;
  2230. /* set the scsi host can_queue depth
  2231. * with some internal commands that could be outstanding
  2232. */
  2233. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2234. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2235. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2236. /* contiguous pool for request and chains, 16 byte align, one extra "
  2237. * "frame for smid=0
  2238. */
  2239. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2240. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2241. /* hi-priority queue */
  2242. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2243. /* internal queue */
  2244. sz += (ioc->internal_depth * ioc->request_sz);
  2245. ioc->request_dma_sz = sz;
  2246. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2247. if (!ioc->request) {
  2248. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2249. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2250. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2251. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2252. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2253. goto out;
  2254. retry_sz += 64;
  2255. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2256. goto retry_allocation;
  2257. }
  2258. if (retry_sz)
  2259. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2260. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2261. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2262. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2263. /* hi-priority queue */
  2264. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2265. ioc->request_sz);
  2266. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2267. ioc->request_sz);
  2268. /* internal queue */
  2269. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2270. ioc->request_sz);
  2271. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2272. ioc->request_sz);
  2273. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2274. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2275. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2276. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2277. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2278. ioc->name, (unsigned long long) ioc->request_dma));
  2279. total_sz += sz;
  2280. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2281. ioc->scsi_lookup_pages = get_order(sz);
  2282. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2283. GFP_KERNEL, ioc->scsi_lookup_pages);
  2284. if (!ioc->scsi_lookup) {
  2285. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2286. "sz(%d)\n", ioc->name, (int)sz);
  2287. goto out;
  2288. }
  2289. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2290. "depth(%d)\n", ioc->name, ioc->request,
  2291. ioc->scsiio_depth));
  2292. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2293. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2294. ioc->chain_pages = get_order(sz);
  2295. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2296. GFP_KERNEL, ioc->chain_pages);
  2297. if (!ioc->chain_lookup) {
  2298. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2299. "sz(%d)\n", ioc->name, (int)sz);
  2300. goto out;
  2301. }
  2302. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2303. ioc->request_sz, 16, 0);
  2304. if (!ioc->chain_dma_pool) {
  2305. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2306. "failed\n", ioc->name);
  2307. goto out;
  2308. }
  2309. for (i = 0; i < ioc->chain_depth; i++) {
  2310. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2311. ioc->chain_dma_pool , GFP_KERNEL,
  2312. &ioc->chain_lookup[i].chain_buffer_dma);
  2313. if (!ioc->chain_lookup[i].chain_buffer) {
  2314. ioc->chain_depth = i;
  2315. goto chain_done;
  2316. }
  2317. total_sz += ioc->request_sz;
  2318. }
  2319. chain_done:
  2320. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2321. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2322. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2323. ioc->request_sz))/1024));
  2324. /* initialize hi-priority queue smid's */
  2325. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2326. sizeof(struct request_tracker), GFP_KERNEL);
  2327. if (!ioc->hpr_lookup) {
  2328. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2329. ioc->name);
  2330. goto out;
  2331. }
  2332. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2333. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2334. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2335. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2336. /* initialize internal queue smid's */
  2337. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2338. sizeof(struct request_tracker), GFP_KERNEL);
  2339. if (!ioc->internal_lookup) {
  2340. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2341. ioc->name);
  2342. goto out;
  2343. }
  2344. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2345. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2346. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2347. ioc->internal_depth, ioc->internal_smid));
  2348. /* sense buffers, 4 byte align */
  2349. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2350. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2351. 0);
  2352. if (!ioc->sense_dma_pool) {
  2353. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2354. ioc->name);
  2355. goto out;
  2356. }
  2357. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2358. &ioc->sense_dma);
  2359. if (!ioc->sense) {
  2360. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2361. ioc->name);
  2362. goto out;
  2363. }
  2364. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2365. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2366. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2367. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2368. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2369. ioc->name, (unsigned long long)ioc->sense_dma));
  2370. total_sz += sz;
  2371. /* reply pool, 4 byte align */
  2372. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2373. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2374. 0);
  2375. if (!ioc->reply_dma_pool) {
  2376. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2377. ioc->name);
  2378. goto out;
  2379. }
  2380. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2381. &ioc->reply_dma);
  2382. if (!ioc->reply) {
  2383. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2384. ioc->name);
  2385. goto out;
  2386. }
  2387. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2388. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2389. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2390. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2391. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2392. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2393. ioc->name, (unsigned long long)ioc->reply_dma));
  2394. total_sz += sz;
  2395. /* reply free queue, 16 byte align */
  2396. sz = ioc->reply_free_queue_depth * 4;
  2397. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2398. ioc->pdev, sz, 16, 0);
  2399. if (!ioc->reply_free_dma_pool) {
  2400. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2401. "failed\n", ioc->name);
  2402. goto out;
  2403. }
  2404. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2405. &ioc->reply_free_dma);
  2406. if (!ioc->reply_free) {
  2407. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2408. "failed\n", ioc->name);
  2409. goto out;
  2410. }
  2411. memset(ioc->reply_free, 0, sz);
  2412. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2413. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2414. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2415. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2416. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2417. total_sz += sz;
  2418. /* reply post queue, 16 byte align */
  2419. reply_post_free_sz = ioc->reply_post_queue_depth *
  2420. sizeof(Mpi2DefaultReplyDescriptor_t);
  2421. if (_base_is_controller_msix_enabled(ioc))
  2422. sz = reply_post_free_sz * ioc->reply_queue_count;
  2423. else
  2424. sz = reply_post_free_sz;
  2425. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2426. ioc->pdev, sz, 16, 0);
  2427. if (!ioc->reply_post_free_dma_pool) {
  2428. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2429. "failed\n", ioc->name);
  2430. goto out;
  2431. }
  2432. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2433. GFP_KERNEL, &ioc->reply_post_free_dma);
  2434. if (!ioc->reply_post_free) {
  2435. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2436. "failed\n", ioc->name);
  2437. goto out;
  2438. }
  2439. memset(ioc->reply_post_free, 0, sz);
  2440. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2441. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2442. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2443. sz/1024));
  2444. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2445. "(0x%llx)\n", ioc->name, (unsigned long long)
  2446. ioc->reply_post_free_dma));
  2447. total_sz += sz;
  2448. ioc->config_page_sz = 512;
  2449. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2450. ioc->config_page_sz, &ioc->config_page_dma);
  2451. if (!ioc->config_page) {
  2452. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2453. "failed\n", ioc->name);
  2454. goto out;
  2455. }
  2456. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2457. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2458. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2459. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2460. total_sz += ioc->config_page_sz;
  2461. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2462. ioc->name, total_sz/1024);
  2463. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2464. "Max Controller Queue Depth(%d)\n",
  2465. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2466. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2467. ioc->name, ioc->shost->sg_tablesize);
  2468. return 0;
  2469. out:
  2470. return -ENOMEM;
  2471. }
  2472. /**
  2473. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2474. * @ioc: Pointer to MPT_ADAPTER structure
  2475. * @cooked: Request raw or cooked IOC state
  2476. *
  2477. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2478. * Doorbell bits in MPI_IOC_STATE_MASK.
  2479. */
  2480. u32
  2481. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2482. {
  2483. u32 s, sc;
  2484. s = readl(&ioc->chip->Doorbell);
  2485. sc = s & MPI2_IOC_STATE_MASK;
  2486. return cooked ? sc : s;
  2487. }
  2488. /**
  2489. * _base_wait_on_iocstate - waiting on a particular ioc state
  2490. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2491. * @timeout: timeout in second
  2492. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2493. *
  2494. * Returns 0 for success, non-zero for failure.
  2495. */
  2496. static int
  2497. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2498. int sleep_flag)
  2499. {
  2500. u32 count, cntdn;
  2501. u32 current_state;
  2502. count = 0;
  2503. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2504. do {
  2505. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2506. if (current_state == ioc_state)
  2507. return 0;
  2508. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2509. break;
  2510. if (sleep_flag == CAN_SLEEP)
  2511. msleep(1);
  2512. else
  2513. udelay(500);
  2514. count++;
  2515. } while (--cntdn);
  2516. return current_state;
  2517. }
  2518. /**
  2519. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2520. * a write to the doorbell)
  2521. * @ioc: per adapter object
  2522. * @timeout: timeout in second
  2523. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2524. *
  2525. * Returns 0 for success, non-zero for failure.
  2526. *
  2527. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2528. */
  2529. static int
  2530. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2531. int sleep_flag)
  2532. {
  2533. u32 cntdn, count;
  2534. u32 int_status;
  2535. count = 0;
  2536. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2537. do {
  2538. int_status = readl(&ioc->chip->HostInterruptStatus);
  2539. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2540. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2541. "successful count(%d), timeout(%d)\n", ioc->name,
  2542. __func__, count, timeout));
  2543. return 0;
  2544. }
  2545. if (sleep_flag == CAN_SLEEP)
  2546. msleep(1);
  2547. else
  2548. udelay(500);
  2549. count++;
  2550. } while (--cntdn);
  2551. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2552. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2553. return -EFAULT;
  2554. }
  2555. /**
  2556. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2557. * @ioc: per adapter object
  2558. * @timeout: timeout in second
  2559. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2560. *
  2561. * Returns 0 for success, non-zero for failure.
  2562. *
  2563. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2564. * doorbell.
  2565. */
  2566. static int
  2567. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2568. int sleep_flag)
  2569. {
  2570. u32 cntdn, count;
  2571. u32 int_status;
  2572. u32 doorbell;
  2573. count = 0;
  2574. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2575. do {
  2576. int_status = readl(&ioc->chip->HostInterruptStatus);
  2577. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2578. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2579. "successful count(%d), timeout(%d)\n", ioc->name,
  2580. __func__, count, timeout));
  2581. return 0;
  2582. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2583. doorbell = readl(&ioc->chip->Doorbell);
  2584. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2585. MPI2_IOC_STATE_FAULT) {
  2586. mpt2sas_base_fault_info(ioc , doorbell);
  2587. return -EFAULT;
  2588. }
  2589. } else if (int_status == 0xFFFFFFFF)
  2590. goto out;
  2591. if (sleep_flag == CAN_SLEEP)
  2592. msleep(1);
  2593. else
  2594. udelay(500);
  2595. count++;
  2596. } while (--cntdn);
  2597. out:
  2598. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2599. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2600. return -EFAULT;
  2601. }
  2602. /**
  2603. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2604. * @ioc: per adapter object
  2605. * @timeout: timeout in second
  2606. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2607. *
  2608. * Returns 0 for success, non-zero for failure.
  2609. *
  2610. */
  2611. static int
  2612. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2613. int sleep_flag)
  2614. {
  2615. u32 cntdn, count;
  2616. u32 doorbell_reg;
  2617. count = 0;
  2618. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2619. do {
  2620. doorbell_reg = readl(&ioc->chip->Doorbell);
  2621. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2622. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2623. "successful count(%d), timeout(%d)\n", ioc->name,
  2624. __func__, count, timeout));
  2625. return 0;
  2626. }
  2627. if (sleep_flag == CAN_SLEEP)
  2628. msleep(1);
  2629. else
  2630. udelay(500);
  2631. count++;
  2632. } while (--cntdn);
  2633. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2634. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2635. return -EFAULT;
  2636. }
  2637. /**
  2638. * _base_send_ioc_reset - send doorbell reset
  2639. * @ioc: per adapter object
  2640. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2641. * @timeout: timeout in second
  2642. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2643. *
  2644. * Returns 0 for success, non-zero for failure.
  2645. */
  2646. static int
  2647. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2648. int sleep_flag)
  2649. {
  2650. u32 ioc_state;
  2651. int r = 0;
  2652. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2653. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2654. ioc->name, __func__);
  2655. return -EFAULT;
  2656. }
  2657. if (!(ioc->facts.IOCCapabilities &
  2658. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2659. return -EFAULT;
  2660. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2661. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2662. &ioc->chip->Doorbell);
  2663. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2664. r = -EFAULT;
  2665. goto out;
  2666. }
  2667. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2668. timeout, sleep_flag);
  2669. if (ioc_state) {
  2670. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2671. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2672. r = -EFAULT;
  2673. goto out;
  2674. }
  2675. out:
  2676. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2677. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2678. return r;
  2679. }
  2680. /**
  2681. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2682. * @ioc: per adapter object
  2683. * @request_bytes: request length
  2684. * @request: pointer having request payload
  2685. * @reply_bytes: reply length
  2686. * @reply: pointer to reply payload
  2687. * @timeout: timeout in second
  2688. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2689. *
  2690. * Returns 0 for success, non-zero for failure.
  2691. */
  2692. static int
  2693. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2694. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2695. {
  2696. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2697. int i;
  2698. u8 failed;
  2699. u16 dummy;
  2700. __le32 *mfp;
  2701. /* make sure doorbell is not in use */
  2702. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2703. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2704. " (line=%d)\n", ioc->name, __LINE__);
  2705. return -EFAULT;
  2706. }
  2707. /* clear pending doorbell interrupts from previous state changes */
  2708. if (readl(&ioc->chip->HostInterruptStatus) &
  2709. MPI2_HIS_IOC2SYS_DB_STATUS)
  2710. writel(0, &ioc->chip->HostInterruptStatus);
  2711. /* send message to ioc */
  2712. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2713. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2714. &ioc->chip->Doorbell);
  2715. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2716. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2717. "int failed (line=%d)\n", ioc->name, __LINE__);
  2718. return -EFAULT;
  2719. }
  2720. writel(0, &ioc->chip->HostInterruptStatus);
  2721. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2722. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2723. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2724. return -EFAULT;
  2725. }
  2726. /* send message 32-bits at a time */
  2727. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2728. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2729. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2730. failed = 1;
  2731. }
  2732. if (failed) {
  2733. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2734. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2735. return -EFAULT;
  2736. }
  2737. /* now wait for the reply */
  2738. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2739. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2740. "int failed (line=%d)\n", ioc->name, __LINE__);
  2741. return -EFAULT;
  2742. }
  2743. /* read the first two 16-bits, it gives the total length of the reply */
  2744. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2745. & MPI2_DOORBELL_DATA_MASK);
  2746. writel(0, &ioc->chip->HostInterruptStatus);
  2747. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2748. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2749. "int failed (line=%d)\n", ioc->name, __LINE__);
  2750. return -EFAULT;
  2751. }
  2752. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2753. & MPI2_DOORBELL_DATA_MASK);
  2754. writel(0, &ioc->chip->HostInterruptStatus);
  2755. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2756. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2757. printk(MPT2SAS_ERR_FMT "doorbell "
  2758. "handshake int failed (line=%d)\n", ioc->name,
  2759. __LINE__);
  2760. return -EFAULT;
  2761. }
  2762. if (i >= reply_bytes/2) /* overflow case */
  2763. dummy = readl(&ioc->chip->Doorbell);
  2764. else
  2765. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2766. & MPI2_DOORBELL_DATA_MASK);
  2767. writel(0, &ioc->chip->HostInterruptStatus);
  2768. }
  2769. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2770. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2771. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2772. " (line=%d)\n", ioc->name, __LINE__));
  2773. }
  2774. writel(0, &ioc->chip->HostInterruptStatus);
  2775. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2776. mfp = (__le32 *)reply;
  2777. printk(KERN_INFO "\toffset:data\n");
  2778. for (i = 0; i < reply_bytes/4; i++)
  2779. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2780. le32_to_cpu(mfp[i]));
  2781. }
  2782. return 0;
  2783. }
  2784. /**
  2785. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2786. * @ioc: per adapter object
  2787. * @mpi_reply: the reply payload from FW
  2788. * @mpi_request: the request payload sent to FW
  2789. *
  2790. * The SAS IO Unit Control Request message allows the host to perform low-level
  2791. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2792. * to obtain the IOC assigned device handles for a device if it has other
  2793. * identifying information about the device, in addition allows the host to
  2794. * remove IOC resources associated with the device.
  2795. *
  2796. * Returns 0 for success, non-zero for failure.
  2797. */
  2798. int
  2799. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2800. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2801. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2802. {
  2803. u16 smid;
  2804. u32 ioc_state;
  2805. unsigned long timeleft;
  2806. u8 issue_reset;
  2807. int rc;
  2808. void *request;
  2809. u16 wait_state_count;
  2810. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2811. __func__));
  2812. mutex_lock(&ioc->base_cmds.mutex);
  2813. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2814. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2815. ioc->name, __func__);
  2816. rc = -EAGAIN;
  2817. goto out;
  2818. }
  2819. wait_state_count = 0;
  2820. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2821. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2822. if (wait_state_count++ == 10) {
  2823. printk(MPT2SAS_ERR_FMT
  2824. "%s: failed due to ioc not operational\n",
  2825. ioc->name, __func__);
  2826. rc = -EFAULT;
  2827. goto out;
  2828. }
  2829. ssleep(1);
  2830. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2831. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2832. "operational state(count=%d)\n", ioc->name,
  2833. __func__, wait_state_count);
  2834. }
  2835. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2836. if (!smid) {
  2837. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2838. ioc->name, __func__);
  2839. rc = -EAGAIN;
  2840. goto out;
  2841. }
  2842. rc = 0;
  2843. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2844. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2845. ioc->base_cmds.smid = smid;
  2846. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2847. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2848. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2849. ioc->ioc_link_reset_in_progress = 1;
  2850. init_completion(&ioc->base_cmds.done);
  2851. mpt2sas_base_put_smid_default(ioc, smid);
  2852. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2853. msecs_to_jiffies(10000));
  2854. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2855. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2856. ioc->ioc_link_reset_in_progress)
  2857. ioc->ioc_link_reset_in_progress = 0;
  2858. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2859. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2860. ioc->name, __func__);
  2861. _debug_dump_mf(mpi_request,
  2862. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2863. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2864. issue_reset = 1;
  2865. goto issue_host_reset;
  2866. }
  2867. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2868. memcpy(mpi_reply, ioc->base_cmds.reply,
  2869. sizeof(Mpi2SasIoUnitControlReply_t));
  2870. else
  2871. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2872. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2873. goto out;
  2874. issue_host_reset:
  2875. if (issue_reset)
  2876. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2877. FORCE_BIG_HAMMER);
  2878. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2879. rc = -EFAULT;
  2880. out:
  2881. mutex_unlock(&ioc->base_cmds.mutex);
  2882. return rc;
  2883. }
  2884. /**
  2885. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2886. * @ioc: per adapter object
  2887. * @mpi_reply: the reply payload from FW
  2888. * @mpi_request: the request payload sent to FW
  2889. *
  2890. * The SCSI Enclosure Processor request message causes the IOC to
  2891. * communicate with SES devices to control LED status signals.
  2892. *
  2893. * Returns 0 for success, non-zero for failure.
  2894. */
  2895. int
  2896. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2897. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2898. {
  2899. u16 smid;
  2900. u32 ioc_state;
  2901. unsigned long timeleft;
  2902. u8 issue_reset;
  2903. int rc;
  2904. void *request;
  2905. u16 wait_state_count;
  2906. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2907. __func__));
  2908. mutex_lock(&ioc->base_cmds.mutex);
  2909. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2910. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2911. ioc->name, __func__);
  2912. rc = -EAGAIN;
  2913. goto out;
  2914. }
  2915. wait_state_count = 0;
  2916. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2917. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2918. if (wait_state_count++ == 10) {
  2919. printk(MPT2SAS_ERR_FMT
  2920. "%s: failed due to ioc not operational\n",
  2921. ioc->name, __func__);
  2922. rc = -EFAULT;
  2923. goto out;
  2924. }
  2925. ssleep(1);
  2926. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2927. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2928. "operational state(count=%d)\n", ioc->name,
  2929. __func__, wait_state_count);
  2930. }
  2931. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2932. if (!smid) {
  2933. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2934. ioc->name, __func__);
  2935. rc = -EAGAIN;
  2936. goto out;
  2937. }
  2938. rc = 0;
  2939. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2940. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2941. ioc->base_cmds.smid = smid;
  2942. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2943. init_completion(&ioc->base_cmds.done);
  2944. mpt2sas_base_put_smid_default(ioc, smid);
  2945. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2946. msecs_to_jiffies(10000));
  2947. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2948. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2949. ioc->name, __func__);
  2950. _debug_dump_mf(mpi_request,
  2951. sizeof(Mpi2SepRequest_t)/4);
  2952. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2953. issue_reset = 1;
  2954. goto issue_host_reset;
  2955. }
  2956. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2957. memcpy(mpi_reply, ioc->base_cmds.reply,
  2958. sizeof(Mpi2SepReply_t));
  2959. else
  2960. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2961. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2962. goto out;
  2963. issue_host_reset:
  2964. if (issue_reset)
  2965. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2966. FORCE_BIG_HAMMER);
  2967. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2968. rc = -EFAULT;
  2969. out:
  2970. mutex_unlock(&ioc->base_cmds.mutex);
  2971. return rc;
  2972. }
  2973. /**
  2974. * _base_get_port_facts - obtain port facts reply and save in ioc
  2975. * @ioc: per adapter object
  2976. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2977. *
  2978. * Returns 0 for success, non-zero for failure.
  2979. */
  2980. static int
  2981. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2982. {
  2983. Mpi2PortFactsRequest_t mpi_request;
  2984. Mpi2PortFactsReply_t mpi_reply;
  2985. struct mpt2sas_port_facts *pfacts;
  2986. int mpi_reply_sz, mpi_request_sz, r;
  2987. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2988. __func__));
  2989. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2990. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2991. memset(&mpi_request, 0, mpi_request_sz);
  2992. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2993. mpi_request.PortNumber = port;
  2994. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2995. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2996. if (r != 0) {
  2997. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2998. ioc->name, __func__, r);
  2999. return r;
  3000. }
  3001. pfacts = &ioc->pfacts[port];
  3002. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  3003. pfacts->PortNumber = mpi_reply.PortNumber;
  3004. pfacts->VP_ID = mpi_reply.VP_ID;
  3005. pfacts->VF_ID = mpi_reply.VF_ID;
  3006. pfacts->MaxPostedCmdBuffers =
  3007. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3008. return 0;
  3009. }
  3010. /**
  3011. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3012. * @ioc: per adapter object
  3013. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3014. *
  3015. * Returns 0 for success, non-zero for failure.
  3016. */
  3017. static int
  3018. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3019. {
  3020. Mpi2IOCFactsRequest_t mpi_request;
  3021. Mpi2IOCFactsReply_t mpi_reply;
  3022. struct mpt2sas_facts *facts;
  3023. int mpi_reply_sz, mpi_request_sz, r;
  3024. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3025. __func__));
  3026. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3027. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3028. memset(&mpi_request, 0, mpi_request_sz);
  3029. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3030. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3031. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3032. if (r != 0) {
  3033. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3034. ioc->name, __func__, r);
  3035. return r;
  3036. }
  3037. facts = &ioc->facts;
  3038. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  3039. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3040. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3041. facts->VP_ID = mpi_reply.VP_ID;
  3042. facts->VF_ID = mpi_reply.VF_ID;
  3043. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3044. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3045. facts->WhoInit = mpi_reply.WhoInit;
  3046. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3047. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3048. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3049. facts->MaxReplyDescriptorPostQueueDepth =
  3050. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3051. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3052. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3053. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3054. ioc->ir_firmware = 1;
  3055. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3056. facts->IOCRequestFrameSize =
  3057. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3058. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3059. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3060. ioc->shost->max_id = -1;
  3061. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3062. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3063. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3064. facts->HighPriorityCredit =
  3065. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3066. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3067. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3068. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3069. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3070. facts->MaxChainDepth));
  3071. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3072. "reply frame size(%d)\n", ioc->name,
  3073. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3074. return 0;
  3075. }
  3076. /**
  3077. * _base_send_ioc_init - send ioc_init to firmware
  3078. * @ioc: per adapter object
  3079. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3080. *
  3081. * Returns 0 for success, non-zero for failure.
  3082. */
  3083. static int
  3084. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3085. {
  3086. Mpi2IOCInitRequest_t mpi_request;
  3087. Mpi2IOCInitReply_t mpi_reply;
  3088. int r;
  3089. struct timeval current_time;
  3090. u16 ioc_status;
  3091. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3092. __func__));
  3093. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3094. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3095. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3096. mpi_request.VF_ID = 0; /* TODO */
  3097. mpi_request.VP_ID = 0;
  3098. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3099. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3100. if (_base_is_controller_msix_enabled(ioc))
  3101. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3102. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3103. mpi_request.ReplyDescriptorPostQueueDepth =
  3104. cpu_to_le16(ioc->reply_post_queue_depth);
  3105. mpi_request.ReplyFreeQueueDepth =
  3106. cpu_to_le16(ioc->reply_free_queue_depth);
  3107. mpi_request.SenseBufferAddressHigh =
  3108. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3109. mpi_request.SystemReplyAddressHigh =
  3110. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3111. mpi_request.SystemRequestFrameBaseAddress =
  3112. cpu_to_le64((u64)ioc->request_dma);
  3113. mpi_request.ReplyFreeQueueAddress =
  3114. cpu_to_le64((u64)ioc->reply_free_dma);
  3115. mpi_request.ReplyDescriptorPostQueueAddress =
  3116. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3117. /* This time stamp specifies number of milliseconds
  3118. * since epoch ~ midnight January 1, 1970.
  3119. */
  3120. do_gettimeofday(&current_time);
  3121. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3122. (current_time.tv_usec / 1000));
  3123. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3124. __le32 *mfp;
  3125. int i;
  3126. mfp = (__le32 *)&mpi_request;
  3127. printk(KERN_INFO "\toffset:data\n");
  3128. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3129. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3130. le32_to_cpu(mfp[i]));
  3131. }
  3132. r = _base_handshake_req_reply_wait(ioc,
  3133. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3134. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3135. sleep_flag);
  3136. if (r != 0) {
  3137. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3138. ioc->name, __func__, r);
  3139. return r;
  3140. }
  3141. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3142. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3143. mpi_reply.IOCLogInfo) {
  3144. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3145. r = -EIO;
  3146. }
  3147. return 0;
  3148. }
  3149. /**
  3150. * mpt2sas_port_enable_done - command completion routine for port enable
  3151. * @ioc: per adapter object
  3152. * @smid: system request message index
  3153. * @msix_index: MSIX table index supplied by the OS
  3154. * @reply: reply message frame(lower 32bit addr)
  3155. *
  3156. * Return 1 meaning mf should be freed from _base_interrupt
  3157. * 0 means the mf is freed from this function.
  3158. */
  3159. u8
  3160. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3161. u32 reply)
  3162. {
  3163. MPI2DefaultReply_t *mpi_reply;
  3164. u16 ioc_status;
  3165. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3166. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3167. return 1;
  3168. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3169. return 1;
  3170. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3171. if (mpi_reply) {
  3172. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3173. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3174. mpi_reply->MsgLength*4);
  3175. }
  3176. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3177. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3178. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3179. ioc->port_enable_failed = 1;
  3180. if (ioc->is_driver_loading) {
  3181. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3182. mpt2sas_port_enable_complete(ioc);
  3183. return 1;
  3184. } else {
  3185. ioc->start_scan_failed = ioc_status;
  3186. ioc->start_scan = 0;
  3187. return 1;
  3188. }
  3189. }
  3190. complete(&ioc->port_enable_cmds.done);
  3191. return 1;
  3192. }
  3193. /**
  3194. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3195. * @ioc: per adapter object
  3196. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3197. *
  3198. * Returns 0 for success, non-zero for failure.
  3199. */
  3200. static int
  3201. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3202. {
  3203. Mpi2PortEnableRequest_t *mpi_request;
  3204. Mpi2PortEnableReply_t *mpi_reply;
  3205. unsigned long timeleft;
  3206. int r = 0;
  3207. u16 smid;
  3208. u16 ioc_status;
  3209. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3210. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3211. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3212. ioc->name, __func__);
  3213. return -EAGAIN;
  3214. }
  3215. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3216. if (!smid) {
  3217. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3218. ioc->name, __func__);
  3219. return -EAGAIN;
  3220. }
  3221. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3222. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3223. ioc->port_enable_cmds.smid = smid;
  3224. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3225. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3226. init_completion(&ioc->port_enable_cmds.done);
  3227. mpt2sas_base_put_smid_default(ioc, smid);
  3228. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3229. 300*HZ);
  3230. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3231. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3232. ioc->name, __func__);
  3233. _debug_dump_mf(mpi_request,
  3234. sizeof(Mpi2PortEnableRequest_t)/4);
  3235. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3236. r = -EFAULT;
  3237. else
  3238. r = -ETIME;
  3239. goto out;
  3240. }
  3241. mpi_reply = ioc->port_enable_cmds.reply;
  3242. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3243. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3244. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3245. ioc->name, __func__, ioc_status);
  3246. r = -EFAULT;
  3247. goto out;
  3248. }
  3249. out:
  3250. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3251. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3252. "SUCCESS" : "FAILED"));
  3253. return r;
  3254. }
  3255. /**
  3256. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3257. * @ioc: per adapter object
  3258. *
  3259. * Returns 0 for success, non-zero for failure.
  3260. */
  3261. int
  3262. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3263. {
  3264. Mpi2PortEnableRequest_t *mpi_request;
  3265. u16 smid;
  3266. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3267. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3268. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3269. ioc->name, __func__);
  3270. return -EAGAIN;
  3271. }
  3272. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3273. if (!smid) {
  3274. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3275. ioc->name, __func__);
  3276. return -EAGAIN;
  3277. }
  3278. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3279. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3280. ioc->port_enable_cmds.smid = smid;
  3281. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3282. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3283. mpt2sas_base_put_smid_default(ioc, smid);
  3284. return 0;
  3285. }
  3286. /**
  3287. * _base_determine_wait_on_discovery - desposition
  3288. * @ioc: per adapter object
  3289. *
  3290. * Decide whether to wait on discovery to complete. Used to either
  3291. * locate boot device, or report volumes ahead of physical devices.
  3292. *
  3293. * Returns 1 for wait, 0 for don't wait
  3294. */
  3295. static int
  3296. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3297. {
  3298. /* We wait for discovery to complete if IR firmware is loaded.
  3299. * The sas topology events arrive before PD events, so we need time to
  3300. * turn on the bit in ioc->pd_handles to indicate PD
  3301. * Also, it maybe required to report Volumes ahead of physical
  3302. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3303. */
  3304. if (ioc->ir_firmware)
  3305. return 1;
  3306. /* if no Bios, then we don't need to wait */
  3307. if (!ioc->bios_pg3.BiosVersion)
  3308. return 0;
  3309. /* Bios is present, then we drop down here.
  3310. *
  3311. * If there any entries in the Bios Page 2, then we wait
  3312. * for discovery to complete.
  3313. */
  3314. /* Current Boot Device */
  3315. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3316. MPI2_BIOSPAGE2_FORM_MASK) ==
  3317. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3318. /* Request Boot Device */
  3319. (ioc->bios_pg2.ReqBootDeviceForm &
  3320. MPI2_BIOSPAGE2_FORM_MASK) ==
  3321. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3322. /* Alternate Request Boot Device */
  3323. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3324. MPI2_BIOSPAGE2_FORM_MASK) ==
  3325. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3326. return 0;
  3327. return 1;
  3328. }
  3329. /**
  3330. * _base_unmask_events - turn on notification for this event
  3331. * @ioc: per adapter object
  3332. * @event: firmware event
  3333. *
  3334. * The mask is stored in ioc->event_masks.
  3335. */
  3336. static void
  3337. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3338. {
  3339. u32 desired_event;
  3340. if (event >= 128)
  3341. return;
  3342. desired_event = (1 << (event % 32));
  3343. if (event < 32)
  3344. ioc->event_masks[0] &= ~desired_event;
  3345. else if (event < 64)
  3346. ioc->event_masks[1] &= ~desired_event;
  3347. else if (event < 96)
  3348. ioc->event_masks[2] &= ~desired_event;
  3349. else if (event < 128)
  3350. ioc->event_masks[3] &= ~desired_event;
  3351. }
  3352. /**
  3353. * _base_event_notification - send event notification
  3354. * @ioc: per adapter object
  3355. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3356. *
  3357. * Returns 0 for success, non-zero for failure.
  3358. */
  3359. static int
  3360. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3361. {
  3362. Mpi2EventNotificationRequest_t *mpi_request;
  3363. unsigned long timeleft;
  3364. u16 smid;
  3365. int r = 0;
  3366. int i;
  3367. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3368. __func__));
  3369. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3370. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3371. ioc->name, __func__);
  3372. return -EAGAIN;
  3373. }
  3374. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3375. if (!smid) {
  3376. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3377. ioc->name, __func__);
  3378. return -EAGAIN;
  3379. }
  3380. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3381. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3382. ioc->base_cmds.smid = smid;
  3383. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3384. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3385. mpi_request->VF_ID = 0; /* TODO */
  3386. mpi_request->VP_ID = 0;
  3387. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3388. mpi_request->EventMasks[i] =
  3389. cpu_to_le32(ioc->event_masks[i]);
  3390. init_completion(&ioc->base_cmds.done);
  3391. mpt2sas_base_put_smid_default(ioc, smid);
  3392. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3393. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3394. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3395. ioc->name, __func__);
  3396. _debug_dump_mf(mpi_request,
  3397. sizeof(Mpi2EventNotificationRequest_t)/4);
  3398. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3399. r = -EFAULT;
  3400. else
  3401. r = -ETIME;
  3402. } else
  3403. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3404. ioc->name, __func__));
  3405. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3406. return r;
  3407. }
  3408. /**
  3409. * mpt2sas_base_validate_event_type - validating event types
  3410. * @ioc: per adapter object
  3411. * @event: firmware event
  3412. *
  3413. * This will turn on firmware event notification when application
  3414. * ask for that event. We don't mask events that are already enabled.
  3415. */
  3416. void
  3417. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3418. {
  3419. int i, j;
  3420. u32 event_mask, desired_event;
  3421. u8 send_update_to_fw;
  3422. for (i = 0, send_update_to_fw = 0; i <
  3423. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3424. event_mask = ~event_type[i];
  3425. desired_event = 1;
  3426. for (j = 0; j < 32; j++) {
  3427. if (!(event_mask & desired_event) &&
  3428. (ioc->event_masks[i] & desired_event)) {
  3429. ioc->event_masks[i] &= ~desired_event;
  3430. send_update_to_fw = 1;
  3431. }
  3432. desired_event = (desired_event << 1);
  3433. }
  3434. }
  3435. if (!send_update_to_fw)
  3436. return;
  3437. mutex_lock(&ioc->base_cmds.mutex);
  3438. _base_event_notification(ioc, CAN_SLEEP);
  3439. mutex_unlock(&ioc->base_cmds.mutex);
  3440. }
  3441. /**
  3442. * _base_diag_reset - the "big hammer" start of day reset
  3443. * @ioc: per adapter object
  3444. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3445. *
  3446. * Returns 0 for success, non-zero for failure.
  3447. */
  3448. static int
  3449. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3450. {
  3451. u32 host_diagnostic;
  3452. u32 ioc_state;
  3453. u32 count;
  3454. u32 hcb_size;
  3455. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3456. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3457. ioc->name));
  3458. count = 0;
  3459. do {
  3460. /* Write magic sequence to WriteSequence register
  3461. * Loop until in diagnostic mode
  3462. */
  3463. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3464. "sequence\n", ioc->name));
  3465. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3466. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3467. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3468. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3469. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3470. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3471. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3472. /* wait 100 msec */
  3473. if (sleep_flag == CAN_SLEEP)
  3474. msleep(100);
  3475. else
  3476. mdelay(100);
  3477. if (count++ > 20)
  3478. goto out;
  3479. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3480. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3481. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3482. ioc->name, count, host_diagnostic));
  3483. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3484. hcb_size = readl(&ioc->chip->HCBSize);
  3485. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3486. ioc->name));
  3487. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3488. &ioc->chip->HostDiagnostic);
  3489. /* don't access any registers for 50 milliseconds */
  3490. msleep(50);
  3491. /* 300 second max wait */
  3492. for (count = 0; count < 3000000 ; count++) {
  3493. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3494. if (host_diagnostic == 0xFFFFFFFF)
  3495. goto out;
  3496. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3497. break;
  3498. /* wait 100 msec */
  3499. if (sleep_flag == CAN_SLEEP)
  3500. msleep(1);
  3501. else
  3502. mdelay(1);
  3503. }
  3504. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3505. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3506. "assuming the HCB Address points to good F/W\n",
  3507. ioc->name));
  3508. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3509. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3510. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3511. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3512. "re-enable the HCDW\n", ioc->name));
  3513. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3514. &ioc->chip->HCBSize);
  3515. }
  3516. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3517. ioc->name));
  3518. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3519. &ioc->chip->HostDiagnostic);
  3520. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3521. "diagnostic register\n", ioc->name));
  3522. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3523. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3524. "READY state\n", ioc->name));
  3525. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3526. sleep_flag);
  3527. if (ioc_state) {
  3528. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3529. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3530. goto out;
  3531. }
  3532. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3533. return 0;
  3534. out:
  3535. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3536. return -EFAULT;
  3537. }
  3538. /**
  3539. * _base_make_ioc_ready - put controller in READY state
  3540. * @ioc: per adapter object
  3541. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3542. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3543. *
  3544. * Returns 0 for success, non-zero for failure.
  3545. */
  3546. static int
  3547. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3548. enum reset_type type)
  3549. {
  3550. u32 ioc_state;
  3551. int rc;
  3552. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3553. __func__));
  3554. if (ioc->pci_error_recovery)
  3555. return 0;
  3556. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3557. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3558. ioc->name, __func__, ioc_state));
  3559. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3560. return 0;
  3561. if (ioc_state & MPI2_DOORBELL_USED) {
  3562. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3563. "active!\n", ioc->name));
  3564. goto issue_diag_reset;
  3565. }
  3566. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3567. mpt2sas_base_fault_info(ioc, ioc_state &
  3568. MPI2_DOORBELL_DATA_MASK);
  3569. goto issue_diag_reset;
  3570. }
  3571. if (type == FORCE_BIG_HAMMER)
  3572. goto issue_diag_reset;
  3573. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3574. if (!(_base_send_ioc_reset(ioc,
  3575. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3576. ioc->ioc_reset_count++;
  3577. return 0;
  3578. }
  3579. issue_diag_reset:
  3580. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3581. ioc->ioc_reset_count++;
  3582. return rc;
  3583. }
  3584. /**
  3585. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3586. * @ioc: per adapter object
  3587. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3588. *
  3589. * Returns 0 for success, non-zero for failure.
  3590. */
  3591. static int
  3592. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3593. {
  3594. int r, i;
  3595. unsigned long flags;
  3596. u32 reply_address;
  3597. u16 smid;
  3598. struct _tr_list *delayed_tr, *delayed_tr_next;
  3599. u8 hide_flag;
  3600. struct adapter_reply_queue *reply_q;
  3601. long reply_post_free;
  3602. u32 reply_post_free_sz;
  3603. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3604. __func__));
  3605. /* clean the delayed target reset list */
  3606. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3607. &ioc->delayed_tr_list, list) {
  3608. list_del(&delayed_tr->list);
  3609. kfree(delayed_tr);
  3610. }
  3611. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3612. &ioc->delayed_tr_volume_list, list) {
  3613. list_del(&delayed_tr->list);
  3614. kfree(delayed_tr);
  3615. }
  3616. /* initialize the scsi lookup free list */
  3617. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3618. INIT_LIST_HEAD(&ioc->free_list);
  3619. smid = 1;
  3620. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3621. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3622. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3623. ioc->scsi_lookup[i].smid = smid;
  3624. ioc->scsi_lookup[i].scmd = NULL;
  3625. ioc->scsi_lookup[i].direct_io = 0;
  3626. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3627. &ioc->free_list);
  3628. }
  3629. /* hi-priority queue */
  3630. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3631. smid = ioc->hi_priority_smid;
  3632. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3633. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3634. ioc->hpr_lookup[i].smid = smid;
  3635. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3636. &ioc->hpr_free_list);
  3637. }
  3638. /* internal queue */
  3639. INIT_LIST_HEAD(&ioc->internal_free_list);
  3640. smid = ioc->internal_smid;
  3641. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3642. ioc->internal_lookup[i].cb_idx = 0xFF;
  3643. ioc->internal_lookup[i].smid = smid;
  3644. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3645. &ioc->internal_free_list);
  3646. }
  3647. /* chain pool */
  3648. INIT_LIST_HEAD(&ioc->free_chain_list);
  3649. for (i = 0; i < ioc->chain_depth; i++)
  3650. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3651. &ioc->free_chain_list);
  3652. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3653. /* initialize Reply Free Queue */
  3654. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3655. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3656. ioc->reply_sz)
  3657. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3658. /* initialize reply queues */
  3659. if (ioc->is_driver_loading)
  3660. _base_assign_reply_queues(ioc);
  3661. /* initialize Reply Post Free Queue */
  3662. reply_post_free = (long)ioc->reply_post_free;
  3663. reply_post_free_sz = ioc->reply_post_queue_depth *
  3664. sizeof(Mpi2DefaultReplyDescriptor_t);
  3665. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3666. reply_q->reply_post_host_index = 0;
  3667. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3668. reply_post_free;
  3669. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3670. reply_q->reply_post_free[i].Words =
  3671. cpu_to_le64(ULLONG_MAX);
  3672. if (!_base_is_controller_msix_enabled(ioc))
  3673. goto skip_init_reply_post_free_queue;
  3674. reply_post_free += reply_post_free_sz;
  3675. }
  3676. skip_init_reply_post_free_queue:
  3677. r = _base_send_ioc_init(ioc, sleep_flag);
  3678. if (r)
  3679. return r;
  3680. /* initialize reply free host index */
  3681. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3682. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3683. /* initialize reply post host index */
  3684. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3685. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3686. &ioc->chip->ReplyPostHostIndex);
  3687. if (!_base_is_controller_msix_enabled(ioc))
  3688. goto skip_init_reply_post_host_index;
  3689. }
  3690. skip_init_reply_post_host_index:
  3691. _base_unmask_interrupts(ioc);
  3692. r = _base_event_notification(ioc, sleep_flag);
  3693. if (r)
  3694. return r;
  3695. if (sleep_flag == CAN_SLEEP)
  3696. _base_static_config_pages(ioc);
  3697. if (ioc->is_driver_loading) {
  3698. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3699. == 0x80) {
  3700. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3701. MFG_PAGE10_HIDE_SSDS_MASK);
  3702. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3703. ioc->mfg_pg10_hide_flag = hide_flag;
  3704. }
  3705. ioc->wait_for_discovery_to_complete =
  3706. _base_determine_wait_on_discovery(ioc);
  3707. return r; /* scan_start and scan_finished support */
  3708. }
  3709. r = _base_send_port_enable(ioc, sleep_flag);
  3710. if (r)
  3711. return r;
  3712. return r;
  3713. }
  3714. /**
  3715. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3716. * @ioc: per adapter object
  3717. *
  3718. * Return nothing.
  3719. */
  3720. void
  3721. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3722. {
  3723. struct pci_dev *pdev = ioc->pdev;
  3724. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3725. __func__));
  3726. _base_mask_interrupts(ioc);
  3727. ioc->shost_recovery = 1;
  3728. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3729. ioc->shost_recovery = 0;
  3730. _base_free_irq(ioc);
  3731. _base_disable_msix(ioc);
  3732. if (ioc->chip_phys)
  3733. iounmap(ioc->chip);
  3734. ioc->chip_phys = 0;
  3735. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3736. pci_disable_pcie_error_reporting(pdev);
  3737. pci_disable_device(pdev);
  3738. return;
  3739. }
  3740. /**
  3741. * mpt2sas_base_attach - attach controller instance
  3742. * @ioc: per adapter object
  3743. *
  3744. * Returns 0 for success, non-zero for failure.
  3745. */
  3746. int
  3747. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3748. {
  3749. int r, i;
  3750. int cpu_id, last_cpu_id = 0;
  3751. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3752. __func__));
  3753. /* setup cpu_msix_table */
  3754. ioc->cpu_count = num_online_cpus();
  3755. for_each_online_cpu(cpu_id)
  3756. last_cpu_id = cpu_id;
  3757. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3758. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3759. ioc->reply_queue_count = 1;
  3760. if (!ioc->cpu_msix_table) {
  3761. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3762. "cpu_msix_table failed!!!\n", ioc->name));
  3763. r = -ENOMEM;
  3764. goto out_free_resources;
  3765. }
  3766. if (ioc->is_warpdrive) {
  3767. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3768. sizeof(resource_size_t *), GFP_KERNEL);
  3769. if (!ioc->reply_post_host_index) {
  3770. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3771. "for cpu_msix_table failed!!!\n", ioc->name));
  3772. r = -ENOMEM;
  3773. goto out_free_resources;
  3774. }
  3775. }
  3776. r = mpt2sas_base_map_resources(ioc);
  3777. if (r)
  3778. goto out_free_resources;
  3779. if (ioc->is_warpdrive) {
  3780. ioc->reply_post_host_index[0] =
  3781. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3782. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3783. ioc->reply_post_host_index[i] = (resource_size_t *)
  3784. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3785. * 4)));
  3786. }
  3787. pci_set_drvdata(ioc->pdev, ioc->shost);
  3788. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3789. if (r)
  3790. goto out_free_resources;
  3791. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3792. if (r)
  3793. goto out_free_resources;
  3794. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3795. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3796. if (!ioc->pfacts) {
  3797. r = -ENOMEM;
  3798. goto out_free_resources;
  3799. }
  3800. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3801. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3802. if (r)
  3803. goto out_free_resources;
  3804. }
  3805. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3806. if (r)
  3807. goto out_free_resources;
  3808. init_waitqueue_head(&ioc->reset_wq);
  3809. /* allocate memory pd handle bitmask list */
  3810. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3811. if (ioc->facts.MaxDevHandle % 8)
  3812. ioc->pd_handles_sz++;
  3813. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3814. GFP_KERNEL);
  3815. if (!ioc->pd_handles) {
  3816. r = -ENOMEM;
  3817. goto out_free_resources;
  3818. }
  3819. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3820. /* base internal command bits */
  3821. mutex_init(&ioc->base_cmds.mutex);
  3822. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3823. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3824. /* port_enable command bits */
  3825. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3826. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3827. /* transport internal command bits */
  3828. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3829. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3830. mutex_init(&ioc->transport_cmds.mutex);
  3831. /* scsih internal command bits */
  3832. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3833. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3834. mutex_init(&ioc->scsih_cmds.mutex);
  3835. /* task management internal command bits */
  3836. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3837. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3838. mutex_init(&ioc->tm_cmds.mutex);
  3839. /* config page internal command bits */
  3840. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3841. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3842. mutex_init(&ioc->config_cmds.mutex);
  3843. /* ctl module internal command bits */
  3844. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3845. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3846. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3847. mutex_init(&ioc->ctl_cmds.mutex);
  3848. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3849. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3850. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3851. !ioc->ctl_cmds.sense) {
  3852. r = -ENOMEM;
  3853. goto out_free_resources;
  3854. }
  3855. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3856. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3857. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3858. r = -ENOMEM;
  3859. goto out_free_resources;
  3860. }
  3861. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3862. ioc->event_masks[i] = -1;
  3863. /* here we enable the events we care about */
  3864. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3865. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3866. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3867. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3868. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3869. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3870. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3871. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3872. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3873. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3874. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3875. if (r)
  3876. goto out_free_resources;
  3877. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3878. _base_update_missing_delay(ioc, missing_delay[0],
  3879. missing_delay[1]);
  3880. return 0;
  3881. out_free_resources:
  3882. ioc->remove_host = 1;
  3883. mpt2sas_base_free_resources(ioc);
  3884. _base_release_memory_pools(ioc);
  3885. pci_set_drvdata(ioc->pdev, NULL);
  3886. kfree(ioc->cpu_msix_table);
  3887. if (ioc->is_warpdrive)
  3888. kfree(ioc->reply_post_host_index);
  3889. kfree(ioc->pd_handles);
  3890. kfree(ioc->tm_cmds.reply);
  3891. kfree(ioc->transport_cmds.reply);
  3892. kfree(ioc->scsih_cmds.reply);
  3893. kfree(ioc->config_cmds.reply);
  3894. kfree(ioc->base_cmds.reply);
  3895. kfree(ioc->port_enable_cmds.reply);
  3896. kfree(ioc->ctl_cmds.reply);
  3897. kfree(ioc->ctl_cmds.sense);
  3898. kfree(ioc->pfacts);
  3899. ioc->ctl_cmds.reply = NULL;
  3900. ioc->base_cmds.reply = NULL;
  3901. ioc->tm_cmds.reply = NULL;
  3902. ioc->scsih_cmds.reply = NULL;
  3903. ioc->transport_cmds.reply = NULL;
  3904. ioc->config_cmds.reply = NULL;
  3905. ioc->pfacts = NULL;
  3906. return r;
  3907. }
  3908. /**
  3909. * mpt2sas_base_detach - remove controller instance
  3910. * @ioc: per adapter object
  3911. *
  3912. * Return nothing.
  3913. */
  3914. void
  3915. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3916. {
  3917. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3918. __func__));
  3919. mpt2sas_base_stop_watchdog(ioc);
  3920. mpt2sas_base_free_resources(ioc);
  3921. _base_release_memory_pools(ioc);
  3922. pci_set_drvdata(ioc->pdev, NULL);
  3923. kfree(ioc->cpu_msix_table);
  3924. if (ioc->is_warpdrive)
  3925. kfree(ioc->reply_post_host_index);
  3926. kfree(ioc->pd_handles);
  3927. kfree(ioc->pfacts);
  3928. kfree(ioc->ctl_cmds.reply);
  3929. kfree(ioc->ctl_cmds.sense);
  3930. kfree(ioc->base_cmds.reply);
  3931. kfree(ioc->port_enable_cmds.reply);
  3932. kfree(ioc->tm_cmds.reply);
  3933. kfree(ioc->transport_cmds.reply);
  3934. kfree(ioc->scsih_cmds.reply);
  3935. kfree(ioc->config_cmds.reply);
  3936. }
  3937. /**
  3938. * _base_reset_handler - reset callback handler (for base)
  3939. * @ioc: per adapter object
  3940. * @reset_phase: phase
  3941. *
  3942. * The handler for doing any required cleanup or initialization.
  3943. *
  3944. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3945. * MPT2_IOC_DONE_RESET
  3946. *
  3947. * Return nothing.
  3948. */
  3949. static void
  3950. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3951. {
  3952. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3953. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3954. switch (reset_phase) {
  3955. case MPT2_IOC_PRE_RESET:
  3956. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3957. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3958. break;
  3959. case MPT2_IOC_AFTER_RESET:
  3960. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3961. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3962. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3963. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3964. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3965. complete(&ioc->transport_cmds.done);
  3966. }
  3967. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3968. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3969. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3970. complete(&ioc->base_cmds.done);
  3971. }
  3972. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3973. ioc->port_enable_failed = 1;
  3974. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  3975. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  3976. if (ioc->is_driver_loading) {
  3977. ioc->start_scan_failed =
  3978. MPI2_IOCSTATUS_INTERNAL_ERROR;
  3979. ioc->start_scan = 0;
  3980. ioc->port_enable_cmds.status =
  3981. MPT2_CMD_NOT_USED;
  3982. } else
  3983. complete(&ioc->port_enable_cmds.done);
  3984. }
  3985. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3986. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3987. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3988. ioc->config_cmds.smid = USHRT_MAX;
  3989. complete(&ioc->config_cmds.done);
  3990. }
  3991. break;
  3992. case MPT2_IOC_DONE_RESET:
  3993. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3994. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3995. break;
  3996. }
  3997. }
  3998. /**
  3999. * _wait_for_commands_to_complete - reset controller
  4000. * @ioc: Pointer to MPT_ADAPTER structure
  4001. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4002. *
  4003. * This function waiting(3s) for all pending commands to complete
  4004. * prior to putting controller in reset.
  4005. */
  4006. static void
  4007. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4008. {
  4009. u32 ioc_state;
  4010. unsigned long flags;
  4011. u16 i;
  4012. ioc->pending_io_count = 0;
  4013. if (sleep_flag != CAN_SLEEP)
  4014. return;
  4015. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4016. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4017. return;
  4018. /* pending command count */
  4019. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4020. for (i = 0; i < ioc->scsiio_depth; i++)
  4021. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4022. ioc->pending_io_count++;
  4023. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4024. if (!ioc->pending_io_count)
  4025. return;
  4026. /* wait for pending commands to complete */
  4027. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4028. }
  4029. /**
  4030. * mpt2sas_base_hard_reset_handler - reset controller
  4031. * @ioc: Pointer to MPT_ADAPTER structure
  4032. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4033. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4034. *
  4035. * Returns 0 for success, non-zero for failure.
  4036. */
  4037. int
  4038. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4039. enum reset_type type)
  4040. {
  4041. int r;
  4042. unsigned long flags;
  4043. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4044. __func__));
  4045. if (ioc->pci_error_recovery) {
  4046. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4047. ioc->name, __func__);
  4048. r = 0;
  4049. goto out_unlocked;
  4050. }
  4051. if (mpt2sas_fwfault_debug)
  4052. mpt2sas_halt_firmware(ioc);
  4053. /* TODO - What we really should be doing is pulling
  4054. * out all the code associated with NO_SLEEP; its never used.
  4055. * That is legacy code from mpt fusion driver, ported over.
  4056. * I will leave this BUG_ON here for now till its been resolved.
  4057. */
  4058. BUG_ON(sleep_flag == NO_SLEEP);
  4059. /* wait for an active reset in progress to complete */
  4060. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4061. do {
  4062. ssleep(1);
  4063. } while (ioc->shost_recovery == 1);
  4064. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4065. __func__));
  4066. return ioc->ioc_reset_in_progress_status;
  4067. }
  4068. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4069. ioc->shost_recovery = 1;
  4070. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4071. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4072. _wait_for_commands_to_complete(ioc, sleep_flag);
  4073. _base_mask_interrupts(ioc);
  4074. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4075. if (r)
  4076. goto out;
  4077. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4078. /* If this hard reset is called while port enable is active, then
  4079. * there is no reason to call make_ioc_operational
  4080. */
  4081. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4082. ioc->remove_host = 1;
  4083. r = -EFAULT;
  4084. goto out;
  4085. }
  4086. r = _base_make_ioc_operational(ioc, sleep_flag);
  4087. if (!r)
  4088. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4089. out:
  4090. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4091. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4092. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4093. ioc->ioc_reset_in_progress_status = r;
  4094. ioc->shost_recovery = 0;
  4095. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4096. mutex_unlock(&ioc->reset_in_progress_mutex);
  4097. out_unlocked:
  4098. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4099. __func__));
  4100. return r;
  4101. }