hpsa.c 131 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  96. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  100. /* board_id = Subsystem Device ID & Vendor ID
  101. * product = Marketing Name for the board
  102. * access = Address of the struct of function pointers
  103. */
  104. static struct board_type products[] = {
  105. {0x3241103C, "Smart Array P212", &SA5_access},
  106. {0x3243103C, "Smart Array P410", &SA5_access},
  107. {0x3245103C, "Smart Array P410i", &SA5_access},
  108. {0x3247103C, "Smart Array P411", &SA5_access},
  109. {0x3249103C, "Smart Array P812", &SA5_access},
  110. {0x324a103C, "Smart Array P712m", &SA5_access},
  111. {0x324b103C, "Smart Array P711m", &SA5_access},
  112. {0x3350103C, "Smart Array", &SA5_access},
  113. {0x3351103C, "Smart Array", &SA5_access},
  114. {0x3352103C, "Smart Array", &SA5_access},
  115. {0x3353103C, "Smart Array", &SA5_access},
  116. {0x3354103C, "Smart Array", &SA5_access},
  117. {0x3355103C, "Smart Array", &SA5_access},
  118. {0x3356103C, "Smart Array", &SA5_access},
  119. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  120. };
  121. static int number_of_controllers;
  122. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  123. static spinlock_t lockup_detector_lock;
  124. static struct task_struct *hpsa_lockup_detector;
  125. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  126. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  127. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  128. static void start_io(struct ctlr_info *h);
  129. #ifdef CONFIG_COMPAT
  130. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  131. #endif
  132. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  133. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  134. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  135. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  136. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  137. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  138. int cmd_type);
  139. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  140. static void hpsa_scan_start(struct Scsi_Host *);
  141. static int hpsa_scan_finished(struct Scsi_Host *sh,
  142. unsigned long elapsed_time);
  143. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  144. int qdepth, int reason);
  145. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  146. static int hpsa_slave_alloc(struct scsi_device *sdev);
  147. static void hpsa_slave_destroy(struct scsi_device *sdev);
  148. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  149. static int check_for_unit_attention(struct ctlr_info *h,
  150. struct CommandList *c);
  151. static void check_ioctl_unit_attention(struct ctlr_info *h,
  152. struct CommandList *c);
  153. /* performant mode helper functions */
  154. static void calc_bucket_map(int *bucket, int num_buckets,
  155. int nsgs, int *bucket_map);
  156. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  157. static inline u32 next_command(struct ctlr_info *h);
  158. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  159. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  160. u64 *cfg_offset);
  161. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  162. unsigned long *memory_bar);
  163. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  164. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  165. void __iomem *vaddr, int wait_for_ready);
  166. #define BOARD_NOT_READY 0
  167. #define BOARD_READY 1
  168. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  169. {
  170. unsigned long *priv = shost_priv(sdev->host);
  171. return (struct ctlr_info *) *priv;
  172. }
  173. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  174. {
  175. unsigned long *priv = shost_priv(sh);
  176. return (struct ctlr_info *) *priv;
  177. }
  178. static int check_for_unit_attention(struct ctlr_info *h,
  179. struct CommandList *c)
  180. {
  181. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  182. return 0;
  183. switch (c->err_info->SenseInfo[12]) {
  184. case STATE_CHANGED:
  185. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  186. "detected, command retried\n", h->ctlr);
  187. break;
  188. case LUN_FAILED:
  189. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  190. "detected, action required\n", h->ctlr);
  191. break;
  192. case REPORT_LUNS_CHANGED:
  193. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  194. "changed, action required\n", h->ctlr);
  195. /*
  196. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  197. * target (array) devices.
  198. */
  199. break;
  200. case POWER_OR_RESET:
  201. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  202. "or device reset detected\n", h->ctlr);
  203. break;
  204. case UNIT_ATTENTION_CLEARED:
  205. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  206. "cleared by another initiator\n", h->ctlr);
  207. break;
  208. default:
  209. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  210. "unit attention detected\n", h->ctlr);
  211. break;
  212. }
  213. return 1;
  214. }
  215. static ssize_t host_store_rescan(struct device *dev,
  216. struct device_attribute *attr,
  217. const char *buf, size_t count)
  218. {
  219. struct ctlr_info *h;
  220. struct Scsi_Host *shost = class_to_shost(dev);
  221. h = shost_to_hba(shost);
  222. hpsa_scan_start(h->scsi_host);
  223. return count;
  224. }
  225. static ssize_t host_show_firmware_revision(struct device *dev,
  226. struct device_attribute *attr, char *buf)
  227. {
  228. struct ctlr_info *h;
  229. struct Scsi_Host *shost = class_to_shost(dev);
  230. unsigned char *fwrev;
  231. h = shost_to_hba(shost);
  232. if (!h->hba_inquiry_data)
  233. return 0;
  234. fwrev = &h->hba_inquiry_data[32];
  235. return snprintf(buf, 20, "%c%c%c%c\n",
  236. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  237. }
  238. static ssize_t host_show_commands_outstanding(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct Scsi_Host *shost = class_to_shost(dev);
  242. struct ctlr_info *h = shost_to_hba(shost);
  243. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  244. }
  245. static ssize_t host_show_transport_mode(struct device *dev,
  246. struct device_attribute *attr, char *buf)
  247. {
  248. struct ctlr_info *h;
  249. struct Scsi_Host *shost = class_to_shost(dev);
  250. h = shost_to_hba(shost);
  251. return snprintf(buf, 20, "%s\n",
  252. h->transMethod & CFGTBL_Trans_Performant ?
  253. "performant" : "simple");
  254. }
  255. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  256. static u32 unresettable_controller[] = {
  257. 0x324a103C, /* Smart Array P712m */
  258. 0x324b103C, /* SmartArray P711m */
  259. 0x3223103C, /* Smart Array P800 */
  260. 0x3234103C, /* Smart Array P400 */
  261. 0x3235103C, /* Smart Array P400i */
  262. 0x3211103C, /* Smart Array E200i */
  263. 0x3212103C, /* Smart Array E200 */
  264. 0x3213103C, /* Smart Array E200i */
  265. 0x3214103C, /* Smart Array E200i */
  266. 0x3215103C, /* Smart Array E200i */
  267. 0x3237103C, /* Smart Array E500 */
  268. 0x323D103C, /* Smart Array P700m */
  269. 0x40800E11, /* Smart Array 5i */
  270. 0x409C0E11, /* Smart Array 6400 */
  271. 0x409D0E11, /* Smart Array 6400 EM */
  272. 0x40700E11, /* Smart Array 5300 */
  273. 0x40820E11, /* Smart Array 532 */
  274. 0x40830E11, /* Smart Array 5312 */
  275. 0x409A0E11, /* Smart Array 641 */
  276. 0x409B0E11, /* Smart Array 642 */
  277. 0x40910E11, /* Smart Array 6i */
  278. };
  279. /* List of controllers which cannot even be soft reset */
  280. static u32 soft_unresettable_controller[] = {
  281. 0x40800E11, /* Smart Array 5i */
  282. 0x40700E11, /* Smart Array 5300 */
  283. 0x40820E11, /* Smart Array 532 */
  284. 0x40830E11, /* Smart Array 5312 */
  285. 0x409A0E11, /* Smart Array 641 */
  286. 0x409B0E11, /* Smart Array 642 */
  287. 0x40910E11, /* Smart Array 6i */
  288. /* Exclude 640x boards. These are two pci devices in one slot
  289. * which share a battery backed cache module. One controls the
  290. * cache, the other accesses the cache through the one that controls
  291. * it. If we reset the one controlling the cache, the other will
  292. * likely not be happy. Just forbid resetting this conjoined mess.
  293. * The 640x isn't really supported by hpsa anyway.
  294. */
  295. 0x409C0E11, /* Smart Array 6400 */
  296. 0x409D0E11, /* Smart Array 6400 EM */
  297. };
  298. static int ctlr_is_hard_resettable(u32 board_id)
  299. {
  300. int i;
  301. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  302. if (unresettable_controller[i] == board_id)
  303. return 0;
  304. return 1;
  305. }
  306. static int ctlr_is_soft_resettable(u32 board_id)
  307. {
  308. int i;
  309. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  310. if (soft_unresettable_controller[i] == board_id)
  311. return 0;
  312. return 1;
  313. }
  314. static int ctlr_is_resettable(u32 board_id)
  315. {
  316. return ctlr_is_hard_resettable(board_id) ||
  317. ctlr_is_soft_resettable(board_id);
  318. }
  319. static ssize_t host_show_resettable(struct device *dev,
  320. struct device_attribute *attr, char *buf)
  321. {
  322. struct ctlr_info *h;
  323. struct Scsi_Host *shost = class_to_shost(dev);
  324. h = shost_to_hba(shost);
  325. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  326. }
  327. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  328. {
  329. return (scsi3addr[3] & 0xC0) == 0x40;
  330. }
  331. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  332. "UNKNOWN"
  333. };
  334. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  335. static ssize_t raid_level_show(struct device *dev,
  336. struct device_attribute *attr, char *buf)
  337. {
  338. ssize_t l = 0;
  339. unsigned char rlevel;
  340. struct ctlr_info *h;
  341. struct scsi_device *sdev;
  342. struct hpsa_scsi_dev_t *hdev;
  343. unsigned long flags;
  344. sdev = to_scsi_device(dev);
  345. h = sdev_to_hba(sdev);
  346. spin_lock_irqsave(&h->lock, flags);
  347. hdev = sdev->hostdata;
  348. if (!hdev) {
  349. spin_unlock_irqrestore(&h->lock, flags);
  350. return -ENODEV;
  351. }
  352. /* Is this even a logical drive? */
  353. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  354. spin_unlock_irqrestore(&h->lock, flags);
  355. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  356. return l;
  357. }
  358. rlevel = hdev->raid_level;
  359. spin_unlock_irqrestore(&h->lock, flags);
  360. if (rlevel > RAID_UNKNOWN)
  361. rlevel = RAID_UNKNOWN;
  362. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  363. return l;
  364. }
  365. static ssize_t lunid_show(struct device *dev,
  366. struct device_attribute *attr, char *buf)
  367. {
  368. struct ctlr_info *h;
  369. struct scsi_device *sdev;
  370. struct hpsa_scsi_dev_t *hdev;
  371. unsigned long flags;
  372. unsigned char lunid[8];
  373. sdev = to_scsi_device(dev);
  374. h = sdev_to_hba(sdev);
  375. spin_lock_irqsave(&h->lock, flags);
  376. hdev = sdev->hostdata;
  377. if (!hdev) {
  378. spin_unlock_irqrestore(&h->lock, flags);
  379. return -ENODEV;
  380. }
  381. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  382. spin_unlock_irqrestore(&h->lock, flags);
  383. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  384. lunid[0], lunid[1], lunid[2], lunid[3],
  385. lunid[4], lunid[5], lunid[6], lunid[7]);
  386. }
  387. static ssize_t unique_id_show(struct device *dev,
  388. struct device_attribute *attr, char *buf)
  389. {
  390. struct ctlr_info *h;
  391. struct scsi_device *sdev;
  392. struct hpsa_scsi_dev_t *hdev;
  393. unsigned long flags;
  394. unsigned char sn[16];
  395. sdev = to_scsi_device(dev);
  396. h = sdev_to_hba(sdev);
  397. spin_lock_irqsave(&h->lock, flags);
  398. hdev = sdev->hostdata;
  399. if (!hdev) {
  400. spin_unlock_irqrestore(&h->lock, flags);
  401. return -ENODEV;
  402. }
  403. memcpy(sn, hdev->device_id, sizeof(sn));
  404. spin_unlock_irqrestore(&h->lock, flags);
  405. return snprintf(buf, 16 * 2 + 2,
  406. "%02X%02X%02X%02X%02X%02X%02X%02X"
  407. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  408. sn[0], sn[1], sn[2], sn[3],
  409. sn[4], sn[5], sn[6], sn[7],
  410. sn[8], sn[9], sn[10], sn[11],
  411. sn[12], sn[13], sn[14], sn[15]);
  412. }
  413. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  414. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  415. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  416. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  417. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  418. host_show_firmware_revision, NULL);
  419. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  420. host_show_commands_outstanding, NULL);
  421. static DEVICE_ATTR(transport_mode, S_IRUGO,
  422. host_show_transport_mode, NULL);
  423. static DEVICE_ATTR(resettable, S_IRUGO,
  424. host_show_resettable, NULL);
  425. static struct device_attribute *hpsa_sdev_attrs[] = {
  426. &dev_attr_raid_level,
  427. &dev_attr_lunid,
  428. &dev_attr_unique_id,
  429. NULL,
  430. };
  431. static struct device_attribute *hpsa_shost_attrs[] = {
  432. &dev_attr_rescan,
  433. &dev_attr_firmware_revision,
  434. &dev_attr_commands_outstanding,
  435. &dev_attr_transport_mode,
  436. &dev_attr_resettable,
  437. NULL,
  438. };
  439. static struct scsi_host_template hpsa_driver_template = {
  440. .module = THIS_MODULE,
  441. .name = HPSA,
  442. .proc_name = HPSA,
  443. .queuecommand = hpsa_scsi_queue_command,
  444. .scan_start = hpsa_scan_start,
  445. .scan_finished = hpsa_scan_finished,
  446. .change_queue_depth = hpsa_change_queue_depth,
  447. .this_id = -1,
  448. .use_clustering = ENABLE_CLUSTERING,
  449. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  450. .ioctl = hpsa_ioctl,
  451. .slave_alloc = hpsa_slave_alloc,
  452. .slave_destroy = hpsa_slave_destroy,
  453. #ifdef CONFIG_COMPAT
  454. .compat_ioctl = hpsa_compat_ioctl,
  455. #endif
  456. .sdev_attrs = hpsa_sdev_attrs,
  457. .shost_attrs = hpsa_shost_attrs,
  458. .max_sectors = 8192,
  459. };
  460. /* Enqueuing and dequeuing functions for cmdlists. */
  461. static inline void addQ(struct list_head *list, struct CommandList *c)
  462. {
  463. list_add_tail(&c->list, list);
  464. }
  465. static inline u32 next_command(struct ctlr_info *h)
  466. {
  467. u32 a;
  468. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  469. return h->access.command_completed(h);
  470. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  471. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  472. (h->reply_pool_head)++;
  473. h->commands_outstanding--;
  474. } else {
  475. a = FIFO_EMPTY;
  476. }
  477. /* Check for wraparound */
  478. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  479. h->reply_pool_head = h->reply_pool;
  480. h->reply_pool_wraparound ^= 1;
  481. }
  482. return a;
  483. }
  484. /* set_performant_mode: Modify the tag for cciss performant
  485. * set bit 0 for pull model, bits 3-1 for block fetch
  486. * register number
  487. */
  488. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  489. {
  490. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  491. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  492. }
  493. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  494. struct CommandList *c)
  495. {
  496. unsigned long flags;
  497. set_performant_mode(h, c);
  498. spin_lock_irqsave(&h->lock, flags);
  499. addQ(&h->reqQ, c);
  500. h->Qdepth++;
  501. start_io(h);
  502. spin_unlock_irqrestore(&h->lock, flags);
  503. }
  504. static inline void removeQ(struct CommandList *c)
  505. {
  506. if (WARN_ON(list_empty(&c->list)))
  507. return;
  508. list_del_init(&c->list);
  509. }
  510. static inline int is_hba_lunid(unsigned char scsi3addr[])
  511. {
  512. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  513. }
  514. static inline int is_scsi_rev_5(struct ctlr_info *h)
  515. {
  516. if (!h->hba_inquiry_data)
  517. return 0;
  518. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  519. return 1;
  520. return 0;
  521. }
  522. static int hpsa_find_target_lun(struct ctlr_info *h,
  523. unsigned char scsi3addr[], int bus, int *target, int *lun)
  524. {
  525. /* finds an unused bus, target, lun for a new physical device
  526. * assumes h->devlock is held
  527. */
  528. int i, found = 0;
  529. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  530. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  531. for (i = 0; i < h->ndevices; i++) {
  532. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  533. __set_bit(h->dev[i]->target, lun_taken);
  534. }
  535. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  536. if (i < HPSA_MAX_DEVICES) {
  537. /* *bus = 1; */
  538. *target = i;
  539. *lun = 0;
  540. found = 1;
  541. }
  542. return !found;
  543. }
  544. /* Add an entry into h->dev[] array. */
  545. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  546. struct hpsa_scsi_dev_t *device,
  547. struct hpsa_scsi_dev_t *added[], int *nadded)
  548. {
  549. /* assumes h->devlock is held */
  550. int n = h->ndevices;
  551. int i;
  552. unsigned char addr1[8], addr2[8];
  553. struct hpsa_scsi_dev_t *sd;
  554. if (n >= HPSA_MAX_DEVICES) {
  555. dev_err(&h->pdev->dev, "too many devices, some will be "
  556. "inaccessible.\n");
  557. return -1;
  558. }
  559. /* physical devices do not have lun or target assigned until now. */
  560. if (device->lun != -1)
  561. /* Logical device, lun is already assigned. */
  562. goto lun_assigned;
  563. /* If this device a non-zero lun of a multi-lun device
  564. * byte 4 of the 8-byte LUN addr will contain the logical
  565. * unit no, zero otherise.
  566. */
  567. if (device->scsi3addr[4] == 0) {
  568. /* This is not a non-zero lun of a multi-lun device */
  569. if (hpsa_find_target_lun(h, device->scsi3addr,
  570. device->bus, &device->target, &device->lun) != 0)
  571. return -1;
  572. goto lun_assigned;
  573. }
  574. /* This is a non-zero lun of a multi-lun device.
  575. * Search through our list and find the device which
  576. * has the same 8 byte LUN address, excepting byte 4.
  577. * Assign the same bus and target for this new LUN.
  578. * Use the logical unit number from the firmware.
  579. */
  580. memcpy(addr1, device->scsi3addr, 8);
  581. addr1[4] = 0;
  582. for (i = 0; i < n; i++) {
  583. sd = h->dev[i];
  584. memcpy(addr2, sd->scsi3addr, 8);
  585. addr2[4] = 0;
  586. /* differ only in byte 4? */
  587. if (memcmp(addr1, addr2, 8) == 0) {
  588. device->bus = sd->bus;
  589. device->target = sd->target;
  590. device->lun = device->scsi3addr[4];
  591. break;
  592. }
  593. }
  594. if (device->lun == -1) {
  595. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  596. " suspect firmware bug or unsupported hardware "
  597. "configuration.\n");
  598. return -1;
  599. }
  600. lun_assigned:
  601. h->dev[n] = device;
  602. h->ndevices++;
  603. added[*nadded] = device;
  604. (*nadded)++;
  605. /* initially, (before registering with scsi layer) we don't
  606. * know our hostno and we don't want to print anything first
  607. * time anyway (the scsi layer's inquiries will show that info)
  608. */
  609. /* if (hostno != -1) */
  610. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  611. scsi_device_type(device->devtype), hostno,
  612. device->bus, device->target, device->lun);
  613. return 0;
  614. }
  615. /* Update an entry in h->dev[] array. */
  616. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  617. int entry, struct hpsa_scsi_dev_t *new_entry)
  618. {
  619. /* assumes h->devlock is held */
  620. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  621. /* Raid level changed. */
  622. h->dev[entry]->raid_level = new_entry->raid_level;
  623. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  624. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  625. new_entry->target, new_entry->lun);
  626. }
  627. /* Replace an entry from h->dev[] array. */
  628. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  629. int entry, struct hpsa_scsi_dev_t *new_entry,
  630. struct hpsa_scsi_dev_t *added[], int *nadded,
  631. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  632. {
  633. /* assumes h->devlock is held */
  634. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  635. removed[*nremoved] = h->dev[entry];
  636. (*nremoved)++;
  637. /*
  638. * New physical devices won't have target/lun assigned yet
  639. * so we need to preserve the values in the slot we are replacing.
  640. */
  641. if (new_entry->target == -1) {
  642. new_entry->target = h->dev[entry]->target;
  643. new_entry->lun = h->dev[entry]->lun;
  644. }
  645. h->dev[entry] = new_entry;
  646. added[*nadded] = new_entry;
  647. (*nadded)++;
  648. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  649. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  650. new_entry->target, new_entry->lun);
  651. }
  652. /* Remove an entry from h->dev[] array. */
  653. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  654. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  655. {
  656. /* assumes h->devlock is held */
  657. int i;
  658. struct hpsa_scsi_dev_t *sd;
  659. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  660. sd = h->dev[entry];
  661. removed[*nremoved] = h->dev[entry];
  662. (*nremoved)++;
  663. for (i = entry; i < h->ndevices-1; i++)
  664. h->dev[i] = h->dev[i+1];
  665. h->ndevices--;
  666. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  667. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  668. sd->lun);
  669. }
  670. #define SCSI3ADDR_EQ(a, b) ( \
  671. (a)[7] == (b)[7] && \
  672. (a)[6] == (b)[6] && \
  673. (a)[5] == (b)[5] && \
  674. (a)[4] == (b)[4] && \
  675. (a)[3] == (b)[3] && \
  676. (a)[2] == (b)[2] && \
  677. (a)[1] == (b)[1] && \
  678. (a)[0] == (b)[0])
  679. static void fixup_botched_add(struct ctlr_info *h,
  680. struct hpsa_scsi_dev_t *added)
  681. {
  682. /* called when scsi_add_device fails in order to re-adjust
  683. * h->dev[] to match the mid layer's view.
  684. */
  685. unsigned long flags;
  686. int i, j;
  687. spin_lock_irqsave(&h->lock, flags);
  688. for (i = 0; i < h->ndevices; i++) {
  689. if (h->dev[i] == added) {
  690. for (j = i; j < h->ndevices-1; j++)
  691. h->dev[j] = h->dev[j+1];
  692. h->ndevices--;
  693. break;
  694. }
  695. }
  696. spin_unlock_irqrestore(&h->lock, flags);
  697. kfree(added);
  698. }
  699. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  700. struct hpsa_scsi_dev_t *dev2)
  701. {
  702. /* we compare everything except lun and target as these
  703. * are not yet assigned. Compare parts likely
  704. * to differ first
  705. */
  706. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  707. sizeof(dev1->scsi3addr)) != 0)
  708. return 0;
  709. if (memcmp(dev1->device_id, dev2->device_id,
  710. sizeof(dev1->device_id)) != 0)
  711. return 0;
  712. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  713. return 0;
  714. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  715. return 0;
  716. if (dev1->devtype != dev2->devtype)
  717. return 0;
  718. if (dev1->bus != dev2->bus)
  719. return 0;
  720. return 1;
  721. }
  722. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  723. struct hpsa_scsi_dev_t *dev2)
  724. {
  725. /* Device attributes that can change, but don't mean
  726. * that the device is a different device, nor that the OS
  727. * needs to be told anything about the change.
  728. */
  729. if (dev1->raid_level != dev2->raid_level)
  730. return 1;
  731. return 0;
  732. }
  733. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  734. * and return needle location in *index. If scsi3addr matches, but not
  735. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  736. * location in *index.
  737. * In the case of a minor device attribute change, such as RAID level, just
  738. * return DEVICE_UPDATED, along with the updated device's location in index.
  739. * If needle not found, return DEVICE_NOT_FOUND.
  740. */
  741. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  742. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  743. int *index)
  744. {
  745. int i;
  746. #define DEVICE_NOT_FOUND 0
  747. #define DEVICE_CHANGED 1
  748. #define DEVICE_SAME 2
  749. #define DEVICE_UPDATED 3
  750. for (i = 0; i < haystack_size; i++) {
  751. if (haystack[i] == NULL) /* previously removed. */
  752. continue;
  753. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  754. *index = i;
  755. if (device_is_the_same(needle, haystack[i])) {
  756. if (device_updated(needle, haystack[i]))
  757. return DEVICE_UPDATED;
  758. return DEVICE_SAME;
  759. } else {
  760. return DEVICE_CHANGED;
  761. }
  762. }
  763. }
  764. *index = -1;
  765. return DEVICE_NOT_FOUND;
  766. }
  767. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  768. struct hpsa_scsi_dev_t *sd[], int nsds)
  769. {
  770. /* sd contains scsi3 addresses and devtypes, and inquiry
  771. * data. This function takes what's in sd to be the current
  772. * reality and updates h->dev[] to reflect that reality.
  773. */
  774. int i, entry, device_change, changes = 0;
  775. struct hpsa_scsi_dev_t *csd;
  776. unsigned long flags;
  777. struct hpsa_scsi_dev_t **added, **removed;
  778. int nadded, nremoved;
  779. struct Scsi_Host *sh = NULL;
  780. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  781. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  782. if (!added || !removed) {
  783. dev_warn(&h->pdev->dev, "out of memory in "
  784. "adjust_hpsa_scsi_table\n");
  785. goto free_and_out;
  786. }
  787. spin_lock_irqsave(&h->devlock, flags);
  788. /* find any devices in h->dev[] that are not in
  789. * sd[] and remove them from h->dev[], and for any
  790. * devices which have changed, remove the old device
  791. * info and add the new device info.
  792. * If minor device attributes change, just update
  793. * the existing device structure.
  794. */
  795. i = 0;
  796. nremoved = 0;
  797. nadded = 0;
  798. while (i < h->ndevices) {
  799. csd = h->dev[i];
  800. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  801. if (device_change == DEVICE_NOT_FOUND) {
  802. changes++;
  803. hpsa_scsi_remove_entry(h, hostno, i,
  804. removed, &nremoved);
  805. continue; /* remove ^^^, hence i not incremented */
  806. } else if (device_change == DEVICE_CHANGED) {
  807. changes++;
  808. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  809. added, &nadded, removed, &nremoved);
  810. /* Set it to NULL to prevent it from being freed
  811. * at the bottom of hpsa_update_scsi_devices()
  812. */
  813. sd[entry] = NULL;
  814. } else if (device_change == DEVICE_UPDATED) {
  815. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  816. }
  817. i++;
  818. }
  819. /* Now, make sure every device listed in sd[] is also
  820. * listed in h->dev[], adding them if they aren't found
  821. */
  822. for (i = 0; i < nsds; i++) {
  823. if (!sd[i]) /* if already added above. */
  824. continue;
  825. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  826. h->ndevices, &entry);
  827. if (device_change == DEVICE_NOT_FOUND) {
  828. changes++;
  829. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  830. added, &nadded) != 0)
  831. break;
  832. sd[i] = NULL; /* prevent from being freed later. */
  833. } else if (device_change == DEVICE_CHANGED) {
  834. /* should never happen... */
  835. changes++;
  836. dev_warn(&h->pdev->dev,
  837. "device unexpectedly changed.\n");
  838. /* but if it does happen, we just ignore that device */
  839. }
  840. }
  841. spin_unlock_irqrestore(&h->devlock, flags);
  842. /* Don't notify scsi mid layer of any changes the first time through
  843. * (or if there are no changes) scsi_scan_host will do it later the
  844. * first time through.
  845. */
  846. if (hostno == -1 || !changes)
  847. goto free_and_out;
  848. sh = h->scsi_host;
  849. /* Notify scsi mid layer of any removed devices */
  850. for (i = 0; i < nremoved; i++) {
  851. struct scsi_device *sdev =
  852. scsi_device_lookup(sh, removed[i]->bus,
  853. removed[i]->target, removed[i]->lun);
  854. if (sdev != NULL) {
  855. scsi_remove_device(sdev);
  856. scsi_device_put(sdev);
  857. } else {
  858. /* We don't expect to get here.
  859. * future cmds to this device will get selection
  860. * timeout as if the device was gone.
  861. */
  862. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  863. " for removal.", hostno, removed[i]->bus,
  864. removed[i]->target, removed[i]->lun);
  865. }
  866. kfree(removed[i]);
  867. removed[i] = NULL;
  868. }
  869. /* Notify scsi mid layer of any added devices */
  870. for (i = 0; i < nadded; i++) {
  871. if (scsi_add_device(sh, added[i]->bus,
  872. added[i]->target, added[i]->lun) == 0)
  873. continue;
  874. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  875. "device not added.\n", hostno, added[i]->bus,
  876. added[i]->target, added[i]->lun);
  877. /* now we have to remove it from h->dev,
  878. * since it didn't get added to scsi mid layer
  879. */
  880. fixup_botched_add(h, added[i]);
  881. }
  882. free_and_out:
  883. kfree(added);
  884. kfree(removed);
  885. }
  886. /*
  887. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  888. * Assume's h->devlock is held.
  889. */
  890. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  891. int bus, int target, int lun)
  892. {
  893. int i;
  894. struct hpsa_scsi_dev_t *sd;
  895. for (i = 0; i < h->ndevices; i++) {
  896. sd = h->dev[i];
  897. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  898. return sd;
  899. }
  900. return NULL;
  901. }
  902. /* link sdev->hostdata to our per-device structure. */
  903. static int hpsa_slave_alloc(struct scsi_device *sdev)
  904. {
  905. struct hpsa_scsi_dev_t *sd;
  906. unsigned long flags;
  907. struct ctlr_info *h;
  908. h = sdev_to_hba(sdev);
  909. spin_lock_irqsave(&h->devlock, flags);
  910. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  911. sdev_id(sdev), sdev->lun);
  912. if (sd != NULL)
  913. sdev->hostdata = sd;
  914. spin_unlock_irqrestore(&h->devlock, flags);
  915. return 0;
  916. }
  917. static void hpsa_slave_destroy(struct scsi_device *sdev)
  918. {
  919. /* nothing to do. */
  920. }
  921. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  922. {
  923. int i;
  924. if (!h->cmd_sg_list)
  925. return;
  926. for (i = 0; i < h->nr_cmds; i++) {
  927. kfree(h->cmd_sg_list[i]);
  928. h->cmd_sg_list[i] = NULL;
  929. }
  930. kfree(h->cmd_sg_list);
  931. h->cmd_sg_list = NULL;
  932. }
  933. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  934. {
  935. int i;
  936. if (h->chainsize <= 0)
  937. return 0;
  938. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  939. GFP_KERNEL);
  940. if (!h->cmd_sg_list)
  941. return -ENOMEM;
  942. for (i = 0; i < h->nr_cmds; i++) {
  943. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  944. h->chainsize, GFP_KERNEL);
  945. if (!h->cmd_sg_list[i])
  946. goto clean;
  947. }
  948. return 0;
  949. clean:
  950. hpsa_free_sg_chain_blocks(h);
  951. return -ENOMEM;
  952. }
  953. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  954. struct CommandList *c)
  955. {
  956. struct SGDescriptor *chain_sg, *chain_block;
  957. u64 temp64;
  958. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  959. chain_block = h->cmd_sg_list[c->cmdindex];
  960. chain_sg->Ext = HPSA_SG_CHAIN;
  961. chain_sg->Len = sizeof(*chain_sg) *
  962. (c->Header.SGTotal - h->max_cmd_sg_entries);
  963. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  964. PCI_DMA_TODEVICE);
  965. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  966. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  967. }
  968. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  969. struct CommandList *c)
  970. {
  971. struct SGDescriptor *chain_sg;
  972. union u64bit temp64;
  973. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  974. return;
  975. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  976. temp64.val32.lower = chain_sg->Addr.lower;
  977. temp64.val32.upper = chain_sg->Addr.upper;
  978. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  979. }
  980. static void complete_scsi_command(struct CommandList *cp)
  981. {
  982. struct scsi_cmnd *cmd;
  983. struct ctlr_info *h;
  984. struct ErrorInfo *ei;
  985. unsigned char sense_key;
  986. unsigned char asc; /* additional sense code */
  987. unsigned char ascq; /* additional sense code qualifier */
  988. unsigned long sense_data_size;
  989. ei = cp->err_info;
  990. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  991. h = cp->h;
  992. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  993. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  994. hpsa_unmap_sg_chain_block(h, cp);
  995. cmd->result = (DID_OK << 16); /* host byte */
  996. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  997. cmd->result |= ei->ScsiStatus;
  998. /* copy the sense data whether we need to or not. */
  999. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1000. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1001. else
  1002. sense_data_size = sizeof(ei->SenseInfo);
  1003. if (ei->SenseLen < sense_data_size)
  1004. sense_data_size = ei->SenseLen;
  1005. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1006. scsi_set_resid(cmd, ei->ResidualCnt);
  1007. if (ei->CommandStatus == 0) {
  1008. cmd->scsi_done(cmd);
  1009. cmd_free(h, cp);
  1010. return;
  1011. }
  1012. /* an error has occurred */
  1013. switch (ei->CommandStatus) {
  1014. case CMD_TARGET_STATUS:
  1015. if (ei->ScsiStatus) {
  1016. /* Get sense key */
  1017. sense_key = 0xf & ei->SenseInfo[2];
  1018. /* Get additional sense code */
  1019. asc = ei->SenseInfo[12];
  1020. /* Get addition sense code qualifier */
  1021. ascq = ei->SenseInfo[13];
  1022. }
  1023. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1024. if (check_for_unit_attention(h, cp)) {
  1025. cmd->result = DID_SOFT_ERROR << 16;
  1026. break;
  1027. }
  1028. if (sense_key == ILLEGAL_REQUEST) {
  1029. /*
  1030. * SCSI REPORT_LUNS is commonly unsupported on
  1031. * Smart Array. Suppress noisy complaint.
  1032. */
  1033. if (cp->Request.CDB[0] == REPORT_LUNS)
  1034. break;
  1035. /* If ASC/ASCQ indicate Logical Unit
  1036. * Not Supported condition,
  1037. */
  1038. if ((asc == 0x25) && (ascq == 0x0)) {
  1039. dev_warn(&h->pdev->dev, "cp %p "
  1040. "has check condition\n", cp);
  1041. break;
  1042. }
  1043. }
  1044. if (sense_key == NOT_READY) {
  1045. /* If Sense is Not Ready, Logical Unit
  1046. * Not ready, Manual Intervention
  1047. * required
  1048. */
  1049. if ((asc == 0x04) && (ascq == 0x03)) {
  1050. dev_warn(&h->pdev->dev, "cp %p "
  1051. "has check condition: unit "
  1052. "not ready, manual "
  1053. "intervention required\n", cp);
  1054. break;
  1055. }
  1056. }
  1057. if (sense_key == ABORTED_COMMAND) {
  1058. /* Aborted command is retryable */
  1059. dev_warn(&h->pdev->dev, "cp %p "
  1060. "has check condition: aborted command: "
  1061. "ASC: 0x%x, ASCQ: 0x%x\n",
  1062. cp, asc, ascq);
  1063. cmd->result = DID_SOFT_ERROR << 16;
  1064. break;
  1065. }
  1066. /* Must be some other type of check condition */
  1067. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1068. "unknown type: "
  1069. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1070. "Returning result: 0x%x, "
  1071. "cmd=[%02x %02x %02x %02x %02x "
  1072. "%02x %02x %02x %02x %02x %02x "
  1073. "%02x %02x %02x %02x %02x]\n",
  1074. cp, sense_key, asc, ascq,
  1075. cmd->result,
  1076. cmd->cmnd[0], cmd->cmnd[1],
  1077. cmd->cmnd[2], cmd->cmnd[3],
  1078. cmd->cmnd[4], cmd->cmnd[5],
  1079. cmd->cmnd[6], cmd->cmnd[7],
  1080. cmd->cmnd[8], cmd->cmnd[9],
  1081. cmd->cmnd[10], cmd->cmnd[11],
  1082. cmd->cmnd[12], cmd->cmnd[13],
  1083. cmd->cmnd[14], cmd->cmnd[15]);
  1084. break;
  1085. }
  1086. /* Problem was not a check condition
  1087. * Pass it up to the upper layers...
  1088. */
  1089. if (ei->ScsiStatus) {
  1090. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1091. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1092. "Returning result: 0x%x\n",
  1093. cp, ei->ScsiStatus,
  1094. sense_key, asc, ascq,
  1095. cmd->result);
  1096. } else { /* scsi status is zero??? How??? */
  1097. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1098. "Returning no connection.\n", cp),
  1099. /* Ordinarily, this case should never happen,
  1100. * but there is a bug in some released firmware
  1101. * revisions that allows it to happen if, for
  1102. * example, a 4100 backplane loses power and
  1103. * the tape drive is in it. We assume that
  1104. * it's a fatal error of some kind because we
  1105. * can't show that it wasn't. We will make it
  1106. * look like selection timeout since that is
  1107. * the most common reason for this to occur,
  1108. * and it's severe enough.
  1109. */
  1110. cmd->result = DID_NO_CONNECT << 16;
  1111. }
  1112. break;
  1113. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1114. break;
  1115. case CMD_DATA_OVERRUN:
  1116. dev_warn(&h->pdev->dev, "cp %p has"
  1117. " completed with data overrun "
  1118. "reported\n", cp);
  1119. break;
  1120. case CMD_INVALID: {
  1121. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1122. print_cmd(cp); */
  1123. /* We get CMD_INVALID if you address a non-existent device
  1124. * instead of a selection timeout (no response). You will
  1125. * see this if you yank out a drive, then try to access it.
  1126. * This is kind of a shame because it means that any other
  1127. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1128. * missing target. */
  1129. cmd->result = DID_NO_CONNECT << 16;
  1130. }
  1131. break;
  1132. case CMD_PROTOCOL_ERR:
  1133. dev_warn(&h->pdev->dev, "cp %p has "
  1134. "protocol error \n", cp);
  1135. break;
  1136. case CMD_HARDWARE_ERR:
  1137. cmd->result = DID_ERROR << 16;
  1138. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1139. break;
  1140. case CMD_CONNECTION_LOST:
  1141. cmd->result = DID_ERROR << 16;
  1142. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1143. break;
  1144. case CMD_ABORTED:
  1145. cmd->result = DID_ABORT << 16;
  1146. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1147. cp, ei->ScsiStatus);
  1148. break;
  1149. case CMD_ABORT_FAILED:
  1150. cmd->result = DID_ERROR << 16;
  1151. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1152. break;
  1153. case CMD_UNSOLICITED_ABORT:
  1154. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1155. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1156. "abort\n", cp);
  1157. break;
  1158. case CMD_TIMEOUT:
  1159. cmd->result = DID_TIME_OUT << 16;
  1160. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1161. break;
  1162. case CMD_UNABORTABLE:
  1163. cmd->result = DID_ERROR << 16;
  1164. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1165. break;
  1166. default:
  1167. cmd->result = DID_ERROR << 16;
  1168. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1169. cp, ei->CommandStatus);
  1170. }
  1171. cmd->scsi_done(cmd);
  1172. cmd_free(h, cp);
  1173. }
  1174. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1175. struct CommandList *c, int sg_used, int data_direction)
  1176. {
  1177. int i;
  1178. union u64bit addr64;
  1179. for (i = 0; i < sg_used; i++) {
  1180. addr64.val32.lower = c->SG[i].Addr.lower;
  1181. addr64.val32.upper = c->SG[i].Addr.upper;
  1182. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1183. data_direction);
  1184. }
  1185. }
  1186. static void hpsa_map_one(struct pci_dev *pdev,
  1187. struct CommandList *cp,
  1188. unsigned char *buf,
  1189. size_t buflen,
  1190. int data_direction)
  1191. {
  1192. u64 addr64;
  1193. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1194. cp->Header.SGList = 0;
  1195. cp->Header.SGTotal = 0;
  1196. return;
  1197. }
  1198. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1199. cp->SG[0].Addr.lower =
  1200. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1201. cp->SG[0].Addr.upper =
  1202. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1203. cp->SG[0].Len = buflen;
  1204. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1205. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1206. }
  1207. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1208. struct CommandList *c)
  1209. {
  1210. DECLARE_COMPLETION_ONSTACK(wait);
  1211. c->waiting = &wait;
  1212. enqueue_cmd_and_start_io(h, c);
  1213. wait_for_completion(&wait);
  1214. }
  1215. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1216. struct CommandList *c)
  1217. {
  1218. unsigned long flags;
  1219. /* If controller lockup detected, fake a hardware error. */
  1220. spin_lock_irqsave(&h->lock, flags);
  1221. if (unlikely(h->lockup_detected)) {
  1222. spin_unlock_irqrestore(&h->lock, flags);
  1223. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1224. } else {
  1225. spin_unlock_irqrestore(&h->lock, flags);
  1226. hpsa_scsi_do_simple_cmd_core(h, c);
  1227. }
  1228. }
  1229. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1230. struct CommandList *c, int data_direction)
  1231. {
  1232. int retry_count = 0;
  1233. do {
  1234. memset(c->err_info, 0, sizeof(*c->err_info));
  1235. hpsa_scsi_do_simple_cmd_core(h, c);
  1236. retry_count++;
  1237. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1238. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1239. }
  1240. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1241. {
  1242. struct ErrorInfo *ei;
  1243. struct device *d = &cp->h->pdev->dev;
  1244. ei = cp->err_info;
  1245. switch (ei->CommandStatus) {
  1246. case CMD_TARGET_STATUS:
  1247. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1248. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1249. ei->ScsiStatus);
  1250. if (ei->ScsiStatus == 0)
  1251. dev_warn(d, "SCSI status is abnormally zero. "
  1252. "(probably indicates selection timeout "
  1253. "reported incorrectly due to a known "
  1254. "firmware bug, circa July, 2001.)\n");
  1255. break;
  1256. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1257. dev_info(d, "UNDERRUN\n");
  1258. break;
  1259. case CMD_DATA_OVERRUN:
  1260. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1261. break;
  1262. case CMD_INVALID: {
  1263. /* controller unfortunately reports SCSI passthru's
  1264. * to non-existent targets as invalid commands.
  1265. */
  1266. dev_warn(d, "cp %p is reported invalid (probably means "
  1267. "target device no longer present)\n", cp);
  1268. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1269. print_cmd(cp); */
  1270. }
  1271. break;
  1272. case CMD_PROTOCOL_ERR:
  1273. dev_warn(d, "cp %p has protocol error \n", cp);
  1274. break;
  1275. case CMD_HARDWARE_ERR:
  1276. /* cmd->result = DID_ERROR << 16; */
  1277. dev_warn(d, "cp %p had hardware error\n", cp);
  1278. break;
  1279. case CMD_CONNECTION_LOST:
  1280. dev_warn(d, "cp %p had connection lost\n", cp);
  1281. break;
  1282. case CMD_ABORTED:
  1283. dev_warn(d, "cp %p was aborted\n", cp);
  1284. break;
  1285. case CMD_ABORT_FAILED:
  1286. dev_warn(d, "cp %p reports abort failed\n", cp);
  1287. break;
  1288. case CMD_UNSOLICITED_ABORT:
  1289. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1290. break;
  1291. case CMD_TIMEOUT:
  1292. dev_warn(d, "cp %p timed out\n", cp);
  1293. break;
  1294. case CMD_UNABORTABLE:
  1295. dev_warn(d, "Command unabortable\n");
  1296. break;
  1297. default:
  1298. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1299. ei->CommandStatus);
  1300. }
  1301. }
  1302. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1303. unsigned char page, unsigned char *buf,
  1304. unsigned char bufsize)
  1305. {
  1306. int rc = IO_OK;
  1307. struct CommandList *c;
  1308. struct ErrorInfo *ei;
  1309. c = cmd_special_alloc(h);
  1310. if (c == NULL) { /* trouble... */
  1311. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1312. return -ENOMEM;
  1313. }
  1314. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1315. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1316. ei = c->err_info;
  1317. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1318. hpsa_scsi_interpret_error(c);
  1319. rc = -1;
  1320. }
  1321. cmd_special_free(h, c);
  1322. return rc;
  1323. }
  1324. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1325. {
  1326. int rc = IO_OK;
  1327. struct CommandList *c;
  1328. struct ErrorInfo *ei;
  1329. c = cmd_special_alloc(h);
  1330. if (c == NULL) { /* trouble... */
  1331. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1332. return -ENOMEM;
  1333. }
  1334. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1335. hpsa_scsi_do_simple_cmd_core(h, c);
  1336. /* no unmap needed here because no data xfer. */
  1337. ei = c->err_info;
  1338. if (ei->CommandStatus != 0) {
  1339. hpsa_scsi_interpret_error(c);
  1340. rc = -1;
  1341. }
  1342. cmd_special_free(h, c);
  1343. return rc;
  1344. }
  1345. static void hpsa_get_raid_level(struct ctlr_info *h,
  1346. unsigned char *scsi3addr, unsigned char *raid_level)
  1347. {
  1348. int rc;
  1349. unsigned char *buf;
  1350. *raid_level = RAID_UNKNOWN;
  1351. buf = kzalloc(64, GFP_KERNEL);
  1352. if (!buf)
  1353. return;
  1354. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1355. if (rc == 0)
  1356. *raid_level = buf[8];
  1357. if (*raid_level > RAID_UNKNOWN)
  1358. *raid_level = RAID_UNKNOWN;
  1359. kfree(buf);
  1360. return;
  1361. }
  1362. /* Get the device id from inquiry page 0x83 */
  1363. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1364. unsigned char *device_id, int buflen)
  1365. {
  1366. int rc;
  1367. unsigned char *buf;
  1368. if (buflen > 16)
  1369. buflen = 16;
  1370. buf = kzalloc(64, GFP_KERNEL);
  1371. if (!buf)
  1372. return -1;
  1373. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1374. if (rc == 0)
  1375. memcpy(device_id, &buf[8], buflen);
  1376. kfree(buf);
  1377. return rc != 0;
  1378. }
  1379. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1380. struct ReportLUNdata *buf, int bufsize,
  1381. int extended_response)
  1382. {
  1383. int rc = IO_OK;
  1384. struct CommandList *c;
  1385. unsigned char scsi3addr[8];
  1386. struct ErrorInfo *ei;
  1387. c = cmd_special_alloc(h);
  1388. if (c == NULL) { /* trouble... */
  1389. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1390. return -1;
  1391. }
  1392. /* address the controller */
  1393. memset(scsi3addr, 0, sizeof(scsi3addr));
  1394. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1395. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1396. if (extended_response)
  1397. c->Request.CDB[1] = extended_response;
  1398. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1399. ei = c->err_info;
  1400. if (ei->CommandStatus != 0 &&
  1401. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1402. hpsa_scsi_interpret_error(c);
  1403. rc = -1;
  1404. }
  1405. cmd_special_free(h, c);
  1406. return rc;
  1407. }
  1408. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1409. struct ReportLUNdata *buf,
  1410. int bufsize, int extended_response)
  1411. {
  1412. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1413. }
  1414. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1415. struct ReportLUNdata *buf, int bufsize)
  1416. {
  1417. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1418. }
  1419. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1420. int bus, int target, int lun)
  1421. {
  1422. device->bus = bus;
  1423. device->target = target;
  1424. device->lun = lun;
  1425. }
  1426. static int hpsa_update_device_info(struct ctlr_info *h,
  1427. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1428. unsigned char *is_OBDR_device)
  1429. {
  1430. #define OBDR_SIG_OFFSET 43
  1431. #define OBDR_TAPE_SIG "$DR-10"
  1432. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1433. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1434. unsigned char *inq_buff;
  1435. unsigned char *obdr_sig;
  1436. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1437. if (!inq_buff)
  1438. goto bail_out;
  1439. /* Do an inquiry to the device to see what it is. */
  1440. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1441. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1442. /* Inquiry failed (msg printed already) */
  1443. dev_err(&h->pdev->dev,
  1444. "hpsa_update_device_info: inquiry failed\n");
  1445. goto bail_out;
  1446. }
  1447. this_device->devtype = (inq_buff[0] & 0x1f);
  1448. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1449. memcpy(this_device->vendor, &inq_buff[8],
  1450. sizeof(this_device->vendor));
  1451. memcpy(this_device->model, &inq_buff[16],
  1452. sizeof(this_device->model));
  1453. memset(this_device->device_id, 0,
  1454. sizeof(this_device->device_id));
  1455. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1456. sizeof(this_device->device_id));
  1457. if (this_device->devtype == TYPE_DISK &&
  1458. is_logical_dev_addr_mode(scsi3addr))
  1459. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1460. else
  1461. this_device->raid_level = RAID_UNKNOWN;
  1462. if (is_OBDR_device) {
  1463. /* See if this is a One-Button-Disaster-Recovery device
  1464. * by looking for "$DR-10" at offset 43 in inquiry data.
  1465. */
  1466. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1467. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1468. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1469. OBDR_SIG_LEN) == 0);
  1470. }
  1471. kfree(inq_buff);
  1472. return 0;
  1473. bail_out:
  1474. kfree(inq_buff);
  1475. return 1;
  1476. }
  1477. static unsigned char *ext_target_model[] = {
  1478. "MSA2012",
  1479. "MSA2024",
  1480. "MSA2312",
  1481. "MSA2324",
  1482. "P2000 G3 SAS",
  1483. NULL,
  1484. };
  1485. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1486. {
  1487. int i;
  1488. for (i = 0; ext_target_model[i]; i++)
  1489. if (strncmp(device->model, ext_target_model[i],
  1490. strlen(ext_target_model[i])) == 0)
  1491. return 1;
  1492. return 0;
  1493. }
  1494. /* Helper function to assign bus, target, lun mapping of devices.
  1495. * Puts non-external target logical volumes on bus 0, external target logical
  1496. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1497. * Logical drive target and lun are assigned at this time, but
  1498. * physical device lun and target assignment are deferred (assigned
  1499. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1500. */
  1501. static void figure_bus_target_lun(struct ctlr_info *h,
  1502. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1503. {
  1504. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1505. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1506. /* physical device, target and lun filled in later */
  1507. if (is_hba_lunid(lunaddrbytes))
  1508. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1509. else
  1510. /* defer target, lun assignment for physical devices */
  1511. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1512. return;
  1513. }
  1514. /* It's a logical device */
  1515. if (is_ext_target(h, device)) {
  1516. /* external target way, put logicals on bus 1
  1517. * and match target/lun numbers box
  1518. * reports, other smart array, bus 0, target 0, match lunid
  1519. */
  1520. hpsa_set_bus_target_lun(device,
  1521. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1522. return;
  1523. }
  1524. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1525. }
  1526. /*
  1527. * If there is no lun 0 on a target, linux won't find any devices.
  1528. * For the external targets (arrays), we have to manually detect the enclosure
  1529. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1530. * it for some reason. *tmpdevice is the target we're adding,
  1531. * this_device is a pointer into the current element of currentsd[]
  1532. * that we're building up in update_scsi_devices(), below.
  1533. * lunzerobits is a bitmap that tracks which targets already have a
  1534. * lun 0 assigned.
  1535. * Returns 1 if an enclosure was added, 0 if not.
  1536. */
  1537. static int add_ext_target_dev(struct ctlr_info *h,
  1538. struct hpsa_scsi_dev_t *tmpdevice,
  1539. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1540. unsigned long lunzerobits[], int *n_ext_target_devs)
  1541. {
  1542. unsigned char scsi3addr[8];
  1543. if (test_bit(tmpdevice->target, lunzerobits))
  1544. return 0; /* There is already a lun 0 on this target. */
  1545. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1546. return 0; /* It's the logical targets that may lack lun 0. */
  1547. if (!is_ext_target(h, tmpdevice))
  1548. return 0; /* Only external target devices have this problem. */
  1549. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1550. return 0;
  1551. memset(scsi3addr, 0, 8);
  1552. scsi3addr[3] = tmpdevice->target;
  1553. if (is_hba_lunid(scsi3addr))
  1554. return 0; /* Don't add the RAID controller here. */
  1555. if (is_scsi_rev_5(h))
  1556. return 0; /* p1210m doesn't need to do this. */
  1557. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1558. dev_warn(&h->pdev->dev, "Maximum number of external "
  1559. "target devices exceeded. Check your hardware "
  1560. "configuration.");
  1561. return 0;
  1562. }
  1563. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1564. return 0;
  1565. (*n_ext_target_devs)++;
  1566. hpsa_set_bus_target_lun(this_device,
  1567. tmpdevice->bus, tmpdevice->target, 0);
  1568. set_bit(tmpdevice->target, lunzerobits);
  1569. return 1;
  1570. }
  1571. /*
  1572. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1573. * logdev. The number of luns in physdev and logdev are returned in
  1574. * *nphysicals and *nlogicals, respectively.
  1575. * Returns 0 on success, -1 otherwise.
  1576. */
  1577. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1578. int reportlunsize,
  1579. struct ReportLUNdata *physdev, u32 *nphysicals,
  1580. struct ReportLUNdata *logdev, u32 *nlogicals)
  1581. {
  1582. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1583. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1584. return -1;
  1585. }
  1586. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1587. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1588. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1589. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1590. *nphysicals - HPSA_MAX_PHYS_LUN);
  1591. *nphysicals = HPSA_MAX_PHYS_LUN;
  1592. }
  1593. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1594. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1595. return -1;
  1596. }
  1597. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1598. /* Reject Logicals in excess of our max capability. */
  1599. if (*nlogicals > HPSA_MAX_LUN) {
  1600. dev_warn(&h->pdev->dev,
  1601. "maximum logical LUNs (%d) exceeded. "
  1602. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1603. *nlogicals - HPSA_MAX_LUN);
  1604. *nlogicals = HPSA_MAX_LUN;
  1605. }
  1606. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1607. dev_warn(&h->pdev->dev,
  1608. "maximum logical + physical LUNs (%d) exceeded. "
  1609. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1610. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1611. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1612. }
  1613. return 0;
  1614. }
  1615. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1616. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1617. struct ReportLUNdata *logdev_list)
  1618. {
  1619. /* Helper function, figure out where the LUN ID info is coming from
  1620. * given index i, lists of physical and logical devices, where in
  1621. * the list the raid controller is supposed to appear (first or last)
  1622. */
  1623. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1624. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1625. if (i == raid_ctlr_position)
  1626. return RAID_CTLR_LUNID;
  1627. if (i < logicals_start)
  1628. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1629. if (i < last_device)
  1630. return &logdev_list->LUN[i - nphysicals -
  1631. (raid_ctlr_position == 0)][0];
  1632. BUG();
  1633. return NULL;
  1634. }
  1635. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1636. {
  1637. /* the idea here is we could get notified
  1638. * that some devices have changed, so we do a report
  1639. * physical luns and report logical luns cmd, and adjust
  1640. * our list of devices accordingly.
  1641. *
  1642. * The scsi3addr's of devices won't change so long as the
  1643. * adapter is not reset. That means we can rescan and
  1644. * tell which devices we already know about, vs. new
  1645. * devices, vs. disappearing devices.
  1646. */
  1647. struct ReportLUNdata *physdev_list = NULL;
  1648. struct ReportLUNdata *logdev_list = NULL;
  1649. u32 nphysicals = 0;
  1650. u32 nlogicals = 0;
  1651. u32 ndev_allocated = 0;
  1652. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1653. int ncurrent = 0;
  1654. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1655. int i, n_ext_target_devs, ndevs_to_allocate;
  1656. int raid_ctlr_position;
  1657. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1658. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1659. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1660. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1661. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1662. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1663. dev_err(&h->pdev->dev, "out of memory\n");
  1664. goto out;
  1665. }
  1666. memset(lunzerobits, 0, sizeof(lunzerobits));
  1667. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1668. logdev_list, &nlogicals))
  1669. goto out;
  1670. /* We might see up to the maximum number of logical and physical disks
  1671. * plus external target devices, and a device for the local RAID
  1672. * controller.
  1673. */
  1674. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1675. /* Allocate the per device structures */
  1676. for (i = 0; i < ndevs_to_allocate; i++) {
  1677. if (i >= HPSA_MAX_DEVICES) {
  1678. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1679. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1680. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1681. break;
  1682. }
  1683. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1684. if (!currentsd[i]) {
  1685. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1686. __FILE__, __LINE__);
  1687. goto out;
  1688. }
  1689. ndev_allocated++;
  1690. }
  1691. if (unlikely(is_scsi_rev_5(h)))
  1692. raid_ctlr_position = 0;
  1693. else
  1694. raid_ctlr_position = nphysicals + nlogicals;
  1695. /* adjust our table of devices */
  1696. n_ext_target_devs = 0;
  1697. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1698. u8 *lunaddrbytes, is_OBDR = 0;
  1699. /* Figure out where the LUN ID info is coming from */
  1700. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1701. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1702. /* skip masked physical devices. */
  1703. if (lunaddrbytes[3] & 0xC0 &&
  1704. i < nphysicals + (raid_ctlr_position == 0))
  1705. continue;
  1706. /* Get device type, vendor, model, device id */
  1707. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1708. &is_OBDR))
  1709. continue; /* skip it if we can't talk to it. */
  1710. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1711. this_device = currentsd[ncurrent];
  1712. /*
  1713. * For external target devices, we have to insert a LUN 0 which
  1714. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1715. * is nonetheless an enclosure device there. We have to
  1716. * present that otherwise linux won't find anything if
  1717. * there is no lun 0.
  1718. */
  1719. if (add_ext_target_dev(h, tmpdevice, this_device,
  1720. lunaddrbytes, lunzerobits,
  1721. &n_ext_target_devs)) {
  1722. ncurrent++;
  1723. this_device = currentsd[ncurrent];
  1724. }
  1725. *this_device = *tmpdevice;
  1726. switch (this_device->devtype) {
  1727. case TYPE_ROM:
  1728. /* We don't *really* support actual CD-ROM devices,
  1729. * just "One Button Disaster Recovery" tape drive
  1730. * which temporarily pretends to be a CD-ROM drive.
  1731. * So we check that the device is really an OBDR tape
  1732. * device by checking for "$DR-10" in bytes 43-48 of
  1733. * the inquiry data.
  1734. */
  1735. if (is_OBDR)
  1736. ncurrent++;
  1737. break;
  1738. case TYPE_DISK:
  1739. if (i < nphysicals)
  1740. break;
  1741. ncurrent++;
  1742. break;
  1743. case TYPE_TAPE:
  1744. case TYPE_MEDIUM_CHANGER:
  1745. ncurrent++;
  1746. break;
  1747. case TYPE_RAID:
  1748. /* Only present the Smartarray HBA as a RAID controller.
  1749. * If it's a RAID controller other than the HBA itself
  1750. * (an external RAID controller, MSA500 or similar)
  1751. * don't present it.
  1752. */
  1753. if (!is_hba_lunid(lunaddrbytes))
  1754. break;
  1755. ncurrent++;
  1756. break;
  1757. default:
  1758. break;
  1759. }
  1760. if (ncurrent >= HPSA_MAX_DEVICES)
  1761. break;
  1762. }
  1763. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1764. out:
  1765. kfree(tmpdevice);
  1766. for (i = 0; i < ndev_allocated; i++)
  1767. kfree(currentsd[i]);
  1768. kfree(currentsd);
  1769. kfree(physdev_list);
  1770. kfree(logdev_list);
  1771. }
  1772. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1773. * dma mapping and fills in the scatter gather entries of the
  1774. * hpsa command, cp.
  1775. */
  1776. static int hpsa_scatter_gather(struct ctlr_info *h,
  1777. struct CommandList *cp,
  1778. struct scsi_cmnd *cmd)
  1779. {
  1780. unsigned int len;
  1781. struct scatterlist *sg;
  1782. u64 addr64;
  1783. int use_sg, i, sg_index, chained;
  1784. struct SGDescriptor *curr_sg;
  1785. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1786. use_sg = scsi_dma_map(cmd);
  1787. if (use_sg < 0)
  1788. return use_sg;
  1789. if (!use_sg)
  1790. goto sglist_finished;
  1791. curr_sg = cp->SG;
  1792. chained = 0;
  1793. sg_index = 0;
  1794. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1795. if (i == h->max_cmd_sg_entries - 1 &&
  1796. use_sg > h->max_cmd_sg_entries) {
  1797. chained = 1;
  1798. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1799. sg_index = 0;
  1800. }
  1801. addr64 = (u64) sg_dma_address(sg);
  1802. len = sg_dma_len(sg);
  1803. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1804. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1805. curr_sg->Len = len;
  1806. curr_sg->Ext = 0; /* we are not chaining */
  1807. curr_sg++;
  1808. }
  1809. if (use_sg + chained > h->maxSG)
  1810. h->maxSG = use_sg + chained;
  1811. if (chained) {
  1812. cp->Header.SGList = h->max_cmd_sg_entries;
  1813. cp->Header.SGTotal = (u16) (use_sg + 1);
  1814. hpsa_map_sg_chain_block(h, cp);
  1815. return 0;
  1816. }
  1817. sglist_finished:
  1818. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1819. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1820. return 0;
  1821. }
  1822. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1823. void (*done)(struct scsi_cmnd *))
  1824. {
  1825. struct ctlr_info *h;
  1826. struct hpsa_scsi_dev_t *dev;
  1827. unsigned char scsi3addr[8];
  1828. struct CommandList *c;
  1829. unsigned long flags;
  1830. /* Get the ptr to our adapter structure out of cmd->host. */
  1831. h = sdev_to_hba(cmd->device);
  1832. dev = cmd->device->hostdata;
  1833. if (!dev) {
  1834. cmd->result = DID_NO_CONNECT << 16;
  1835. done(cmd);
  1836. return 0;
  1837. }
  1838. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1839. spin_lock_irqsave(&h->lock, flags);
  1840. if (unlikely(h->lockup_detected)) {
  1841. spin_unlock_irqrestore(&h->lock, flags);
  1842. cmd->result = DID_ERROR << 16;
  1843. done(cmd);
  1844. return 0;
  1845. }
  1846. /* Need a lock as this is being allocated from the pool */
  1847. c = cmd_alloc(h);
  1848. spin_unlock_irqrestore(&h->lock, flags);
  1849. if (c == NULL) { /* trouble... */
  1850. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1851. return SCSI_MLQUEUE_HOST_BUSY;
  1852. }
  1853. /* Fill in the command list header */
  1854. cmd->scsi_done = done; /* save this for use by completion code */
  1855. /* save c in case we have to abort it */
  1856. cmd->host_scribble = (unsigned char *) c;
  1857. c->cmd_type = CMD_SCSI;
  1858. c->scsi_cmd = cmd;
  1859. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1860. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1861. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1862. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1863. /* Fill in the request block... */
  1864. c->Request.Timeout = 0;
  1865. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1866. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1867. c->Request.CDBLen = cmd->cmd_len;
  1868. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1869. c->Request.Type.Type = TYPE_CMD;
  1870. c->Request.Type.Attribute = ATTR_SIMPLE;
  1871. switch (cmd->sc_data_direction) {
  1872. case DMA_TO_DEVICE:
  1873. c->Request.Type.Direction = XFER_WRITE;
  1874. break;
  1875. case DMA_FROM_DEVICE:
  1876. c->Request.Type.Direction = XFER_READ;
  1877. break;
  1878. case DMA_NONE:
  1879. c->Request.Type.Direction = XFER_NONE;
  1880. break;
  1881. case DMA_BIDIRECTIONAL:
  1882. /* This can happen if a buggy application does a scsi passthru
  1883. * and sets both inlen and outlen to non-zero. ( see
  1884. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1885. */
  1886. c->Request.Type.Direction = XFER_RSVD;
  1887. /* This is technically wrong, and hpsa controllers should
  1888. * reject it with CMD_INVALID, which is the most correct
  1889. * response, but non-fibre backends appear to let it
  1890. * slide by, and give the same results as if this field
  1891. * were set correctly. Either way is acceptable for
  1892. * our purposes here.
  1893. */
  1894. break;
  1895. default:
  1896. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1897. cmd->sc_data_direction);
  1898. BUG();
  1899. break;
  1900. }
  1901. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1902. cmd_free(h, c);
  1903. return SCSI_MLQUEUE_HOST_BUSY;
  1904. }
  1905. enqueue_cmd_and_start_io(h, c);
  1906. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1907. return 0;
  1908. }
  1909. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1910. static void hpsa_scan_start(struct Scsi_Host *sh)
  1911. {
  1912. struct ctlr_info *h = shost_to_hba(sh);
  1913. unsigned long flags;
  1914. /* wait until any scan already in progress is finished. */
  1915. while (1) {
  1916. spin_lock_irqsave(&h->scan_lock, flags);
  1917. if (h->scan_finished)
  1918. break;
  1919. spin_unlock_irqrestore(&h->scan_lock, flags);
  1920. wait_event(h->scan_wait_queue, h->scan_finished);
  1921. /* Note: We don't need to worry about a race between this
  1922. * thread and driver unload because the midlayer will
  1923. * have incremented the reference count, so unload won't
  1924. * happen if we're in here.
  1925. */
  1926. }
  1927. h->scan_finished = 0; /* mark scan as in progress */
  1928. spin_unlock_irqrestore(&h->scan_lock, flags);
  1929. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1930. spin_lock_irqsave(&h->scan_lock, flags);
  1931. h->scan_finished = 1; /* mark scan as finished. */
  1932. wake_up_all(&h->scan_wait_queue);
  1933. spin_unlock_irqrestore(&h->scan_lock, flags);
  1934. }
  1935. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1936. unsigned long elapsed_time)
  1937. {
  1938. struct ctlr_info *h = shost_to_hba(sh);
  1939. unsigned long flags;
  1940. int finished;
  1941. spin_lock_irqsave(&h->scan_lock, flags);
  1942. finished = h->scan_finished;
  1943. spin_unlock_irqrestore(&h->scan_lock, flags);
  1944. return finished;
  1945. }
  1946. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1947. int qdepth, int reason)
  1948. {
  1949. struct ctlr_info *h = sdev_to_hba(sdev);
  1950. if (reason != SCSI_QDEPTH_DEFAULT)
  1951. return -ENOTSUPP;
  1952. if (qdepth < 1)
  1953. qdepth = 1;
  1954. else
  1955. if (qdepth > h->nr_cmds)
  1956. qdepth = h->nr_cmds;
  1957. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1958. return sdev->queue_depth;
  1959. }
  1960. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1961. {
  1962. /* we are being forcibly unloaded, and may not refuse. */
  1963. scsi_remove_host(h->scsi_host);
  1964. scsi_host_put(h->scsi_host);
  1965. h->scsi_host = NULL;
  1966. }
  1967. static int hpsa_register_scsi(struct ctlr_info *h)
  1968. {
  1969. struct Scsi_Host *sh;
  1970. int error;
  1971. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1972. if (sh == NULL)
  1973. goto fail;
  1974. sh->io_port = 0;
  1975. sh->n_io_port = 0;
  1976. sh->this_id = -1;
  1977. sh->max_channel = 3;
  1978. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1979. sh->max_lun = HPSA_MAX_LUN;
  1980. sh->max_id = HPSA_MAX_LUN;
  1981. sh->can_queue = h->nr_cmds;
  1982. sh->cmd_per_lun = h->nr_cmds;
  1983. sh->sg_tablesize = h->maxsgentries;
  1984. h->scsi_host = sh;
  1985. sh->hostdata[0] = (unsigned long) h;
  1986. sh->irq = h->intr[h->intr_mode];
  1987. sh->unique_id = sh->irq;
  1988. error = scsi_add_host(sh, &h->pdev->dev);
  1989. if (error)
  1990. goto fail_host_put;
  1991. scsi_scan_host(sh);
  1992. return 0;
  1993. fail_host_put:
  1994. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  1995. " failed for controller %d\n", __func__, h->ctlr);
  1996. scsi_host_put(sh);
  1997. return error;
  1998. fail:
  1999. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2000. " failed for controller %d\n", __func__, h->ctlr);
  2001. return -ENOMEM;
  2002. }
  2003. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2004. unsigned char lunaddr[])
  2005. {
  2006. int rc = 0;
  2007. int count = 0;
  2008. int waittime = 1; /* seconds */
  2009. struct CommandList *c;
  2010. c = cmd_special_alloc(h);
  2011. if (!c) {
  2012. dev_warn(&h->pdev->dev, "out of memory in "
  2013. "wait_for_device_to_become_ready.\n");
  2014. return IO_ERROR;
  2015. }
  2016. /* Send test unit ready until device ready, or give up. */
  2017. while (count < HPSA_TUR_RETRY_LIMIT) {
  2018. /* Wait for a bit. do this first, because if we send
  2019. * the TUR right away, the reset will just abort it.
  2020. */
  2021. msleep(1000 * waittime);
  2022. count++;
  2023. /* Increase wait time with each try, up to a point. */
  2024. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2025. waittime = waittime * 2;
  2026. /* Send the Test Unit Ready */
  2027. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2028. hpsa_scsi_do_simple_cmd_core(h, c);
  2029. /* no unmap needed here because no data xfer. */
  2030. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2031. break;
  2032. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2033. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2034. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2035. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2036. break;
  2037. dev_warn(&h->pdev->dev, "waiting %d secs "
  2038. "for device to become ready.\n", waittime);
  2039. rc = 1; /* device not ready. */
  2040. }
  2041. if (rc)
  2042. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2043. else
  2044. dev_warn(&h->pdev->dev, "device is ready.\n");
  2045. cmd_special_free(h, c);
  2046. return rc;
  2047. }
  2048. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2049. * complaining. Doing a host- or bus-reset can't do anything good here.
  2050. */
  2051. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2052. {
  2053. int rc;
  2054. struct ctlr_info *h;
  2055. struct hpsa_scsi_dev_t *dev;
  2056. /* find the controller to which the command to be aborted was sent */
  2057. h = sdev_to_hba(scsicmd->device);
  2058. if (h == NULL) /* paranoia */
  2059. return FAILED;
  2060. dev = scsicmd->device->hostdata;
  2061. if (!dev) {
  2062. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2063. "device lookup failed.\n");
  2064. return FAILED;
  2065. }
  2066. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2067. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2068. /* send a reset to the SCSI LUN which the command was sent to */
  2069. rc = hpsa_send_reset(h, dev->scsi3addr);
  2070. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2071. return SUCCESS;
  2072. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2073. return FAILED;
  2074. }
  2075. /*
  2076. * For operations that cannot sleep, a command block is allocated at init,
  2077. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2078. * which ones are free or in use. Lock must be held when calling this.
  2079. * cmd_free() is the complement.
  2080. */
  2081. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2082. {
  2083. struct CommandList *c;
  2084. int i;
  2085. union u64bit temp64;
  2086. dma_addr_t cmd_dma_handle, err_dma_handle;
  2087. do {
  2088. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2089. if (i == h->nr_cmds)
  2090. return NULL;
  2091. } while (test_and_set_bit
  2092. (i & (BITS_PER_LONG - 1),
  2093. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2094. c = h->cmd_pool + i;
  2095. memset(c, 0, sizeof(*c));
  2096. cmd_dma_handle = h->cmd_pool_dhandle
  2097. + i * sizeof(*c);
  2098. c->err_info = h->errinfo_pool + i;
  2099. memset(c->err_info, 0, sizeof(*c->err_info));
  2100. err_dma_handle = h->errinfo_pool_dhandle
  2101. + i * sizeof(*c->err_info);
  2102. h->nr_allocs++;
  2103. c->cmdindex = i;
  2104. INIT_LIST_HEAD(&c->list);
  2105. c->busaddr = (u32) cmd_dma_handle;
  2106. temp64.val = (u64) err_dma_handle;
  2107. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2108. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2109. c->ErrDesc.Len = sizeof(*c->err_info);
  2110. c->h = h;
  2111. return c;
  2112. }
  2113. /* For operations that can wait for kmalloc to possibly sleep,
  2114. * this routine can be called. Lock need not be held to call
  2115. * cmd_special_alloc. cmd_special_free() is the complement.
  2116. */
  2117. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2118. {
  2119. struct CommandList *c;
  2120. union u64bit temp64;
  2121. dma_addr_t cmd_dma_handle, err_dma_handle;
  2122. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2123. if (c == NULL)
  2124. return NULL;
  2125. memset(c, 0, sizeof(*c));
  2126. c->cmdindex = -1;
  2127. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2128. &err_dma_handle);
  2129. if (c->err_info == NULL) {
  2130. pci_free_consistent(h->pdev,
  2131. sizeof(*c), c, cmd_dma_handle);
  2132. return NULL;
  2133. }
  2134. memset(c->err_info, 0, sizeof(*c->err_info));
  2135. INIT_LIST_HEAD(&c->list);
  2136. c->busaddr = (u32) cmd_dma_handle;
  2137. temp64.val = (u64) err_dma_handle;
  2138. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2139. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2140. c->ErrDesc.Len = sizeof(*c->err_info);
  2141. c->h = h;
  2142. return c;
  2143. }
  2144. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2145. {
  2146. int i;
  2147. i = c - h->cmd_pool;
  2148. clear_bit(i & (BITS_PER_LONG - 1),
  2149. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2150. h->nr_frees++;
  2151. }
  2152. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2153. {
  2154. union u64bit temp64;
  2155. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2156. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2157. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2158. c->err_info, (dma_addr_t) temp64.val);
  2159. pci_free_consistent(h->pdev, sizeof(*c),
  2160. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2161. }
  2162. #ifdef CONFIG_COMPAT
  2163. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2164. {
  2165. IOCTL32_Command_struct __user *arg32 =
  2166. (IOCTL32_Command_struct __user *) arg;
  2167. IOCTL_Command_struct arg64;
  2168. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2169. int err;
  2170. u32 cp;
  2171. memset(&arg64, 0, sizeof(arg64));
  2172. err = 0;
  2173. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2174. sizeof(arg64.LUN_info));
  2175. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2176. sizeof(arg64.Request));
  2177. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2178. sizeof(arg64.error_info));
  2179. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2180. err |= get_user(cp, &arg32->buf);
  2181. arg64.buf = compat_ptr(cp);
  2182. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2183. if (err)
  2184. return -EFAULT;
  2185. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2186. if (err)
  2187. return err;
  2188. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2189. sizeof(arg32->error_info));
  2190. if (err)
  2191. return -EFAULT;
  2192. return err;
  2193. }
  2194. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2195. int cmd, void *arg)
  2196. {
  2197. BIG_IOCTL32_Command_struct __user *arg32 =
  2198. (BIG_IOCTL32_Command_struct __user *) arg;
  2199. BIG_IOCTL_Command_struct arg64;
  2200. BIG_IOCTL_Command_struct __user *p =
  2201. compat_alloc_user_space(sizeof(arg64));
  2202. int err;
  2203. u32 cp;
  2204. memset(&arg64, 0, sizeof(arg64));
  2205. err = 0;
  2206. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2207. sizeof(arg64.LUN_info));
  2208. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2209. sizeof(arg64.Request));
  2210. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2211. sizeof(arg64.error_info));
  2212. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2213. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2214. err |= get_user(cp, &arg32->buf);
  2215. arg64.buf = compat_ptr(cp);
  2216. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2217. if (err)
  2218. return -EFAULT;
  2219. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2220. if (err)
  2221. return err;
  2222. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2223. sizeof(arg32->error_info));
  2224. if (err)
  2225. return -EFAULT;
  2226. return err;
  2227. }
  2228. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2229. {
  2230. switch (cmd) {
  2231. case CCISS_GETPCIINFO:
  2232. case CCISS_GETINTINFO:
  2233. case CCISS_SETINTINFO:
  2234. case CCISS_GETNODENAME:
  2235. case CCISS_SETNODENAME:
  2236. case CCISS_GETHEARTBEAT:
  2237. case CCISS_GETBUSTYPES:
  2238. case CCISS_GETFIRMVER:
  2239. case CCISS_GETDRIVVER:
  2240. case CCISS_REVALIDVOLS:
  2241. case CCISS_DEREGDISK:
  2242. case CCISS_REGNEWDISK:
  2243. case CCISS_REGNEWD:
  2244. case CCISS_RESCANDISK:
  2245. case CCISS_GETLUNINFO:
  2246. return hpsa_ioctl(dev, cmd, arg);
  2247. case CCISS_PASSTHRU32:
  2248. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2249. case CCISS_BIG_PASSTHRU32:
  2250. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2251. default:
  2252. return -ENOIOCTLCMD;
  2253. }
  2254. }
  2255. #endif
  2256. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2257. {
  2258. struct hpsa_pci_info pciinfo;
  2259. if (!argp)
  2260. return -EINVAL;
  2261. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2262. pciinfo.bus = h->pdev->bus->number;
  2263. pciinfo.dev_fn = h->pdev->devfn;
  2264. pciinfo.board_id = h->board_id;
  2265. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2266. return -EFAULT;
  2267. return 0;
  2268. }
  2269. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2270. {
  2271. DriverVer_type DriverVer;
  2272. unsigned char vmaj, vmin, vsubmin;
  2273. int rc;
  2274. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2275. &vmaj, &vmin, &vsubmin);
  2276. if (rc != 3) {
  2277. dev_info(&h->pdev->dev, "driver version string '%s' "
  2278. "unrecognized.", HPSA_DRIVER_VERSION);
  2279. vmaj = 0;
  2280. vmin = 0;
  2281. vsubmin = 0;
  2282. }
  2283. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2284. if (!argp)
  2285. return -EINVAL;
  2286. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2287. return -EFAULT;
  2288. return 0;
  2289. }
  2290. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2291. {
  2292. IOCTL_Command_struct iocommand;
  2293. struct CommandList *c;
  2294. char *buff = NULL;
  2295. union u64bit temp64;
  2296. if (!argp)
  2297. return -EINVAL;
  2298. if (!capable(CAP_SYS_RAWIO))
  2299. return -EPERM;
  2300. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2301. return -EFAULT;
  2302. if ((iocommand.buf_size < 1) &&
  2303. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2304. return -EINVAL;
  2305. }
  2306. if (iocommand.buf_size > 0) {
  2307. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2308. if (buff == NULL)
  2309. return -EFAULT;
  2310. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2311. /* Copy the data into the buffer we created */
  2312. if (copy_from_user(buff, iocommand.buf,
  2313. iocommand.buf_size)) {
  2314. kfree(buff);
  2315. return -EFAULT;
  2316. }
  2317. } else {
  2318. memset(buff, 0, iocommand.buf_size);
  2319. }
  2320. }
  2321. c = cmd_special_alloc(h);
  2322. if (c == NULL) {
  2323. kfree(buff);
  2324. return -ENOMEM;
  2325. }
  2326. /* Fill in the command type */
  2327. c->cmd_type = CMD_IOCTL_PEND;
  2328. /* Fill in Command Header */
  2329. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2330. if (iocommand.buf_size > 0) { /* buffer to fill */
  2331. c->Header.SGList = 1;
  2332. c->Header.SGTotal = 1;
  2333. } else { /* no buffers to fill */
  2334. c->Header.SGList = 0;
  2335. c->Header.SGTotal = 0;
  2336. }
  2337. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2338. /* use the kernel address the cmd block for tag */
  2339. c->Header.Tag.lower = c->busaddr;
  2340. /* Fill in Request block */
  2341. memcpy(&c->Request, &iocommand.Request,
  2342. sizeof(c->Request));
  2343. /* Fill in the scatter gather information */
  2344. if (iocommand.buf_size > 0) {
  2345. temp64.val = pci_map_single(h->pdev, buff,
  2346. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2347. c->SG[0].Addr.lower = temp64.val32.lower;
  2348. c->SG[0].Addr.upper = temp64.val32.upper;
  2349. c->SG[0].Len = iocommand.buf_size;
  2350. c->SG[0].Ext = 0; /* we are not chaining*/
  2351. }
  2352. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2353. if (iocommand.buf_size > 0)
  2354. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2355. check_ioctl_unit_attention(h, c);
  2356. /* Copy the error information out */
  2357. memcpy(&iocommand.error_info, c->err_info,
  2358. sizeof(iocommand.error_info));
  2359. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2360. kfree(buff);
  2361. cmd_special_free(h, c);
  2362. return -EFAULT;
  2363. }
  2364. if (iocommand.Request.Type.Direction == XFER_READ &&
  2365. iocommand.buf_size > 0) {
  2366. /* Copy the data out of the buffer we created */
  2367. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2368. kfree(buff);
  2369. cmd_special_free(h, c);
  2370. return -EFAULT;
  2371. }
  2372. }
  2373. kfree(buff);
  2374. cmd_special_free(h, c);
  2375. return 0;
  2376. }
  2377. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2378. {
  2379. BIG_IOCTL_Command_struct *ioc;
  2380. struct CommandList *c;
  2381. unsigned char **buff = NULL;
  2382. int *buff_size = NULL;
  2383. union u64bit temp64;
  2384. BYTE sg_used = 0;
  2385. int status = 0;
  2386. int i;
  2387. u32 left;
  2388. u32 sz;
  2389. BYTE __user *data_ptr;
  2390. if (!argp)
  2391. return -EINVAL;
  2392. if (!capable(CAP_SYS_RAWIO))
  2393. return -EPERM;
  2394. ioc = (BIG_IOCTL_Command_struct *)
  2395. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2396. if (!ioc) {
  2397. status = -ENOMEM;
  2398. goto cleanup1;
  2399. }
  2400. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2401. status = -EFAULT;
  2402. goto cleanup1;
  2403. }
  2404. if ((ioc->buf_size < 1) &&
  2405. (ioc->Request.Type.Direction != XFER_NONE)) {
  2406. status = -EINVAL;
  2407. goto cleanup1;
  2408. }
  2409. /* Check kmalloc limits using all SGs */
  2410. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2411. status = -EINVAL;
  2412. goto cleanup1;
  2413. }
  2414. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2415. status = -EINVAL;
  2416. goto cleanup1;
  2417. }
  2418. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2419. if (!buff) {
  2420. status = -ENOMEM;
  2421. goto cleanup1;
  2422. }
  2423. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2424. if (!buff_size) {
  2425. status = -ENOMEM;
  2426. goto cleanup1;
  2427. }
  2428. left = ioc->buf_size;
  2429. data_ptr = ioc->buf;
  2430. while (left) {
  2431. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2432. buff_size[sg_used] = sz;
  2433. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2434. if (buff[sg_used] == NULL) {
  2435. status = -ENOMEM;
  2436. goto cleanup1;
  2437. }
  2438. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2439. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2440. status = -ENOMEM;
  2441. goto cleanup1;
  2442. }
  2443. } else
  2444. memset(buff[sg_used], 0, sz);
  2445. left -= sz;
  2446. data_ptr += sz;
  2447. sg_used++;
  2448. }
  2449. c = cmd_special_alloc(h);
  2450. if (c == NULL) {
  2451. status = -ENOMEM;
  2452. goto cleanup1;
  2453. }
  2454. c->cmd_type = CMD_IOCTL_PEND;
  2455. c->Header.ReplyQueue = 0;
  2456. c->Header.SGList = c->Header.SGTotal = sg_used;
  2457. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2458. c->Header.Tag.lower = c->busaddr;
  2459. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2460. if (ioc->buf_size > 0) {
  2461. int i;
  2462. for (i = 0; i < sg_used; i++) {
  2463. temp64.val = pci_map_single(h->pdev, buff[i],
  2464. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2465. c->SG[i].Addr.lower = temp64.val32.lower;
  2466. c->SG[i].Addr.upper = temp64.val32.upper;
  2467. c->SG[i].Len = buff_size[i];
  2468. /* we are not chaining */
  2469. c->SG[i].Ext = 0;
  2470. }
  2471. }
  2472. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2473. if (sg_used)
  2474. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2475. check_ioctl_unit_attention(h, c);
  2476. /* Copy the error information out */
  2477. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2478. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2479. cmd_special_free(h, c);
  2480. status = -EFAULT;
  2481. goto cleanup1;
  2482. }
  2483. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2484. /* Copy the data out of the buffer we created */
  2485. BYTE __user *ptr = ioc->buf;
  2486. for (i = 0; i < sg_used; i++) {
  2487. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2488. cmd_special_free(h, c);
  2489. status = -EFAULT;
  2490. goto cleanup1;
  2491. }
  2492. ptr += buff_size[i];
  2493. }
  2494. }
  2495. cmd_special_free(h, c);
  2496. status = 0;
  2497. cleanup1:
  2498. if (buff) {
  2499. for (i = 0; i < sg_used; i++)
  2500. kfree(buff[i]);
  2501. kfree(buff);
  2502. }
  2503. kfree(buff_size);
  2504. kfree(ioc);
  2505. return status;
  2506. }
  2507. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2508. struct CommandList *c)
  2509. {
  2510. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2511. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2512. (void) check_for_unit_attention(h, c);
  2513. }
  2514. /*
  2515. * ioctl
  2516. */
  2517. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2518. {
  2519. struct ctlr_info *h;
  2520. void __user *argp = (void __user *)arg;
  2521. h = sdev_to_hba(dev);
  2522. switch (cmd) {
  2523. case CCISS_DEREGDISK:
  2524. case CCISS_REGNEWDISK:
  2525. case CCISS_REGNEWD:
  2526. hpsa_scan_start(h->scsi_host);
  2527. return 0;
  2528. case CCISS_GETPCIINFO:
  2529. return hpsa_getpciinfo_ioctl(h, argp);
  2530. case CCISS_GETDRIVVER:
  2531. return hpsa_getdrivver_ioctl(h, argp);
  2532. case CCISS_PASSTHRU:
  2533. return hpsa_passthru_ioctl(h, argp);
  2534. case CCISS_BIG_PASSTHRU:
  2535. return hpsa_big_passthru_ioctl(h, argp);
  2536. default:
  2537. return -ENOTTY;
  2538. }
  2539. }
  2540. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2541. unsigned char *scsi3addr, u8 reset_type)
  2542. {
  2543. struct CommandList *c;
  2544. c = cmd_alloc(h);
  2545. if (!c)
  2546. return -ENOMEM;
  2547. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2548. RAID_CTLR_LUNID, TYPE_MSG);
  2549. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2550. c->waiting = NULL;
  2551. enqueue_cmd_and_start_io(h, c);
  2552. /* Don't wait for completion, the reset won't complete. Don't free
  2553. * the command either. This is the last command we will send before
  2554. * re-initializing everything, so it doesn't matter and won't leak.
  2555. */
  2556. return 0;
  2557. }
  2558. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2559. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2560. int cmd_type)
  2561. {
  2562. int pci_dir = XFER_NONE;
  2563. c->cmd_type = CMD_IOCTL_PEND;
  2564. c->Header.ReplyQueue = 0;
  2565. if (buff != NULL && size > 0) {
  2566. c->Header.SGList = 1;
  2567. c->Header.SGTotal = 1;
  2568. } else {
  2569. c->Header.SGList = 0;
  2570. c->Header.SGTotal = 0;
  2571. }
  2572. c->Header.Tag.lower = c->busaddr;
  2573. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2574. c->Request.Type.Type = cmd_type;
  2575. if (cmd_type == TYPE_CMD) {
  2576. switch (cmd) {
  2577. case HPSA_INQUIRY:
  2578. /* are we trying to read a vital product page */
  2579. if (page_code != 0) {
  2580. c->Request.CDB[1] = 0x01;
  2581. c->Request.CDB[2] = page_code;
  2582. }
  2583. c->Request.CDBLen = 6;
  2584. c->Request.Type.Attribute = ATTR_SIMPLE;
  2585. c->Request.Type.Direction = XFER_READ;
  2586. c->Request.Timeout = 0;
  2587. c->Request.CDB[0] = HPSA_INQUIRY;
  2588. c->Request.CDB[4] = size & 0xFF;
  2589. break;
  2590. case HPSA_REPORT_LOG:
  2591. case HPSA_REPORT_PHYS:
  2592. /* Talking to controller so It's a physical command
  2593. mode = 00 target = 0. Nothing to write.
  2594. */
  2595. c->Request.CDBLen = 12;
  2596. c->Request.Type.Attribute = ATTR_SIMPLE;
  2597. c->Request.Type.Direction = XFER_READ;
  2598. c->Request.Timeout = 0;
  2599. c->Request.CDB[0] = cmd;
  2600. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2601. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2602. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2603. c->Request.CDB[9] = size & 0xFF;
  2604. break;
  2605. case HPSA_CACHE_FLUSH:
  2606. c->Request.CDBLen = 12;
  2607. c->Request.Type.Attribute = ATTR_SIMPLE;
  2608. c->Request.Type.Direction = XFER_WRITE;
  2609. c->Request.Timeout = 0;
  2610. c->Request.CDB[0] = BMIC_WRITE;
  2611. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2612. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2613. c->Request.CDB[8] = size & 0xFF;
  2614. break;
  2615. case TEST_UNIT_READY:
  2616. c->Request.CDBLen = 6;
  2617. c->Request.Type.Attribute = ATTR_SIMPLE;
  2618. c->Request.Type.Direction = XFER_NONE;
  2619. c->Request.Timeout = 0;
  2620. break;
  2621. default:
  2622. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2623. BUG();
  2624. return;
  2625. }
  2626. } else if (cmd_type == TYPE_MSG) {
  2627. switch (cmd) {
  2628. case HPSA_DEVICE_RESET_MSG:
  2629. c->Request.CDBLen = 16;
  2630. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2631. c->Request.Type.Attribute = ATTR_SIMPLE;
  2632. c->Request.Type.Direction = XFER_NONE;
  2633. c->Request.Timeout = 0; /* Don't time out */
  2634. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2635. c->Request.CDB[0] = cmd;
  2636. c->Request.CDB[1] = 0x03; /* Reset target above */
  2637. /* If bytes 4-7 are zero, it means reset the */
  2638. /* LunID device */
  2639. c->Request.CDB[4] = 0x00;
  2640. c->Request.CDB[5] = 0x00;
  2641. c->Request.CDB[6] = 0x00;
  2642. c->Request.CDB[7] = 0x00;
  2643. break;
  2644. default:
  2645. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2646. cmd);
  2647. BUG();
  2648. }
  2649. } else {
  2650. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2651. BUG();
  2652. }
  2653. switch (c->Request.Type.Direction) {
  2654. case XFER_READ:
  2655. pci_dir = PCI_DMA_FROMDEVICE;
  2656. break;
  2657. case XFER_WRITE:
  2658. pci_dir = PCI_DMA_TODEVICE;
  2659. break;
  2660. case XFER_NONE:
  2661. pci_dir = PCI_DMA_NONE;
  2662. break;
  2663. default:
  2664. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2665. }
  2666. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2667. return;
  2668. }
  2669. /*
  2670. * Map (physical) PCI mem into (virtual) kernel space
  2671. */
  2672. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2673. {
  2674. ulong page_base = ((ulong) base) & PAGE_MASK;
  2675. ulong page_offs = ((ulong) base) - page_base;
  2676. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2677. return page_remapped ? (page_remapped + page_offs) : NULL;
  2678. }
  2679. /* Takes cmds off the submission queue and sends them to the hardware,
  2680. * then puts them on the queue of cmds waiting for completion.
  2681. */
  2682. static void start_io(struct ctlr_info *h)
  2683. {
  2684. struct CommandList *c;
  2685. while (!list_empty(&h->reqQ)) {
  2686. c = list_entry(h->reqQ.next, struct CommandList, list);
  2687. /* can't do anything if fifo is full */
  2688. if ((h->access.fifo_full(h))) {
  2689. dev_warn(&h->pdev->dev, "fifo full\n");
  2690. break;
  2691. }
  2692. /* Get the first entry from the Request Q */
  2693. removeQ(c);
  2694. h->Qdepth--;
  2695. /* Tell the controller execute command */
  2696. h->access.submit_command(h, c);
  2697. /* Put job onto the completed Q */
  2698. addQ(&h->cmpQ, c);
  2699. }
  2700. }
  2701. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2702. {
  2703. return h->access.command_completed(h);
  2704. }
  2705. static inline bool interrupt_pending(struct ctlr_info *h)
  2706. {
  2707. return h->access.intr_pending(h);
  2708. }
  2709. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2710. {
  2711. return (h->access.intr_pending(h) == 0) ||
  2712. (h->interrupts_enabled == 0);
  2713. }
  2714. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2715. u32 raw_tag)
  2716. {
  2717. if (unlikely(tag_index >= h->nr_cmds)) {
  2718. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2719. return 1;
  2720. }
  2721. return 0;
  2722. }
  2723. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2724. {
  2725. removeQ(c);
  2726. if (likely(c->cmd_type == CMD_SCSI))
  2727. complete_scsi_command(c);
  2728. else if (c->cmd_type == CMD_IOCTL_PEND)
  2729. complete(c->waiting);
  2730. }
  2731. static inline u32 hpsa_tag_contains_index(u32 tag)
  2732. {
  2733. return tag & DIRECT_LOOKUP_BIT;
  2734. }
  2735. static inline u32 hpsa_tag_to_index(u32 tag)
  2736. {
  2737. return tag >> DIRECT_LOOKUP_SHIFT;
  2738. }
  2739. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2740. {
  2741. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2742. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2743. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2744. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2745. return tag & ~HPSA_PERF_ERROR_BITS;
  2746. }
  2747. /* process completion of an indexed ("direct lookup") command */
  2748. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2749. u32 raw_tag)
  2750. {
  2751. u32 tag_index;
  2752. struct CommandList *c;
  2753. tag_index = hpsa_tag_to_index(raw_tag);
  2754. if (bad_tag(h, tag_index, raw_tag))
  2755. return next_command(h);
  2756. c = h->cmd_pool + tag_index;
  2757. finish_cmd(c, raw_tag);
  2758. return next_command(h);
  2759. }
  2760. /* process completion of a non-indexed command */
  2761. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2762. u32 raw_tag)
  2763. {
  2764. u32 tag;
  2765. struct CommandList *c = NULL;
  2766. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2767. list_for_each_entry(c, &h->cmpQ, list) {
  2768. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2769. finish_cmd(c, raw_tag);
  2770. return next_command(h);
  2771. }
  2772. }
  2773. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2774. return next_command(h);
  2775. }
  2776. /* Some controllers, like p400, will give us one interrupt
  2777. * after a soft reset, even if we turned interrupts off.
  2778. * Only need to check for this in the hpsa_xxx_discard_completions
  2779. * functions.
  2780. */
  2781. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2782. {
  2783. if (likely(!reset_devices))
  2784. return 0;
  2785. if (likely(h->interrupts_enabled))
  2786. return 0;
  2787. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2788. "(known firmware bug.) Ignoring.\n");
  2789. return 1;
  2790. }
  2791. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2792. {
  2793. struct ctlr_info *h = dev_id;
  2794. unsigned long flags;
  2795. u32 raw_tag;
  2796. if (ignore_bogus_interrupt(h))
  2797. return IRQ_NONE;
  2798. if (interrupt_not_for_us(h))
  2799. return IRQ_NONE;
  2800. spin_lock_irqsave(&h->lock, flags);
  2801. h->last_intr_timestamp = get_jiffies_64();
  2802. while (interrupt_pending(h)) {
  2803. raw_tag = get_next_completion(h);
  2804. while (raw_tag != FIFO_EMPTY)
  2805. raw_tag = next_command(h);
  2806. }
  2807. spin_unlock_irqrestore(&h->lock, flags);
  2808. return IRQ_HANDLED;
  2809. }
  2810. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2811. {
  2812. struct ctlr_info *h = dev_id;
  2813. unsigned long flags;
  2814. u32 raw_tag;
  2815. if (ignore_bogus_interrupt(h))
  2816. return IRQ_NONE;
  2817. spin_lock_irqsave(&h->lock, flags);
  2818. h->last_intr_timestamp = get_jiffies_64();
  2819. raw_tag = get_next_completion(h);
  2820. while (raw_tag != FIFO_EMPTY)
  2821. raw_tag = next_command(h);
  2822. spin_unlock_irqrestore(&h->lock, flags);
  2823. return IRQ_HANDLED;
  2824. }
  2825. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2826. {
  2827. struct ctlr_info *h = dev_id;
  2828. unsigned long flags;
  2829. u32 raw_tag;
  2830. if (interrupt_not_for_us(h))
  2831. return IRQ_NONE;
  2832. spin_lock_irqsave(&h->lock, flags);
  2833. h->last_intr_timestamp = get_jiffies_64();
  2834. while (interrupt_pending(h)) {
  2835. raw_tag = get_next_completion(h);
  2836. while (raw_tag != FIFO_EMPTY) {
  2837. if (hpsa_tag_contains_index(raw_tag))
  2838. raw_tag = process_indexed_cmd(h, raw_tag);
  2839. else
  2840. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2841. }
  2842. }
  2843. spin_unlock_irqrestore(&h->lock, flags);
  2844. return IRQ_HANDLED;
  2845. }
  2846. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2847. {
  2848. struct ctlr_info *h = dev_id;
  2849. unsigned long flags;
  2850. u32 raw_tag;
  2851. spin_lock_irqsave(&h->lock, flags);
  2852. h->last_intr_timestamp = get_jiffies_64();
  2853. raw_tag = get_next_completion(h);
  2854. while (raw_tag != FIFO_EMPTY) {
  2855. if (hpsa_tag_contains_index(raw_tag))
  2856. raw_tag = process_indexed_cmd(h, raw_tag);
  2857. else
  2858. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2859. }
  2860. spin_unlock_irqrestore(&h->lock, flags);
  2861. return IRQ_HANDLED;
  2862. }
  2863. /* Send a message CDB to the firmware. Careful, this only works
  2864. * in simple mode, not performant mode due to the tag lookup.
  2865. * We only ever use this immediately after a controller reset.
  2866. */
  2867. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2868. unsigned char type)
  2869. {
  2870. struct Command {
  2871. struct CommandListHeader CommandHeader;
  2872. struct RequestBlock Request;
  2873. struct ErrDescriptor ErrorDescriptor;
  2874. };
  2875. struct Command *cmd;
  2876. static const size_t cmd_sz = sizeof(*cmd) +
  2877. sizeof(cmd->ErrorDescriptor);
  2878. dma_addr_t paddr64;
  2879. uint32_t paddr32, tag;
  2880. void __iomem *vaddr;
  2881. int i, err;
  2882. vaddr = pci_ioremap_bar(pdev, 0);
  2883. if (vaddr == NULL)
  2884. return -ENOMEM;
  2885. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2886. * CCISS commands, so they must be allocated from the lower 4GiB of
  2887. * memory.
  2888. */
  2889. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2890. if (err) {
  2891. iounmap(vaddr);
  2892. return -ENOMEM;
  2893. }
  2894. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2895. if (cmd == NULL) {
  2896. iounmap(vaddr);
  2897. return -ENOMEM;
  2898. }
  2899. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2900. * although there's no guarantee, we assume that the address is at
  2901. * least 4-byte aligned (most likely, it's page-aligned).
  2902. */
  2903. paddr32 = paddr64;
  2904. cmd->CommandHeader.ReplyQueue = 0;
  2905. cmd->CommandHeader.SGList = 0;
  2906. cmd->CommandHeader.SGTotal = 0;
  2907. cmd->CommandHeader.Tag.lower = paddr32;
  2908. cmd->CommandHeader.Tag.upper = 0;
  2909. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2910. cmd->Request.CDBLen = 16;
  2911. cmd->Request.Type.Type = TYPE_MSG;
  2912. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2913. cmd->Request.Type.Direction = XFER_NONE;
  2914. cmd->Request.Timeout = 0; /* Don't time out */
  2915. cmd->Request.CDB[0] = opcode;
  2916. cmd->Request.CDB[1] = type;
  2917. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2918. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2919. cmd->ErrorDescriptor.Addr.upper = 0;
  2920. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2921. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2922. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2923. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2924. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2925. break;
  2926. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2927. }
  2928. iounmap(vaddr);
  2929. /* we leak the DMA buffer here ... no choice since the controller could
  2930. * still complete the command.
  2931. */
  2932. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2933. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2934. opcode, type);
  2935. return -ETIMEDOUT;
  2936. }
  2937. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2938. if (tag & HPSA_ERROR_BIT) {
  2939. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2940. opcode, type);
  2941. return -EIO;
  2942. }
  2943. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2944. opcode, type);
  2945. return 0;
  2946. }
  2947. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2948. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2949. void * __iomem vaddr, u32 use_doorbell)
  2950. {
  2951. u16 pmcsr;
  2952. int pos;
  2953. if (use_doorbell) {
  2954. /* For everything after the P600, the PCI power state method
  2955. * of resetting the controller doesn't work, so we have this
  2956. * other way using the doorbell register.
  2957. */
  2958. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2959. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2960. } else { /* Try to do it the PCI power state way */
  2961. /* Quoting from the Open CISS Specification: "The Power
  2962. * Management Control/Status Register (CSR) controls the power
  2963. * state of the device. The normal operating state is D0,
  2964. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2965. * the controller, place the interface device in D3 then to D0,
  2966. * this causes a secondary PCI reset which will reset the
  2967. * controller." */
  2968. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2969. if (pos == 0) {
  2970. dev_err(&pdev->dev,
  2971. "hpsa_reset_controller: "
  2972. "PCI PM not supported\n");
  2973. return -ENODEV;
  2974. }
  2975. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2976. /* enter the D3hot power management state */
  2977. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2978. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2979. pmcsr |= PCI_D3hot;
  2980. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2981. msleep(500);
  2982. /* enter the D0 power management state */
  2983. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2984. pmcsr |= PCI_D0;
  2985. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2986. /*
  2987. * The P600 requires a small delay when changing states.
  2988. * Otherwise we may think the board did not reset and we bail.
  2989. * This for kdump only and is particular to the P600.
  2990. */
  2991. msleep(500);
  2992. }
  2993. return 0;
  2994. }
  2995. static __devinit void init_driver_version(char *driver_version, int len)
  2996. {
  2997. memset(driver_version, 0, len);
  2998. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  2999. }
  3000. static __devinit int write_driver_ver_to_cfgtable(
  3001. struct CfgTable __iomem *cfgtable)
  3002. {
  3003. char *driver_version;
  3004. int i, size = sizeof(cfgtable->driver_version);
  3005. driver_version = kmalloc(size, GFP_KERNEL);
  3006. if (!driver_version)
  3007. return -ENOMEM;
  3008. init_driver_version(driver_version, size);
  3009. for (i = 0; i < size; i++)
  3010. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3011. kfree(driver_version);
  3012. return 0;
  3013. }
  3014. static __devinit void read_driver_ver_from_cfgtable(
  3015. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3016. {
  3017. int i;
  3018. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3019. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3020. }
  3021. static __devinit int controller_reset_failed(
  3022. struct CfgTable __iomem *cfgtable)
  3023. {
  3024. char *driver_ver, *old_driver_ver;
  3025. int rc, size = sizeof(cfgtable->driver_version);
  3026. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3027. if (!old_driver_ver)
  3028. return -ENOMEM;
  3029. driver_ver = old_driver_ver + size;
  3030. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3031. * should have been changed, otherwise we know the reset failed.
  3032. */
  3033. init_driver_version(old_driver_ver, size);
  3034. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3035. rc = !memcmp(driver_ver, old_driver_ver, size);
  3036. kfree(old_driver_ver);
  3037. return rc;
  3038. }
  3039. /* This does a hard reset of the controller using PCI power management
  3040. * states or the using the doorbell register.
  3041. */
  3042. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3043. {
  3044. u64 cfg_offset;
  3045. u32 cfg_base_addr;
  3046. u64 cfg_base_addr_index;
  3047. void __iomem *vaddr;
  3048. unsigned long paddr;
  3049. u32 misc_fw_support;
  3050. int rc;
  3051. struct CfgTable __iomem *cfgtable;
  3052. u32 use_doorbell;
  3053. u32 board_id;
  3054. u16 command_register;
  3055. /* For controllers as old as the P600, this is very nearly
  3056. * the same thing as
  3057. *
  3058. * pci_save_state(pci_dev);
  3059. * pci_set_power_state(pci_dev, PCI_D3hot);
  3060. * pci_set_power_state(pci_dev, PCI_D0);
  3061. * pci_restore_state(pci_dev);
  3062. *
  3063. * For controllers newer than the P600, the pci power state
  3064. * method of resetting doesn't work so we have another way
  3065. * using the doorbell register.
  3066. */
  3067. rc = hpsa_lookup_board_id(pdev, &board_id);
  3068. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3069. dev_warn(&pdev->dev, "Not resetting device.\n");
  3070. return -ENODEV;
  3071. }
  3072. /* if controller is soft- but not hard resettable... */
  3073. if (!ctlr_is_hard_resettable(board_id))
  3074. return -ENOTSUPP; /* try soft reset later. */
  3075. /* Save the PCI command register */
  3076. pci_read_config_word(pdev, 4, &command_register);
  3077. /* Turn the board off. This is so that later pci_restore_state()
  3078. * won't turn the board on before the rest of config space is ready.
  3079. */
  3080. pci_disable_device(pdev);
  3081. pci_save_state(pdev);
  3082. /* find the first memory BAR, so we can find the cfg table */
  3083. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3084. if (rc)
  3085. return rc;
  3086. vaddr = remap_pci_mem(paddr, 0x250);
  3087. if (!vaddr)
  3088. return -ENOMEM;
  3089. /* find cfgtable in order to check if reset via doorbell is supported */
  3090. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3091. &cfg_base_addr_index, &cfg_offset);
  3092. if (rc)
  3093. goto unmap_vaddr;
  3094. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3095. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3096. if (!cfgtable) {
  3097. rc = -ENOMEM;
  3098. goto unmap_vaddr;
  3099. }
  3100. rc = write_driver_ver_to_cfgtable(cfgtable);
  3101. if (rc)
  3102. goto unmap_vaddr;
  3103. /* If reset via doorbell register is supported, use that.
  3104. * There are two such methods. Favor the newest method.
  3105. */
  3106. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3107. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3108. if (use_doorbell) {
  3109. use_doorbell = DOORBELL_CTLR_RESET2;
  3110. } else {
  3111. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3112. if (use_doorbell) {
  3113. dev_warn(&pdev->dev, "Soft reset not supported. "
  3114. "Firmware update is required.\n");
  3115. rc = -ENOTSUPP; /* try soft reset */
  3116. goto unmap_cfgtable;
  3117. }
  3118. }
  3119. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3120. if (rc)
  3121. goto unmap_cfgtable;
  3122. pci_restore_state(pdev);
  3123. rc = pci_enable_device(pdev);
  3124. if (rc) {
  3125. dev_warn(&pdev->dev, "failed to enable device.\n");
  3126. goto unmap_cfgtable;
  3127. }
  3128. pci_write_config_word(pdev, 4, command_register);
  3129. /* Some devices (notably the HP Smart Array 5i Controller)
  3130. need a little pause here */
  3131. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3132. /* Wait for board to become not ready, then ready. */
  3133. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3134. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3135. if (rc) {
  3136. dev_warn(&pdev->dev,
  3137. "failed waiting for board to reset."
  3138. " Will try soft reset.\n");
  3139. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3140. goto unmap_cfgtable;
  3141. }
  3142. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3143. if (rc) {
  3144. dev_warn(&pdev->dev,
  3145. "failed waiting for board to become ready "
  3146. "after hard reset\n");
  3147. goto unmap_cfgtable;
  3148. }
  3149. rc = controller_reset_failed(vaddr);
  3150. if (rc < 0)
  3151. goto unmap_cfgtable;
  3152. if (rc) {
  3153. dev_warn(&pdev->dev, "Unable to successfully reset "
  3154. "controller. Will try soft reset.\n");
  3155. rc = -ENOTSUPP;
  3156. } else {
  3157. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3158. }
  3159. unmap_cfgtable:
  3160. iounmap(cfgtable);
  3161. unmap_vaddr:
  3162. iounmap(vaddr);
  3163. return rc;
  3164. }
  3165. /*
  3166. * We cannot read the structure directly, for portability we must use
  3167. * the io functions.
  3168. * This is for debug only.
  3169. */
  3170. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3171. {
  3172. #ifdef HPSA_DEBUG
  3173. int i;
  3174. char temp_name[17];
  3175. dev_info(dev, "Controller Configuration information\n");
  3176. dev_info(dev, "------------------------------------\n");
  3177. for (i = 0; i < 4; i++)
  3178. temp_name[i] = readb(&(tb->Signature[i]));
  3179. temp_name[4] = '\0';
  3180. dev_info(dev, " Signature = %s\n", temp_name);
  3181. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3182. dev_info(dev, " Transport methods supported = 0x%x\n",
  3183. readl(&(tb->TransportSupport)));
  3184. dev_info(dev, " Transport methods active = 0x%x\n",
  3185. readl(&(tb->TransportActive)));
  3186. dev_info(dev, " Requested transport Method = 0x%x\n",
  3187. readl(&(tb->HostWrite.TransportRequest)));
  3188. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3189. readl(&(tb->HostWrite.CoalIntDelay)));
  3190. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3191. readl(&(tb->HostWrite.CoalIntCount)));
  3192. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3193. readl(&(tb->CmdsOutMax)));
  3194. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3195. for (i = 0; i < 16; i++)
  3196. temp_name[i] = readb(&(tb->ServerName[i]));
  3197. temp_name[16] = '\0';
  3198. dev_info(dev, " Server Name = %s\n", temp_name);
  3199. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3200. readl(&(tb->HeartBeat)));
  3201. #endif /* HPSA_DEBUG */
  3202. }
  3203. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3204. {
  3205. int i, offset, mem_type, bar_type;
  3206. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3207. return 0;
  3208. offset = 0;
  3209. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3210. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3211. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3212. offset += 4;
  3213. else {
  3214. mem_type = pci_resource_flags(pdev, i) &
  3215. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3216. switch (mem_type) {
  3217. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3218. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3219. offset += 4; /* 32 bit */
  3220. break;
  3221. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3222. offset += 8;
  3223. break;
  3224. default: /* reserved in PCI 2.2 */
  3225. dev_warn(&pdev->dev,
  3226. "base address is invalid\n");
  3227. return -1;
  3228. break;
  3229. }
  3230. }
  3231. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3232. return i + 1;
  3233. }
  3234. return -1;
  3235. }
  3236. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3237. * controllers that are capable. If not, we use IO-APIC mode.
  3238. */
  3239. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3240. {
  3241. #ifdef CONFIG_PCI_MSI
  3242. int err;
  3243. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3244. {0, 2}, {0, 3}
  3245. };
  3246. /* Some boards advertise MSI but don't really support it */
  3247. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3248. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3249. goto default_int_mode;
  3250. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3251. dev_info(&h->pdev->dev, "MSIX\n");
  3252. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3253. if (!err) {
  3254. h->intr[0] = hpsa_msix_entries[0].vector;
  3255. h->intr[1] = hpsa_msix_entries[1].vector;
  3256. h->intr[2] = hpsa_msix_entries[2].vector;
  3257. h->intr[3] = hpsa_msix_entries[3].vector;
  3258. h->msix_vector = 1;
  3259. return;
  3260. }
  3261. if (err > 0) {
  3262. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3263. "available\n", err);
  3264. goto default_int_mode;
  3265. } else {
  3266. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3267. err);
  3268. goto default_int_mode;
  3269. }
  3270. }
  3271. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3272. dev_info(&h->pdev->dev, "MSI\n");
  3273. if (!pci_enable_msi(h->pdev))
  3274. h->msi_vector = 1;
  3275. else
  3276. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3277. }
  3278. default_int_mode:
  3279. #endif /* CONFIG_PCI_MSI */
  3280. /* if we get here we're going to use the default interrupt mode */
  3281. h->intr[h->intr_mode] = h->pdev->irq;
  3282. }
  3283. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3284. {
  3285. int i;
  3286. u32 subsystem_vendor_id, subsystem_device_id;
  3287. subsystem_vendor_id = pdev->subsystem_vendor;
  3288. subsystem_device_id = pdev->subsystem_device;
  3289. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3290. subsystem_vendor_id;
  3291. for (i = 0; i < ARRAY_SIZE(products); i++)
  3292. if (*board_id == products[i].board_id)
  3293. return i;
  3294. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3295. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3296. !hpsa_allow_any) {
  3297. dev_warn(&pdev->dev, "unrecognized board ID: "
  3298. "0x%08x, ignoring.\n", *board_id);
  3299. return -ENODEV;
  3300. }
  3301. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3302. }
  3303. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3304. {
  3305. u16 command;
  3306. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3307. return ((command & PCI_COMMAND_MEMORY) == 0);
  3308. }
  3309. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3310. unsigned long *memory_bar)
  3311. {
  3312. int i;
  3313. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3314. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3315. /* addressing mode bits already removed */
  3316. *memory_bar = pci_resource_start(pdev, i);
  3317. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3318. *memory_bar);
  3319. return 0;
  3320. }
  3321. dev_warn(&pdev->dev, "no memory BAR found\n");
  3322. return -ENODEV;
  3323. }
  3324. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3325. void __iomem *vaddr, int wait_for_ready)
  3326. {
  3327. int i, iterations;
  3328. u32 scratchpad;
  3329. if (wait_for_ready)
  3330. iterations = HPSA_BOARD_READY_ITERATIONS;
  3331. else
  3332. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3333. for (i = 0; i < iterations; i++) {
  3334. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3335. if (wait_for_ready) {
  3336. if (scratchpad == HPSA_FIRMWARE_READY)
  3337. return 0;
  3338. } else {
  3339. if (scratchpad != HPSA_FIRMWARE_READY)
  3340. return 0;
  3341. }
  3342. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3343. }
  3344. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3345. return -ENODEV;
  3346. }
  3347. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3348. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3349. u64 *cfg_offset)
  3350. {
  3351. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3352. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3353. *cfg_base_addr &= (u32) 0x0000ffff;
  3354. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3355. if (*cfg_base_addr_index == -1) {
  3356. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3357. return -ENODEV;
  3358. }
  3359. return 0;
  3360. }
  3361. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3362. {
  3363. u64 cfg_offset;
  3364. u32 cfg_base_addr;
  3365. u64 cfg_base_addr_index;
  3366. u32 trans_offset;
  3367. int rc;
  3368. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3369. &cfg_base_addr_index, &cfg_offset);
  3370. if (rc)
  3371. return rc;
  3372. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3373. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3374. if (!h->cfgtable)
  3375. return -ENOMEM;
  3376. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3377. if (rc)
  3378. return rc;
  3379. /* Find performant mode table. */
  3380. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3381. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3382. cfg_base_addr_index)+cfg_offset+trans_offset,
  3383. sizeof(*h->transtable));
  3384. if (!h->transtable)
  3385. return -ENOMEM;
  3386. return 0;
  3387. }
  3388. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3389. {
  3390. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3391. /* Limit commands in memory limited kdump scenario. */
  3392. if (reset_devices && h->max_commands > 32)
  3393. h->max_commands = 32;
  3394. if (h->max_commands < 16) {
  3395. dev_warn(&h->pdev->dev, "Controller reports "
  3396. "max supported commands of %d, an obvious lie. "
  3397. "Using 16. Ensure that firmware is up to date.\n",
  3398. h->max_commands);
  3399. h->max_commands = 16;
  3400. }
  3401. }
  3402. /* Interrogate the hardware for some limits:
  3403. * max commands, max SG elements without chaining, and with chaining,
  3404. * SG chain block size, etc.
  3405. */
  3406. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3407. {
  3408. hpsa_get_max_perf_mode_cmds(h);
  3409. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3410. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3411. /*
  3412. * Limit in-command s/g elements to 32 save dma'able memory.
  3413. * Howvever spec says if 0, use 31
  3414. */
  3415. h->max_cmd_sg_entries = 31;
  3416. if (h->maxsgentries > 512) {
  3417. h->max_cmd_sg_entries = 32;
  3418. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3419. h->maxsgentries--; /* save one for chain pointer */
  3420. } else {
  3421. h->maxsgentries = 31; /* default to traditional values */
  3422. h->chainsize = 0;
  3423. }
  3424. }
  3425. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3426. {
  3427. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3428. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3429. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3430. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3431. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3432. return false;
  3433. }
  3434. return true;
  3435. }
  3436. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3437. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3438. {
  3439. #ifdef CONFIG_X86
  3440. u32 prefetch;
  3441. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3442. prefetch |= 0x100;
  3443. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3444. #endif
  3445. }
  3446. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3447. * in a prefetch beyond physical memory.
  3448. */
  3449. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3450. {
  3451. u32 dma_prefetch;
  3452. if (h->board_id != 0x3225103C)
  3453. return;
  3454. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3455. dma_prefetch |= 0x8000;
  3456. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3457. }
  3458. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3459. {
  3460. int i;
  3461. u32 doorbell_value;
  3462. unsigned long flags;
  3463. /* under certain very rare conditions, this can take awhile.
  3464. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3465. * as we enter this code.)
  3466. */
  3467. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3468. spin_lock_irqsave(&h->lock, flags);
  3469. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3470. spin_unlock_irqrestore(&h->lock, flags);
  3471. if (!(doorbell_value & CFGTBL_ChangeReq))
  3472. break;
  3473. /* delay and try again */
  3474. usleep_range(10000, 20000);
  3475. }
  3476. }
  3477. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3478. {
  3479. u32 trans_support;
  3480. trans_support = readl(&(h->cfgtable->TransportSupport));
  3481. if (!(trans_support & SIMPLE_MODE))
  3482. return -ENOTSUPP;
  3483. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3484. /* Update the field, and then ring the doorbell */
  3485. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3486. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3487. hpsa_wait_for_mode_change_ack(h);
  3488. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3489. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3490. dev_warn(&h->pdev->dev,
  3491. "unable to get board into simple mode\n");
  3492. return -ENODEV;
  3493. }
  3494. h->transMethod = CFGTBL_Trans_Simple;
  3495. return 0;
  3496. }
  3497. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3498. {
  3499. int prod_index, err;
  3500. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3501. if (prod_index < 0)
  3502. return -ENODEV;
  3503. h->product_name = products[prod_index].product_name;
  3504. h->access = *(products[prod_index].access);
  3505. if (hpsa_board_disabled(h->pdev)) {
  3506. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3507. return -ENODEV;
  3508. }
  3509. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3510. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3511. err = pci_enable_device(h->pdev);
  3512. if (err) {
  3513. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3514. return err;
  3515. }
  3516. err = pci_request_regions(h->pdev, HPSA);
  3517. if (err) {
  3518. dev_err(&h->pdev->dev,
  3519. "cannot obtain PCI resources, aborting\n");
  3520. return err;
  3521. }
  3522. hpsa_interrupt_mode(h);
  3523. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3524. if (err)
  3525. goto err_out_free_res;
  3526. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3527. if (!h->vaddr) {
  3528. err = -ENOMEM;
  3529. goto err_out_free_res;
  3530. }
  3531. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3532. if (err)
  3533. goto err_out_free_res;
  3534. err = hpsa_find_cfgtables(h);
  3535. if (err)
  3536. goto err_out_free_res;
  3537. hpsa_find_board_params(h);
  3538. if (!hpsa_CISS_signature_present(h)) {
  3539. err = -ENODEV;
  3540. goto err_out_free_res;
  3541. }
  3542. hpsa_enable_scsi_prefetch(h);
  3543. hpsa_p600_dma_prefetch_quirk(h);
  3544. err = hpsa_enter_simple_mode(h);
  3545. if (err)
  3546. goto err_out_free_res;
  3547. return 0;
  3548. err_out_free_res:
  3549. if (h->transtable)
  3550. iounmap(h->transtable);
  3551. if (h->cfgtable)
  3552. iounmap(h->cfgtable);
  3553. if (h->vaddr)
  3554. iounmap(h->vaddr);
  3555. /*
  3556. * Deliberately omit pci_disable_device(): it does something nasty to
  3557. * Smart Array controllers that pci_enable_device does not undo
  3558. */
  3559. pci_release_regions(h->pdev);
  3560. return err;
  3561. }
  3562. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3563. {
  3564. int rc;
  3565. #define HBA_INQUIRY_BYTE_COUNT 64
  3566. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3567. if (!h->hba_inquiry_data)
  3568. return;
  3569. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3570. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3571. if (rc != 0) {
  3572. kfree(h->hba_inquiry_data);
  3573. h->hba_inquiry_data = NULL;
  3574. }
  3575. }
  3576. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3577. {
  3578. int rc, i;
  3579. if (!reset_devices)
  3580. return 0;
  3581. /* Reset the controller with a PCI power-cycle or via doorbell */
  3582. rc = hpsa_kdump_hard_reset_controller(pdev);
  3583. /* -ENOTSUPP here means we cannot reset the controller
  3584. * but it's already (and still) up and running in
  3585. * "performant mode". Or, it might be 640x, which can't reset
  3586. * due to concerns about shared bbwc between 6402/6404 pair.
  3587. */
  3588. if (rc == -ENOTSUPP)
  3589. return rc; /* just try to do the kdump anyhow. */
  3590. if (rc)
  3591. return -ENODEV;
  3592. /* Now try to get the controller to respond to a no-op */
  3593. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3594. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3595. if (hpsa_noop(pdev) == 0)
  3596. break;
  3597. else
  3598. dev_warn(&pdev->dev, "no-op failed%s\n",
  3599. (i < 11 ? "; re-trying" : ""));
  3600. }
  3601. return 0;
  3602. }
  3603. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3604. {
  3605. h->cmd_pool_bits = kzalloc(
  3606. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3607. sizeof(unsigned long), GFP_KERNEL);
  3608. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3609. h->nr_cmds * sizeof(*h->cmd_pool),
  3610. &(h->cmd_pool_dhandle));
  3611. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3612. h->nr_cmds * sizeof(*h->errinfo_pool),
  3613. &(h->errinfo_pool_dhandle));
  3614. if ((h->cmd_pool_bits == NULL)
  3615. || (h->cmd_pool == NULL)
  3616. || (h->errinfo_pool == NULL)) {
  3617. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3618. return -ENOMEM;
  3619. }
  3620. return 0;
  3621. }
  3622. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3623. {
  3624. kfree(h->cmd_pool_bits);
  3625. if (h->cmd_pool)
  3626. pci_free_consistent(h->pdev,
  3627. h->nr_cmds * sizeof(struct CommandList),
  3628. h->cmd_pool, h->cmd_pool_dhandle);
  3629. if (h->errinfo_pool)
  3630. pci_free_consistent(h->pdev,
  3631. h->nr_cmds * sizeof(struct ErrorInfo),
  3632. h->errinfo_pool,
  3633. h->errinfo_pool_dhandle);
  3634. }
  3635. static int hpsa_request_irq(struct ctlr_info *h,
  3636. irqreturn_t (*msixhandler)(int, void *),
  3637. irqreturn_t (*intxhandler)(int, void *))
  3638. {
  3639. int rc;
  3640. if (h->msix_vector || h->msi_vector)
  3641. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3642. 0, h->devname, h);
  3643. else
  3644. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3645. IRQF_SHARED, h->devname, h);
  3646. if (rc) {
  3647. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3648. h->intr[h->intr_mode], h->devname);
  3649. return -ENODEV;
  3650. }
  3651. return 0;
  3652. }
  3653. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3654. {
  3655. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3656. HPSA_RESET_TYPE_CONTROLLER)) {
  3657. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3658. return -EIO;
  3659. }
  3660. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3661. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3662. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3663. return -1;
  3664. }
  3665. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3666. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3667. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3668. "after soft reset.\n");
  3669. return -1;
  3670. }
  3671. return 0;
  3672. }
  3673. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3674. {
  3675. free_irq(h->intr[h->intr_mode], h);
  3676. #ifdef CONFIG_PCI_MSI
  3677. if (h->msix_vector)
  3678. pci_disable_msix(h->pdev);
  3679. else if (h->msi_vector)
  3680. pci_disable_msi(h->pdev);
  3681. #endif /* CONFIG_PCI_MSI */
  3682. hpsa_free_sg_chain_blocks(h);
  3683. hpsa_free_cmd_pool(h);
  3684. kfree(h->blockFetchTable);
  3685. pci_free_consistent(h->pdev, h->reply_pool_size,
  3686. h->reply_pool, h->reply_pool_dhandle);
  3687. if (h->vaddr)
  3688. iounmap(h->vaddr);
  3689. if (h->transtable)
  3690. iounmap(h->transtable);
  3691. if (h->cfgtable)
  3692. iounmap(h->cfgtable);
  3693. pci_release_regions(h->pdev);
  3694. kfree(h);
  3695. }
  3696. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  3697. {
  3698. assert_spin_locked(&lockup_detector_lock);
  3699. if (!hpsa_lockup_detector)
  3700. return;
  3701. if (h->lockup_detected)
  3702. return; /* already stopped the lockup detector */
  3703. list_del(&h->lockup_list);
  3704. }
  3705. /* Called when controller lockup detected. */
  3706. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  3707. {
  3708. struct CommandList *c = NULL;
  3709. assert_spin_locked(&h->lock);
  3710. /* Mark all outstanding commands as failed and complete them. */
  3711. while (!list_empty(list)) {
  3712. c = list_entry(list->next, struct CommandList, list);
  3713. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3714. finish_cmd(c, c->Header.Tag.lower);
  3715. }
  3716. }
  3717. static void controller_lockup_detected(struct ctlr_info *h)
  3718. {
  3719. unsigned long flags;
  3720. assert_spin_locked(&lockup_detector_lock);
  3721. remove_ctlr_from_lockup_detector_list(h);
  3722. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3723. spin_lock_irqsave(&h->lock, flags);
  3724. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3725. spin_unlock_irqrestore(&h->lock, flags);
  3726. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  3727. h->lockup_detected);
  3728. pci_disable_device(h->pdev);
  3729. spin_lock_irqsave(&h->lock, flags);
  3730. fail_all_cmds_on_list(h, &h->cmpQ);
  3731. fail_all_cmds_on_list(h, &h->reqQ);
  3732. spin_unlock_irqrestore(&h->lock, flags);
  3733. }
  3734. #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
  3735. #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
  3736. static void detect_controller_lockup(struct ctlr_info *h)
  3737. {
  3738. u64 now;
  3739. u32 heartbeat;
  3740. unsigned long flags;
  3741. assert_spin_locked(&lockup_detector_lock);
  3742. now = get_jiffies_64();
  3743. /* If we've received an interrupt recently, we're ok. */
  3744. if (time_after64(h->last_intr_timestamp +
  3745. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  3746. return;
  3747. /*
  3748. * If we've already checked the heartbeat recently, we're ok.
  3749. * This could happen if someone sends us a signal. We
  3750. * otherwise don't care about signals in this thread.
  3751. */
  3752. if (time_after64(h->last_heartbeat_timestamp +
  3753. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  3754. return;
  3755. /* If heartbeat has not changed since we last looked, we're not ok. */
  3756. spin_lock_irqsave(&h->lock, flags);
  3757. heartbeat = readl(&h->cfgtable->HeartBeat);
  3758. spin_unlock_irqrestore(&h->lock, flags);
  3759. if (h->last_heartbeat == heartbeat) {
  3760. controller_lockup_detected(h);
  3761. return;
  3762. }
  3763. /* We're ok. */
  3764. h->last_heartbeat = heartbeat;
  3765. h->last_heartbeat_timestamp = now;
  3766. }
  3767. static int detect_controller_lockup_thread(void *notused)
  3768. {
  3769. struct ctlr_info *h;
  3770. unsigned long flags;
  3771. while (1) {
  3772. struct list_head *this, *tmp;
  3773. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  3774. if (kthread_should_stop())
  3775. break;
  3776. spin_lock_irqsave(&lockup_detector_lock, flags);
  3777. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  3778. h = list_entry(this, struct ctlr_info, lockup_list);
  3779. detect_controller_lockup(h);
  3780. }
  3781. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3782. }
  3783. return 0;
  3784. }
  3785. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  3786. {
  3787. unsigned long flags;
  3788. spin_lock_irqsave(&lockup_detector_lock, flags);
  3789. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  3790. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3791. }
  3792. static void start_controller_lockup_detector(struct ctlr_info *h)
  3793. {
  3794. /* Start the lockup detector thread if not already started */
  3795. if (!hpsa_lockup_detector) {
  3796. spin_lock_init(&lockup_detector_lock);
  3797. hpsa_lockup_detector =
  3798. kthread_run(detect_controller_lockup_thread,
  3799. NULL, HPSA);
  3800. }
  3801. if (!hpsa_lockup_detector) {
  3802. dev_warn(&h->pdev->dev,
  3803. "Could not start lockup detector thread\n");
  3804. return;
  3805. }
  3806. add_ctlr_to_lockup_detector_list(h);
  3807. }
  3808. static void stop_controller_lockup_detector(struct ctlr_info *h)
  3809. {
  3810. unsigned long flags;
  3811. spin_lock_irqsave(&lockup_detector_lock, flags);
  3812. remove_ctlr_from_lockup_detector_list(h);
  3813. /* If the list of ctlr's to monitor is empty, stop the thread */
  3814. if (list_empty(&hpsa_ctlr_list)) {
  3815. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3816. kthread_stop(hpsa_lockup_detector);
  3817. spin_lock_irqsave(&lockup_detector_lock, flags);
  3818. hpsa_lockup_detector = NULL;
  3819. }
  3820. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3821. }
  3822. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3823. const struct pci_device_id *ent)
  3824. {
  3825. int dac, rc;
  3826. struct ctlr_info *h;
  3827. int try_soft_reset = 0;
  3828. unsigned long flags;
  3829. if (number_of_controllers == 0)
  3830. printk(KERN_INFO DRIVER_NAME "\n");
  3831. rc = hpsa_init_reset_devices(pdev);
  3832. if (rc) {
  3833. if (rc != -ENOTSUPP)
  3834. return rc;
  3835. /* If the reset fails in a particular way (it has no way to do
  3836. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3837. * a soft reset once we get the controller configured up to the
  3838. * point that it can accept a command.
  3839. */
  3840. try_soft_reset = 1;
  3841. rc = 0;
  3842. }
  3843. reinit_after_soft_reset:
  3844. /* Command structures must be aligned on a 32-byte boundary because
  3845. * the 5 lower bits of the address are used by the hardware. and by
  3846. * the driver. See comments in hpsa.h for more info.
  3847. */
  3848. #define COMMANDLIST_ALIGNMENT 32
  3849. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3850. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3851. if (!h)
  3852. return -ENOMEM;
  3853. h->pdev = pdev;
  3854. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3855. INIT_LIST_HEAD(&h->cmpQ);
  3856. INIT_LIST_HEAD(&h->reqQ);
  3857. spin_lock_init(&h->lock);
  3858. spin_lock_init(&h->scan_lock);
  3859. rc = hpsa_pci_init(h);
  3860. if (rc != 0)
  3861. goto clean1;
  3862. sprintf(h->devname, HPSA "%d", number_of_controllers);
  3863. h->ctlr = number_of_controllers;
  3864. number_of_controllers++;
  3865. /* configure PCI DMA stuff */
  3866. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3867. if (rc == 0) {
  3868. dac = 1;
  3869. } else {
  3870. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3871. if (rc == 0) {
  3872. dac = 0;
  3873. } else {
  3874. dev_err(&pdev->dev, "no suitable DMA available\n");
  3875. goto clean1;
  3876. }
  3877. }
  3878. /* make sure the board interrupts are off */
  3879. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3880. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3881. goto clean2;
  3882. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3883. h->devname, pdev->device,
  3884. h->intr[h->intr_mode], dac ? "" : " not");
  3885. if (hpsa_allocate_cmd_pool(h))
  3886. goto clean4;
  3887. if (hpsa_allocate_sg_chain_blocks(h))
  3888. goto clean4;
  3889. init_waitqueue_head(&h->scan_wait_queue);
  3890. h->scan_finished = 1; /* no scan currently in progress */
  3891. pci_set_drvdata(pdev, h);
  3892. h->ndevices = 0;
  3893. h->scsi_host = NULL;
  3894. spin_lock_init(&h->devlock);
  3895. hpsa_put_ctlr_into_performant_mode(h);
  3896. /* At this point, the controller is ready to take commands.
  3897. * Now, if reset_devices and the hard reset didn't work, try
  3898. * the soft reset and see if that works.
  3899. */
  3900. if (try_soft_reset) {
  3901. /* This is kind of gross. We may or may not get a completion
  3902. * from the soft reset command, and if we do, then the value
  3903. * from the fifo may or may not be valid. So, we wait 10 secs
  3904. * after the reset throwing away any completions we get during
  3905. * that time. Unregister the interrupt handler and register
  3906. * fake ones to scoop up any residual completions.
  3907. */
  3908. spin_lock_irqsave(&h->lock, flags);
  3909. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3910. spin_unlock_irqrestore(&h->lock, flags);
  3911. free_irq(h->intr[h->intr_mode], h);
  3912. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3913. hpsa_intx_discard_completions);
  3914. if (rc) {
  3915. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3916. "soft reset.\n");
  3917. goto clean4;
  3918. }
  3919. rc = hpsa_kdump_soft_reset(h);
  3920. if (rc)
  3921. /* Neither hard nor soft reset worked, we're hosed. */
  3922. goto clean4;
  3923. dev_info(&h->pdev->dev, "Board READY.\n");
  3924. dev_info(&h->pdev->dev,
  3925. "Waiting for stale completions to drain.\n");
  3926. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3927. msleep(10000);
  3928. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3929. rc = controller_reset_failed(h->cfgtable);
  3930. if (rc)
  3931. dev_info(&h->pdev->dev,
  3932. "Soft reset appears to have failed.\n");
  3933. /* since the controller's reset, we have to go back and re-init
  3934. * everything. Easiest to just forget what we've done and do it
  3935. * all over again.
  3936. */
  3937. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3938. try_soft_reset = 0;
  3939. if (rc)
  3940. /* don't go to clean4, we already unallocated */
  3941. return -ENODEV;
  3942. goto reinit_after_soft_reset;
  3943. }
  3944. /* Turn the interrupts on so we can service requests */
  3945. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3946. hpsa_hba_inquiry(h);
  3947. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3948. start_controller_lockup_detector(h);
  3949. return 1;
  3950. clean4:
  3951. hpsa_free_sg_chain_blocks(h);
  3952. hpsa_free_cmd_pool(h);
  3953. free_irq(h->intr[h->intr_mode], h);
  3954. clean2:
  3955. clean1:
  3956. kfree(h);
  3957. return rc;
  3958. }
  3959. static void hpsa_flush_cache(struct ctlr_info *h)
  3960. {
  3961. char *flush_buf;
  3962. struct CommandList *c;
  3963. flush_buf = kzalloc(4, GFP_KERNEL);
  3964. if (!flush_buf)
  3965. return;
  3966. c = cmd_special_alloc(h);
  3967. if (!c) {
  3968. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3969. goto out_of_memory;
  3970. }
  3971. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3972. RAID_CTLR_LUNID, TYPE_CMD);
  3973. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3974. if (c->err_info->CommandStatus != 0)
  3975. dev_warn(&h->pdev->dev,
  3976. "error flushing cache on controller\n");
  3977. cmd_special_free(h, c);
  3978. out_of_memory:
  3979. kfree(flush_buf);
  3980. }
  3981. static void hpsa_shutdown(struct pci_dev *pdev)
  3982. {
  3983. struct ctlr_info *h;
  3984. h = pci_get_drvdata(pdev);
  3985. /* Turn board interrupts off and send the flush cache command
  3986. * sendcmd will turn off interrupt, and send the flush...
  3987. * To write all data in the battery backed cache to disks
  3988. */
  3989. hpsa_flush_cache(h);
  3990. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3991. free_irq(h->intr[h->intr_mode], h);
  3992. #ifdef CONFIG_PCI_MSI
  3993. if (h->msix_vector)
  3994. pci_disable_msix(h->pdev);
  3995. else if (h->msi_vector)
  3996. pci_disable_msi(h->pdev);
  3997. #endif /* CONFIG_PCI_MSI */
  3998. }
  3999. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4000. {
  4001. int i;
  4002. for (i = 0; i < h->ndevices; i++)
  4003. kfree(h->dev[i]);
  4004. }
  4005. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4006. {
  4007. struct ctlr_info *h;
  4008. if (pci_get_drvdata(pdev) == NULL) {
  4009. dev_err(&pdev->dev, "unable to remove device\n");
  4010. return;
  4011. }
  4012. h = pci_get_drvdata(pdev);
  4013. stop_controller_lockup_detector(h);
  4014. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4015. hpsa_shutdown(pdev);
  4016. iounmap(h->vaddr);
  4017. iounmap(h->transtable);
  4018. iounmap(h->cfgtable);
  4019. hpsa_free_device_info(h);
  4020. hpsa_free_sg_chain_blocks(h);
  4021. pci_free_consistent(h->pdev,
  4022. h->nr_cmds * sizeof(struct CommandList),
  4023. h->cmd_pool, h->cmd_pool_dhandle);
  4024. pci_free_consistent(h->pdev,
  4025. h->nr_cmds * sizeof(struct ErrorInfo),
  4026. h->errinfo_pool, h->errinfo_pool_dhandle);
  4027. pci_free_consistent(h->pdev, h->reply_pool_size,
  4028. h->reply_pool, h->reply_pool_dhandle);
  4029. kfree(h->cmd_pool_bits);
  4030. kfree(h->blockFetchTable);
  4031. kfree(h->hba_inquiry_data);
  4032. /*
  4033. * Deliberately omit pci_disable_device(): it does something nasty to
  4034. * Smart Array controllers that pci_enable_device does not undo
  4035. */
  4036. pci_release_regions(pdev);
  4037. pci_set_drvdata(pdev, NULL);
  4038. kfree(h);
  4039. }
  4040. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4041. __attribute__((unused)) pm_message_t state)
  4042. {
  4043. return -ENOSYS;
  4044. }
  4045. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4046. {
  4047. return -ENOSYS;
  4048. }
  4049. static struct pci_driver hpsa_pci_driver = {
  4050. .name = HPSA,
  4051. .probe = hpsa_init_one,
  4052. .remove = __devexit_p(hpsa_remove_one),
  4053. .id_table = hpsa_pci_device_id, /* id_table */
  4054. .shutdown = hpsa_shutdown,
  4055. .suspend = hpsa_suspend,
  4056. .resume = hpsa_resume,
  4057. };
  4058. /* Fill in bucket_map[], given nsgs (the max number of
  4059. * scatter gather elements supported) and bucket[],
  4060. * which is an array of 8 integers. The bucket[] array
  4061. * contains 8 different DMA transfer sizes (in 16
  4062. * byte increments) which the controller uses to fetch
  4063. * commands. This function fills in bucket_map[], which
  4064. * maps a given number of scatter gather elements to one of
  4065. * the 8 DMA transfer sizes. The point of it is to allow the
  4066. * controller to only do as much DMA as needed to fetch the
  4067. * command, with the DMA transfer size encoded in the lower
  4068. * bits of the command address.
  4069. */
  4070. static void calc_bucket_map(int bucket[], int num_buckets,
  4071. int nsgs, int *bucket_map)
  4072. {
  4073. int i, j, b, size;
  4074. /* even a command with 0 SGs requires 4 blocks */
  4075. #define MINIMUM_TRANSFER_BLOCKS 4
  4076. #define NUM_BUCKETS 8
  4077. /* Note, bucket_map must have nsgs+1 entries. */
  4078. for (i = 0; i <= nsgs; i++) {
  4079. /* Compute size of a command with i SG entries */
  4080. size = i + MINIMUM_TRANSFER_BLOCKS;
  4081. b = num_buckets; /* Assume the biggest bucket */
  4082. /* Find the bucket that is just big enough */
  4083. for (j = 0; j < 8; j++) {
  4084. if (bucket[j] >= size) {
  4085. b = j;
  4086. break;
  4087. }
  4088. }
  4089. /* for a command with i SG entries, use bucket b. */
  4090. bucket_map[i] = b;
  4091. }
  4092. }
  4093. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4094. u32 use_short_tags)
  4095. {
  4096. int i;
  4097. unsigned long register_value;
  4098. /* This is a bit complicated. There are 8 registers on
  4099. * the controller which we write to to tell it 8 different
  4100. * sizes of commands which there may be. It's a way of
  4101. * reducing the DMA done to fetch each command. Encoded into
  4102. * each command's tag are 3 bits which communicate to the controller
  4103. * which of the eight sizes that command fits within. The size of
  4104. * each command depends on how many scatter gather entries there are.
  4105. * Each SG entry requires 16 bytes. The eight registers are programmed
  4106. * with the number of 16-byte blocks a command of that size requires.
  4107. * The smallest command possible requires 5 such 16 byte blocks.
  4108. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4109. * blocks. Note, this only extends to the SG entries contained
  4110. * within the command block, and does not extend to chained blocks
  4111. * of SG elements. bft[] contains the eight values we write to
  4112. * the registers. They are not evenly distributed, but have more
  4113. * sizes for small commands, and fewer sizes for larger commands.
  4114. */
  4115. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4116. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4117. /* 5 = 1 s/g entry or 4k
  4118. * 6 = 2 s/g entry or 8k
  4119. * 8 = 4 s/g entry or 16k
  4120. * 10 = 6 s/g entry or 24k
  4121. */
  4122. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  4123. /* Controller spec: zero out this buffer. */
  4124. memset(h->reply_pool, 0, h->reply_pool_size);
  4125. h->reply_pool_head = h->reply_pool;
  4126. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4127. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4128. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4129. for (i = 0; i < 8; i++)
  4130. writel(bft[i], &h->transtable->BlockFetch[i]);
  4131. /* size of controller ring buffer */
  4132. writel(h->max_commands, &h->transtable->RepQSize);
  4133. writel(1, &h->transtable->RepQCount);
  4134. writel(0, &h->transtable->RepQCtrAddrLow32);
  4135. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4136. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  4137. writel(0, &h->transtable->RepQAddr0High32);
  4138. writel(CFGTBL_Trans_Performant | use_short_tags,
  4139. &(h->cfgtable->HostWrite.TransportRequest));
  4140. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4141. hpsa_wait_for_mode_change_ack(h);
  4142. register_value = readl(&(h->cfgtable->TransportActive));
  4143. if (!(register_value & CFGTBL_Trans_Performant)) {
  4144. dev_warn(&h->pdev->dev, "unable to get board into"
  4145. " performant mode\n");
  4146. return;
  4147. }
  4148. /* Change the access methods to the performant access methods */
  4149. h->access = SA5_performant_access;
  4150. h->transMethod = CFGTBL_Trans_Performant;
  4151. }
  4152. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4153. {
  4154. u32 trans_support;
  4155. if (hpsa_simple_mode)
  4156. return;
  4157. trans_support = readl(&(h->cfgtable->TransportSupport));
  4158. if (!(trans_support & PERFORMANT_MODE))
  4159. return;
  4160. hpsa_get_max_perf_mode_cmds(h);
  4161. /* Performant mode ring buffer and supporting data structures */
  4162. h->reply_pool_size = h->max_commands * sizeof(u64);
  4163. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4164. &(h->reply_pool_dhandle));
  4165. /* Need a block fetch table for performant mode */
  4166. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4167. sizeof(u32)), GFP_KERNEL);
  4168. if ((h->reply_pool == NULL)
  4169. || (h->blockFetchTable == NULL))
  4170. goto clean_up;
  4171. hpsa_enter_performant_mode(h,
  4172. trans_support & CFGTBL_Trans_use_short_tags);
  4173. return;
  4174. clean_up:
  4175. if (h->reply_pool)
  4176. pci_free_consistent(h->pdev, h->reply_pool_size,
  4177. h->reply_pool, h->reply_pool_dhandle);
  4178. kfree(h->blockFetchTable);
  4179. }
  4180. /*
  4181. * This is it. Register the PCI driver information for the cards we control
  4182. * the OS will call our registered routines when it finds one of our cards.
  4183. */
  4184. static int __init hpsa_init(void)
  4185. {
  4186. return pci_register_driver(&hpsa_pci_driver);
  4187. }
  4188. static void __exit hpsa_cleanup(void)
  4189. {
  4190. pci_unregister_driver(&hpsa_pci_driver);
  4191. }
  4192. module_init(hpsa_init);
  4193. module_exit(hpsa_cleanup);