tda18271c2dd.c 29 KB

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  1. /*
  2. * tda18271c2dd: Driver for the TDA18271C2 tuner
  3. *
  4. * Copyright (C) 2010 Digital Devices GmbH
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 only, as published by the Free Software Foundation.
  10. *
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21. * 02110-1301, USA
  22. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/firmware.h>
  30. #include <linux/i2c.h>
  31. #include <asm/div64.h>
  32. #include "dvb_frontend.h"
  33. struct SStandardParam {
  34. s32 m_IFFrequency;
  35. u32 m_BandWidth;
  36. u8 m_EP3_4_0;
  37. u8 m_EB22;
  38. };
  39. struct SMap {
  40. u32 m_Frequency;
  41. u8 m_Param;
  42. };
  43. struct SMapI {
  44. u32 m_Frequency;
  45. s32 m_Param;
  46. };
  47. struct SMap2 {
  48. u32 m_Frequency;
  49. u8 m_Param1;
  50. u8 m_Param2;
  51. };
  52. struct SRFBandMap {
  53. u32 m_RF_max;
  54. u32 m_RF1_Default;
  55. u32 m_RF2_Default;
  56. u32 m_RF3_Default;
  57. };
  58. enum ERegister {
  59. ID = 0,
  60. TM,
  61. PL,
  62. EP1, EP2, EP3, EP4, EP5,
  63. CPD, CD1, CD2, CD3,
  64. MPD, MD1, MD2, MD3,
  65. EB1, EB2, EB3, EB4, EB5, EB6, EB7, EB8, EB9, EB10,
  66. EB11, EB12, EB13, EB14, EB15, EB16, EB17, EB18, EB19, EB20,
  67. EB21, EB22, EB23,
  68. NUM_REGS
  69. };
  70. struct tda_state {
  71. struct i2c_adapter *i2c;
  72. u8 adr;
  73. u32 m_Frequency;
  74. u32 IF;
  75. u8 m_IFLevelAnalog;
  76. u8 m_IFLevelDigital;
  77. u8 m_IFLevelDVBC;
  78. u8 m_IFLevelDVBT;
  79. u8 m_EP4;
  80. u8 m_EP3_Standby;
  81. bool m_bMaster;
  82. s32 m_SettlingTime;
  83. u8 m_Regs[NUM_REGS];
  84. /* Tracking filter settings for band 0..6 */
  85. u32 m_RF1[7];
  86. s32 m_RF_A1[7];
  87. s32 m_RF_B1[7];
  88. u32 m_RF2[7];
  89. s32 m_RF_A2[7];
  90. s32 m_RF_B2[7];
  91. u32 m_RF3[7];
  92. u8 m_TMValue_RFCal; /* Calibration temperatur */
  93. bool m_bFMInput; /* true to use Pin 8 for FM Radio */
  94. };
  95. static int PowerScan(struct tda_state *state,
  96. u8 RFBand, u32 RF_in,
  97. u32 *pRF_Out, bool *pbcal);
  98. static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len)
  99. {
  100. struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
  101. .buf = data, .len = len} };
  102. return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
  103. }
  104. static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
  105. {
  106. struct i2c_msg msg = {.addr = adr, .flags = 0,
  107. .buf = data, .len = len};
  108. if (i2c_transfer(adap, &msg, 1) != 1) {
  109. printk(KERN_ERR "tda18271c2dd: i2c write error at addr %i\n", adr);
  110. return -1;
  111. }
  112. return 0;
  113. }
  114. static int WriteRegs(struct tda_state *state,
  115. u8 SubAddr, u8 *Regs, u16 nRegs)
  116. {
  117. u8 data[nRegs+1];
  118. data[0] = SubAddr;
  119. memcpy(data + 1, Regs, nRegs);
  120. return i2c_write(state->i2c, state->adr, data, nRegs+1);
  121. }
  122. static int WriteReg(struct tda_state *state, u8 SubAddr, u8 Reg)
  123. {
  124. u8 msg[2] = {SubAddr, Reg};
  125. return i2c_write(state->i2c, state->adr, msg, 2);
  126. }
  127. static int Read(struct tda_state *state, u8 * Regs)
  128. {
  129. return i2c_readn(state->i2c, state->adr, Regs, 16);
  130. }
  131. static int ReadExtented(struct tda_state *state, u8 * Regs)
  132. {
  133. return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS);
  134. }
  135. static int UpdateRegs(struct tda_state *state, u8 RegFrom, u8 RegTo)
  136. {
  137. return WriteRegs(state, RegFrom,
  138. &state->m_Regs[RegFrom], RegTo-RegFrom+1);
  139. }
  140. static int UpdateReg(struct tda_state *state, u8 Reg)
  141. {
  142. return WriteReg(state, Reg, state->m_Regs[Reg]);
  143. }
  144. #include "tda18271c2dd_maps.h"
  145. static void reset(struct tda_state *state)
  146. {
  147. u32 ulIFLevelAnalog = 0;
  148. u32 ulIFLevelDigital = 2;
  149. u32 ulIFLevelDVBC = 7;
  150. u32 ulIFLevelDVBT = 6;
  151. u32 ulXTOut = 0;
  152. u32 ulStandbyMode = 0x06; /* Send in stdb, but leave osc on */
  153. u32 ulSlave = 0;
  154. u32 ulFMInput = 0;
  155. u32 ulSettlingTime = 100;
  156. state->m_Frequency = 0;
  157. state->m_SettlingTime = 100;
  158. state->m_IFLevelAnalog = (ulIFLevelAnalog & 0x07) << 2;
  159. state->m_IFLevelDigital = (ulIFLevelDigital & 0x07) << 2;
  160. state->m_IFLevelDVBC = (ulIFLevelDVBC & 0x07) << 2;
  161. state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2;
  162. state->m_EP4 = 0x20;
  163. if (ulXTOut != 0)
  164. state->m_EP4 |= 0x40;
  165. state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F;
  166. state->m_bMaster = (ulSlave == 0);
  167. state->m_SettlingTime = ulSettlingTime;
  168. state->m_bFMInput = (ulFMInput == 2);
  169. }
  170. static bool SearchMap1(struct SMap Map[],
  171. u32 Frequency, u8 *pParam)
  172. {
  173. int i = 0;
  174. while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency))
  175. i += 1;
  176. if (Map[i].m_Frequency == 0)
  177. return false;
  178. *pParam = Map[i].m_Param;
  179. return true;
  180. }
  181. static bool SearchMap2(struct SMapI Map[],
  182. u32 Frequency, s32 *pParam)
  183. {
  184. int i = 0;
  185. while ((Map[i].m_Frequency != 0) &&
  186. (Frequency > Map[i].m_Frequency))
  187. i += 1;
  188. if (Map[i].m_Frequency == 0)
  189. return false;
  190. *pParam = Map[i].m_Param;
  191. return true;
  192. }
  193. static bool SearchMap3(struct SMap2 Map[], u32 Frequency,
  194. u8 *pParam1, u8 *pParam2)
  195. {
  196. int i = 0;
  197. while ((Map[i].m_Frequency != 0) &&
  198. (Frequency > Map[i].m_Frequency))
  199. i += 1;
  200. if (Map[i].m_Frequency == 0)
  201. return false;
  202. *pParam1 = Map[i].m_Param1;
  203. *pParam2 = Map[i].m_Param2;
  204. return true;
  205. }
  206. static bool SearchMap4(struct SRFBandMap Map[],
  207. u32 Frequency, u8 *pRFBand)
  208. {
  209. int i = 0;
  210. while (i < 7 && (Frequency > Map[i].m_RF_max))
  211. i += 1;
  212. if (i == 7)
  213. return false;
  214. *pRFBand = i;
  215. return true;
  216. }
  217. static int ThermometerRead(struct tda_state *state, u8 *pTM_Value)
  218. {
  219. int status = 0;
  220. do {
  221. u8 Regs[16];
  222. state->m_Regs[TM] |= 0x10;
  223. status = UpdateReg(state, TM);
  224. if (status < 0)
  225. break;
  226. status = Read(state, Regs);
  227. if (status < 0)
  228. break;
  229. if (((Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20) ||
  230. ((Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00)) {
  231. state->m_Regs[TM] ^= 0x20;
  232. status = UpdateReg(state, TM);
  233. if (status < 0)
  234. break;
  235. msleep(10);
  236. status = Read(state, Regs);
  237. if (status < 0)
  238. break;
  239. }
  240. *pTM_Value = (Regs[TM] & 0x20)
  241. ? m_Thermometer_Map_2[Regs[TM] & 0x0F]
  242. : m_Thermometer_Map_1[Regs[TM] & 0x0F] ;
  243. state->m_Regs[TM] &= ~0x10; /* Thermometer off */
  244. status = UpdateReg(state, TM);
  245. if (status < 0)
  246. break;
  247. state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 ????????? */
  248. status = UpdateReg(state, EP4);
  249. if (status < 0)
  250. break;
  251. } while (0);
  252. return status;
  253. }
  254. static int StandBy(struct tda_state *state)
  255. {
  256. int status = 0;
  257. do {
  258. state->m_Regs[EB12] &= ~0x20; /* PD_AGC1_Det = 0 */
  259. status = UpdateReg(state, EB12);
  260. if (status < 0)
  261. break;
  262. state->m_Regs[EB18] &= ~0x83; /* AGC1_loop_off = 0, AGC1_Gain = 6 dB */
  263. status = UpdateReg(state, EB18);
  264. if (status < 0)
  265. break;
  266. state->m_Regs[EB21] |= 0x03; /* AGC2_Gain = -6 dB */
  267. state->m_Regs[EP3] = state->m_EP3_Standby;
  268. status = UpdateReg(state, EP3);
  269. if (status < 0)
  270. break;
  271. state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LP_Fc[2] = 0 */
  272. status = UpdateRegs(state, EB21, EB23);
  273. if (status < 0)
  274. break;
  275. } while (0);
  276. return status;
  277. }
  278. static int CalcMainPLL(struct tda_state *state, u32 freq)
  279. {
  280. u8 PostDiv;
  281. u8 Div;
  282. u64 OscFreq;
  283. u32 MainDiv;
  284. if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div))
  285. return -EINVAL;
  286. OscFreq = (u64) freq * (u64) Div;
  287. OscFreq *= (u64) 16384;
  288. do_div(OscFreq, (u64)16000000);
  289. MainDiv = OscFreq;
  290. state->m_Regs[MPD] = PostDiv & 0x77;
  291. state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F);
  292. state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF);
  293. state->m_Regs[MD3] = (MainDiv & 0xFF);
  294. return UpdateRegs(state, MPD, MD3);
  295. }
  296. static int CalcCalPLL(struct tda_state *state, u32 freq)
  297. {
  298. u8 PostDiv;
  299. u8 Div;
  300. u64 OscFreq;
  301. u32 CalDiv;
  302. if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div))
  303. return -EINVAL;
  304. OscFreq = (u64)freq * (u64)Div;
  305. /* CalDiv = u32( OscFreq * 16384 / 16000000 ); */
  306. OscFreq *= (u64)16384;
  307. do_div(OscFreq, (u64)16000000);
  308. CalDiv = OscFreq;
  309. state->m_Regs[CPD] = PostDiv;
  310. state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF);
  311. state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF);
  312. state->m_Regs[CD3] = (CalDiv & 0xFF);
  313. return UpdateRegs(state, CPD, CD3);
  314. }
  315. static int CalibrateRF(struct tda_state *state,
  316. u8 RFBand, u32 freq, s32 *pCprog)
  317. {
  318. int status = 0;
  319. u8 Regs[NUM_REGS];
  320. do {
  321. u8 BP_Filter = 0;
  322. u8 GainTaper = 0;
  323. u8 RFC_K = 0;
  324. u8 RFC_M = 0;
  325. state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 */
  326. status = UpdateReg(state, EP4);
  327. if (status < 0)
  328. break;
  329. state->m_Regs[EB18] |= 0x03; /* AGC1_Gain = 3 */
  330. status = UpdateReg(state, EB18);
  331. if (status < 0)
  332. break;
  333. /* Switching off LT (as datasheet says) causes calibration on C1 to fail */
  334. /* (Readout of Cprog is allways 255) */
  335. if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */
  336. state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */
  337. if (!(SearchMap1(m_BP_Filter_Map, freq, &BP_Filter) &&
  338. SearchMap1(m_GainTaper_Map, freq, &GainTaper) &&
  339. SearchMap3(m_KM_Map, freq, &RFC_K, &RFC_M)))
  340. return -EINVAL;
  341. state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter;
  342. state->m_Regs[EP2] = (RFBand << 5) | GainTaper;
  343. state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2);
  344. status = UpdateRegs(state, EP1, EP3);
  345. if (status < 0)
  346. break;
  347. status = UpdateReg(state, EB13);
  348. if (status < 0)
  349. break;
  350. state->m_Regs[EB4] |= 0x20; /* LO_ForceSrce = 1 */
  351. status = UpdateReg(state, EB4);
  352. if (status < 0)
  353. break;
  354. state->m_Regs[EB7] |= 0x20; /* CAL_ForceSrce = 1 */
  355. status = UpdateReg(state, EB7);
  356. if (status < 0)
  357. break;
  358. state->m_Regs[EB14] = 0; /* RFC_Cprog = 0 */
  359. status = UpdateReg(state, EB14);
  360. if (status < 0)
  361. break;
  362. state->m_Regs[EB20] &= ~0x20; /* ForceLock = 0; */
  363. status = UpdateReg(state, EB20);
  364. if (status < 0)
  365. break;
  366. state->m_Regs[EP4] |= 0x03; /* CAL_Mode = 3 */
  367. status = UpdateRegs(state, EP4, EP5);
  368. if (status < 0)
  369. break;
  370. status = CalcCalPLL(state, freq);
  371. if (status < 0)
  372. break;
  373. status = CalcMainPLL(state, freq + 1000000);
  374. if (status < 0)
  375. break;
  376. msleep(5);
  377. status = UpdateReg(state, EP2);
  378. if (status < 0)
  379. break;
  380. status = UpdateReg(state, EP1);
  381. if (status < 0)
  382. break;
  383. status = UpdateReg(state, EP2);
  384. if (status < 0)
  385. break;
  386. status = UpdateReg(state, EP1);
  387. if (status < 0)
  388. break;
  389. state->m_Regs[EB4] &= ~0x20; /* LO_ForceSrce = 0 */
  390. status = UpdateReg(state, EB4);
  391. if (status < 0)
  392. break;
  393. state->m_Regs[EB7] &= ~0x20; /* CAL_ForceSrce = 0 */
  394. status = UpdateReg(state, EB7);
  395. if (status < 0)
  396. break;
  397. msleep(10);
  398. state->m_Regs[EB20] |= 0x20; /* ForceLock = 1; */
  399. status = UpdateReg(state, EB20);
  400. if (status < 0)
  401. break;
  402. msleep(60);
  403. state->m_Regs[EP4] &= ~0x03; /* CAL_Mode = 0 */
  404. state->m_Regs[EP3] &= ~0x40; /* SM_LT = 0 */
  405. state->m_Regs[EB18] &= ~0x03; /* AGC1_Gain = 0 */
  406. status = UpdateReg(state, EB18);
  407. if (status < 0)
  408. break;
  409. status = UpdateRegs(state, EP3, EP4);
  410. if (status < 0)
  411. break;
  412. status = UpdateReg(state, EP1);
  413. if (status < 0)
  414. break;
  415. status = ReadExtented(state, Regs);
  416. if (status < 0)
  417. break;
  418. *pCprog = Regs[EB14];
  419. } while (0);
  420. return status;
  421. }
  422. static int RFTrackingFiltersInit(struct tda_state *state,
  423. u8 RFBand)
  424. {
  425. int status = 0;
  426. u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default;
  427. u32 RF2 = m_RF_Band_Map[RFBand].m_RF2_Default;
  428. u32 RF3 = m_RF_Band_Map[RFBand].m_RF3_Default;
  429. bool bcal = false;
  430. s32 Cprog_cal1 = 0;
  431. s32 Cprog_table1 = 0;
  432. s32 Cprog_cal2 = 0;
  433. s32 Cprog_table2 = 0;
  434. s32 Cprog_cal3 = 0;
  435. s32 Cprog_table3 = 0;
  436. state->m_RF_A1[RFBand] = 0;
  437. state->m_RF_B1[RFBand] = 0;
  438. state->m_RF_A2[RFBand] = 0;
  439. state->m_RF_B2[RFBand] = 0;
  440. do {
  441. status = PowerScan(state, RFBand, RF1, &RF1, &bcal);
  442. if (status < 0)
  443. break;
  444. if (bcal) {
  445. status = CalibrateRF(state, RFBand, RF1, &Cprog_cal1);
  446. if (status < 0)
  447. break;
  448. }
  449. SearchMap2(m_RF_Cal_Map, RF1, &Cprog_table1);
  450. if (!bcal)
  451. Cprog_cal1 = Cprog_table1;
  452. state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1;
  453. /* state->m_RF_A1[RF_Band] = ???? */
  454. if (RF2 == 0)
  455. break;
  456. status = PowerScan(state, RFBand, RF2, &RF2, &bcal);
  457. if (status < 0)
  458. break;
  459. if (bcal) {
  460. status = CalibrateRF(state, RFBand, RF2, &Cprog_cal2);
  461. if (status < 0)
  462. break;
  463. }
  464. SearchMap2(m_RF_Cal_Map, RF2, &Cprog_table2);
  465. if (!bcal)
  466. Cprog_cal2 = Cprog_table2;
  467. state->m_RF_A1[RFBand] =
  468. (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) /
  469. ((s32)(RF2) - (s32)(RF1));
  470. if (RF3 == 0)
  471. break;
  472. status = PowerScan(state, RFBand, RF3, &RF3, &bcal);
  473. if (status < 0)
  474. break;
  475. if (bcal) {
  476. status = CalibrateRF(state, RFBand, RF3, &Cprog_cal3);
  477. if (status < 0)
  478. break;
  479. }
  480. SearchMap2(m_RF_Cal_Map, RF3, &Cprog_table3);
  481. if (!bcal)
  482. Cprog_cal3 = Cprog_table3;
  483. state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3) - (s32)(RF2));
  484. state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2;
  485. } while (0);
  486. state->m_RF1[RFBand] = RF1;
  487. state->m_RF2[RFBand] = RF2;
  488. state->m_RF3[RFBand] = RF3;
  489. #if 0
  490. printk(KERN_ERR "tda18271c2dd: %s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__,
  491. RFBand, RF1, state->m_RF_A1[RFBand], state->m_RF_B1[RFBand], RF2,
  492. state->m_RF_A2[RFBand], state->m_RF_B2[RFBand], RF3);
  493. #endif
  494. return status;
  495. }
  496. static int PowerScan(struct tda_state *state,
  497. u8 RFBand, u32 RF_in, u32 *pRF_Out, bool *pbcal)
  498. {
  499. int status = 0;
  500. do {
  501. u8 Gain_Taper = 0;
  502. s32 RFC_Cprog = 0;
  503. u8 CID_Target = 0;
  504. u8 CountLimit = 0;
  505. u32 freq_MainPLL;
  506. u8 Regs[NUM_REGS];
  507. u8 CID_Gain;
  508. s32 Count = 0;
  509. int sign = 1;
  510. bool wait = false;
  511. if (!(SearchMap2(m_RF_Cal_Map, RF_in, &RFC_Cprog) &&
  512. SearchMap1(m_GainTaper_Map, RF_in, &Gain_Taper) &&
  513. SearchMap3(m_CID_Target_Map, RF_in, &CID_Target, &CountLimit))) {
  514. printk(KERN_ERR "tda18271c2dd: %s Search map failed\n", __func__);
  515. return -EINVAL;
  516. }
  517. state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper;
  518. state->m_Regs[EB14] = (RFC_Cprog);
  519. status = UpdateReg(state, EP2);
  520. if (status < 0)
  521. break;
  522. status = UpdateReg(state, EB14);
  523. if (status < 0)
  524. break;
  525. freq_MainPLL = RF_in + 1000000;
  526. status = CalcMainPLL(state, freq_MainPLL);
  527. if (status < 0)
  528. break;
  529. msleep(5);
  530. state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; /* CAL_mode = 1 */
  531. status = UpdateReg(state, EP4);
  532. if (status < 0)
  533. break;
  534. status = UpdateReg(state, EP2); /* Launch power measurement */
  535. if (status < 0)
  536. break;
  537. status = ReadExtented(state, Regs);
  538. if (status < 0)
  539. break;
  540. CID_Gain = Regs[EB10] & 0x3F;
  541. state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workarround in CalibrateRF) */
  542. *pRF_Out = RF_in;
  543. while (CID_Gain < CID_Target) {
  544. freq_MainPLL = RF_in + sign * Count + 1000000;
  545. status = CalcMainPLL(state, freq_MainPLL);
  546. if (status < 0)
  547. break;
  548. msleep(wait ? 5 : 1);
  549. wait = false;
  550. status = UpdateReg(state, EP2); /* Launch power measurement */
  551. if (status < 0)
  552. break;
  553. status = ReadExtented(state, Regs);
  554. if (status < 0)
  555. break;
  556. CID_Gain = Regs[EB10] & 0x3F;
  557. Count += 200000;
  558. if (Count < CountLimit * 100000)
  559. continue;
  560. if (sign < 0)
  561. break;
  562. sign = -sign;
  563. Count = 200000;
  564. wait = true;
  565. }
  566. status = status;
  567. if (status < 0)
  568. break;
  569. if (CID_Gain >= CID_Target) {
  570. *pbcal = true;
  571. *pRF_Out = freq_MainPLL - 1000000;
  572. } else
  573. *pbcal = false;
  574. } while (0);
  575. return status;
  576. }
  577. static int PowerScanInit(struct tda_state *state)
  578. {
  579. int status = 0;
  580. do {
  581. state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12;
  582. state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); /* If level = 0, Cal mode = 0 */
  583. status = UpdateRegs(state, EP3, EP4);
  584. if (status < 0)
  585. break;
  586. state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03); /* AGC 1 Gain = 0 */
  587. status = UpdateReg(state, EB18);
  588. if (status < 0)
  589. break;
  590. state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03); /* AGC 2 Gain = 0 (Datasheet = 3) */
  591. state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06); /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
  592. status = UpdateRegs(state, EB21, EB23);
  593. if (status < 0)
  594. break;
  595. } while (0);
  596. return status;
  597. }
  598. static int CalcRFFilterCurve(struct tda_state *state)
  599. {
  600. int status = 0;
  601. do {
  602. msleep(200); /* Temperature stabilisation */
  603. status = PowerScanInit(state);
  604. if (status < 0)
  605. break;
  606. status = RFTrackingFiltersInit(state, 0);
  607. if (status < 0)
  608. break;
  609. status = RFTrackingFiltersInit(state, 1);
  610. if (status < 0)
  611. break;
  612. status = RFTrackingFiltersInit(state, 2);
  613. if (status < 0)
  614. break;
  615. status = RFTrackingFiltersInit(state, 3);
  616. if (status < 0)
  617. break;
  618. status = RFTrackingFiltersInit(state, 4);
  619. if (status < 0)
  620. break;
  621. status = RFTrackingFiltersInit(state, 5);
  622. if (status < 0)
  623. break;
  624. status = RFTrackingFiltersInit(state, 6);
  625. if (status < 0)
  626. break;
  627. status = ThermometerRead(state, &state->m_TMValue_RFCal); /* also switches off Cal mode !!! */
  628. if (status < 0)
  629. break;
  630. } while (0);
  631. return status;
  632. }
  633. static int FixedContentsI2CUpdate(struct tda_state *state)
  634. {
  635. static u8 InitRegs[] = {
  636. 0x08, 0x80, 0xC6,
  637. 0xDF, 0x16, 0x60, 0x80,
  638. 0x80, 0x00, 0x00, 0x00,
  639. 0x00, 0x00, 0x00, 0x00,
  640. 0xFC, 0x01, 0x84, 0x41,
  641. 0x01, 0x84, 0x40, 0x07,
  642. 0x00, 0x00, 0x96, 0x3F,
  643. 0xC1, 0x00, 0x8F, 0x00,
  644. 0x00, 0x8C, 0x00, 0x20,
  645. 0xB3, 0x48, 0xB0,
  646. };
  647. int status = 0;
  648. memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1);
  649. do {
  650. status = UpdateRegs(state, TM, EB23);
  651. if (status < 0)
  652. break;
  653. /* AGC1 gain setup */
  654. state->m_Regs[EB17] = 0x00;
  655. status = UpdateReg(state, EB17);
  656. if (status < 0)
  657. break;
  658. state->m_Regs[EB17] = 0x03;
  659. status = UpdateReg(state, EB17);
  660. if (status < 0)
  661. break;
  662. state->m_Regs[EB17] = 0x43;
  663. status = UpdateReg(state, EB17);
  664. if (status < 0)
  665. break;
  666. state->m_Regs[EB17] = 0x4C;
  667. status = UpdateReg(state, EB17);
  668. if (status < 0)
  669. break;
  670. /* IRC Cal Low band */
  671. state->m_Regs[EP3] = 0x1F;
  672. state->m_Regs[EP4] = 0x66;
  673. state->m_Regs[EP5] = 0x81;
  674. state->m_Regs[CPD] = 0xCC;
  675. state->m_Regs[CD1] = 0x6C;
  676. state->m_Regs[CD2] = 0x00;
  677. state->m_Regs[CD3] = 0x00;
  678. state->m_Regs[MPD] = 0xC5;
  679. state->m_Regs[MD1] = 0x77;
  680. state->m_Regs[MD2] = 0x08;
  681. state->m_Regs[MD3] = 0x00;
  682. status = UpdateRegs(state, EP2, MD3); /* diff between sw and datasheet (ep3-md3) */
  683. if (status < 0)
  684. break;
  685. #if 0
  686. state->m_Regs[EB4] = 0x61; /* missing in sw */
  687. status = UpdateReg(state, EB4);
  688. if (status < 0)
  689. break;
  690. msleep(1);
  691. state->m_Regs[EB4] = 0x41;
  692. status = UpdateReg(state, EB4);
  693. if (status < 0)
  694. break;
  695. #endif
  696. msleep(5);
  697. status = UpdateReg(state, EP1);
  698. if (status < 0)
  699. break;
  700. msleep(5);
  701. state->m_Regs[EP5] = 0x85;
  702. state->m_Regs[CPD] = 0xCB;
  703. state->m_Regs[CD1] = 0x66;
  704. state->m_Regs[CD2] = 0x70;
  705. status = UpdateRegs(state, EP3, CD3);
  706. if (status < 0)
  707. break;
  708. msleep(5);
  709. status = UpdateReg(state, EP2);
  710. if (status < 0)
  711. break;
  712. msleep(30);
  713. /* IRC Cal mid band */
  714. state->m_Regs[EP5] = 0x82;
  715. state->m_Regs[CPD] = 0xA8;
  716. state->m_Regs[CD2] = 0x00;
  717. state->m_Regs[MPD] = 0xA1; /* Datasheet = 0xA9 */
  718. state->m_Regs[MD1] = 0x73;
  719. state->m_Regs[MD2] = 0x1A;
  720. status = UpdateRegs(state, EP3, MD3);
  721. if (status < 0)
  722. break;
  723. msleep(5);
  724. status = UpdateReg(state, EP1);
  725. if (status < 0)
  726. break;
  727. msleep(5);
  728. state->m_Regs[EP5] = 0x86;
  729. state->m_Regs[CPD] = 0xA8;
  730. state->m_Regs[CD1] = 0x66;
  731. state->m_Regs[CD2] = 0xA0;
  732. status = UpdateRegs(state, EP3, CD3);
  733. if (status < 0)
  734. break;
  735. msleep(5);
  736. status = UpdateReg(state, EP2);
  737. if (status < 0)
  738. break;
  739. msleep(30);
  740. /* IRC Cal high band */
  741. state->m_Regs[EP5] = 0x83;
  742. state->m_Regs[CPD] = 0x98;
  743. state->m_Regs[CD1] = 0x65;
  744. state->m_Regs[CD2] = 0x00;
  745. state->m_Regs[MPD] = 0x91; /* Datasheet = 0x91 */
  746. state->m_Regs[MD1] = 0x71;
  747. state->m_Regs[MD2] = 0xCD;
  748. status = UpdateRegs(state, EP3, MD3);
  749. if (status < 0)
  750. break;
  751. msleep(5);
  752. status = UpdateReg(state, EP1);
  753. if (status < 0)
  754. break;
  755. msleep(5);
  756. state->m_Regs[EP5] = 0x87;
  757. state->m_Regs[CD1] = 0x65;
  758. state->m_Regs[CD2] = 0x50;
  759. status = UpdateRegs(state, EP3, CD3);
  760. if (status < 0)
  761. break;
  762. msleep(5);
  763. status = UpdateReg(state, EP2);
  764. if (status < 0)
  765. break;
  766. msleep(30);
  767. /* Back to normal */
  768. state->m_Regs[EP4] = 0x64;
  769. status = UpdateReg(state, EP4);
  770. if (status < 0)
  771. break;
  772. status = UpdateReg(state, EP1);
  773. if (status < 0)
  774. break;
  775. } while (0);
  776. return status;
  777. }
  778. static int InitCal(struct tda_state *state)
  779. {
  780. int status = 0;
  781. do {
  782. status = FixedContentsI2CUpdate(state);
  783. if (status < 0)
  784. break;
  785. status = CalcRFFilterCurve(state);
  786. if (status < 0)
  787. break;
  788. status = StandBy(state);
  789. if (status < 0)
  790. break;
  791. /* m_bInitDone = true; */
  792. } while (0);
  793. return status;
  794. };
  795. static int RFTrackingFiltersCorrection(struct tda_state *state,
  796. u32 Frequency)
  797. {
  798. int status = 0;
  799. s32 Cprog_table;
  800. u8 RFBand;
  801. u8 dCoverdT;
  802. if (!SearchMap2(m_RF_Cal_Map, Frequency, &Cprog_table) ||
  803. !SearchMap4(m_RF_Band_Map, Frequency, &RFBand) ||
  804. !SearchMap1(m_RF_Cal_DC_Over_DT_Map, Frequency, &dCoverdT))
  805. return -EINVAL;
  806. do {
  807. u8 TMValue_Current;
  808. u32 RF1 = state->m_RF1[RFBand];
  809. u32 RF2 = state->m_RF1[RFBand];
  810. u32 RF3 = state->m_RF1[RFBand];
  811. s32 RF_A1 = state->m_RF_A1[RFBand];
  812. s32 RF_B1 = state->m_RF_B1[RFBand];
  813. s32 RF_A2 = state->m_RF_A2[RFBand];
  814. s32 RF_B2 = state->m_RF_B2[RFBand];
  815. s32 Capprox = 0;
  816. int TComp;
  817. state->m_Regs[EP3] &= ~0xE0; /* Power up */
  818. status = UpdateReg(state, EP3);
  819. if (status < 0)
  820. break;
  821. status = ThermometerRead(state, &TMValue_Current);
  822. if (status < 0)
  823. break;
  824. if (RF3 == 0 || Frequency < RF2)
  825. Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table;
  826. else
  827. Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table;
  828. TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000;
  829. Capprox += TComp;
  830. if (Capprox < 0)
  831. Capprox = 0;
  832. else if (Capprox > 255)
  833. Capprox = 255;
  834. /* TODO Temperature compensation. There is defenitely a scale factor */
  835. /* missing in the datasheet, so leave it out for now. */
  836. state->m_Regs[EB14] = Capprox;
  837. status = UpdateReg(state, EB14);
  838. if (status < 0)
  839. break;
  840. } while (0);
  841. return status;
  842. }
  843. static int ChannelConfiguration(struct tda_state *state,
  844. u32 Frequency, int Standard)
  845. {
  846. s32 IntermediateFrequency = m_StandardTable[Standard].m_IFFrequency;
  847. int status = 0;
  848. u8 BP_Filter = 0;
  849. u8 RF_Band = 0;
  850. u8 GainTaper = 0;
  851. u8 IR_Meas = 0;
  852. state->IF = IntermediateFrequency;
  853. /* printk("tda18271c2dd: %s Freq = %d Standard = %d IF = %d\n", __func__, Frequency, Standard, IntermediateFrequency); */
  854. /* get values from tables */
  855. if (!(SearchMap1(m_BP_Filter_Map, Frequency, &BP_Filter) &&
  856. SearchMap1(m_GainTaper_Map, Frequency, &GainTaper) &&
  857. SearchMap1(m_IR_Meas_Map, Frequency, &IR_Meas) &&
  858. SearchMap4(m_RF_Band_Map, Frequency, &RF_Band))) {
  859. printk(KERN_ERR "tda18271c2dd: %s SearchMap failed\n", __func__);
  860. return -EINVAL;
  861. }
  862. do {
  863. state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0;
  864. state->m_Regs[EP3] &= ~0x04; /* switch RFAGC to high speed mode */
  865. /* m_EP4 default for XToutOn, CAL_Mode (0) */
  866. state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog);
  867. /* state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; */
  868. if (Standard <= HF_AnalogMax)
  869. state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog;
  870. else if (Standard <= HF_ATSC)
  871. state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT;
  872. else if (Standard <= HF_DVBC)
  873. state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC;
  874. else
  875. state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital;
  876. if ((Standard == HF_FM_Radio) && state->m_bFMInput)
  877. state->m_Regs[EP4] |= 80;
  878. state->m_Regs[MPD] &= ~0x80;
  879. if (Standard > HF_AnalogMax)
  880. state->m_Regs[MPD] |= 0x80; /* Add IF_notch for digital */
  881. state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22;
  882. /* Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) */
  883. if (Standard == HF_FM_Radio)
  884. state->m_Regs[EB23] |= 0x06; /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
  885. else
  886. state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LPFc[2] = 0 */
  887. status = UpdateRegs(state, EB22, EB23);
  888. if (status < 0)
  889. break;
  890. state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; /* Dis_Power_level = 1, Filter */
  891. state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas;
  892. state->m_Regs[EP2] = (RF_Band << 5) | GainTaper;
  893. state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) |
  894. (state->m_bMaster ? 0x04 : 0x00); /* CALVCO_FortLOn = MS */
  895. /* AGC1_always_master = 0 */
  896. /* AGC_firstn = 0 */
  897. status = UpdateReg(state, EB1);
  898. if (status < 0)
  899. break;
  900. if (state->m_bMaster) {
  901. status = CalcMainPLL(state, Frequency + IntermediateFrequency);
  902. if (status < 0)
  903. break;
  904. status = UpdateRegs(state, TM, EP5);
  905. if (status < 0)
  906. break;
  907. state->m_Regs[EB4] |= 0x20; /* LO_forceSrce = 1 */
  908. status = UpdateReg(state, EB4);
  909. if (status < 0)
  910. break;
  911. msleep(1);
  912. state->m_Regs[EB4] &= ~0x20; /* LO_forceSrce = 0 */
  913. status = UpdateReg(state, EB4);
  914. if (status < 0)
  915. break;
  916. } else {
  917. u8 PostDiv = 0;
  918. u8 Div;
  919. status = CalcCalPLL(state, Frequency + IntermediateFrequency);
  920. if (status < 0)
  921. break;
  922. SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div);
  923. state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77);
  924. status = UpdateReg(state, MPD);
  925. if (status < 0)
  926. break;
  927. status = UpdateRegs(state, TM, EP5);
  928. if (status < 0)
  929. break;
  930. state->m_Regs[EB7] |= 0x20; /* CAL_forceSrce = 1 */
  931. status = UpdateReg(state, EB7);
  932. if (status < 0)
  933. break;
  934. msleep(1);
  935. state->m_Regs[EB7] &= ~0x20; /* CAL_forceSrce = 0 */
  936. status = UpdateReg(state, EB7);
  937. if (status < 0)
  938. break;
  939. }
  940. msleep(20);
  941. if (Standard != HF_FM_Radio)
  942. state->m_Regs[EP3] |= 0x04; /* RFAGC to normal mode */
  943. status = UpdateReg(state, EP3);
  944. if (status < 0)
  945. break;
  946. } while (0);
  947. return status;
  948. }
  949. static int sleep(struct dvb_frontend *fe)
  950. {
  951. struct tda_state *state = fe->tuner_priv;
  952. StandBy(state);
  953. return 0;
  954. }
  955. static int init(struct dvb_frontend *fe)
  956. {
  957. return 0;
  958. }
  959. static int release(struct dvb_frontend *fe)
  960. {
  961. kfree(fe->tuner_priv);
  962. fe->tuner_priv = NULL;
  963. return 0;
  964. }
  965. static int set_params(struct dvb_frontend *fe)
  966. {
  967. struct tda_state *state = fe->tuner_priv;
  968. int status = 0;
  969. int Standard;
  970. u32 bw = fe->dtv_property_cache.bandwidth_hz;
  971. u32 delsys = fe->dtv_property_cache.delivery_system;
  972. state->m_Frequency = fe->dtv_property_cache.frequency;
  973. switch (delsys) {
  974. case SYS_DVBT:
  975. case SYS_DVBT2:
  976. switch (bw) {
  977. case 6000000:
  978. Standard = HF_DVBT_6MHZ;
  979. break;
  980. case 7000000:
  981. Standard = HF_DVBT_7MHZ;
  982. break;
  983. case 8000000:
  984. Standard = HF_DVBT_8MHZ;
  985. break;
  986. default:
  987. return -EINVAL;
  988. }
  989. case SYS_DVBC_ANNEX_A:
  990. case SYS_DVBC_ANNEX_C:
  991. if (bw <= 6000000)
  992. Standard = HF_DVBC_6MHZ;
  993. else if (bw <= 7000000)
  994. Standard = HF_DVBC_7MHZ;
  995. else
  996. Standard = HF_DVBC_8MHZ;
  997. break;
  998. default:
  999. return -EINVAL;
  1000. }
  1001. do {
  1002. status = RFTrackingFiltersCorrection(state, state->m_Frequency);
  1003. if (status < 0)
  1004. break;
  1005. status = ChannelConfiguration(state, state->m_Frequency,
  1006. Standard);
  1007. if (status < 0)
  1008. break;
  1009. msleep(state->m_SettlingTime); /* Allow AGC's to settle down */
  1010. } while (0);
  1011. return status;
  1012. }
  1013. #if 0
  1014. static int GetSignalStrength(s32 *pSignalStrength, u32 RFAgc, u32 IFAgc)
  1015. {
  1016. if (IFAgc < 500) {
  1017. /* Scale this from 0 to 50000 */
  1018. *pSignalStrength = IFAgc * 100;
  1019. } else {
  1020. /* Scale range 500-1500 to 50000-80000 */
  1021. *pSignalStrength = 50000 + (IFAgc - 500) * 30;
  1022. }
  1023. return 0;
  1024. }
  1025. #endif
  1026. static int get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  1027. {
  1028. struct tda_state *state = fe->tuner_priv;
  1029. *frequency = state->IF;
  1030. return 0;
  1031. }
  1032. static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  1033. {
  1034. /* struct tda_state *state = fe->tuner_priv; */
  1035. /* *bandwidth = priv->bandwidth; */
  1036. return 0;
  1037. }
  1038. static struct dvb_tuner_ops tuner_ops = {
  1039. .info = {
  1040. .name = "NXP TDA18271C2D",
  1041. .frequency_min = 47125000,
  1042. .frequency_max = 865000000,
  1043. .frequency_step = 62500
  1044. },
  1045. .init = init,
  1046. .sleep = sleep,
  1047. .set_params = set_params,
  1048. .release = release,
  1049. .get_if_frequency = get_if_frequency,
  1050. .get_bandwidth = get_bandwidth,
  1051. };
  1052. struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe,
  1053. struct i2c_adapter *i2c, u8 adr)
  1054. {
  1055. struct tda_state *state;
  1056. state = kzalloc(sizeof(struct tda_state), GFP_KERNEL);
  1057. if (!state)
  1058. return NULL;
  1059. fe->tuner_priv = state;
  1060. state->adr = adr;
  1061. state->i2c = i2c;
  1062. memcpy(&fe->ops.tuner_ops, &tuner_ops, sizeof(struct dvb_tuner_ops));
  1063. reset(state);
  1064. InitCal(state);
  1065. return fe;
  1066. }
  1067. EXPORT_SYMBOL_GPL(tda18271c2dd_attach);
  1068. MODULE_DESCRIPTION("TDA18271C2 driver");
  1069. MODULE_AUTHOR("DD");
  1070. MODULE_LICENSE("GPL");