nouveau_gpio.c 9.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400
  1. /*
  2. * Copyright 2011 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include "drmP.h"
  25. #include "nouveau_drv.h"
  26. #include "nouveau_i2c.h"
  27. #include "nouveau_gpio.h"
  28. static u8 *
  29. dcb_gpio_table(struct drm_device *dev)
  30. {
  31. u8 *dcb = dcb_table(dev);
  32. if (dcb) {
  33. if (dcb[0] >= 0x30 && dcb[1] >= 0x0c)
  34. return ROMPTR(dev, dcb[0x0a]);
  35. if (dcb[0] >= 0x22 && dcb[-1] >= 0x13)
  36. return ROMPTR(dev, dcb[-15]);
  37. }
  38. return NULL;
  39. }
  40. static u8 *
  41. dcb_gpio_entry(struct drm_device *dev, int idx, int ent, u8 *version)
  42. {
  43. u8 *table = dcb_gpio_table(dev);
  44. if (table) {
  45. *version = table[0];
  46. if (*version < 0x30 && ent < table[2])
  47. return table + 3 + (ent * table[1]);
  48. else if (ent < table[2])
  49. return table + table[1] + (ent * table[3]);
  50. }
  51. return NULL;
  52. }
  53. int
  54. nouveau_gpio_drive(struct drm_device *dev, int idx, int line, int dir, int out)
  55. {
  56. struct drm_nouveau_private *dev_priv = dev->dev_private;
  57. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  58. return pgpio->drive ? pgpio->drive(dev, line, dir, out) : -ENODEV;
  59. }
  60. int
  61. nouveau_gpio_sense(struct drm_device *dev, int idx, int line)
  62. {
  63. struct drm_nouveau_private *dev_priv = dev->dev_private;
  64. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  65. return pgpio->sense ? pgpio->sense(dev, line) : -ENODEV;
  66. }
  67. int
  68. nouveau_gpio_find(struct drm_device *dev, int idx, u8 func, u8 line,
  69. struct gpio_func *gpio)
  70. {
  71. u8 *table, *entry, version;
  72. int i = -1;
  73. if (line == 0xff && func == 0xff)
  74. return -EINVAL;
  75. while ((entry = dcb_gpio_entry(dev, idx, ++i, &version))) {
  76. if (version < 0x40) {
  77. u16 data = ROM16(entry[0]);
  78. *gpio = (struct gpio_func) {
  79. .line = (data & 0x001f) >> 0,
  80. .func = (data & 0x07e0) >> 5,
  81. .log[0] = (data & 0x1800) >> 11,
  82. .log[1] = (data & 0x6000) >> 13,
  83. };
  84. } else
  85. if (version < 0x41) {
  86. *gpio = (struct gpio_func) {
  87. .line = entry[0] & 0x1f,
  88. .func = entry[1],
  89. .log[0] = (entry[3] & 0x18) >> 3,
  90. .log[1] = (entry[3] & 0x60) >> 5,
  91. };
  92. } else {
  93. *gpio = (struct gpio_func) {
  94. .line = entry[0] & 0x3f,
  95. .func = entry[1],
  96. .log[0] = (entry[4] & 0x30) >> 4,
  97. .log[1] = (entry[4] & 0xc0) >> 6,
  98. };
  99. }
  100. if ((line == 0xff || line == gpio->line) &&
  101. (func == 0xff || func == gpio->func))
  102. return 0;
  103. }
  104. /* DCB 2.2, fixed TVDAC GPIO data */
  105. if ((table = dcb_table(dev)) && table[0] >= 0x22) {
  106. if (func == DCB_GPIO_TVDAC0) {
  107. *gpio = (struct gpio_func) {
  108. .func = DCB_GPIO_TVDAC0,
  109. .line = table[-4] >> 4,
  110. .log[0] = !!(table[-5] & 2),
  111. .log[1] = !(table[-5] & 2),
  112. };
  113. return 0;
  114. }
  115. }
  116. /* Apple iMac G4 NV18 */
  117. if (nv_match_device(dev, 0x0189, 0x10de, 0x0010)) {
  118. if (func == DCB_GPIO_TVDAC0) {
  119. *gpio = (struct gpio_func) {
  120. .func = DCB_GPIO_TVDAC0,
  121. .line = 4,
  122. .log[0] = 0,
  123. .log[1] = 1,
  124. };
  125. return 0;
  126. }
  127. }
  128. return -EINVAL;
  129. }
  130. int
  131. nouveau_gpio_set(struct drm_device *dev, int idx, u8 tag, u8 line, int state)
  132. {
  133. struct gpio_func gpio;
  134. int ret;
  135. ret = nouveau_gpio_find(dev, idx, tag, line, &gpio);
  136. if (ret == 0) {
  137. int dir = !!(gpio.log[state] & 0x02);
  138. int out = !!(gpio.log[state] & 0x01);
  139. ret = nouveau_gpio_drive(dev, idx, gpio.line, dir, out);
  140. }
  141. return ret;
  142. }
  143. int
  144. nouveau_gpio_get(struct drm_device *dev, int idx, u8 tag, u8 line)
  145. {
  146. struct gpio_func gpio;
  147. int ret;
  148. ret = nouveau_gpio_find(dev, idx, tag, line, &gpio);
  149. if (ret == 0) {
  150. ret = nouveau_gpio_sense(dev, idx, gpio.line);
  151. if (ret >= 0)
  152. ret = (ret == (gpio.log[1] & 1));
  153. }
  154. return ret;
  155. }
  156. int
  157. nouveau_gpio_irq(struct drm_device *dev, int idx, u8 tag, u8 line, bool on)
  158. {
  159. struct drm_nouveau_private *dev_priv = dev->dev_private;
  160. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  161. struct gpio_func gpio;
  162. int ret;
  163. ret = nouveau_gpio_find(dev, idx, tag, line, &gpio);
  164. if (ret == 0) {
  165. if (idx == 0 && pgpio->irq_enable)
  166. pgpio->irq_enable(dev, gpio.line, on);
  167. else
  168. ret = -ENODEV;
  169. }
  170. return ret;
  171. }
  172. struct gpio_isr {
  173. struct drm_device *dev;
  174. struct list_head head;
  175. struct work_struct work;
  176. int idx;
  177. struct gpio_func func;
  178. void (*handler)(void *, int);
  179. void *data;
  180. bool inhibit;
  181. };
  182. static void
  183. nouveau_gpio_isr_bh(struct work_struct *work)
  184. {
  185. struct gpio_isr *isr = container_of(work, struct gpio_isr, work);
  186. struct drm_device *dev = isr->dev;
  187. struct drm_nouveau_private *dev_priv = dev->dev_private;
  188. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  189. unsigned long flags;
  190. int state;
  191. state = nouveau_gpio_get(dev, isr->idx, isr->func.func, isr->func.line);
  192. if (state >= 0)
  193. isr->handler(isr->data, state);
  194. spin_lock_irqsave(&pgpio->lock, flags);
  195. isr->inhibit = false;
  196. spin_unlock_irqrestore(&pgpio->lock, flags);
  197. }
  198. void
  199. nouveau_gpio_isr(struct drm_device *dev, int idx, u32 line_mask)
  200. {
  201. struct drm_nouveau_private *dev_priv = dev->dev_private;
  202. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  203. struct gpio_isr *isr;
  204. if (idx != 0)
  205. return;
  206. spin_lock(&pgpio->lock);
  207. list_for_each_entry(isr, &pgpio->isr, head) {
  208. if (line_mask & (1 << isr->func.line)) {
  209. if (isr->inhibit)
  210. continue;
  211. isr->inhibit = true;
  212. schedule_work(&isr->work);
  213. }
  214. }
  215. spin_unlock(&pgpio->lock);
  216. }
  217. int
  218. nouveau_gpio_isr_add(struct drm_device *dev, int idx, u8 tag, u8 line,
  219. void (*handler)(void *, int), void *data)
  220. {
  221. struct drm_nouveau_private *dev_priv = dev->dev_private;
  222. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  223. struct gpio_isr *isr;
  224. unsigned long flags;
  225. int ret;
  226. isr = kzalloc(sizeof(*isr), GFP_KERNEL);
  227. if (!isr)
  228. return -ENOMEM;
  229. ret = nouveau_gpio_find(dev, idx, tag, line, &isr->func);
  230. if (ret) {
  231. kfree(isr);
  232. return ret;
  233. }
  234. INIT_WORK(&isr->work, nouveau_gpio_isr_bh);
  235. isr->dev = dev;
  236. isr->handler = handler;
  237. isr->data = data;
  238. isr->idx = idx;
  239. spin_lock_irqsave(&pgpio->lock, flags);
  240. list_add(&isr->head, &pgpio->isr);
  241. spin_unlock_irqrestore(&pgpio->lock, flags);
  242. return 0;
  243. }
  244. void
  245. nouveau_gpio_isr_del(struct drm_device *dev, int idx, u8 tag, u8 line,
  246. void (*handler)(void *, int), void *data)
  247. {
  248. struct drm_nouveau_private *dev_priv = dev->dev_private;
  249. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  250. struct gpio_isr *isr, *tmp;
  251. struct gpio_func func;
  252. unsigned long flags;
  253. LIST_HEAD(tofree);
  254. int ret;
  255. ret = nouveau_gpio_find(dev, idx, tag, line, &func);
  256. if (ret == 0) {
  257. spin_lock_irqsave(&pgpio->lock, flags);
  258. list_for_each_entry_safe(isr, tmp, &pgpio->isr, head) {
  259. if (memcmp(&isr->func, &func, sizeof(func)) ||
  260. isr->idx != idx ||
  261. isr->handler != handler || isr->data != data)
  262. continue;
  263. list_move(&isr->head, &tofree);
  264. }
  265. spin_unlock_irqrestore(&pgpio->lock, flags);
  266. list_for_each_entry_safe(isr, tmp, &tofree, head) {
  267. flush_work_sync(&isr->work);
  268. kfree(isr);
  269. }
  270. }
  271. }
  272. int
  273. nouveau_gpio_create(struct drm_device *dev)
  274. {
  275. struct drm_nouveau_private *dev_priv = dev->dev_private;
  276. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  277. INIT_LIST_HEAD(&pgpio->isr);
  278. spin_lock_init(&pgpio->lock);
  279. return nouveau_gpio_init(dev);
  280. }
  281. void
  282. nouveau_gpio_destroy(struct drm_device *dev)
  283. {
  284. struct drm_nouveau_private *dev_priv = dev->dev_private;
  285. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  286. nouveau_gpio_fini(dev);
  287. BUG_ON(!list_empty(&pgpio->isr));
  288. }
  289. int
  290. nouveau_gpio_init(struct drm_device *dev)
  291. {
  292. struct drm_nouveau_private *dev_priv = dev->dev_private;
  293. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  294. int ret = 0;
  295. if (pgpio->init)
  296. ret = pgpio->init(dev);
  297. return ret;
  298. }
  299. void
  300. nouveau_gpio_fini(struct drm_device *dev)
  301. {
  302. struct drm_nouveau_private *dev_priv = dev->dev_private;
  303. struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
  304. if (pgpio->fini)
  305. pgpio->fini(dev);
  306. }
  307. void
  308. nouveau_gpio_reset(struct drm_device *dev)
  309. {
  310. struct drm_nouveau_private *dev_priv = dev->dev_private;
  311. u8 *entry, version;
  312. int ent = -1;
  313. while ((entry = dcb_gpio_entry(dev, 0, ++ent, &version))) {
  314. u8 func = 0xff, line, defs, unk0, unk1;
  315. if (version >= 0x41) {
  316. defs = !!(entry[0] & 0x80);
  317. line = entry[0] & 0x3f;
  318. func = entry[1];
  319. unk0 = entry[2];
  320. unk1 = entry[3] & 0x1f;
  321. } else
  322. if (version >= 0x40) {
  323. line = entry[0] & 0x1f;
  324. func = entry[1];
  325. defs = !!(entry[3] & 0x01);
  326. unk0 = !!(entry[3] & 0x02);
  327. unk1 = !!(entry[3] & 0x04);
  328. } else {
  329. break;
  330. }
  331. if (func == 0xff)
  332. continue;
  333. nouveau_gpio_func_set(dev, func, defs);
  334. if (dev_priv->card_type >= NV_D0) {
  335. nv_mask(dev, 0x00d610 + (line * 4), 0xff, unk0);
  336. if (unk1--)
  337. nv_mask(dev, 0x00d640 + (unk1 * 4), 0xff, line);
  338. } else
  339. if (dev_priv->card_type >= NV_50) {
  340. static const u32 regs[] = { 0xe100, 0xe28c };
  341. u32 val = (unk1 << 16) | unk0;
  342. u32 reg = regs[line >> 4]; line &= 0x0f;
  343. nv_mask(dev, reg, 0x00010001 << line, val << line);
  344. }
  345. }
  346. }