nouveau_fence.c 14 KB

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  1. /*
  2. * Copyright (C) 2007 Ben Skeggs.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include <linux/ktime.h>
  29. #include <linux/hrtimer.h>
  30. #include "nouveau_drv.h"
  31. #include "nouveau_ramht.h"
  32. #include "nouveau_dma.h"
  33. #define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
  34. #define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17)
  35. struct nouveau_fence {
  36. struct nouveau_channel *channel;
  37. struct kref refcount;
  38. struct list_head entry;
  39. uint32_t sequence;
  40. bool signalled;
  41. void (*work)(void *priv, bool signalled);
  42. void *priv;
  43. };
  44. struct nouveau_semaphore {
  45. struct kref ref;
  46. struct drm_device *dev;
  47. struct drm_mm_node *mem;
  48. };
  49. static inline struct nouveau_fence *
  50. nouveau_fence(void *sync_obj)
  51. {
  52. return (struct nouveau_fence *)sync_obj;
  53. }
  54. static void
  55. nouveau_fence_del(struct kref *ref)
  56. {
  57. struct nouveau_fence *fence =
  58. container_of(ref, struct nouveau_fence, refcount);
  59. nouveau_channel_ref(NULL, &fence->channel);
  60. kfree(fence);
  61. }
  62. void
  63. nouveau_fence_update(struct nouveau_channel *chan)
  64. {
  65. struct drm_device *dev = chan->dev;
  66. struct nouveau_fence *tmp, *fence;
  67. uint32_t sequence;
  68. spin_lock(&chan->fence.lock);
  69. /* Fetch the last sequence if the channel is still up and running */
  70. if (likely(!list_empty(&chan->fence.pending))) {
  71. if (USE_REFCNT(dev))
  72. sequence = nvchan_rd32(chan, 0x48);
  73. else
  74. sequence = atomic_read(&chan->fence.last_sequence_irq);
  75. if (chan->fence.sequence_ack == sequence)
  76. goto out;
  77. chan->fence.sequence_ack = sequence;
  78. }
  79. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  80. if (fence->sequence > chan->fence.sequence_ack)
  81. break;
  82. fence->signalled = true;
  83. list_del(&fence->entry);
  84. if (fence->work)
  85. fence->work(fence->priv, true);
  86. kref_put(&fence->refcount, nouveau_fence_del);
  87. }
  88. out:
  89. spin_unlock(&chan->fence.lock);
  90. }
  91. int
  92. nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
  93. bool emit)
  94. {
  95. struct nouveau_fence *fence;
  96. int ret = 0;
  97. fence = kzalloc(sizeof(*fence), GFP_KERNEL);
  98. if (!fence)
  99. return -ENOMEM;
  100. kref_init(&fence->refcount);
  101. nouveau_channel_ref(chan, &fence->channel);
  102. if (emit)
  103. ret = nouveau_fence_emit(fence);
  104. if (ret)
  105. nouveau_fence_unref(&fence);
  106. *pfence = fence;
  107. return ret;
  108. }
  109. struct nouveau_channel *
  110. nouveau_fence_channel(struct nouveau_fence *fence)
  111. {
  112. return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
  113. }
  114. int
  115. nouveau_fence_emit(struct nouveau_fence *fence)
  116. {
  117. struct nouveau_channel *chan = fence->channel;
  118. struct drm_device *dev = chan->dev;
  119. struct drm_nouveau_private *dev_priv = dev->dev_private;
  120. int ret;
  121. ret = RING_SPACE(chan, 2);
  122. if (ret)
  123. return ret;
  124. if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
  125. nouveau_fence_update(chan);
  126. BUG_ON(chan->fence.sequence ==
  127. chan->fence.sequence_ack - 1);
  128. }
  129. fence->sequence = ++chan->fence.sequence;
  130. kref_get(&fence->refcount);
  131. spin_lock(&chan->fence.lock);
  132. list_add_tail(&fence->entry, &chan->fence.pending);
  133. spin_unlock(&chan->fence.lock);
  134. if (USE_REFCNT(dev)) {
  135. if (dev_priv->card_type < NV_C0)
  136. BEGIN_RING(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  137. else
  138. BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);
  139. } else {
  140. BEGIN_RING(chan, NvSubSw, 0x0150, 1);
  141. }
  142. OUT_RING (chan, fence->sequence);
  143. FIRE_RING(chan);
  144. return 0;
  145. }
  146. void
  147. nouveau_fence_work(struct nouveau_fence *fence,
  148. void (*work)(void *priv, bool signalled),
  149. void *priv)
  150. {
  151. BUG_ON(fence->work);
  152. spin_lock(&fence->channel->fence.lock);
  153. if (fence->signalled) {
  154. work(priv, true);
  155. } else {
  156. fence->work = work;
  157. fence->priv = priv;
  158. }
  159. spin_unlock(&fence->channel->fence.lock);
  160. }
  161. void
  162. __nouveau_fence_unref(void **sync_obj)
  163. {
  164. struct nouveau_fence *fence = nouveau_fence(*sync_obj);
  165. if (fence)
  166. kref_put(&fence->refcount, nouveau_fence_del);
  167. *sync_obj = NULL;
  168. }
  169. void *
  170. __nouveau_fence_ref(void *sync_obj)
  171. {
  172. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  173. kref_get(&fence->refcount);
  174. return sync_obj;
  175. }
  176. bool
  177. __nouveau_fence_signalled(void *sync_obj, void *sync_arg)
  178. {
  179. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  180. struct nouveau_channel *chan = fence->channel;
  181. if (fence->signalled)
  182. return true;
  183. nouveau_fence_update(chan);
  184. return fence->signalled;
  185. }
  186. int
  187. __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
  188. {
  189. unsigned long timeout = jiffies + (3 * DRM_HZ);
  190. unsigned long sleep_time = NSEC_PER_MSEC / 1000;
  191. ktime_t t;
  192. int ret = 0;
  193. while (1) {
  194. if (__nouveau_fence_signalled(sync_obj, sync_arg))
  195. break;
  196. if (time_after_eq(jiffies, timeout)) {
  197. ret = -EBUSY;
  198. break;
  199. }
  200. __set_current_state(intr ? TASK_INTERRUPTIBLE
  201. : TASK_UNINTERRUPTIBLE);
  202. if (lazy) {
  203. t = ktime_set(0, sleep_time);
  204. schedule_hrtimeout(&t, HRTIMER_MODE_REL);
  205. sleep_time *= 2;
  206. if (sleep_time > NSEC_PER_MSEC)
  207. sleep_time = NSEC_PER_MSEC;
  208. }
  209. if (intr && signal_pending(current)) {
  210. ret = -ERESTARTSYS;
  211. break;
  212. }
  213. }
  214. __set_current_state(TASK_RUNNING);
  215. return ret;
  216. }
  217. static struct nouveau_semaphore *
  218. semaphore_alloc(struct drm_device *dev)
  219. {
  220. struct drm_nouveau_private *dev_priv = dev->dev_private;
  221. struct nouveau_semaphore *sema;
  222. int size = (dev_priv->chipset < 0x84) ? 4 : 16;
  223. int ret, i;
  224. if (!USE_SEMA(dev))
  225. return NULL;
  226. sema = kmalloc(sizeof(*sema), GFP_KERNEL);
  227. if (!sema)
  228. goto fail;
  229. ret = drm_mm_pre_get(&dev_priv->fence.heap);
  230. if (ret)
  231. goto fail;
  232. spin_lock(&dev_priv->fence.lock);
  233. sema->mem = drm_mm_search_free(&dev_priv->fence.heap, size, 0, 0);
  234. if (sema->mem)
  235. sema->mem = drm_mm_get_block_atomic(sema->mem, size, 0);
  236. spin_unlock(&dev_priv->fence.lock);
  237. if (!sema->mem)
  238. goto fail;
  239. kref_init(&sema->ref);
  240. sema->dev = dev;
  241. for (i = sema->mem->start; i < sema->mem->start + size; i += 4)
  242. nouveau_bo_wr32(dev_priv->fence.bo, i / 4, 0);
  243. return sema;
  244. fail:
  245. kfree(sema);
  246. return NULL;
  247. }
  248. static void
  249. semaphore_free(struct kref *ref)
  250. {
  251. struct nouveau_semaphore *sema =
  252. container_of(ref, struct nouveau_semaphore, ref);
  253. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  254. spin_lock(&dev_priv->fence.lock);
  255. drm_mm_put_block(sema->mem);
  256. spin_unlock(&dev_priv->fence.lock);
  257. kfree(sema);
  258. }
  259. static void
  260. semaphore_work(void *priv, bool signalled)
  261. {
  262. struct nouveau_semaphore *sema = priv;
  263. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  264. if (unlikely(!signalled))
  265. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
  266. kref_put(&sema->ref, semaphore_free);
  267. }
  268. static int
  269. semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  270. {
  271. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  272. struct nouveau_fence *fence = NULL;
  273. u64 offset = chan->fence.vma.offset + sema->mem->start;
  274. int ret;
  275. if (dev_priv->chipset < 0x84) {
  276. ret = RING_SPACE(chan, 4);
  277. if (ret)
  278. return ret;
  279. BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);
  280. OUT_RING (chan, NvSema);
  281. OUT_RING (chan, offset);
  282. OUT_RING (chan, 1);
  283. } else
  284. if (dev_priv->chipset < 0xc0) {
  285. ret = RING_SPACE(chan, 7);
  286. if (ret)
  287. return ret;
  288. BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
  289. OUT_RING (chan, chan->vram_handle);
  290. BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  291. OUT_RING (chan, upper_32_bits(offset));
  292. OUT_RING (chan, lower_32_bits(offset));
  293. OUT_RING (chan, 1);
  294. OUT_RING (chan, 1); /* ACQUIRE_EQ */
  295. } else {
  296. ret = RING_SPACE(chan, 5);
  297. if (ret)
  298. return ret;
  299. BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  300. OUT_RING (chan, upper_32_bits(offset));
  301. OUT_RING (chan, lower_32_bits(offset));
  302. OUT_RING (chan, 1);
  303. OUT_RING (chan, 0x1001); /* ACQUIRE_EQ */
  304. }
  305. /* Delay semaphore destruction until its work is done */
  306. ret = nouveau_fence_new(chan, &fence, true);
  307. if (ret)
  308. return ret;
  309. kref_get(&sema->ref);
  310. nouveau_fence_work(fence, semaphore_work, sema);
  311. nouveau_fence_unref(&fence);
  312. return 0;
  313. }
  314. static int
  315. semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  316. {
  317. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  318. struct nouveau_fence *fence = NULL;
  319. u64 offset = chan->fence.vma.offset + sema->mem->start;
  320. int ret;
  321. if (dev_priv->chipset < 0x84) {
  322. ret = RING_SPACE(chan, 5);
  323. if (ret)
  324. return ret;
  325. BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);
  326. OUT_RING (chan, NvSema);
  327. OUT_RING (chan, offset);
  328. BEGIN_RING(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);
  329. OUT_RING (chan, 1);
  330. } else
  331. if (dev_priv->chipset < 0xc0) {
  332. ret = RING_SPACE(chan, 7);
  333. if (ret)
  334. return ret;
  335. BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
  336. OUT_RING (chan, chan->vram_handle);
  337. BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  338. OUT_RING (chan, upper_32_bits(offset));
  339. OUT_RING (chan, lower_32_bits(offset));
  340. OUT_RING (chan, 1);
  341. OUT_RING (chan, 2); /* RELEASE */
  342. } else {
  343. ret = RING_SPACE(chan, 5);
  344. if (ret)
  345. return ret;
  346. BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  347. OUT_RING (chan, upper_32_bits(offset));
  348. OUT_RING (chan, lower_32_bits(offset));
  349. OUT_RING (chan, 1);
  350. OUT_RING (chan, 0x1002); /* RELEASE */
  351. }
  352. /* Delay semaphore destruction until its work is done */
  353. ret = nouveau_fence_new(chan, &fence, true);
  354. if (ret)
  355. return ret;
  356. kref_get(&sema->ref);
  357. nouveau_fence_work(fence, semaphore_work, sema);
  358. nouveau_fence_unref(&fence);
  359. return 0;
  360. }
  361. int
  362. nouveau_fence_sync(struct nouveau_fence *fence,
  363. struct nouveau_channel *wchan)
  364. {
  365. struct nouveau_channel *chan = nouveau_fence_channel(fence);
  366. struct drm_device *dev = wchan->dev;
  367. struct nouveau_semaphore *sema;
  368. int ret = 0;
  369. if (likely(!chan || chan == wchan ||
  370. nouveau_fence_signalled(fence)))
  371. goto out;
  372. sema = semaphore_alloc(dev);
  373. if (!sema) {
  374. /* Early card or broken userspace, fall back to
  375. * software sync. */
  376. ret = nouveau_fence_wait(fence, true, false);
  377. goto out;
  378. }
  379. /* try to take chan's mutex, if we can't take it right away
  380. * we have to fallback to software sync to prevent locking
  381. * order issues
  382. */
  383. if (!mutex_trylock(&chan->mutex)) {
  384. ret = nouveau_fence_wait(fence, true, false);
  385. goto out_unref;
  386. }
  387. /* Make wchan wait until it gets signalled */
  388. ret = semaphore_acquire(wchan, sema);
  389. if (ret)
  390. goto out_unlock;
  391. /* Signal the semaphore from chan */
  392. ret = semaphore_release(chan, sema);
  393. out_unlock:
  394. mutex_unlock(&chan->mutex);
  395. out_unref:
  396. kref_put(&sema->ref, semaphore_free);
  397. out:
  398. if (chan)
  399. nouveau_channel_put_unlocked(&chan);
  400. return ret;
  401. }
  402. int
  403. __nouveau_fence_flush(void *sync_obj, void *sync_arg)
  404. {
  405. return 0;
  406. }
  407. int
  408. nouveau_fence_channel_init(struct nouveau_channel *chan)
  409. {
  410. struct drm_device *dev = chan->dev;
  411. struct drm_nouveau_private *dev_priv = dev->dev_private;
  412. struct nouveau_gpuobj *obj = NULL;
  413. int ret;
  414. if (dev_priv->card_type < NV_C0) {
  415. /* Create an NV_SW object for various sync purposes */
  416. ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
  417. if (ret)
  418. return ret;
  419. ret = RING_SPACE(chan, 2);
  420. if (ret)
  421. return ret;
  422. BEGIN_RING(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);
  423. OUT_RING (chan, NvSw);
  424. FIRE_RING (chan);
  425. }
  426. /* Setup area of memory shared between all channels for x-chan sync */
  427. if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
  428. struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
  429. ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,
  430. mem->start << PAGE_SHIFT,
  431. mem->size, NV_MEM_ACCESS_RW,
  432. NV_MEM_TARGET_VRAM, &obj);
  433. if (ret)
  434. return ret;
  435. ret = nouveau_ramht_insert(chan, NvSema, obj);
  436. nouveau_gpuobj_ref(NULL, &obj);
  437. if (ret)
  438. return ret;
  439. } else
  440. if (USE_SEMA(dev)) {
  441. /* map fence bo into channel's vm */
  442. ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm,
  443. &chan->fence.vma);
  444. if (ret)
  445. return ret;
  446. }
  447. atomic_set(&chan->fence.last_sequence_irq, 0);
  448. return 0;
  449. }
  450. void
  451. nouveau_fence_channel_fini(struct nouveau_channel *chan)
  452. {
  453. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  454. struct nouveau_fence *tmp, *fence;
  455. spin_lock(&chan->fence.lock);
  456. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  457. fence->signalled = true;
  458. list_del(&fence->entry);
  459. if (unlikely(fence->work))
  460. fence->work(fence->priv, false);
  461. kref_put(&fence->refcount, nouveau_fence_del);
  462. }
  463. spin_unlock(&chan->fence.lock);
  464. nouveau_bo_vma_del(dev_priv->fence.bo, &chan->fence.vma);
  465. }
  466. int
  467. nouveau_fence_init(struct drm_device *dev)
  468. {
  469. struct drm_nouveau_private *dev_priv = dev->dev_private;
  470. int size = (dev_priv->chipset < 0x84) ? 4096 : 16384;
  471. int ret;
  472. /* Create a shared VRAM heap for cross-channel sync. */
  473. if (USE_SEMA(dev)) {
  474. ret = nouveau_bo_new(dev, size, 0, TTM_PL_FLAG_VRAM,
  475. 0, 0, &dev_priv->fence.bo);
  476. if (ret)
  477. return ret;
  478. ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
  479. if (ret)
  480. goto fail;
  481. ret = nouveau_bo_map(dev_priv->fence.bo);
  482. if (ret)
  483. goto fail;
  484. ret = drm_mm_init(&dev_priv->fence.heap, 0,
  485. dev_priv->fence.bo->bo.mem.size);
  486. if (ret)
  487. goto fail;
  488. spin_lock_init(&dev_priv->fence.lock);
  489. }
  490. return 0;
  491. fail:
  492. nouveau_bo_unmap(dev_priv->fence.bo);
  493. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  494. return ret;
  495. }
  496. void
  497. nouveau_fence_fini(struct drm_device *dev)
  498. {
  499. struct drm_nouveau_private *dev_priv = dev->dev_private;
  500. if (USE_SEMA(dev)) {
  501. drm_mm_takedown(&dev_priv->fence.heap);
  502. nouveau_bo_unmap(dev_priv->fence.bo);
  503. nouveau_bo_unpin(dev_priv->fence.bo);
  504. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  505. }
  506. }