tpm_tis.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893
  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. *
  4. * Authors:
  5. * Leendert van Doorn <leendert@watson.ibm.com>
  6. * Kylene Hall <kjhall@us.ibm.com>
  7. *
  8. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  9. *
  10. * Device driver for TCG/TCPA TPM (trusted platform module).
  11. * Specifications at www.trustedcomputinggroup.org
  12. *
  13. * This device driver implements the TPM interface as defined in
  14. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation, version 2 of the
  19. * License.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/pnp.h>
  25. #include <linux/slab.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/wait.h>
  28. #include <linux/acpi.h>
  29. #include <linux/freezer.h>
  30. #include "tpm.h"
  31. enum tis_access {
  32. TPM_ACCESS_VALID = 0x80,
  33. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  34. TPM_ACCESS_REQUEST_PENDING = 0x04,
  35. TPM_ACCESS_REQUEST_USE = 0x02,
  36. };
  37. enum tis_status {
  38. TPM_STS_VALID = 0x80,
  39. TPM_STS_COMMAND_READY = 0x40,
  40. TPM_STS_GO = 0x20,
  41. TPM_STS_DATA_AVAIL = 0x10,
  42. TPM_STS_DATA_EXPECT = 0x08,
  43. };
  44. enum tis_int_flags {
  45. TPM_GLOBAL_INT_ENABLE = 0x80000000,
  46. TPM_INTF_BURST_COUNT_STATIC = 0x100,
  47. TPM_INTF_CMD_READY_INT = 0x080,
  48. TPM_INTF_INT_EDGE_FALLING = 0x040,
  49. TPM_INTF_INT_EDGE_RISING = 0x020,
  50. TPM_INTF_INT_LEVEL_LOW = 0x010,
  51. TPM_INTF_INT_LEVEL_HIGH = 0x008,
  52. TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  53. TPM_INTF_STS_VALID_INT = 0x002,
  54. TPM_INTF_DATA_AVAIL_INT = 0x001,
  55. };
  56. enum tis_defaults {
  57. TIS_MEM_BASE = 0xFED40000,
  58. TIS_MEM_LEN = 0x5000,
  59. TIS_SHORT_TIMEOUT = 750, /* ms */
  60. TIS_LONG_TIMEOUT = 2000, /* 2 sec */
  61. };
  62. #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
  63. #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
  64. #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
  65. #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
  66. #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
  67. #define TPM_STS(l) (0x0018 | ((l) << 12))
  68. #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
  69. #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
  70. #define TPM_RID(l) (0x0F04 | ((l) << 12))
  71. static LIST_HEAD(tis_chips);
  72. static DEFINE_MUTEX(tis_lock);
  73. #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
  74. static int is_itpm(struct pnp_dev *dev)
  75. {
  76. struct acpi_device *acpi = pnp_acpi_device(dev);
  77. struct acpi_hardware_id *id;
  78. list_for_each_entry(id, &acpi->pnp.ids, list) {
  79. if (!strcmp("INTC0102", id->id))
  80. return 1;
  81. }
  82. return 0;
  83. }
  84. #else
  85. static inline int is_itpm(struct pnp_dev *dev)
  86. {
  87. return 0;
  88. }
  89. #endif
  90. static int check_locality(struct tpm_chip *chip, int l)
  91. {
  92. if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  93. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  94. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  95. return chip->vendor.locality = l;
  96. return -1;
  97. }
  98. static void release_locality(struct tpm_chip *chip, int l, int force)
  99. {
  100. if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  101. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  102. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  103. iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
  104. chip->vendor.iobase + TPM_ACCESS(l));
  105. }
  106. static int request_locality(struct tpm_chip *chip, int l)
  107. {
  108. unsigned long stop, timeout;
  109. long rc;
  110. if (check_locality(chip, l) >= 0)
  111. return l;
  112. iowrite8(TPM_ACCESS_REQUEST_USE,
  113. chip->vendor.iobase + TPM_ACCESS(l));
  114. stop = jiffies + chip->vendor.timeout_a;
  115. if (chip->vendor.irq) {
  116. again:
  117. timeout = stop - jiffies;
  118. if ((long)timeout <= 0)
  119. return -1;
  120. rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
  121. (check_locality
  122. (chip, l) >= 0),
  123. timeout);
  124. if (rc > 0)
  125. return l;
  126. if (rc == -ERESTARTSYS && freezing(current)) {
  127. clear_thread_flag(TIF_SIGPENDING);
  128. goto again;
  129. }
  130. } else {
  131. /* wait for burstcount */
  132. do {
  133. if (check_locality(chip, l) >= 0)
  134. return l;
  135. msleep(TPM_TIMEOUT);
  136. }
  137. while (time_before(jiffies, stop));
  138. }
  139. return -1;
  140. }
  141. static u8 tpm_tis_status(struct tpm_chip *chip)
  142. {
  143. return ioread8(chip->vendor.iobase +
  144. TPM_STS(chip->vendor.locality));
  145. }
  146. static void tpm_tis_ready(struct tpm_chip *chip)
  147. {
  148. /* this causes the current command to be aborted */
  149. iowrite8(TPM_STS_COMMAND_READY,
  150. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  151. }
  152. static int get_burstcount(struct tpm_chip *chip)
  153. {
  154. unsigned long stop;
  155. int burstcnt;
  156. /* wait for burstcount */
  157. /* which timeout value, spec has 2 answers (c & d) */
  158. stop = jiffies + chip->vendor.timeout_d;
  159. do {
  160. burstcnt = ioread8(chip->vendor.iobase +
  161. TPM_STS(chip->vendor.locality) + 1);
  162. burstcnt += ioread8(chip->vendor.iobase +
  163. TPM_STS(chip->vendor.locality) +
  164. 2) << 8;
  165. if (burstcnt)
  166. return burstcnt;
  167. msleep(TPM_TIMEOUT);
  168. } while (time_before(jiffies, stop));
  169. return -EBUSY;
  170. }
  171. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  172. {
  173. int size = 0, burstcnt;
  174. while (size < count &&
  175. wait_for_tpm_stat(chip,
  176. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  177. chip->vendor.timeout_c,
  178. &chip->vendor.read_queue)
  179. == 0) {
  180. burstcnt = get_burstcount(chip);
  181. for (; burstcnt > 0 && size < count; burstcnt--)
  182. buf[size++] = ioread8(chip->vendor.iobase +
  183. TPM_DATA_FIFO(chip->vendor.
  184. locality));
  185. }
  186. return size;
  187. }
  188. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  189. {
  190. int size = 0;
  191. int expected, status;
  192. if (count < TPM_HEADER_SIZE) {
  193. size = -EIO;
  194. goto out;
  195. }
  196. /* read first 10 bytes, including tag, paramsize, and result */
  197. if ((size =
  198. recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
  199. dev_err(chip->dev, "Unable to read header\n");
  200. goto out;
  201. }
  202. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  203. if (expected > count) {
  204. size = -EIO;
  205. goto out;
  206. }
  207. if ((size +=
  208. recv_data(chip, &buf[TPM_HEADER_SIZE],
  209. expected - TPM_HEADER_SIZE)) < expected) {
  210. dev_err(chip->dev, "Unable to read remainder of result\n");
  211. size = -ETIME;
  212. goto out;
  213. }
  214. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  215. &chip->vendor.int_queue);
  216. status = tpm_tis_status(chip);
  217. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  218. dev_err(chip->dev, "Error left over data\n");
  219. size = -EIO;
  220. goto out;
  221. }
  222. out:
  223. tpm_tis_ready(chip);
  224. release_locality(chip, chip->vendor.locality, 0);
  225. return size;
  226. }
  227. static bool itpm;
  228. module_param(itpm, bool, 0444);
  229. MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
  230. /*
  231. * If interrupts are used (signaled by an irq set in the vendor structure)
  232. * tpm.c can skip polling for the data to be available as the interrupt is
  233. * waited for here
  234. */
  235. static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
  236. {
  237. int rc, status, burstcnt;
  238. size_t count = 0;
  239. if (request_locality(chip, 0) < 0)
  240. return -EBUSY;
  241. status = tpm_tis_status(chip);
  242. if ((status & TPM_STS_COMMAND_READY) == 0) {
  243. tpm_tis_ready(chip);
  244. if (wait_for_tpm_stat
  245. (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
  246. &chip->vendor.int_queue) < 0) {
  247. rc = -ETIME;
  248. goto out_err;
  249. }
  250. }
  251. while (count < len - 1) {
  252. burstcnt = get_burstcount(chip);
  253. for (; burstcnt > 0 && count < len - 1; burstcnt--) {
  254. iowrite8(buf[count], chip->vendor.iobase +
  255. TPM_DATA_FIFO(chip->vendor.locality));
  256. count++;
  257. }
  258. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  259. &chip->vendor.int_queue);
  260. status = tpm_tis_status(chip);
  261. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  262. rc = -EIO;
  263. goto out_err;
  264. }
  265. }
  266. /* write last byte */
  267. iowrite8(buf[count],
  268. chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
  269. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  270. &chip->vendor.int_queue);
  271. status = tpm_tis_status(chip);
  272. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  273. rc = -EIO;
  274. goto out_err;
  275. }
  276. return 0;
  277. out_err:
  278. tpm_tis_ready(chip);
  279. release_locality(chip, chip->vendor.locality, 0);
  280. return rc;
  281. }
  282. /*
  283. * If interrupts are used (signaled by an irq set in the vendor structure)
  284. * tpm.c can skip polling for the data to be available as the interrupt is
  285. * waited for here
  286. */
  287. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  288. {
  289. int rc;
  290. u32 ordinal;
  291. rc = tpm_tis_send_data(chip, buf, len);
  292. if (rc < 0)
  293. return rc;
  294. /* go and do it */
  295. iowrite8(TPM_STS_GO,
  296. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  297. if (chip->vendor.irq) {
  298. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  299. if (wait_for_tpm_stat
  300. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  301. tpm_calc_ordinal_duration(chip, ordinal),
  302. &chip->vendor.read_queue) < 0) {
  303. rc = -ETIME;
  304. goto out_err;
  305. }
  306. }
  307. return len;
  308. out_err:
  309. tpm_tis_ready(chip);
  310. release_locality(chip, chip->vendor.locality, 0);
  311. return rc;
  312. }
  313. /*
  314. * Early probing for iTPM with STS_DATA_EXPECT flaw.
  315. * Try sending command without itpm flag set and if that
  316. * fails, repeat with itpm flag set.
  317. */
  318. static int probe_itpm(struct tpm_chip *chip)
  319. {
  320. int rc = 0;
  321. u8 cmd_getticks[] = {
  322. 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
  323. 0x00, 0x00, 0x00, 0xf1
  324. };
  325. size_t len = sizeof(cmd_getticks);
  326. bool rem_itpm = itpm;
  327. u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
  328. /* probe only iTPMS */
  329. if (vendor != TPM_VID_INTEL)
  330. return 0;
  331. itpm = 0;
  332. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  333. if (rc == 0)
  334. goto out;
  335. tpm_tis_ready(chip);
  336. release_locality(chip, chip->vendor.locality, 0);
  337. itpm = 1;
  338. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  339. if (rc == 0) {
  340. dev_info(chip->dev, "Detected an iTPM.\n");
  341. rc = 1;
  342. } else
  343. rc = -EFAULT;
  344. out:
  345. itpm = rem_itpm;
  346. tpm_tis_ready(chip);
  347. release_locality(chip, chip->vendor.locality, 0);
  348. return rc;
  349. }
  350. static const struct file_operations tis_ops = {
  351. .owner = THIS_MODULE,
  352. .llseek = no_llseek,
  353. .open = tpm_open,
  354. .read = tpm_read,
  355. .write = tpm_write,
  356. .release = tpm_release,
  357. };
  358. static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
  359. static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
  360. static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
  361. static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
  362. static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
  363. static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
  364. NULL);
  365. static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
  366. static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
  367. static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
  368. static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
  369. static struct attribute *tis_attrs[] = {
  370. &dev_attr_pubek.attr,
  371. &dev_attr_pcrs.attr,
  372. &dev_attr_enabled.attr,
  373. &dev_attr_active.attr,
  374. &dev_attr_owned.attr,
  375. &dev_attr_temp_deactivated.attr,
  376. &dev_attr_caps.attr,
  377. &dev_attr_cancel.attr,
  378. &dev_attr_durations.attr,
  379. &dev_attr_timeouts.attr, NULL,
  380. };
  381. static struct attribute_group tis_attr_grp = {
  382. .attrs = tis_attrs
  383. };
  384. static struct tpm_vendor_specific tpm_tis = {
  385. .status = tpm_tis_status,
  386. .recv = tpm_tis_recv,
  387. .send = tpm_tis_send,
  388. .cancel = tpm_tis_ready,
  389. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  390. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  391. .req_canceled = TPM_STS_COMMAND_READY,
  392. .attr_group = &tis_attr_grp,
  393. .miscdev = {
  394. .fops = &tis_ops,},
  395. };
  396. static irqreturn_t tis_int_probe(int irq, void *dev_id)
  397. {
  398. struct tpm_chip *chip = dev_id;
  399. u32 interrupt;
  400. interrupt = ioread32(chip->vendor.iobase +
  401. TPM_INT_STATUS(chip->vendor.locality));
  402. if (interrupt == 0)
  403. return IRQ_NONE;
  404. chip->vendor.probed_irq = irq;
  405. /* Clear interrupts handled with TPM_EOI */
  406. iowrite32(interrupt,
  407. chip->vendor.iobase +
  408. TPM_INT_STATUS(chip->vendor.locality));
  409. return IRQ_HANDLED;
  410. }
  411. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  412. {
  413. struct tpm_chip *chip = dev_id;
  414. u32 interrupt;
  415. int i;
  416. interrupt = ioread32(chip->vendor.iobase +
  417. TPM_INT_STATUS(chip->vendor.locality));
  418. if (interrupt == 0)
  419. return IRQ_NONE;
  420. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  421. wake_up_interruptible(&chip->vendor.read_queue);
  422. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  423. for (i = 0; i < 5; i++)
  424. if (check_locality(chip, i) >= 0)
  425. break;
  426. if (interrupt &
  427. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  428. TPM_INTF_CMD_READY_INT))
  429. wake_up_interruptible(&chip->vendor.int_queue);
  430. /* Clear interrupts handled with TPM_EOI */
  431. iowrite32(interrupt,
  432. chip->vendor.iobase +
  433. TPM_INT_STATUS(chip->vendor.locality));
  434. ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
  435. return IRQ_HANDLED;
  436. }
  437. static bool interrupts = 1;
  438. module_param(interrupts, bool, 0444);
  439. MODULE_PARM_DESC(interrupts, "Enable interrupts");
  440. static int tpm_tis_init(struct device *dev, resource_size_t start,
  441. resource_size_t len, unsigned int irq)
  442. {
  443. u32 vendor, intfcaps, intmask;
  444. int rc, i, irq_s, irq_e, probe;
  445. struct tpm_chip *chip;
  446. if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
  447. return -ENODEV;
  448. chip->vendor.iobase = ioremap(start, len);
  449. if (!chip->vendor.iobase) {
  450. rc = -EIO;
  451. goto out_err;
  452. }
  453. /* Default timeouts */
  454. chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  455. chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
  456. chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  457. chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  458. if (request_locality(chip, 0) != 0) {
  459. rc = -ENODEV;
  460. goto out_err;
  461. }
  462. vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
  463. dev_info(dev,
  464. "1.2 TPM (device-id 0x%X, rev-id %d)\n",
  465. vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
  466. if (!itpm) {
  467. probe = probe_itpm(chip);
  468. if (probe < 0) {
  469. rc = -ENODEV;
  470. goto out_err;
  471. }
  472. itpm = (probe == 0) ? 0 : 1;
  473. }
  474. if (itpm)
  475. dev_info(dev, "Intel iTPM workaround enabled\n");
  476. /* Figure out the capabilities */
  477. intfcaps =
  478. ioread32(chip->vendor.iobase +
  479. TPM_INTF_CAPS(chip->vendor.locality));
  480. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  481. intfcaps);
  482. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  483. dev_dbg(dev, "\tBurst Count Static\n");
  484. if (intfcaps & TPM_INTF_CMD_READY_INT)
  485. dev_dbg(dev, "\tCommand Ready Int Support\n");
  486. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  487. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  488. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  489. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  490. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  491. dev_dbg(dev, "\tInterrupt Level Low\n");
  492. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  493. dev_dbg(dev, "\tInterrupt Level High\n");
  494. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  495. dev_dbg(dev, "\tLocality Change Int Support\n");
  496. if (intfcaps & TPM_INTF_STS_VALID_INT)
  497. dev_dbg(dev, "\tSts Valid Int Support\n");
  498. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  499. dev_dbg(dev, "\tData Avail Int Support\n");
  500. /* get the timeouts before testing for irqs */
  501. if (tpm_get_timeouts(chip)) {
  502. dev_err(dev, "Could not get TPM timeouts and durations\n");
  503. rc = -ENODEV;
  504. goto out_err;
  505. }
  506. if (tpm_do_selftest(chip)) {
  507. dev_err(dev, "TPM self test failed\n");
  508. rc = -ENODEV;
  509. goto out_err;
  510. }
  511. /* INTERRUPT Setup */
  512. init_waitqueue_head(&chip->vendor.read_queue);
  513. init_waitqueue_head(&chip->vendor.int_queue);
  514. intmask =
  515. ioread32(chip->vendor.iobase +
  516. TPM_INT_ENABLE(chip->vendor.locality));
  517. intmask |= TPM_INTF_CMD_READY_INT
  518. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  519. | TPM_INTF_STS_VALID_INT;
  520. iowrite32(intmask,
  521. chip->vendor.iobase +
  522. TPM_INT_ENABLE(chip->vendor.locality));
  523. if (interrupts)
  524. chip->vendor.irq = irq;
  525. if (interrupts && !chip->vendor.irq) {
  526. irq_s =
  527. ioread8(chip->vendor.iobase +
  528. TPM_INT_VECTOR(chip->vendor.locality));
  529. if (irq_s) {
  530. irq_e = irq_s;
  531. } else {
  532. irq_s = 3;
  533. irq_e = 15;
  534. }
  535. for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
  536. iowrite8(i, chip->vendor.iobase +
  537. TPM_INT_VECTOR(chip->vendor.locality));
  538. if (request_irq
  539. (i, tis_int_probe, IRQF_SHARED,
  540. chip->vendor.miscdev.name, chip) != 0) {
  541. dev_info(chip->dev,
  542. "Unable to request irq: %d for probe\n",
  543. i);
  544. continue;
  545. }
  546. /* Clear all existing */
  547. iowrite32(ioread32
  548. (chip->vendor.iobase +
  549. TPM_INT_STATUS(chip->vendor.locality)),
  550. chip->vendor.iobase +
  551. TPM_INT_STATUS(chip->vendor.locality));
  552. /* Turn on */
  553. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  554. chip->vendor.iobase +
  555. TPM_INT_ENABLE(chip->vendor.locality));
  556. chip->vendor.probed_irq = 0;
  557. /* Generate Interrupts */
  558. tpm_gen_interrupt(chip);
  559. chip->vendor.irq = chip->vendor.probed_irq;
  560. /* free_irq will call into tis_int_probe;
  561. clear all irqs we haven't seen while doing
  562. tpm_gen_interrupt */
  563. iowrite32(ioread32
  564. (chip->vendor.iobase +
  565. TPM_INT_STATUS(chip->vendor.locality)),
  566. chip->vendor.iobase +
  567. TPM_INT_STATUS(chip->vendor.locality));
  568. /* Turn off */
  569. iowrite32(intmask,
  570. chip->vendor.iobase +
  571. TPM_INT_ENABLE(chip->vendor.locality));
  572. free_irq(i, chip);
  573. }
  574. }
  575. if (chip->vendor.irq) {
  576. iowrite8(chip->vendor.irq,
  577. chip->vendor.iobase +
  578. TPM_INT_VECTOR(chip->vendor.locality));
  579. if (request_irq
  580. (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
  581. chip->vendor.miscdev.name, chip) != 0) {
  582. dev_info(chip->dev,
  583. "Unable to request irq: %d for use\n",
  584. chip->vendor.irq);
  585. chip->vendor.irq = 0;
  586. } else {
  587. /* Clear all existing */
  588. iowrite32(ioread32
  589. (chip->vendor.iobase +
  590. TPM_INT_STATUS(chip->vendor.locality)),
  591. chip->vendor.iobase +
  592. TPM_INT_STATUS(chip->vendor.locality));
  593. /* Turn on */
  594. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  595. chip->vendor.iobase +
  596. TPM_INT_ENABLE(chip->vendor.locality));
  597. }
  598. }
  599. INIT_LIST_HEAD(&chip->vendor.list);
  600. mutex_lock(&tis_lock);
  601. list_add(&chip->vendor.list, &tis_chips);
  602. mutex_unlock(&tis_lock);
  603. return 0;
  604. out_err:
  605. if (chip->vendor.iobase)
  606. iounmap(chip->vendor.iobase);
  607. tpm_remove_hardware(chip->dev);
  608. return rc;
  609. }
  610. static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
  611. {
  612. u32 intmask;
  613. /* reenable interrupts that device may have lost or
  614. BIOS/firmware may have disabled */
  615. iowrite8(chip->vendor.irq, chip->vendor.iobase +
  616. TPM_INT_VECTOR(chip->vendor.locality));
  617. intmask =
  618. ioread32(chip->vendor.iobase +
  619. TPM_INT_ENABLE(chip->vendor.locality));
  620. intmask |= TPM_INTF_CMD_READY_INT
  621. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  622. | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
  623. iowrite32(intmask,
  624. chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
  625. }
  626. #ifdef CONFIG_PNP
  627. static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
  628. const struct pnp_device_id *pnp_id)
  629. {
  630. resource_size_t start, len;
  631. unsigned int irq = 0;
  632. start = pnp_mem_start(pnp_dev, 0);
  633. len = pnp_mem_len(pnp_dev, 0);
  634. if (pnp_irq_valid(pnp_dev, 0))
  635. irq = pnp_irq(pnp_dev, 0);
  636. else
  637. interrupts = 0;
  638. if (is_itpm(pnp_dev))
  639. itpm = 1;
  640. return tpm_tis_init(&pnp_dev->dev, start, len, irq);
  641. }
  642. static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
  643. {
  644. return tpm_pm_suspend(&dev->dev, msg);
  645. }
  646. static int tpm_tis_pnp_resume(struct pnp_dev *dev)
  647. {
  648. struct tpm_chip *chip = pnp_get_drvdata(dev);
  649. int ret;
  650. if (chip->vendor.irq)
  651. tpm_tis_reenable_interrupts(chip);
  652. ret = tpm_pm_resume(&dev->dev);
  653. if (!ret)
  654. tpm_do_selftest(chip);
  655. return ret;
  656. }
  657. static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
  658. {"PNP0C31", 0}, /* TPM */
  659. {"ATM1200", 0}, /* Atmel */
  660. {"IFX0102", 0}, /* Infineon */
  661. {"BCM0101", 0}, /* Broadcom */
  662. {"BCM0102", 0}, /* Broadcom */
  663. {"NSC1200", 0}, /* National */
  664. {"ICO0102", 0}, /* Intel */
  665. /* Add new here */
  666. {"", 0}, /* User Specified */
  667. {"", 0} /* Terminator */
  668. };
  669. MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
  670. static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
  671. {
  672. struct tpm_chip *chip = pnp_get_drvdata(dev);
  673. tpm_dev_vendor_release(chip);
  674. kfree(chip);
  675. }
  676. static struct pnp_driver tis_pnp_driver = {
  677. .name = "tpm_tis",
  678. .id_table = tpm_pnp_tbl,
  679. .probe = tpm_tis_pnp_init,
  680. .suspend = tpm_tis_pnp_suspend,
  681. .resume = tpm_tis_pnp_resume,
  682. .remove = tpm_tis_pnp_remove,
  683. };
  684. #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
  685. module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
  686. sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
  687. MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
  688. #endif
  689. static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
  690. {
  691. return tpm_pm_suspend(&dev->dev, msg);
  692. }
  693. static int tpm_tis_resume(struct platform_device *dev)
  694. {
  695. struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
  696. if (chip->vendor.irq)
  697. tpm_tis_reenable_interrupts(chip);
  698. return tpm_pm_resume(&dev->dev);
  699. }
  700. static struct platform_driver tis_drv = {
  701. .driver = {
  702. .name = "tpm_tis",
  703. .owner = THIS_MODULE,
  704. },
  705. .suspend = tpm_tis_suspend,
  706. .resume = tpm_tis_resume,
  707. };
  708. static struct platform_device *pdev;
  709. static bool force;
  710. module_param(force, bool, 0444);
  711. MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
  712. static int __init init_tis(void)
  713. {
  714. int rc;
  715. #ifdef CONFIG_PNP
  716. if (!force)
  717. return pnp_register_driver(&tis_pnp_driver);
  718. #endif
  719. rc = platform_driver_register(&tis_drv);
  720. if (rc < 0)
  721. return rc;
  722. if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
  723. return PTR_ERR(pdev);
  724. if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
  725. platform_device_unregister(pdev);
  726. platform_driver_unregister(&tis_drv);
  727. }
  728. return rc;
  729. }
  730. static void __exit cleanup_tis(void)
  731. {
  732. struct tpm_vendor_specific *i, *j;
  733. struct tpm_chip *chip;
  734. mutex_lock(&tis_lock);
  735. list_for_each_entry_safe(i, j, &tis_chips, list) {
  736. chip = to_tpm_chip(i);
  737. tpm_remove_hardware(chip->dev);
  738. iowrite32(~TPM_GLOBAL_INT_ENABLE &
  739. ioread32(chip->vendor.iobase +
  740. TPM_INT_ENABLE(chip->vendor.
  741. locality)),
  742. chip->vendor.iobase +
  743. TPM_INT_ENABLE(chip->vendor.locality));
  744. release_locality(chip, chip->vendor.locality, 1);
  745. if (chip->vendor.irq)
  746. free_irq(chip->vendor.irq, chip);
  747. iounmap(i->iobase);
  748. list_del(&i->list);
  749. }
  750. mutex_unlock(&tis_lock);
  751. #ifdef CONFIG_PNP
  752. if (!force) {
  753. pnp_unregister_driver(&tis_pnp_driver);
  754. return;
  755. }
  756. #endif
  757. platform_device_unregister(pdev);
  758. platform_driver_unregister(&tis_drv);
  759. }
  760. module_init(init_tis);
  761. module_exit(cleanup_tis);
  762. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  763. MODULE_DESCRIPTION("TPM Driver");
  764. MODULE_VERSION("2.0");
  765. MODULE_LICENSE("GPL");