hpet.c 24 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/major.h>
  19. #include <linux/ioport.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/init.h>
  22. #include <linux/poll.h>
  23. #include <linux/mm.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sysctl.h>
  27. #include <linux/wait.h>
  28. #include <linux/bcd.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/bitops.h>
  31. #include <linux/compat.h>
  32. #include <linux/clocksource.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <asm/current.h>
  37. #include <asm/irq.h>
  38. #include <asm/div64.h>
  39. #include <linux/acpi.h>
  40. #include <acpi/acpi_bus.h>
  41. #include <linux/hpet.h>
  42. /*
  43. * The High Precision Event Timer driver.
  44. * This driver is closely modelled after the rtc.c driver.
  45. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  46. */
  47. #define HPET_USER_FREQ (64)
  48. #define HPET_DRIFT (500)
  49. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  50. /* WARNING -- don't get confused. These macros are never used
  51. * to write the (single) counter, and rarely to read it.
  52. * They're badly named; to fix, someday.
  53. */
  54. #if BITS_PER_LONG == 64
  55. #define write_counter(V, MC) writeq(V, MC)
  56. #define read_counter(MC) readq(MC)
  57. #else
  58. #define write_counter(V, MC) writel(V, MC)
  59. #define read_counter(MC) readl(MC)
  60. #endif
  61. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  62. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  63. /* This clocksource driver currently only works on ia64 */
  64. #ifdef CONFIG_IA64
  65. static void __iomem *hpet_mctr;
  66. static cycle_t read_hpet(struct clocksource *cs)
  67. {
  68. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  69. }
  70. static struct clocksource clocksource_hpet = {
  71. .name = "hpet",
  72. .rating = 250,
  73. .read = read_hpet,
  74. .mask = CLOCKSOURCE_MASK(64),
  75. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  76. };
  77. static struct clocksource *hpet_clocksource;
  78. #endif
  79. /* A lock for concurrent access by app and isr hpet activity. */
  80. static DEFINE_SPINLOCK(hpet_lock);
  81. #define HPET_DEV_NAME (7)
  82. struct hpet_dev {
  83. struct hpets *hd_hpets;
  84. struct hpet __iomem *hd_hpet;
  85. struct hpet_timer __iomem *hd_timer;
  86. unsigned long hd_ireqfreq;
  87. unsigned long hd_irqdata;
  88. wait_queue_head_t hd_waitqueue;
  89. struct fasync_struct *hd_async_queue;
  90. unsigned int hd_flags;
  91. unsigned int hd_irq;
  92. unsigned int hd_hdwirq;
  93. char hd_name[HPET_DEV_NAME];
  94. };
  95. struct hpets {
  96. struct hpets *hp_next;
  97. struct hpet __iomem *hp_hpet;
  98. unsigned long hp_hpet_phys;
  99. struct clocksource *hp_clocksource;
  100. unsigned long long hp_tick_freq;
  101. unsigned long hp_delta;
  102. unsigned int hp_ntimer;
  103. unsigned int hp_which;
  104. struct hpet_dev hp_dev[1];
  105. };
  106. static struct hpets *hpets;
  107. #define HPET_OPEN 0x0001
  108. #define HPET_IE 0x0002 /* interrupt enabled */
  109. #define HPET_PERIODIC 0x0004
  110. #define HPET_SHARED_IRQ 0x0008
  111. #ifndef readq
  112. static inline unsigned long long readq(void __iomem *addr)
  113. {
  114. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  115. }
  116. #endif
  117. #ifndef writeq
  118. static inline void writeq(unsigned long long v, void __iomem *addr)
  119. {
  120. writel(v & 0xffffffff, addr);
  121. writel(v >> 32, addr + 4);
  122. }
  123. #endif
  124. static irqreturn_t hpet_interrupt(int irq, void *data)
  125. {
  126. struct hpet_dev *devp;
  127. unsigned long isr;
  128. devp = data;
  129. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  130. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  131. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  132. return IRQ_NONE;
  133. spin_lock(&hpet_lock);
  134. devp->hd_irqdata++;
  135. /*
  136. * For non-periodic timers, increment the accumulator.
  137. * This has the effect of treating non-periodic like periodic.
  138. */
  139. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  140. unsigned long m, t, mc, base, k;
  141. struct hpet __iomem *hpet = devp->hd_hpet;
  142. struct hpets *hpetp = devp->hd_hpets;
  143. t = devp->hd_ireqfreq;
  144. m = read_counter(&devp->hd_timer->hpet_compare);
  145. mc = read_counter(&hpet->hpet_mc);
  146. /* The time for the next interrupt would logically be t + m,
  147. * however, if we are very unlucky and the interrupt is delayed
  148. * for longer than t then we will completely miss the next
  149. * interrupt if we set t + m and an application will hang.
  150. * Therefore we need to make a more complex computation assuming
  151. * that there exists a k for which the following is true:
  152. * k * t + base < mc + delta
  153. * (k + 1) * t + base > mc + delta
  154. * where t is the interval in hpet ticks for the given freq,
  155. * base is the theoretical start value 0 < base < t,
  156. * mc is the main counter value at the time of the interrupt,
  157. * delta is the time it takes to write the a value to the
  158. * comparator.
  159. * k may then be computed as (mc - base + delta) / t .
  160. */
  161. base = mc % t;
  162. k = (mc - base + hpetp->hp_delta) / t;
  163. write_counter(t * (k + 1) + base,
  164. &devp->hd_timer->hpet_compare);
  165. }
  166. if (devp->hd_flags & HPET_SHARED_IRQ)
  167. writel(isr, &devp->hd_hpet->hpet_isr);
  168. spin_unlock(&hpet_lock);
  169. wake_up_interruptible(&devp->hd_waitqueue);
  170. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  171. return IRQ_HANDLED;
  172. }
  173. static void hpet_timer_set_irq(struct hpet_dev *devp)
  174. {
  175. unsigned long v;
  176. int irq, gsi;
  177. struct hpet_timer __iomem *timer;
  178. spin_lock_irq(&hpet_lock);
  179. if (devp->hd_hdwirq) {
  180. spin_unlock_irq(&hpet_lock);
  181. return;
  182. }
  183. timer = devp->hd_timer;
  184. /* we prefer level triggered mode */
  185. v = readl(&timer->hpet_config);
  186. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  187. v |= Tn_INT_TYPE_CNF_MASK;
  188. writel(v, &timer->hpet_config);
  189. }
  190. spin_unlock_irq(&hpet_lock);
  191. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  192. Tn_INT_ROUTE_CAP_SHIFT;
  193. /*
  194. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  195. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  196. */
  197. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  198. v &= ~0xf3df;
  199. else
  200. v &= ~0xffff;
  201. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  202. if (irq >= nr_irqs) {
  203. irq = HPET_MAX_IRQ;
  204. break;
  205. }
  206. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  207. ACPI_ACTIVE_LOW);
  208. if (gsi > 0)
  209. break;
  210. /* FIXME: Setup interrupt source table */
  211. }
  212. if (irq < HPET_MAX_IRQ) {
  213. spin_lock_irq(&hpet_lock);
  214. v = readl(&timer->hpet_config);
  215. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  216. writel(v, &timer->hpet_config);
  217. devp->hd_hdwirq = gsi;
  218. spin_unlock_irq(&hpet_lock);
  219. }
  220. return;
  221. }
  222. static int hpet_open(struct inode *inode, struct file *file)
  223. {
  224. struct hpet_dev *devp;
  225. struct hpets *hpetp;
  226. int i;
  227. if (file->f_mode & FMODE_WRITE)
  228. return -EINVAL;
  229. mutex_lock(&hpet_mutex);
  230. spin_lock_irq(&hpet_lock);
  231. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  232. for (i = 0; i < hpetp->hp_ntimer; i++)
  233. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  234. continue;
  235. else {
  236. devp = &hpetp->hp_dev[i];
  237. break;
  238. }
  239. if (!devp) {
  240. spin_unlock_irq(&hpet_lock);
  241. mutex_unlock(&hpet_mutex);
  242. return -EBUSY;
  243. }
  244. file->private_data = devp;
  245. devp->hd_irqdata = 0;
  246. devp->hd_flags |= HPET_OPEN;
  247. spin_unlock_irq(&hpet_lock);
  248. mutex_unlock(&hpet_mutex);
  249. hpet_timer_set_irq(devp);
  250. return 0;
  251. }
  252. static ssize_t
  253. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  254. {
  255. DECLARE_WAITQUEUE(wait, current);
  256. unsigned long data;
  257. ssize_t retval;
  258. struct hpet_dev *devp;
  259. devp = file->private_data;
  260. if (!devp->hd_ireqfreq)
  261. return -EIO;
  262. if (count < sizeof(unsigned long))
  263. return -EINVAL;
  264. add_wait_queue(&devp->hd_waitqueue, &wait);
  265. for ( ; ; ) {
  266. set_current_state(TASK_INTERRUPTIBLE);
  267. spin_lock_irq(&hpet_lock);
  268. data = devp->hd_irqdata;
  269. devp->hd_irqdata = 0;
  270. spin_unlock_irq(&hpet_lock);
  271. if (data)
  272. break;
  273. else if (file->f_flags & O_NONBLOCK) {
  274. retval = -EAGAIN;
  275. goto out;
  276. } else if (signal_pending(current)) {
  277. retval = -ERESTARTSYS;
  278. goto out;
  279. }
  280. schedule();
  281. }
  282. retval = put_user(data, (unsigned long __user *)buf);
  283. if (!retval)
  284. retval = sizeof(unsigned long);
  285. out:
  286. __set_current_state(TASK_RUNNING);
  287. remove_wait_queue(&devp->hd_waitqueue, &wait);
  288. return retval;
  289. }
  290. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  291. {
  292. unsigned long v;
  293. struct hpet_dev *devp;
  294. devp = file->private_data;
  295. if (!devp->hd_ireqfreq)
  296. return 0;
  297. poll_wait(file, &devp->hd_waitqueue, wait);
  298. spin_lock_irq(&hpet_lock);
  299. v = devp->hd_irqdata;
  300. spin_unlock_irq(&hpet_lock);
  301. if (v != 0)
  302. return POLLIN | POLLRDNORM;
  303. return 0;
  304. }
  305. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  306. {
  307. #ifdef CONFIG_HPET_MMAP
  308. struct hpet_dev *devp;
  309. unsigned long addr;
  310. if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
  311. return -EINVAL;
  312. devp = file->private_data;
  313. addr = devp->hd_hpets->hp_hpet_phys;
  314. if (addr & (PAGE_SIZE - 1))
  315. return -ENOSYS;
  316. vma->vm_flags |= VM_IO;
  317. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  318. if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
  319. PAGE_SIZE, vma->vm_page_prot)) {
  320. printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
  321. __func__);
  322. return -EAGAIN;
  323. }
  324. return 0;
  325. #else
  326. return -ENOSYS;
  327. #endif
  328. }
  329. static int hpet_fasync(int fd, struct file *file, int on)
  330. {
  331. struct hpet_dev *devp;
  332. devp = file->private_data;
  333. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  334. return 0;
  335. else
  336. return -EIO;
  337. }
  338. static int hpet_release(struct inode *inode, struct file *file)
  339. {
  340. struct hpet_dev *devp;
  341. struct hpet_timer __iomem *timer;
  342. int irq = 0;
  343. devp = file->private_data;
  344. timer = devp->hd_timer;
  345. spin_lock_irq(&hpet_lock);
  346. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  347. &timer->hpet_config);
  348. irq = devp->hd_irq;
  349. devp->hd_irq = 0;
  350. devp->hd_ireqfreq = 0;
  351. if (devp->hd_flags & HPET_PERIODIC
  352. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  353. unsigned long v;
  354. v = readq(&timer->hpet_config);
  355. v ^= Tn_TYPE_CNF_MASK;
  356. writeq(v, &timer->hpet_config);
  357. }
  358. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  359. spin_unlock_irq(&hpet_lock);
  360. if (irq)
  361. free_irq(irq, devp);
  362. file->private_data = NULL;
  363. return 0;
  364. }
  365. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  366. {
  367. struct hpet_timer __iomem *timer;
  368. struct hpet __iomem *hpet;
  369. struct hpets *hpetp;
  370. int irq;
  371. unsigned long g, v, t, m;
  372. unsigned long flags, isr;
  373. timer = devp->hd_timer;
  374. hpet = devp->hd_hpet;
  375. hpetp = devp->hd_hpets;
  376. if (!devp->hd_ireqfreq)
  377. return -EIO;
  378. spin_lock_irq(&hpet_lock);
  379. if (devp->hd_flags & HPET_IE) {
  380. spin_unlock_irq(&hpet_lock);
  381. return -EBUSY;
  382. }
  383. devp->hd_flags |= HPET_IE;
  384. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  385. devp->hd_flags |= HPET_SHARED_IRQ;
  386. spin_unlock_irq(&hpet_lock);
  387. irq = devp->hd_hdwirq;
  388. if (irq) {
  389. unsigned long irq_flags;
  390. if (devp->hd_flags & HPET_SHARED_IRQ) {
  391. /*
  392. * To prevent the interrupt handler from seeing an
  393. * unwanted interrupt status bit, program the timer
  394. * so that it will not fire in the near future ...
  395. */
  396. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  397. &timer->hpet_config);
  398. write_counter(read_counter(&hpet->hpet_mc),
  399. &timer->hpet_compare);
  400. /* ... and clear any left-over status. */
  401. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  402. writel(isr, &hpet->hpet_isr);
  403. }
  404. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  405. irq_flags = devp->hd_flags & HPET_SHARED_IRQ
  406. ? IRQF_SHARED : IRQF_DISABLED;
  407. if (request_irq(irq, hpet_interrupt, irq_flags,
  408. devp->hd_name, (void *)devp)) {
  409. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  410. irq = 0;
  411. }
  412. }
  413. if (irq == 0) {
  414. spin_lock_irq(&hpet_lock);
  415. devp->hd_flags ^= HPET_IE;
  416. spin_unlock_irq(&hpet_lock);
  417. return -EIO;
  418. }
  419. devp->hd_irq = irq;
  420. t = devp->hd_ireqfreq;
  421. v = readq(&timer->hpet_config);
  422. /* 64-bit comparators are not yet supported through the ioctls,
  423. * so force this into 32-bit mode if it supports both modes
  424. */
  425. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  426. if (devp->hd_flags & HPET_PERIODIC) {
  427. g |= Tn_TYPE_CNF_MASK;
  428. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  429. writeq(v, &timer->hpet_config);
  430. local_irq_save(flags);
  431. /*
  432. * NOTE: First we modify the hidden accumulator
  433. * register supported by periodic-capable comparators.
  434. * We never want to modify the (single) counter; that
  435. * would affect all the comparators. The value written
  436. * is the counter value when the first interrupt is due.
  437. */
  438. m = read_counter(&hpet->hpet_mc);
  439. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  440. /*
  441. * Then we modify the comparator, indicating the period
  442. * for subsequent interrupt.
  443. */
  444. write_counter(t, &timer->hpet_compare);
  445. } else {
  446. local_irq_save(flags);
  447. m = read_counter(&hpet->hpet_mc);
  448. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  449. }
  450. if (devp->hd_flags & HPET_SHARED_IRQ) {
  451. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  452. writel(isr, &hpet->hpet_isr);
  453. }
  454. writeq(g, &timer->hpet_config);
  455. local_irq_restore(flags);
  456. return 0;
  457. }
  458. /* converts Hz to number of timer ticks */
  459. static inline unsigned long hpet_time_div(struct hpets *hpets,
  460. unsigned long dis)
  461. {
  462. unsigned long long m;
  463. m = hpets->hp_tick_freq + (dis >> 1);
  464. do_div(m, dis);
  465. return (unsigned long)m;
  466. }
  467. static int
  468. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  469. struct hpet_info *info)
  470. {
  471. struct hpet_timer __iomem *timer;
  472. struct hpet __iomem *hpet;
  473. struct hpets *hpetp;
  474. int err;
  475. unsigned long v;
  476. switch (cmd) {
  477. case HPET_IE_OFF:
  478. case HPET_INFO:
  479. case HPET_EPI:
  480. case HPET_DPI:
  481. case HPET_IRQFREQ:
  482. timer = devp->hd_timer;
  483. hpet = devp->hd_hpet;
  484. hpetp = devp->hd_hpets;
  485. break;
  486. case HPET_IE_ON:
  487. return hpet_ioctl_ieon(devp);
  488. default:
  489. return -EINVAL;
  490. }
  491. err = 0;
  492. switch (cmd) {
  493. case HPET_IE_OFF:
  494. if ((devp->hd_flags & HPET_IE) == 0)
  495. break;
  496. v = readq(&timer->hpet_config);
  497. v &= ~Tn_INT_ENB_CNF_MASK;
  498. writeq(v, &timer->hpet_config);
  499. if (devp->hd_irq) {
  500. free_irq(devp->hd_irq, devp);
  501. devp->hd_irq = 0;
  502. }
  503. devp->hd_flags ^= HPET_IE;
  504. break;
  505. case HPET_INFO:
  506. {
  507. memset(info, 0, sizeof(*info));
  508. if (devp->hd_ireqfreq)
  509. info->hi_ireqfreq =
  510. hpet_time_div(hpetp, devp->hd_ireqfreq);
  511. info->hi_flags =
  512. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  513. info->hi_hpet = hpetp->hp_which;
  514. info->hi_timer = devp - hpetp->hp_dev;
  515. break;
  516. }
  517. case HPET_EPI:
  518. v = readq(&timer->hpet_config);
  519. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  520. err = -ENXIO;
  521. break;
  522. }
  523. devp->hd_flags |= HPET_PERIODIC;
  524. break;
  525. case HPET_DPI:
  526. v = readq(&timer->hpet_config);
  527. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  528. err = -ENXIO;
  529. break;
  530. }
  531. if (devp->hd_flags & HPET_PERIODIC &&
  532. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  533. v = readq(&timer->hpet_config);
  534. v ^= Tn_TYPE_CNF_MASK;
  535. writeq(v, &timer->hpet_config);
  536. }
  537. devp->hd_flags &= ~HPET_PERIODIC;
  538. break;
  539. case HPET_IRQFREQ:
  540. if ((arg > hpet_max_freq) &&
  541. !capable(CAP_SYS_RESOURCE)) {
  542. err = -EACCES;
  543. break;
  544. }
  545. if (!arg) {
  546. err = -EINVAL;
  547. break;
  548. }
  549. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  550. }
  551. return err;
  552. }
  553. static long
  554. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  555. {
  556. struct hpet_info info;
  557. int err;
  558. mutex_lock(&hpet_mutex);
  559. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  560. mutex_unlock(&hpet_mutex);
  561. if ((cmd == HPET_INFO) && !err &&
  562. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  563. err = -EFAULT;
  564. return err;
  565. }
  566. #ifdef CONFIG_COMPAT
  567. struct compat_hpet_info {
  568. compat_ulong_t hi_ireqfreq; /* Hz */
  569. compat_ulong_t hi_flags; /* information */
  570. unsigned short hi_hpet;
  571. unsigned short hi_timer;
  572. };
  573. static long
  574. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  575. {
  576. struct hpet_info info;
  577. int err;
  578. mutex_lock(&hpet_mutex);
  579. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  580. mutex_unlock(&hpet_mutex);
  581. if ((cmd == HPET_INFO) && !err) {
  582. struct compat_hpet_info __user *u = compat_ptr(arg);
  583. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  584. put_user(info.hi_flags, &u->hi_flags) ||
  585. put_user(info.hi_hpet, &u->hi_hpet) ||
  586. put_user(info.hi_timer, &u->hi_timer))
  587. err = -EFAULT;
  588. }
  589. return err;
  590. }
  591. #endif
  592. static const struct file_operations hpet_fops = {
  593. .owner = THIS_MODULE,
  594. .llseek = no_llseek,
  595. .read = hpet_read,
  596. .poll = hpet_poll,
  597. .unlocked_ioctl = hpet_ioctl,
  598. #ifdef CONFIG_COMPAT
  599. .compat_ioctl = hpet_compat_ioctl,
  600. #endif
  601. .open = hpet_open,
  602. .release = hpet_release,
  603. .fasync = hpet_fasync,
  604. .mmap = hpet_mmap,
  605. };
  606. static int hpet_is_known(struct hpet_data *hdp)
  607. {
  608. struct hpets *hpetp;
  609. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  610. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  611. return 1;
  612. return 0;
  613. }
  614. static ctl_table hpet_table[] = {
  615. {
  616. .procname = "max-user-freq",
  617. .data = &hpet_max_freq,
  618. .maxlen = sizeof(int),
  619. .mode = 0644,
  620. .proc_handler = proc_dointvec,
  621. },
  622. {}
  623. };
  624. static ctl_table hpet_root[] = {
  625. {
  626. .procname = "hpet",
  627. .maxlen = 0,
  628. .mode = 0555,
  629. .child = hpet_table,
  630. },
  631. {}
  632. };
  633. static ctl_table dev_root[] = {
  634. {
  635. .procname = "dev",
  636. .maxlen = 0,
  637. .mode = 0555,
  638. .child = hpet_root,
  639. },
  640. {}
  641. };
  642. static struct ctl_table_header *sysctl_header;
  643. /*
  644. * Adjustment for when arming the timer with
  645. * initial conditions. That is, main counter
  646. * ticks expired before interrupts are enabled.
  647. */
  648. #define TICK_CALIBRATE (1000UL)
  649. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  650. {
  651. struct hpet_timer __iomem *timer = NULL;
  652. unsigned long t, m, count, i, flags, start;
  653. struct hpet_dev *devp;
  654. int j;
  655. struct hpet __iomem *hpet;
  656. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  657. if ((devp->hd_flags & HPET_OPEN) == 0) {
  658. timer = devp->hd_timer;
  659. break;
  660. }
  661. if (!timer)
  662. return 0;
  663. hpet = hpetp->hp_hpet;
  664. t = read_counter(&timer->hpet_compare);
  665. i = 0;
  666. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  667. local_irq_save(flags);
  668. start = read_counter(&hpet->hpet_mc);
  669. do {
  670. m = read_counter(&hpet->hpet_mc);
  671. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  672. } while (i++, (m - start) < count);
  673. local_irq_restore(flags);
  674. return (m - start) / i;
  675. }
  676. static unsigned long hpet_calibrate(struct hpets *hpetp)
  677. {
  678. unsigned long ret = -1;
  679. unsigned long tmp;
  680. /*
  681. * Try to calibrate until return value becomes stable small value.
  682. * If SMI interruption occurs in calibration loop, the return value
  683. * will be big. This avoids its impact.
  684. */
  685. for ( ; ; ) {
  686. tmp = __hpet_calibrate(hpetp);
  687. if (ret <= tmp)
  688. break;
  689. ret = tmp;
  690. }
  691. return ret;
  692. }
  693. int hpet_alloc(struct hpet_data *hdp)
  694. {
  695. u64 cap, mcfg;
  696. struct hpet_dev *devp;
  697. u32 i, ntimer;
  698. struct hpets *hpetp;
  699. size_t siz;
  700. struct hpet __iomem *hpet;
  701. static struct hpets *last;
  702. unsigned long period;
  703. unsigned long long temp;
  704. u32 remainder;
  705. /*
  706. * hpet_alloc can be called by platform dependent code.
  707. * If platform dependent code has allocated the hpet that
  708. * ACPI has also reported, then we catch it here.
  709. */
  710. if (hpet_is_known(hdp)) {
  711. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  712. __func__);
  713. return 0;
  714. }
  715. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  716. sizeof(struct hpet_dev));
  717. hpetp = kzalloc(siz, GFP_KERNEL);
  718. if (!hpetp)
  719. return -ENOMEM;
  720. hpetp->hp_which = hpet_nhpet++;
  721. hpetp->hp_hpet = hdp->hd_address;
  722. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  723. hpetp->hp_ntimer = hdp->hd_nirqs;
  724. for (i = 0; i < hdp->hd_nirqs; i++)
  725. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  726. hpet = hpetp->hp_hpet;
  727. cap = readq(&hpet->hpet_cap);
  728. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  729. if (hpetp->hp_ntimer != ntimer) {
  730. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  731. " with number of timers\n");
  732. kfree(hpetp);
  733. return -ENODEV;
  734. }
  735. if (last)
  736. last->hp_next = hpetp;
  737. else
  738. hpets = hpetp;
  739. last = hpetp;
  740. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  741. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  742. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  743. temp += period >> 1; /* round */
  744. do_div(temp, period);
  745. hpetp->hp_tick_freq = temp; /* ticks per second */
  746. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  747. hpetp->hp_which, hdp->hd_phys_address,
  748. hpetp->hp_ntimer > 1 ? "s" : "");
  749. for (i = 0; i < hpetp->hp_ntimer; i++)
  750. printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  751. printk("\n");
  752. temp = hpetp->hp_tick_freq;
  753. remainder = do_div(temp, 1000000);
  754. printk(KERN_INFO
  755. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  756. hpetp->hp_which, hpetp->hp_ntimer,
  757. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  758. (unsigned) temp, remainder);
  759. mcfg = readq(&hpet->hpet_config);
  760. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  761. write_counter(0L, &hpet->hpet_mc);
  762. mcfg |= HPET_ENABLE_CNF_MASK;
  763. writeq(mcfg, &hpet->hpet_config);
  764. }
  765. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  766. struct hpet_timer __iomem *timer;
  767. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  768. devp->hd_hpets = hpetp;
  769. devp->hd_hpet = hpet;
  770. devp->hd_timer = timer;
  771. /*
  772. * If the timer was reserved by platform code,
  773. * then make timer unavailable for opens.
  774. */
  775. if (hdp->hd_state & (1 << i)) {
  776. devp->hd_flags = HPET_OPEN;
  777. continue;
  778. }
  779. init_waitqueue_head(&devp->hd_waitqueue);
  780. }
  781. hpetp->hp_delta = hpet_calibrate(hpetp);
  782. /* This clocksource driver currently only works on ia64 */
  783. #ifdef CONFIG_IA64
  784. if (!hpet_clocksource) {
  785. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  786. clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
  787. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  788. hpetp->hp_clocksource = &clocksource_hpet;
  789. hpet_clocksource = &clocksource_hpet;
  790. }
  791. #endif
  792. return 0;
  793. }
  794. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  795. {
  796. struct hpet_data *hdp;
  797. acpi_status status;
  798. struct acpi_resource_address64 addr;
  799. hdp = data;
  800. status = acpi_resource_to_address64(res, &addr);
  801. if (ACPI_SUCCESS(status)) {
  802. hdp->hd_phys_address = addr.minimum;
  803. hdp->hd_address = ioremap(addr.minimum, addr.address_length);
  804. if (hpet_is_known(hdp)) {
  805. iounmap(hdp->hd_address);
  806. return AE_ALREADY_EXISTS;
  807. }
  808. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  809. struct acpi_resource_fixed_memory32 *fixmem32;
  810. fixmem32 = &res->data.fixed_memory32;
  811. if (!fixmem32)
  812. return AE_NO_MEMORY;
  813. hdp->hd_phys_address = fixmem32->address;
  814. hdp->hd_address = ioremap(fixmem32->address,
  815. HPET_RANGE_SIZE);
  816. if (hpet_is_known(hdp)) {
  817. iounmap(hdp->hd_address);
  818. return AE_ALREADY_EXISTS;
  819. }
  820. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  821. struct acpi_resource_extended_irq *irqp;
  822. int i, irq;
  823. irqp = &res->data.extended_irq;
  824. for (i = 0; i < irqp->interrupt_count; i++) {
  825. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  826. irqp->triggering, irqp->polarity);
  827. if (irq < 0)
  828. return AE_ERROR;
  829. hdp->hd_irq[hdp->hd_nirqs] = irq;
  830. hdp->hd_nirqs++;
  831. }
  832. }
  833. return AE_OK;
  834. }
  835. static int hpet_acpi_add(struct acpi_device *device)
  836. {
  837. acpi_status result;
  838. struct hpet_data data;
  839. memset(&data, 0, sizeof(data));
  840. result =
  841. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  842. hpet_resources, &data);
  843. if (ACPI_FAILURE(result))
  844. return -ENODEV;
  845. if (!data.hd_address || !data.hd_nirqs) {
  846. if (data.hd_address)
  847. iounmap(data.hd_address);
  848. printk("%s: no address or irqs in _CRS\n", __func__);
  849. return -ENODEV;
  850. }
  851. return hpet_alloc(&data);
  852. }
  853. static int hpet_acpi_remove(struct acpi_device *device, int type)
  854. {
  855. /* XXX need to unregister clocksource, dealloc mem, etc */
  856. return -EINVAL;
  857. }
  858. static const struct acpi_device_id hpet_device_ids[] = {
  859. {"PNP0103", 0},
  860. {"", 0},
  861. };
  862. MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
  863. static struct acpi_driver hpet_acpi_driver = {
  864. .name = "hpet",
  865. .ids = hpet_device_ids,
  866. .ops = {
  867. .add = hpet_acpi_add,
  868. .remove = hpet_acpi_remove,
  869. },
  870. };
  871. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  872. static int __init hpet_init(void)
  873. {
  874. int result;
  875. result = misc_register(&hpet_misc);
  876. if (result < 0)
  877. return -ENODEV;
  878. sysctl_header = register_sysctl_table(dev_root);
  879. result = acpi_bus_register_driver(&hpet_acpi_driver);
  880. if (result < 0) {
  881. if (sysctl_header)
  882. unregister_sysctl_table(sysctl_header);
  883. misc_deregister(&hpet_misc);
  884. return result;
  885. }
  886. return 0;
  887. }
  888. static void __exit hpet_exit(void)
  889. {
  890. acpi_bus_unregister_driver(&hpet_acpi_driver);
  891. if (sysctl_header)
  892. unregister_sysctl_table(sysctl_header);
  893. misc_deregister(&hpet_misc);
  894. return;
  895. }
  896. module_init(hpet_init);
  897. module_exit(hpet_exit);
  898. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  899. MODULE_LICENSE("GPL");