microcode_intel.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468
  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * This driver allows to upgrade microcode on Intel processors
  8. * belonging to IA-32 family - PentiumPro, Pentium II,
  9. * Pentium III, Xeon, Pentium 4, etc.
  10. *
  11. * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
  12. * Software Developer's Manual
  13. * Order Number 253668 or free download from:
  14. *
  15. * http://developer.intel.com/Assets/PDF/manual/253668.pdf
  16. *
  17. * For more information, go to http://www.urbanmyth.org/microcode
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. *
  24. * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
  25. * Initial release.
  26. * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
  27. * Added read() support + cleanups.
  28. * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
  29. * Added 'device trimming' support. open(O_WRONLY) zeroes
  30. * and frees the saved copy of applied microcode.
  31. * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
  32. * Made to use devfs (/dev/cpu/microcode) + cleanups.
  33. * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
  34. * Added misc device support (now uses both devfs and misc).
  35. * Added MICROCODE_IOCFREE ioctl to clear memory.
  36. * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
  37. * Messages for error cases (non Intel & no suitable microcode).
  38. * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
  39. * Removed ->release(). Removed exclusive open and status bitmap.
  40. * Added microcode_rwsem to serialize read()/write()/ioctl().
  41. * Removed global kernel lock usage.
  42. * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
  43. * Write 0 to 0x8B msr and then cpuid before reading revision,
  44. * so that it works even if there were no update done by the
  45. * BIOS. Otherwise, reading from 0x8B gives junk (which happened
  46. * to be 0 on my machine which is why it worked even when I
  47. * disabled update by the BIOS)
  48. * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
  49. * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
  50. * Tigran Aivazian <tigran@veritas.com>
  51. * Intel Pentium 4 processor support and bugfixes.
  52. * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
  53. * Bugfix for HT (Hyper-Threading) enabled processors
  54. * whereby processor resources are shared by all logical processors
  55. * in a single CPU package.
  56. * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
  57. * Tigran Aivazian <tigran@veritas.com>,
  58. * Serialize updates as required on HT processors due to
  59. * speculative nature of implementation.
  60. * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
  61. * Fix the panic when writing zero-length microcode chunk.
  62. * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
  63. * Jun Nakajima <jun.nakajima@intel.com>
  64. * Support for the microcode updates in the new format.
  65. * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
  66. * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
  67. * because we no longer hold a copy of applied microcode
  68. * in kernel memory.
  69. * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
  70. * Fix sigmatch() macro to handle old CPUs with pf == 0.
  71. * Thanks to Stuart Swales for pointing out this bug.
  72. */
  73. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  74. #include <linux/firmware.h>
  75. #include <linux/uaccess.h>
  76. #include <linux/kernel.h>
  77. #include <linux/module.h>
  78. #include <linux/vmalloc.h>
  79. #include <asm/microcode.h>
  80. #include <asm/processor.h>
  81. #include <asm/msr.h>
  82. MODULE_DESCRIPTION("Microcode Update Driver");
  83. MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
  84. MODULE_LICENSE("GPL");
  85. struct microcode_header_intel {
  86. unsigned int hdrver;
  87. unsigned int rev;
  88. unsigned int date;
  89. unsigned int sig;
  90. unsigned int cksum;
  91. unsigned int ldrver;
  92. unsigned int pf;
  93. unsigned int datasize;
  94. unsigned int totalsize;
  95. unsigned int reserved[3];
  96. };
  97. struct microcode_intel {
  98. struct microcode_header_intel hdr;
  99. unsigned int bits[0];
  100. };
  101. /* microcode format is extended from prescott processors */
  102. struct extended_signature {
  103. unsigned int sig;
  104. unsigned int pf;
  105. unsigned int cksum;
  106. };
  107. struct extended_sigtable {
  108. unsigned int count;
  109. unsigned int cksum;
  110. unsigned int reserved[3];
  111. struct extended_signature sigs[0];
  112. };
  113. #define DEFAULT_UCODE_DATASIZE (2000)
  114. #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
  115. #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
  116. #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
  117. #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
  118. #define DWSIZE (sizeof(u32))
  119. #define get_totalsize(mc) \
  120. (((struct microcode_intel *)mc)->hdr.totalsize ? \
  121. ((struct microcode_intel *)mc)->hdr.totalsize : \
  122. DEFAULT_UCODE_TOTALSIZE)
  123. #define get_datasize(mc) \
  124. (((struct microcode_intel *)mc)->hdr.datasize ? \
  125. ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
  126. #define sigmatch(s1, s2, p1, p2) \
  127. (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
  128. #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
  129. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  130. {
  131. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  132. unsigned int val[2];
  133. memset(csig, 0, sizeof(*csig));
  134. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  135. cpu_has(c, X86_FEATURE_IA64)) {
  136. pr_err("CPU%d not a capable Intel processor\n", cpu_num);
  137. return -1;
  138. }
  139. csig->sig = cpuid_eax(0x00000001);
  140. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  141. /* get processor flags from MSR 0x17 */
  142. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  143. csig->pf = 1 << ((val[1] >> 18) & 7);
  144. }
  145. csig->rev = c->microcode;
  146. pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
  147. cpu_num, csig->sig, csig->pf, csig->rev);
  148. return 0;
  149. }
  150. static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
  151. {
  152. return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
  153. }
  154. static inline int
  155. update_match_revision(struct microcode_header_intel *mc_header, int rev)
  156. {
  157. return (mc_header->rev <= rev) ? 0 : 1;
  158. }
  159. static int microcode_sanity_check(void *mc)
  160. {
  161. unsigned long total_size, data_size, ext_table_size;
  162. struct microcode_header_intel *mc_header = mc;
  163. struct extended_sigtable *ext_header = NULL;
  164. int sum, orig_sum, ext_sigcount = 0, i;
  165. struct extended_signature *ext_sig;
  166. total_size = get_totalsize(mc_header);
  167. data_size = get_datasize(mc_header);
  168. if (data_size + MC_HEADER_SIZE > total_size) {
  169. pr_err("error! Bad data size in microcode data file\n");
  170. return -EINVAL;
  171. }
  172. if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
  173. pr_err("error! Unknown microcode update format\n");
  174. return -EINVAL;
  175. }
  176. ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
  177. if (ext_table_size) {
  178. if ((ext_table_size < EXT_HEADER_SIZE)
  179. || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
  180. pr_err("error! Small exttable size in microcode data file\n");
  181. return -EINVAL;
  182. }
  183. ext_header = mc + MC_HEADER_SIZE + data_size;
  184. if (ext_table_size != exttable_size(ext_header)) {
  185. pr_err("error! Bad exttable size in microcode data file\n");
  186. return -EFAULT;
  187. }
  188. ext_sigcount = ext_header->count;
  189. }
  190. /* check extended table checksum */
  191. if (ext_table_size) {
  192. int ext_table_sum = 0;
  193. int *ext_tablep = (int *)ext_header;
  194. i = ext_table_size / DWSIZE;
  195. while (i--)
  196. ext_table_sum += ext_tablep[i];
  197. if (ext_table_sum) {
  198. pr_warning("aborting, bad extended signature table checksum\n");
  199. return -EINVAL;
  200. }
  201. }
  202. /* calculate the checksum */
  203. orig_sum = 0;
  204. i = (MC_HEADER_SIZE + data_size) / DWSIZE;
  205. while (i--)
  206. orig_sum += ((int *)mc)[i];
  207. if (orig_sum) {
  208. pr_err("aborting, bad checksum\n");
  209. return -EINVAL;
  210. }
  211. if (!ext_table_size)
  212. return 0;
  213. /* check extended signature checksum */
  214. for (i = 0; i < ext_sigcount; i++) {
  215. ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
  216. EXT_SIGNATURE_SIZE * i;
  217. sum = orig_sum
  218. - (mc_header->sig + mc_header->pf + mc_header->cksum)
  219. + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
  220. if (sum) {
  221. pr_err("aborting, bad checksum\n");
  222. return -EINVAL;
  223. }
  224. }
  225. return 0;
  226. }
  227. /*
  228. * return 0 - no update found
  229. * return 1 - found update
  230. */
  231. static int
  232. get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
  233. {
  234. struct microcode_header_intel *mc_header = mc;
  235. struct extended_sigtable *ext_header;
  236. unsigned long total_size = get_totalsize(mc_header);
  237. int ext_sigcount, i;
  238. struct extended_signature *ext_sig;
  239. if (!update_match_revision(mc_header, rev))
  240. return 0;
  241. if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
  242. return 1;
  243. /* Look for ext. headers: */
  244. if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
  245. return 0;
  246. ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
  247. ext_sigcount = ext_header->count;
  248. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  249. for (i = 0; i < ext_sigcount; i++) {
  250. if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
  251. return 1;
  252. ext_sig++;
  253. }
  254. return 0;
  255. }
  256. static int apply_microcode(int cpu)
  257. {
  258. struct microcode_intel *mc_intel;
  259. struct ucode_cpu_info *uci;
  260. unsigned int val[2];
  261. int cpu_num = raw_smp_processor_id();
  262. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  263. uci = ucode_cpu_info + cpu;
  264. mc_intel = uci->mc;
  265. /* We should bind the task to the CPU */
  266. BUG_ON(cpu_num != cpu);
  267. if (mc_intel == NULL)
  268. return 0;
  269. /* write microcode via MSR 0x79 */
  270. wrmsr(MSR_IA32_UCODE_WRITE,
  271. (unsigned long) mc_intel->bits,
  272. (unsigned long) mc_intel->bits >> 16 >> 16);
  273. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  274. /* As documented in the SDM: Do a CPUID 1 here */
  275. sync_core();
  276. /* get the current revision from MSR 0x8B */
  277. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  278. if (val[1] != mc_intel->hdr.rev) {
  279. pr_err("CPU%d update to revision 0x%x failed\n",
  280. cpu_num, mc_intel->hdr.rev);
  281. return -1;
  282. }
  283. pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
  284. cpu_num, val[1],
  285. mc_intel->hdr.date & 0xffff,
  286. mc_intel->hdr.date >> 24,
  287. (mc_intel->hdr.date >> 16) & 0xff);
  288. uci->cpu_sig.rev = val[1];
  289. c->microcode = val[1];
  290. return 0;
  291. }
  292. static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
  293. int (*get_ucode_data)(void *, const void *, size_t))
  294. {
  295. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  296. u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
  297. int new_rev = uci->cpu_sig.rev;
  298. unsigned int leftover = size;
  299. enum ucode_state state = UCODE_OK;
  300. unsigned int curr_mc_size = 0;
  301. while (leftover) {
  302. struct microcode_header_intel mc_header;
  303. unsigned int mc_size;
  304. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  305. break;
  306. mc_size = get_totalsize(&mc_header);
  307. if (!mc_size || mc_size > leftover) {
  308. pr_err("error! Bad data in microcode data file\n");
  309. break;
  310. }
  311. /* For performance reasons, reuse mc area when possible */
  312. if (!mc || mc_size > curr_mc_size) {
  313. vfree(mc);
  314. mc = vmalloc(mc_size);
  315. if (!mc)
  316. break;
  317. curr_mc_size = mc_size;
  318. }
  319. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  320. microcode_sanity_check(mc) < 0) {
  321. break;
  322. }
  323. if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
  324. vfree(new_mc);
  325. new_rev = mc_header.rev;
  326. new_mc = mc;
  327. mc = NULL; /* trigger new vmalloc */
  328. }
  329. ucode_ptr += mc_size;
  330. leftover -= mc_size;
  331. }
  332. vfree(mc);
  333. if (leftover) {
  334. vfree(new_mc);
  335. state = UCODE_ERROR;
  336. goto out;
  337. }
  338. if (!new_mc) {
  339. state = UCODE_NFOUND;
  340. goto out;
  341. }
  342. vfree(uci->mc);
  343. uci->mc = (struct microcode_intel *)new_mc;
  344. pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
  345. cpu, new_rev, uci->cpu_sig.rev);
  346. out:
  347. return state;
  348. }
  349. static int get_ucode_fw(void *to, const void *from, size_t n)
  350. {
  351. memcpy(to, from, n);
  352. return 0;
  353. }
  354. static enum ucode_state request_microcode_fw(int cpu, struct device *device)
  355. {
  356. char name[30];
  357. struct cpuinfo_x86 *c = &cpu_data(cpu);
  358. const struct firmware *firmware;
  359. enum ucode_state ret;
  360. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  361. c->x86, c->x86_model, c->x86_mask);
  362. if (request_firmware(&firmware, name, device)) {
  363. pr_debug("data file %s load failed\n", name);
  364. return UCODE_NFOUND;
  365. }
  366. ret = generic_load_microcode(cpu, (void *)firmware->data,
  367. firmware->size, &get_ucode_fw);
  368. release_firmware(firmware);
  369. return ret;
  370. }
  371. static int get_ucode_user(void *to, const void *from, size_t n)
  372. {
  373. return copy_from_user(to, from, n);
  374. }
  375. static enum ucode_state
  376. request_microcode_user(int cpu, const void __user *buf, size_t size)
  377. {
  378. return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
  379. }
  380. static void microcode_fini_cpu(int cpu)
  381. {
  382. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  383. vfree(uci->mc);
  384. uci->mc = NULL;
  385. }
  386. static struct microcode_ops microcode_intel_ops = {
  387. .request_microcode_user = request_microcode_user,
  388. .request_microcode_fw = request_microcode_fw,
  389. .collect_cpu_info = collect_cpu_info,
  390. .apply_microcode = apply_microcode,
  391. .microcode_fini_cpu = microcode_fini_cpu,
  392. };
  393. struct microcode_ops * __init init_intel_microcode(void)
  394. {
  395. return &microcode_intel_ops;
  396. }