io.h 10 KB

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  1. #ifndef _ASM_X86_IO_H
  2. #define _ASM_X86_IO_H
  3. /*
  4. * This file contains the definitions for the x86 IO instructions
  5. * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  6. * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  7. * versions of the single-IO instructions (inb_p/inw_p/..).
  8. *
  9. * This file is not meant to be obfuscating: it's just complicated
  10. * to (a) handle it all in a way that makes gcc able to optimize it
  11. * as well as possible and (b) trying to avoid writing the same thing
  12. * over and over again with slight variations and possibly making a
  13. * mistake somewhere.
  14. */
  15. /*
  16. * Thanks to James van Artsdalen for a better timing-fix than
  17. * the two short jumps: using outb's to a nonexistent port seems
  18. * to guarantee better timings even on fast machines.
  19. *
  20. * On the other hand, I'd like to be sure of a non-existent port:
  21. * I feel a bit unsafe about using 0x80 (should be safe, though)
  22. *
  23. * Linus
  24. */
  25. /*
  26. * Bit simplified and optimized by Jan Hubicka
  27. * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  28. *
  29. * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  30. * isa_read[wl] and isa_write[wl] fixed
  31. * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  32. */
  33. #define ARCH_HAS_IOREMAP_WC
  34. #include <linux/string.h>
  35. #include <linux/compiler.h>
  36. #include <asm/page.h>
  37. #define build_mmio_read(name, size, type, reg, barrier) \
  38. static inline type name(const volatile void __iomem *addr) \
  39. { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
  40. :"m" (*(volatile type __force *)addr) barrier); return ret; }
  41. #define build_mmio_write(name, size, type, reg, barrier) \
  42. static inline void name(type val, volatile void __iomem *addr) \
  43. { asm volatile("mov" size " %0,%1": :reg (val), \
  44. "m" (*(volatile type __force *)addr) barrier); }
  45. build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
  46. build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
  47. build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
  48. build_mmio_read(__readb, "b", unsigned char, "=q", )
  49. build_mmio_read(__readw, "w", unsigned short, "=r", )
  50. build_mmio_read(__readl, "l", unsigned int, "=r", )
  51. build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
  52. build_mmio_write(writew, "w", unsigned short, "r", :"memory")
  53. build_mmio_write(writel, "l", unsigned int, "r", :"memory")
  54. build_mmio_write(__writeb, "b", unsigned char, "q", )
  55. build_mmio_write(__writew, "w", unsigned short, "r", )
  56. build_mmio_write(__writel, "l", unsigned int, "r", )
  57. #define readb_relaxed(a) __readb(a)
  58. #define readw_relaxed(a) __readw(a)
  59. #define readl_relaxed(a) __readl(a)
  60. #define __raw_readb __readb
  61. #define __raw_readw __readw
  62. #define __raw_readl __readl
  63. #define __raw_writeb __writeb
  64. #define __raw_writew __writew
  65. #define __raw_writel __writel
  66. #define mmiowb() barrier()
  67. #ifdef CONFIG_X86_64
  68. build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
  69. build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
  70. #define readq_relaxed(a) readq(a)
  71. #define __raw_readq(a) readq(a)
  72. #define __raw_writeq(val, addr) writeq(val, addr)
  73. /* Let people know that we have them */
  74. #define readq readq
  75. #define writeq writeq
  76. #endif
  77. /**
  78. * virt_to_phys - map virtual addresses to physical
  79. * @address: address to remap
  80. *
  81. * The returned physical address is the physical (CPU) mapping for
  82. * the memory address given. It is only valid to use this function on
  83. * addresses directly mapped or allocated via kmalloc.
  84. *
  85. * This function does not give bus mappings for DMA transfers. In
  86. * almost all conceivable cases a device driver should not be using
  87. * this function
  88. */
  89. static inline phys_addr_t virt_to_phys(volatile void *address)
  90. {
  91. return __pa(address);
  92. }
  93. /**
  94. * phys_to_virt - map physical address to virtual
  95. * @address: address to remap
  96. *
  97. * The returned virtual address is a current CPU mapping for
  98. * the memory address given. It is only valid to use this function on
  99. * addresses that have a kernel mapping
  100. *
  101. * This function does not handle bus mappings for DMA transfers. In
  102. * almost all conceivable cases a device driver should not be using
  103. * this function
  104. */
  105. static inline void *phys_to_virt(phys_addr_t address)
  106. {
  107. return __va(address);
  108. }
  109. /*
  110. * Change "struct page" to physical address.
  111. */
  112. #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  113. /*
  114. * ISA I/O bus memory addresses are 1:1 with the physical address.
  115. * However, we truncate the address to unsigned int to avoid undesirable
  116. * promitions in legacy drivers.
  117. */
  118. static inline unsigned int isa_virt_to_bus(volatile void *address)
  119. {
  120. return (unsigned int)virt_to_phys(address);
  121. }
  122. #define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
  123. #define isa_bus_to_virt phys_to_virt
  124. /*
  125. * However PCI ones are not necessarily 1:1 and therefore these interfaces
  126. * are forbidden in portable PCI drivers.
  127. *
  128. * Allow them on x86 for legacy drivers, though.
  129. */
  130. #define virt_to_bus virt_to_phys
  131. #define bus_to_virt phys_to_virt
  132. /**
  133. * ioremap - map bus memory into CPU space
  134. * @offset: bus address of the memory
  135. * @size: size of the resource to map
  136. *
  137. * ioremap performs a platform specific sequence of operations to
  138. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  139. * writew/writel functions and the other mmio helpers. The returned
  140. * address is not guaranteed to be usable directly as a virtual
  141. * address.
  142. *
  143. * If the area you are trying to map is a PCI BAR you should have a
  144. * look at pci_iomap().
  145. */
  146. extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
  147. extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
  148. extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
  149. unsigned long prot_val);
  150. /*
  151. * The default ioremap() behavior is non-cached:
  152. */
  153. static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
  154. {
  155. return ioremap_nocache(offset, size);
  156. }
  157. extern void iounmap(volatile void __iomem *addr);
  158. extern void set_iounmap_nonlazy(void);
  159. #ifdef __KERNEL__
  160. #include <asm-generic/iomap.h>
  161. #include <linux/vmalloc.h>
  162. /*
  163. * Convert a virtual cached pointer to an uncached pointer
  164. */
  165. #define xlate_dev_kmem_ptr(p) p
  166. static inline void
  167. memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
  168. {
  169. memset((void __force *)addr, val, count);
  170. }
  171. static inline void
  172. memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
  173. {
  174. memcpy(dst, (const void __force *)src, count);
  175. }
  176. static inline void
  177. memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
  178. {
  179. memcpy((void __force *)dst, src, count);
  180. }
  181. /*
  182. * ISA space is 'always mapped' on a typical x86 system, no need to
  183. * explicitly ioremap() it. The fact that the ISA IO space is mapped
  184. * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
  185. * are physical addresses. The following constant pointer can be
  186. * used as the IO-area pointer (it can be iounmapped as well, so the
  187. * analogy with PCI is quite large):
  188. */
  189. #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
  190. /*
  191. * Cache management
  192. *
  193. * This needed for two cases
  194. * 1. Out of order aware processors
  195. * 2. Accidentally out of order processors (PPro errata #51)
  196. */
  197. static inline void flush_write_buffers(void)
  198. {
  199. #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
  200. asm volatile("lock; addl $0,0(%%esp)": : :"memory");
  201. #endif
  202. }
  203. #endif /* __KERNEL__ */
  204. extern void native_io_delay(void);
  205. extern int io_delay_type;
  206. extern void io_delay_init(void);
  207. #if defined(CONFIG_PARAVIRT)
  208. #include <asm/paravirt.h>
  209. #else
  210. static inline void slow_down_io(void)
  211. {
  212. native_io_delay();
  213. #ifdef REALLY_SLOW_IO
  214. native_io_delay();
  215. native_io_delay();
  216. native_io_delay();
  217. #endif
  218. }
  219. #endif
  220. #define BUILDIO(bwl, bw, type) \
  221. static inline void out##bwl(unsigned type value, int port) \
  222. { \
  223. asm volatile("out" #bwl " %" #bw "0, %w1" \
  224. : : "a"(value), "Nd"(port)); \
  225. } \
  226. \
  227. static inline unsigned type in##bwl(int port) \
  228. { \
  229. unsigned type value; \
  230. asm volatile("in" #bwl " %w1, %" #bw "0" \
  231. : "=a"(value) : "Nd"(port)); \
  232. return value; \
  233. } \
  234. \
  235. static inline void out##bwl##_p(unsigned type value, int port) \
  236. { \
  237. out##bwl(value, port); \
  238. slow_down_io(); \
  239. } \
  240. \
  241. static inline unsigned type in##bwl##_p(int port) \
  242. { \
  243. unsigned type value = in##bwl(port); \
  244. slow_down_io(); \
  245. return value; \
  246. } \
  247. \
  248. static inline void outs##bwl(int port, const void *addr, unsigned long count) \
  249. { \
  250. asm volatile("rep; outs" #bwl \
  251. : "+S"(addr), "+c"(count) : "d"(port)); \
  252. } \
  253. \
  254. static inline void ins##bwl(int port, void *addr, unsigned long count) \
  255. { \
  256. asm volatile("rep; ins" #bwl \
  257. : "+D"(addr), "+c"(count) : "d"(port)); \
  258. }
  259. BUILDIO(b, b, char)
  260. BUILDIO(w, w, short)
  261. BUILDIO(l, , int)
  262. extern void *xlate_dev_mem_ptr(unsigned long phys);
  263. extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
  264. extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
  265. unsigned long prot_val);
  266. extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
  267. /*
  268. * early_ioremap() and early_iounmap() are for temporary early boot-time
  269. * mappings, before the real ioremap() is functional.
  270. * A boot-time mapping is currently limited to at most 16 pages.
  271. */
  272. extern void early_ioremap_init(void);
  273. extern void early_ioremap_reset(void);
  274. extern void __iomem *early_ioremap(resource_size_t phys_addr,
  275. unsigned long size);
  276. extern void __iomem *early_memremap(resource_size_t phys_addr,
  277. unsigned long size);
  278. extern void early_iounmap(void __iomem *addr, unsigned long size);
  279. extern void fixup_early_ioremap(void);
  280. extern bool is_early_ioremap_ptep(pte_t *ptep);
  281. #ifdef CONFIG_XEN
  282. #include <xen/xen.h>
  283. struct bio_vec;
  284. extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
  285. const struct bio_vec *vec2);
  286. #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
  287. (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
  288. (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
  289. #endif /* CONFIG_XEN */
  290. #define IO_SPACE_LIMIT 0xffff
  291. #endif /* _ASM_X86_IO_H */