cmpxchg_32.h 3.0 KB

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  1. /* 32-bit atomic xchg() and cmpxchg() definitions.
  2. *
  3. * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
  4. * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
  5. * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
  6. *
  7. * Additions by Keith M Wesolowski (wesolows@foobazco.org) based
  8. * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
  9. */
  10. #ifndef __ARCH_SPARC_CMPXCHG__
  11. #define __ARCH_SPARC_CMPXCHG__
  12. #include <asm/btfixup.h>
  13. /* This has special calling conventions */
  14. #ifndef CONFIG_SMP
  15. BTFIXUPDEF_CALL(void, ___xchg32, void)
  16. #endif
  17. static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
  18. {
  19. #ifdef CONFIG_SMP
  20. __asm__ __volatile__("swap [%2], %0"
  21. : "=&r" (val)
  22. : "0" (val), "r" (m)
  23. : "memory");
  24. return val;
  25. #else
  26. register unsigned long *ptr asm("g1");
  27. register unsigned long ret asm("g2");
  28. ptr = (unsigned long *) m;
  29. ret = val;
  30. /* Note: this is magic and the nop there is
  31. really needed. */
  32. __asm__ __volatile__(
  33. "mov %%o7, %%g4\n\t"
  34. "call ___f____xchg32\n\t"
  35. " nop\n\t"
  36. : "=&r" (ret)
  37. : "0" (ret), "r" (ptr)
  38. : "g3", "g4", "g7", "memory", "cc");
  39. return ret;
  40. #endif
  41. }
  42. extern void __xchg_called_with_bad_pointer(void);
  43. static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
  44. {
  45. switch (size) {
  46. case 4:
  47. return xchg_u32(ptr, x);
  48. }
  49. __xchg_called_with_bad_pointer();
  50. return x;
  51. }
  52. #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  53. /* Emulate cmpxchg() the same way we emulate atomics,
  54. * by hashing the object address and indexing into an array
  55. * of spinlocks to get a bit of performance...
  56. *
  57. * See arch/sparc/lib/atomic32.c for implementation.
  58. *
  59. * Cribbed from <asm-parisc/atomic.h>
  60. */
  61. #define __HAVE_ARCH_CMPXCHG 1
  62. /* bug catcher for when unsupported size is used - won't link */
  63. extern void __cmpxchg_called_with_bad_pointer(void);
  64. /* we only need to support cmpxchg of a u32 on sparc */
  65. extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
  66. /* don't worry...optimizer will get rid of most of this */
  67. static inline unsigned long
  68. __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
  69. {
  70. switch (size) {
  71. case 4:
  72. return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
  73. default:
  74. __cmpxchg_called_with_bad_pointer();
  75. break;
  76. }
  77. return old;
  78. }
  79. #define cmpxchg(ptr, o, n) \
  80. ({ \
  81. __typeof__(*(ptr)) _o_ = (o); \
  82. __typeof__(*(ptr)) _n_ = (n); \
  83. (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
  84. (unsigned long)_n_, sizeof(*(ptr))); \
  85. })
  86. #include <asm-generic/cmpxchg-local.h>
  87. /*
  88. * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
  89. * them available.
  90. */
  91. #define cmpxchg_local(ptr, o, n) \
  92. ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
  93. (unsigned long)(n), sizeof(*(ptr))))
  94. #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
  95. #endif /* __ARCH_SPARC_CMPXCHG__ */