setup.c 33 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mmc/host.h>
  14. #include <linux/mmc/sh_mmcif.h>
  15. #include <linux/mmc/sh_mobile_sdhi.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/usb/renesas_usbhs.h>
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/tsc2007.h>
  25. #include <linux/spi/spi.h>
  26. #include <linux/spi/sh_msiof.h>
  27. #include <linux/spi/mmc_spi.h>
  28. #include <linux/input.h>
  29. #include <linux/input/sh_keysc.h>
  30. #include <linux/sh_eth.h>
  31. #include <linux/videodev2.h>
  32. #include <video/sh_mobile_lcdc.h>
  33. #include <sound/sh_fsi.h>
  34. #include <media/sh_mobile_ceu.h>
  35. #include <media/soc_camera.h>
  36. #include <media/tw9910.h>
  37. #include <media/mt9t112.h>
  38. #include <asm/heartbeat.h>
  39. #include <asm/clock.h>
  40. #include <asm/suspend.h>
  41. #include <cpu/sh7724.h>
  42. /*
  43. * Address Interface BusWidth
  44. *-----------------------------------------
  45. * 0x0000_0000 uboot 16bit
  46. * 0x0004_0000 Linux romImage 16bit
  47. * 0x0014_0000 MTD for Linux 16bit
  48. * 0x0400_0000 Internal I/O 16/32bit
  49. * 0x0800_0000 DRAM 32bit
  50. * 0x1800_0000 MFI 16bit
  51. */
  52. /* SWITCH
  53. *------------------------------
  54. * DS2[1] = FlashROM write protect ON : write protect
  55. * OFF : No write protect
  56. * DS2[2] = RMII / TS, SCIF ON : RMII
  57. * OFF : TS, SCIF3
  58. * DS2[3] = Camera / Video ON : Camera
  59. * OFF : NTSC/PAL (IN)
  60. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  61. * OFF : SH7724 DV_CLK
  62. * DS2[6-7] = MMC / SD ON-OFF : SD
  63. * OFF-ON : MMC
  64. */
  65. /* Heartbeat */
  66. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  67. static struct heartbeat_data heartbeat_data = {
  68. .nr_bits = 4,
  69. .bit_pos = led_pos,
  70. };
  71. static struct resource heartbeat_resource = {
  72. .start = 0xA405012C, /* PTG */
  73. .end = 0xA405012E - 1,
  74. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  75. };
  76. static struct platform_device heartbeat_device = {
  77. .name = "heartbeat",
  78. .id = -1,
  79. .dev = {
  80. .platform_data = &heartbeat_data,
  81. },
  82. .num_resources = 1,
  83. .resource = &heartbeat_resource,
  84. };
  85. /* MTD */
  86. static struct mtd_partition nor_flash_partitions[] = {
  87. {
  88. .name = "boot loader",
  89. .offset = 0,
  90. .size = (5 * 1024 * 1024),
  91. .mask_flags = MTD_WRITEABLE, /* force read-only */
  92. }, {
  93. .name = "free-area",
  94. .offset = MTDPART_OFS_APPEND,
  95. .size = MTDPART_SIZ_FULL,
  96. },
  97. };
  98. static struct physmap_flash_data nor_flash_data = {
  99. .width = 2,
  100. .parts = nor_flash_partitions,
  101. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  102. };
  103. static struct resource nor_flash_resources[] = {
  104. [0] = {
  105. .name = "NOR Flash",
  106. .start = 0x00000000,
  107. .end = 0x03ffffff,
  108. .flags = IORESOURCE_MEM,
  109. }
  110. };
  111. static struct platform_device nor_flash_device = {
  112. .name = "physmap-flash",
  113. .resource = nor_flash_resources,
  114. .num_resources = ARRAY_SIZE(nor_flash_resources),
  115. .dev = {
  116. .platform_data = &nor_flash_data,
  117. },
  118. };
  119. /* SH Eth */
  120. #define SH_ETH_ADDR (0xA4600000)
  121. static struct resource sh_eth_resources[] = {
  122. [0] = {
  123. .start = SH_ETH_ADDR,
  124. .end = SH_ETH_ADDR + 0x1FC,
  125. .flags = IORESOURCE_MEM,
  126. },
  127. [1] = {
  128. .start = 91,
  129. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  130. },
  131. };
  132. static struct sh_eth_plat_data sh_eth_plat = {
  133. .phy = 0x1f, /* SMSC LAN8700 */
  134. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  135. .register_type = SH_ETH_REG_FAST_SH4,
  136. .phy_interface = PHY_INTERFACE_MODE_MII,
  137. .ether_link_active_low = 1
  138. };
  139. static struct platform_device sh_eth_device = {
  140. .name = "sh-eth",
  141. .id = 0,
  142. .dev = {
  143. .platform_data = &sh_eth_plat,
  144. },
  145. .num_resources = ARRAY_SIZE(sh_eth_resources),
  146. .resource = sh_eth_resources,
  147. };
  148. /* USB0 host */
  149. static void usb0_port_power(int port, int power)
  150. {
  151. gpio_set_value(GPIO_PTB4, power);
  152. }
  153. static struct r8a66597_platdata usb0_host_data = {
  154. .on_chip = 1,
  155. .port_power = usb0_port_power,
  156. };
  157. static struct resource usb0_host_resources[] = {
  158. [0] = {
  159. .start = 0xa4d80000,
  160. .end = 0xa4d80124 - 1,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. [1] = {
  164. .start = 65,
  165. .end = 65,
  166. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  167. },
  168. };
  169. static struct platform_device usb0_host_device = {
  170. .name = "r8a66597_hcd",
  171. .id = 0,
  172. .dev = {
  173. .dma_mask = NULL, /* not use dma */
  174. .coherent_dma_mask = 0xffffffff,
  175. .platform_data = &usb0_host_data,
  176. },
  177. .num_resources = ARRAY_SIZE(usb0_host_resources),
  178. .resource = usb0_host_resources,
  179. };
  180. /* USB1 host/function */
  181. static void usb1_port_power(int port, int power)
  182. {
  183. gpio_set_value(GPIO_PTB5, power);
  184. }
  185. static struct r8a66597_platdata usb1_common_data = {
  186. .on_chip = 1,
  187. .port_power = usb1_port_power,
  188. };
  189. static struct resource usb1_common_resources[] = {
  190. [0] = {
  191. .start = 0xa4d90000,
  192. .end = 0xa4d90124 - 1,
  193. .flags = IORESOURCE_MEM,
  194. },
  195. [1] = {
  196. .start = 66,
  197. .end = 66,
  198. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  199. },
  200. };
  201. static struct platform_device usb1_common_device = {
  202. /* .name will be added in arch_setup */
  203. .id = 1,
  204. .dev = {
  205. .dma_mask = NULL, /* not use dma */
  206. .coherent_dma_mask = 0xffffffff,
  207. .platform_data = &usb1_common_data,
  208. },
  209. .num_resources = ARRAY_SIZE(usb1_common_resources),
  210. .resource = usb1_common_resources,
  211. };
  212. /*
  213. * USBHS
  214. */
  215. static int usbhs_get_id(struct platform_device *pdev)
  216. {
  217. return gpio_get_value(GPIO_PTB3);
  218. }
  219. static struct renesas_usbhs_platform_info usbhs_info = {
  220. .platform_callback = {
  221. .get_id = usbhs_get_id,
  222. },
  223. .driver_param = {
  224. .buswait_bwait = 4,
  225. .detection_delay = 5,
  226. .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
  227. .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
  228. .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
  229. .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
  230. },
  231. };
  232. static struct resource usbhs_resources[] = {
  233. [0] = {
  234. .start = 0xa4d90000,
  235. .end = 0xa4d90124 - 1,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. [1] = {
  239. .start = 66,
  240. .end = 66,
  241. .flags = IORESOURCE_IRQ,
  242. },
  243. };
  244. static struct platform_device usbhs_device = {
  245. .name = "renesas_usbhs",
  246. .id = 1,
  247. .dev = {
  248. .dma_mask = NULL, /* not use dma */
  249. .coherent_dma_mask = 0xffffffff,
  250. .platform_data = &usbhs_info,
  251. },
  252. .num_resources = ARRAY_SIZE(usbhs_resources),
  253. .resource = usbhs_resources,
  254. };
  255. /* LCDC */
  256. static const struct fb_videomode ecovec_lcd_modes[] = {
  257. {
  258. .name = "Panel",
  259. .xres = 800,
  260. .yres = 480,
  261. .left_margin = 220,
  262. .right_margin = 110,
  263. .hsync_len = 70,
  264. .upper_margin = 20,
  265. .lower_margin = 5,
  266. .vsync_len = 5,
  267. .sync = 0, /* hsync and vsync are active low */
  268. },
  269. };
  270. static const struct fb_videomode ecovec_dvi_modes[] = {
  271. {
  272. .name = "DVI",
  273. .xres = 1280,
  274. .yres = 720,
  275. .left_margin = 220,
  276. .right_margin = 110,
  277. .hsync_len = 40,
  278. .upper_margin = 20,
  279. .lower_margin = 5,
  280. .vsync_len = 5,
  281. .sync = 0, /* hsync and vsync are active low */
  282. },
  283. };
  284. static int ecovec24_set_brightness(int brightness)
  285. {
  286. gpio_set_value(GPIO_PTR1, brightness);
  287. return 0;
  288. }
  289. static int ecovec24_get_brightness(void)
  290. {
  291. return gpio_get_value(GPIO_PTR1);
  292. }
  293. static struct sh_mobile_lcdc_info lcdc_info = {
  294. .ch[0] = {
  295. .interface_type = RGB18,
  296. .chan = LCDC_CHAN_MAINLCD,
  297. .fourcc = V4L2_PIX_FMT_RGB565,
  298. .panel_cfg = { /* 7.0 inch */
  299. .width = 152,
  300. .height = 91,
  301. },
  302. .bl_info = {
  303. .name = "sh_mobile_lcdc_bl",
  304. .max_brightness = 1,
  305. .set_brightness = ecovec24_set_brightness,
  306. .get_brightness = ecovec24_get_brightness,
  307. },
  308. }
  309. };
  310. static struct resource lcdc_resources[] = {
  311. [0] = {
  312. .name = "LCDC",
  313. .start = 0xfe940000,
  314. .end = 0xfe942fff,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. [1] = {
  318. .start = 106,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. };
  322. static struct platform_device lcdc_device = {
  323. .name = "sh_mobile_lcdc_fb",
  324. .num_resources = ARRAY_SIZE(lcdc_resources),
  325. .resource = lcdc_resources,
  326. .dev = {
  327. .platform_data = &lcdc_info,
  328. },
  329. };
  330. /* CEU0 */
  331. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  332. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  333. };
  334. static struct resource ceu0_resources[] = {
  335. [0] = {
  336. .name = "CEU0",
  337. .start = 0xfe910000,
  338. .end = 0xfe91009f,
  339. .flags = IORESOURCE_MEM,
  340. },
  341. [1] = {
  342. .start = 52,
  343. .flags = IORESOURCE_IRQ,
  344. },
  345. [2] = {
  346. /* place holder for contiguous memory */
  347. },
  348. };
  349. static struct platform_device ceu0_device = {
  350. .name = "sh_mobile_ceu",
  351. .id = 0, /* "ceu0" clock */
  352. .num_resources = ARRAY_SIZE(ceu0_resources),
  353. .resource = ceu0_resources,
  354. .dev = {
  355. .platform_data = &sh_mobile_ceu0_info,
  356. },
  357. };
  358. /* CEU1 */
  359. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  360. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  361. };
  362. static struct resource ceu1_resources[] = {
  363. [0] = {
  364. .name = "CEU1",
  365. .start = 0xfe914000,
  366. .end = 0xfe91409f,
  367. .flags = IORESOURCE_MEM,
  368. },
  369. [1] = {
  370. .start = 63,
  371. .flags = IORESOURCE_IRQ,
  372. },
  373. [2] = {
  374. /* place holder for contiguous memory */
  375. },
  376. };
  377. static struct platform_device ceu1_device = {
  378. .name = "sh_mobile_ceu",
  379. .id = 1, /* "ceu1" clock */
  380. .num_resources = ARRAY_SIZE(ceu1_resources),
  381. .resource = ceu1_resources,
  382. .dev = {
  383. .platform_data = &sh_mobile_ceu1_info,
  384. },
  385. };
  386. /* I2C device */
  387. static struct i2c_board_info i2c0_devices[] = {
  388. {
  389. I2C_BOARD_INFO("da7210", 0x1a),
  390. },
  391. };
  392. static struct i2c_board_info i2c1_devices[] = {
  393. {
  394. I2C_BOARD_INFO("r2025sd", 0x32),
  395. },
  396. {
  397. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  398. .irq = 33,
  399. }
  400. };
  401. /* KEYSC */
  402. static struct sh_keysc_info keysc_info = {
  403. .mode = SH_KEYSC_MODE_1,
  404. .scan_timing = 3,
  405. .delay = 50,
  406. .kycr2_delay = 100,
  407. .keycodes = { KEY_1, 0, 0, 0, 0,
  408. KEY_2, 0, 0, 0, 0,
  409. KEY_3, 0, 0, 0, 0,
  410. KEY_4, 0, 0, 0, 0,
  411. KEY_5, 0, 0, 0, 0,
  412. KEY_6, 0, 0, 0, 0, },
  413. };
  414. static struct resource keysc_resources[] = {
  415. [0] = {
  416. .name = "KEYSC",
  417. .start = 0x044b0000,
  418. .end = 0x044b000f,
  419. .flags = IORESOURCE_MEM,
  420. },
  421. [1] = {
  422. .start = 79,
  423. .flags = IORESOURCE_IRQ,
  424. },
  425. };
  426. static struct platform_device keysc_device = {
  427. .name = "sh_keysc",
  428. .id = 0, /* keysc0 clock */
  429. .num_resources = ARRAY_SIZE(keysc_resources),
  430. .resource = keysc_resources,
  431. .dev = {
  432. .platform_data = &keysc_info,
  433. },
  434. };
  435. /* TouchScreen */
  436. #define IRQ0 32
  437. static int ts_get_pendown_state(void)
  438. {
  439. int val = 0;
  440. gpio_free(GPIO_FN_INTC_IRQ0);
  441. gpio_request(GPIO_PTZ0, NULL);
  442. gpio_direction_input(GPIO_PTZ0);
  443. val = gpio_get_value(GPIO_PTZ0);
  444. gpio_free(GPIO_PTZ0);
  445. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  446. return val ? 0 : 1;
  447. }
  448. static int ts_init(void)
  449. {
  450. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  451. return 0;
  452. }
  453. static struct tsc2007_platform_data tsc2007_info = {
  454. .model = 2007,
  455. .x_plate_ohms = 180,
  456. .get_pendown_state = ts_get_pendown_state,
  457. .init_platform_hw = ts_init,
  458. };
  459. static struct i2c_board_info ts_i2c_clients = {
  460. I2C_BOARD_INFO("tsc2007", 0x48),
  461. .type = "tsc2007",
  462. .platform_data = &tsc2007_info,
  463. .irq = IRQ0,
  464. };
  465. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  466. /* SDHI0 */
  467. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  468. {
  469. gpio_set_value(GPIO_PTB6, state);
  470. }
  471. static int sdhi0_get_cd(struct platform_device *pdev)
  472. {
  473. return !gpio_get_value(GPIO_PTY7);
  474. }
  475. static struct sh_mobile_sdhi_info sdhi0_info = {
  476. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  477. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  478. .set_pwr = sdhi0_set_pwr,
  479. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
  480. MMC_CAP_NEEDS_POLL,
  481. .get_cd = sdhi0_get_cd,
  482. };
  483. static struct resource sdhi0_resources[] = {
  484. [0] = {
  485. .name = "SDHI0",
  486. .start = 0x04ce0000,
  487. .end = 0x04ce00ff,
  488. .flags = IORESOURCE_MEM,
  489. },
  490. [1] = {
  491. .start = 100,
  492. .flags = IORESOURCE_IRQ,
  493. },
  494. };
  495. static struct platform_device sdhi0_device = {
  496. .name = "sh_mobile_sdhi",
  497. .num_resources = ARRAY_SIZE(sdhi0_resources),
  498. .resource = sdhi0_resources,
  499. .id = 0,
  500. .dev = {
  501. .platform_data = &sdhi0_info,
  502. },
  503. };
  504. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  505. /* SDHI1 */
  506. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  507. {
  508. gpio_set_value(GPIO_PTB7, state);
  509. }
  510. static int sdhi1_get_cd(struct platform_device *pdev)
  511. {
  512. return !gpio_get_value(GPIO_PTW7);
  513. }
  514. static struct sh_mobile_sdhi_info sdhi1_info = {
  515. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  516. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  517. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
  518. MMC_CAP_NEEDS_POLL,
  519. .set_pwr = sdhi1_set_pwr,
  520. .get_cd = sdhi1_get_cd,
  521. };
  522. static struct resource sdhi1_resources[] = {
  523. [0] = {
  524. .name = "SDHI1",
  525. .start = 0x04cf0000,
  526. .end = 0x04cf00ff,
  527. .flags = IORESOURCE_MEM,
  528. },
  529. [1] = {
  530. .start = 23,
  531. .flags = IORESOURCE_IRQ,
  532. },
  533. };
  534. static struct platform_device sdhi1_device = {
  535. .name = "sh_mobile_sdhi",
  536. .num_resources = ARRAY_SIZE(sdhi1_resources),
  537. .resource = sdhi1_resources,
  538. .id = 1,
  539. .dev = {
  540. .platform_data = &sdhi1_info,
  541. },
  542. };
  543. #endif /* CONFIG_MMC_SH_MMCIF */
  544. #else
  545. /* MMC SPI */
  546. static int mmc_spi_get_ro(struct device *dev)
  547. {
  548. return gpio_get_value(GPIO_PTY6);
  549. }
  550. static int mmc_spi_get_cd(struct device *dev)
  551. {
  552. return !gpio_get_value(GPIO_PTY7);
  553. }
  554. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  555. {
  556. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  557. }
  558. static struct mmc_spi_platform_data mmc_spi_info = {
  559. .get_ro = mmc_spi_get_ro,
  560. .get_cd = mmc_spi_get_cd,
  561. .caps = MMC_CAP_NEEDS_POLL,
  562. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  563. .setpower = mmc_spi_setpower,
  564. };
  565. static struct spi_board_info spi_bus[] = {
  566. {
  567. .modalias = "mmc_spi",
  568. .platform_data = &mmc_spi_info,
  569. .max_speed_hz = 5000000,
  570. .mode = SPI_MODE_0,
  571. .controller_data = (void *) GPIO_PTM4,
  572. },
  573. };
  574. /* MSIOF0 */
  575. static struct sh_msiof_spi_info msiof0_data = {
  576. .num_chipselect = 1,
  577. };
  578. static struct resource msiof0_resources[] = {
  579. [0] = {
  580. .name = "MSIOF0",
  581. .start = 0xa4c40000,
  582. .end = 0xa4c40063,
  583. .flags = IORESOURCE_MEM,
  584. },
  585. [1] = {
  586. .start = 84,
  587. .flags = IORESOURCE_IRQ,
  588. },
  589. };
  590. static struct platform_device msiof0_device = {
  591. .name = "spi_sh_msiof",
  592. .id = 0, /* MSIOF0 */
  593. .dev = {
  594. .platform_data = &msiof0_data,
  595. },
  596. .num_resources = ARRAY_SIZE(msiof0_resources),
  597. .resource = msiof0_resources,
  598. };
  599. #endif
  600. /* I2C Video/Camera */
  601. static struct i2c_board_info i2c_camera[] = {
  602. {
  603. I2C_BOARD_INFO("tw9910", 0x45),
  604. },
  605. {
  606. /* 1st camera */
  607. I2C_BOARD_INFO("mt9t112", 0x3c),
  608. },
  609. {
  610. /* 2nd camera */
  611. I2C_BOARD_INFO("mt9t112", 0x3c),
  612. },
  613. };
  614. /* tw9910 */
  615. static int tw9910_power(struct device *dev, int mode)
  616. {
  617. int val = mode ? 0 : 1;
  618. gpio_set_value(GPIO_PTU2, val);
  619. if (mode)
  620. mdelay(100);
  621. return 0;
  622. }
  623. static struct tw9910_video_info tw9910_info = {
  624. .buswidth = SOCAM_DATAWIDTH_8,
  625. .mpout = TW9910_MPO_FIELD,
  626. };
  627. static struct soc_camera_link tw9910_link = {
  628. .i2c_adapter_id = 0,
  629. .bus_id = 1,
  630. .power = tw9910_power,
  631. .board_info = &i2c_camera[0],
  632. .priv = &tw9910_info,
  633. };
  634. /* mt9t112 */
  635. static int mt9t112_power1(struct device *dev, int mode)
  636. {
  637. gpio_set_value(GPIO_PTA3, mode);
  638. if (mode)
  639. mdelay(100);
  640. return 0;
  641. }
  642. static struct mt9t112_camera_info mt9t112_info1 = {
  643. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  644. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  645. };
  646. static struct soc_camera_link mt9t112_link1 = {
  647. .i2c_adapter_id = 0,
  648. .power = mt9t112_power1,
  649. .bus_id = 0,
  650. .board_info = &i2c_camera[1],
  651. .priv = &mt9t112_info1,
  652. };
  653. static int mt9t112_power2(struct device *dev, int mode)
  654. {
  655. gpio_set_value(GPIO_PTA4, mode);
  656. if (mode)
  657. mdelay(100);
  658. return 0;
  659. }
  660. static struct mt9t112_camera_info mt9t112_info2 = {
  661. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  662. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  663. };
  664. static struct soc_camera_link mt9t112_link2 = {
  665. .i2c_adapter_id = 1,
  666. .power = mt9t112_power2,
  667. .bus_id = 1,
  668. .board_info = &i2c_camera[2],
  669. .priv = &mt9t112_info2,
  670. };
  671. static struct platform_device camera_devices[] = {
  672. {
  673. .name = "soc-camera-pdrv",
  674. .id = 0,
  675. .dev = {
  676. .platform_data = &tw9910_link,
  677. },
  678. },
  679. {
  680. .name = "soc-camera-pdrv",
  681. .id = 1,
  682. .dev = {
  683. .platform_data = &mt9t112_link1,
  684. },
  685. },
  686. {
  687. .name = "soc-camera-pdrv",
  688. .id = 2,
  689. .dev = {
  690. .platform_data = &mt9t112_link2,
  691. },
  692. },
  693. };
  694. /* FSI */
  695. static struct sh_fsi_platform_info fsi_info = {
  696. .port_b = {
  697. .flags = SH_FSI_BRS_INV,
  698. },
  699. };
  700. static struct resource fsi_resources[] = {
  701. [0] = {
  702. .name = "FSI",
  703. .start = 0xFE3C0000,
  704. .end = 0xFE3C021d,
  705. .flags = IORESOURCE_MEM,
  706. },
  707. [1] = {
  708. .start = 108,
  709. .flags = IORESOURCE_IRQ,
  710. },
  711. };
  712. static struct platform_device fsi_device = {
  713. .name = "sh_fsi",
  714. .id = 0,
  715. .num_resources = ARRAY_SIZE(fsi_resources),
  716. .resource = fsi_resources,
  717. .dev = {
  718. .platform_data = &fsi_info,
  719. },
  720. };
  721. /* IrDA */
  722. static struct resource irda_resources[] = {
  723. [0] = {
  724. .name = "IrDA",
  725. .start = 0xA45D0000,
  726. .end = 0xA45D0049,
  727. .flags = IORESOURCE_MEM,
  728. },
  729. [1] = {
  730. .start = 20,
  731. .flags = IORESOURCE_IRQ,
  732. },
  733. };
  734. static struct platform_device irda_device = {
  735. .name = "sh_sir",
  736. .num_resources = ARRAY_SIZE(irda_resources),
  737. .resource = irda_resources,
  738. };
  739. #include <media/ak881x.h>
  740. #include <media/sh_vou.h>
  741. static struct ak881x_pdata ak881x_pdata = {
  742. .flags = AK881X_IF_MODE_SLAVE,
  743. };
  744. static struct i2c_board_info ak8813 = {
  745. I2C_BOARD_INFO("ak8813", 0x20),
  746. .platform_data = &ak881x_pdata,
  747. };
  748. static struct sh_vou_pdata sh_vou_pdata = {
  749. .bus_fmt = SH_VOU_BUS_8BIT,
  750. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  751. .board_info = &ak8813,
  752. .i2c_adap = 0,
  753. };
  754. static struct resource sh_vou_resources[] = {
  755. [0] = {
  756. .start = 0xfe960000,
  757. .end = 0xfe962043,
  758. .flags = IORESOURCE_MEM,
  759. },
  760. [1] = {
  761. .start = 55,
  762. .flags = IORESOURCE_IRQ,
  763. },
  764. };
  765. static struct platform_device vou_device = {
  766. .name = "sh-vou",
  767. .id = -1,
  768. .num_resources = ARRAY_SIZE(sh_vou_resources),
  769. .resource = sh_vou_resources,
  770. .dev = {
  771. .platform_data = &sh_vou_pdata,
  772. },
  773. };
  774. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  775. /* SH_MMCIF */
  776. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  777. {
  778. gpio_set_value(GPIO_PTB7, state);
  779. }
  780. static void mmcif_down_pwr(struct platform_device *pdev)
  781. {
  782. gpio_set_value(GPIO_PTB7, 0);
  783. }
  784. static struct resource sh_mmcif_resources[] = {
  785. [0] = {
  786. .name = "SH_MMCIF",
  787. .start = 0xA4CA0000,
  788. .end = 0xA4CA00FF,
  789. .flags = IORESOURCE_MEM,
  790. },
  791. [1] = {
  792. /* MMC2I */
  793. .start = 29,
  794. .flags = IORESOURCE_IRQ,
  795. },
  796. [2] = {
  797. /* MMC3I */
  798. .start = 30,
  799. .flags = IORESOURCE_IRQ,
  800. },
  801. };
  802. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  803. .set_pwr = mmcif_set_pwr,
  804. .down_pwr = mmcif_down_pwr,
  805. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  806. .caps = MMC_CAP_4_BIT_DATA |
  807. MMC_CAP_8_BIT_DATA |
  808. MMC_CAP_NEEDS_POLL,
  809. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  810. };
  811. static struct platform_device sh_mmcif_device = {
  812. .name = "sh_mmcif",
  813. .id = 0,
  814. .dev = {
  815. .platform_data = &sh_mmcif_plat,
  816. },
  817. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  818. .resource = sh_mmcif_resources,
  819. };
  820. #endif
  821. static struct platform_device *ecovec_devices[] __initdata = {
  822. &heartbeat_device,
  823. &nor_flash_device,
  824. &sh_eth_device,
  825. &usb0_host_device,
  826. &usb1_common_device,
  827. &usbhs_device,
  828. &lcdc_device,
  829. &ceu0_device,
  830. &ceu1_device,
  831. &keysc_device,
  832. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  833. &sdhi0_device,
  834. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  835. &sdhi1_device,
  836. #endif
  837. #else
  838. &msiof0_device,
  839. #endif
  840. &camera_devices[0],
  841. &camera_devices[1],
  842. &camera_devices[2],
  843. &fsi_device,
  844. &irda_device,
  845. &vou_device,
  846. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  847. &sh_mmcif_device,
  848. #endif
  849. };
  850. #ifdef CONFIG_I2C
  851. #define EEPROM_ADDR 0x50
  852. static u8 mac_read(struct i2c_adapter *a, u8 command)
  853. {
  854. struct i2c_msg msg[2];
  855. u8 buf;
  856. int ret;
  857. msg[0].addr = EEPROM_ADDR;
  858. msg[0].flags = 0;
  859. msg[0].len = 1;
  860. msg[0].buf = &command;
  861. msg[1].addr = EEPROM_ADDR;
  862. msg[1].flags = I2C_M_RD;
  863. msg[1].len = 1;
  864. msg[1].buf = &buf;
  865. ret = i2c_transfer(a, msg, 2);
  866. if (ret < 0) {
  867. printk(KERN_ERR "error %d\n", ret);
  868. buf = 0xff;
  869. }
  870. return buf;
  871. }
  872. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  873. {
  874. struct i2c_adapter *a = i2c_get_adapter(1);
  875. int i;
  876. if (!a) {
  877. pr_err("can not get I2C 1\n");
  878. return;
  879. }
  880. /* read MAC address from EEPROM */
  881. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  882. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  883. msleep(10);
  884. }
  885. i2c_put_adapter(a);
  886. }
  887. #else
  888. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  889. {
  890. pr_err("unable to read sh_eth MAC address\n");
  891. }
  892. #endif
  893. #define PORT_HIZA 0xA4050158
  894. #define IODRIVEA 0xA405018A
  895. extern char ecovec24_sdram_enter_start;
  896. extern char ecovec24_sdram_enter_end;
  897. extern char ecovec24_sdram_leave_start;
  898. extern char ecovec24_sdram_leave_end;
  899. static int __init arch_setup(void)
  900. {
  901. struct clk *clk;
  902. bool cn12_enabled = false;
  903. /* register board specific self-refresh code */
  904. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  905. SUSP_SH_RSTANDBY,
  906. &ecovec24_sdram_enter_start,
  907. &ecovec24_sdram_enter_end,
  908. &ecovec24_sdram_leave_start,
  909. &ecovec24_sdram_leave_end);
  910. /* enable STATUS0, STATUS2 and PDSTATUS */
  911. gpio_request(GPIO_FN_STATUS0, NULL);
  912. gpio_request(GPIO_FN_STATUS2, NULL);
  913. gpio_request(GPIO_FN_PDSTATUS, NULL);
  914. /* enable SCIFA0 */
  915. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  916. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  917. /* enable debug LED */
  918. gpio_request(GPIO_PTG0, NULL);
  919. gpio_request(GPIO_PTG1, NULL);
  920. gpio_request(GPIO_PTG2, NULL);
  921. gpio_request(GPIO_PTG3, NULL);
  922. gpio_direction_output(GPIO_PTG0, 0);
  923. gpio_direction_output(GPIO_PTG1, 0);
  924. gpio_direction_output(GPIO_PTG2, 0);
  925. gpio_direction_output(GPIO_PTG3, 0);
  926. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  927. /* enable SH-Eth */
  928. gpio_request(GPIO_PTA1, NULL);
  929. gpio_direction_output(GPIO_PTA1, 1);
  930. mdelay(20);
  931. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  932. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  933. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  934. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  935. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  936. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  937. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  938. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  939. gpio_request(GPIO_FN_MDIO, NULL);
  940. gpio_request(GPIO_FN_MDC, NULL);
  941. gpio_request(GPIO_FN_LNKSTA, NULL);
  942. /* enable USB */
  943. __raw_writew(0x0000, 0xA4D80000);
  944. __raw_writew(0x0000, 0xA4D90000);
  945. gpio_request(GPIO_PTB3, NULL);
  946. gpio_request(GPIO_PTB4, NULL);
  947. gpio_request(GPIO_PTB5, NULL);
  948. gpio_direction_input(GPIO_PTB3);
  949. gpio_direction_output(GPIO_PTB4, 0);
  950. gpio_direction_output(GPIO_PTB5, 0);
  951. __raw_writew(0x0600, 0xa40501d4);
  952. __raw_writew(0x0600, 0xa4050192);
  953. if (gpio_get_value(GPIO_PTB3)) {
  954. printk(KERN_INFO "USB1 function is selected\n");
  955. usb1_common_device.name = "r8a66597_udc";
  956. } else {
  957. printk(KERN_INFO "USB1 host is selected\n");
  958. usb1_common_device.name = "r8a66597_hcd";
  959. }
  960. /* enable LCDC */
  961. gpio_request(GPIO_FN_LCDD23, NULL);
  962. gpio_request(GPIO_FN_LCDD22, NULL);
  963. gpio_request(GPIO_FN_LCDD21, NULL);
  964. gpio_request(GPIO_FN_LCDD20, NULL);
  965. gpio_request(GPIO_FN_LCDD19, NULL);
  966. gpio_request(GPIO_FN_LCDD18, NULL);
  967. gpio_request(GPIO_FN_LCDD17, NULL);
  968. gpio_request(GPIO_FN_LCDD16, NULL);
  969. gpio_request(GPIO_FN_LCDD15, NULL);
  970. gpio_request(GPIO_FN_LCDD14, NULL);
  971. gpio_request(GPIO_FN_LCDD13, NULL);
  972. gpio_request(GPIO_FN_LCDD12, NULL);
  973. gpio_request(GPIO_FN_LCDD11, NULL);
  974. gpio_request(GPIO_FN_LCDD10, NULL);
  975. gpio_request(GPIO_FN_LCDD9, NULL);
  976. gpio_request(GPIO_FN_LCDD8, NULL);
  977. gpio_request(GPIO_FN_LCDD7, NULL);
  978. gpio_request(GPIO_FN_LCDD6, NULL);
  979. gpio_request(GPIO_FN_LCDD5, NULL);
  980. gpio_request(GPIO_FN_LCDD4, NULL);
  981. gpio_request(GPIO_FN_LCDD3, NULL);
  982. gpio_request(GPIO_FN_LCDD2, NULL);
  983. gpio_request(GPIO_FN_LCDD1, NULL);
  984. gpio_request(GPIO_FN_LCDD0, NULL);
  985. gpio_request(GPIO_FN_LCDDISP, NULL);
  986. gpio_request(GPIO_FN_LCDHSYN, NULL);
  987. gpio_request(GPIO_FN_LCDDCK, NULL);
  988. gpio_request(GPIO_FN_LCDVSYN, NULL);
  989. gpio_request(GPIO_FN_LCDDON, NULL);
  990. gpio_request(GPIO_FN_LCDLCLK, NULL);
  991. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  992. gpio_request(GPIO_PTE6, NULL);
  993. gpio_request(GPIO_PTU1, NULL);
  994. gpio_request(GPIO_PTR1, NULL);
  995. gpio_request(GPIO_PTA2, NULL);
  996. gpio_direction_input(GPIO_PTE6);
  997. gpio_direction_output(GPIO_PTU1, 0);
  998. gpio_direction_output(GPIO_PTR1, 0);
  999. gpio_direction_output(GPIO_PTA2, 0);
  1000. /* I/O buffer drive ability is high */
  1001. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  1002. if (gpio_get_value(GPIO_PTE6)) {
  1003. /* DVI */
  1004. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  1005. lcdc_info.ch[0].clock_divider = 1;
  1006. lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
  1007. lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
  1008. gpio_set_value(GPIO_PTA2, 1);
  1009. gpio_set_value(GPIO_PTU1, 1);
  1010. } else {
  1011. /* Panel */
  1012. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1013. lcdc_info.ch[0].clock_divider = 2;
  1014. lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
  1015. lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
  1016. gpio_set_value(GPIO_PTR1, 1);
  1017. /* FIXME
  1018. *
  1019. * LCDDON control is needed for Panel,
  1020. * but current sh_mobile_lcdc driver doesn't control it.
  1021. * It is temporary correspondence
  1022. */
  1023. gpio_request(GPIO_PTF4, NULL);
  1024. gpio_direction_output(GPIO_PTF4, 1);
  1025. /* enable TouchScreen */
  1026. i2c_register_board_info(0, &ts_i2c_clients, 1);
  1027. irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  1028. }
  1029. /* enable CEU0 */
  1030. gpio_request(GPIO_FN_VIO0_D15, NULL);
  1031. gpio_request(GPIO_FN_VIO0_D14, NULL);
  1032. gpio_request(GPIO_FN_VIO0_D13, NULL);
  1033. gpio_request(GPIO_FN_VIO0_D12, NULL);
  1034. gpio_request(GPIO_FN_VIO0_D11, NULL);
  1035. gpio_request(GPIO_FN_VIO0_D10, NULL);
  1036. gpio_request(GPIO_FN_VIO0_D9, NULL);
  1037. gpio_request(GPIO_FN_VIO0_D8, NULL);
  1038. gpio_request(GPIO_FN_VIO0_D7, NULL);
  1039. gpio_request(GPIO_FN_VIO0_D6, NULL);
  1040. gpio_request(GPIO_FN_VIO0_D5, NULL);
  1041. gpio_request(GPIO_FN_VIO0_D4, NULL);
  1042. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1043. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1044. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1045. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1046. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1047. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1048. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1049. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1050. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1051. /* enable CEU1 */
  1052. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1053. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1054. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1055. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1056. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1057. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1058. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1059. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1060. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1061. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1062. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1063. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1064. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1065. /* enable KEYSC */
  1066. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1067. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1068. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1069. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1070. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1071. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1072. gpio_request(GPIO_FN_KEYIN0, NULL);
  1073. /* enable user debug switch */
  1074. gpio_request(GPIO_PTR0, NULL);
  1075. gpio_request(GPIO_PTR4, NULL);
  1076. gpio_request(GPIO_PTR5, NULL);
  1077. gpio_request(GPIO_PTR6, NULL);
  1078. gpio_direction_input(GPIO_PTR0);
  1079. gpio_direction_input(GPIO_PTR4);
  1080. gpio_direction_input(GPIO_PTR5);
  1081. gpio_direction_input(GPIO_PTR6);
  1082. /* SD-card slot CN11 */
  1083. /* Card-detect, used on CN11, either with SDHI0 or with SPI */
  1084. gpio_request(GPIO_PTY7, NULL);
  1085. gpio_direction_input(GPIO_PTY7);
  1086. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  1087. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1088. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1089. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1090. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1091. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1092. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1093. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1094. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1095. gpio_request(GPIO_PTB6, NULL);
  1096. gpio_direction_output(GPIO_PTB6, 0);
  1097. #else
  1098. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1099. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1100. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1101. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1102. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1103. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1104. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1105. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1106. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1107. gpio_direction_input(GPIO_PTY6);
  1108. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1109. #endif
  1110. /* MMC/SD-card slot CN12 */
  1111. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1112. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1113. gpio_request(GPIO_FN_MMC_D7, NULL);
  1114. gpio_request(GPIO_FN_MMC_D6, NULL);
  1115. gpio_request(GPIO_FN_MMC_D5, NULL);
  1116. gpio_request(GPIO_FN_MMC_D4, NULL);
  1117. gpio_request(GPIO_FN_MMC_D3, NULL);
  1118. gpio_request(GPIO_FN_MMC_D2, NULL);
  1119. gpio_request(GPIO_FN_MMC_D1, NULL);
  1120. gpio_request(GPIO_FN_MMC_D0, NULL);
  1121. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1122. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1123. gpio_request(GPIO_PTB7, NULL);
  1124. gpio_direction_output(GPIO_PTB7, 0);
  1125. cn12_enabled = true;
  1126. #elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  1127. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1128. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1129. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1130. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1131. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1132. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1133. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1134. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1135. gpio_request(GPIO_PTB7, NULL);
  1136. gpio_direction_output(GPIO_PTB7, 0);
  1137. /* Card-detect, used on CN12 with SDHI1 */
  1138. gpio_request(GPIO_PTW7, NULL);
  1139. gpio_direction_input(GPIO_PTW7);
  1140. cn12_enabled = true;
  1141. #endif
  1142. if (cn12_enabled)
  1143. /* I/O buffer drive ability is high for CN12 */
  1144. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
  1145. IODRIVEA);
  1146. /* enable Video */
  1147. gpio_request(GPIO_PTU2, NULL);
  1148. gpio_direction_output(GPIO_PTU2, 1);
  1149. /* enable Camera */
  1150. gpio_request(GPIO_PTA3, NULL);
  1151. gpio_request(GPIO_PTA4, NULL);
  1152. gpio_direction_output(GPIO_PTA3, 0);
  1153. gpio_direction_output(GPIO_PTA4, 0);
  1154. /* enable FSI */
  1155. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1156. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1157. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1158. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1159. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1160. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1161. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1162. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1163. /* set SPU2 clock to 83.4 MHz */
  1164. clk = clk_get(NULL, "spu_clk");
  1165. if (!IS_ERR(clk)) {
  1166. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1167. clk_put(clk);
  1168. }
  1169. /* change parent of FSI B */
  1170. clk = clk_get(NULL, "fsib_clk");
  1171. if (!IS_ERR(clk)) {
  1172. /* 48kHz dummy clock was used to make sure 1/1 divide */
  1173. clk_set_rate(&sh7724_fsimckb_clk, 48000);
  1174. clk_set_parent(clk, &sh7724_fsimckb_clk);
  1175. clk_set_rate(clk, 48000);
  1176. clk_put(clk);
  1177. }
  1178. gpio_request(GPIO_PTU0, NULL);
  1179. gpio_direction_output(GPIO_PTU0, 0);
  1180. mdelay(20);
  1181. /* enable motion sensor */
  1182. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1183. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1184. /* set VPU clock to 166 MHz */
  1185. clk = clk_get(NULL, "vpu_clk");
  1186. if (!IS_ERR(clk)) {
  1187. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1188. clk_put(clk);
  1189. }
  1190. /* enable IrDA */
  1191. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1192. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1193. gpio_request(GPIO_PTU5, NULL);
  1194. gpio_direction_output(GPIO_PTU5, 0);
  1195. /* enable I2C device */
  1196. i2c_register_board_info(0, i2c0_devices,
  1197. ARRAY_SIZE(i2c0_devices));
  1198. i2c_register_board_info(1, i2c1_devices,
  1199. ARRAY_SIZE(i2c1_devices));
  1200. #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
  1201. /* VOU */
  1202. gpio_request(GPIO_FN_DV_D15, NULL);
  1203. gpio_request(GPIO_FN_DV_D14, NULL);
  1204. gpio_request(GPIO_FN_DV_D13, NULL);
  1205. gpio_request(GPIO_FN_DV_D12, NULL);
  1206. gpio_request(GPIO_FN_DV_D11, NULL);
  1207. gpio_request(GPIO_FN_DV_D10, NULL);
  1208. gpio_request(GPIO_FN_DV_D9, NULL);
  1209. gpio_request(GPIO_FN_DV_D8, NULL);
  1210. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1211. gpio_request(GPIO_FN_DV_CLK, NULL);
  1212. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1213. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1214. /* AK8813 power / reset sequence */
  1215. gpio_request(GPIO_PTG4, NULL);
  1216. gpio_request(GPIO_PTU3, NULL);
  1217. /* Reset */
  1218. gpio_direction_output(GPIO_PTG4, 0);
  1219. /* Power down */
  1220. gpio_direction_output(GPIO_PTU3, 1);
  1221. udelay(10);
  1222. /* Power up, reset */
  1223. gpio_set_value(GPIO_PTU3, 0);
  1224. udelay(10);
  1225. /* Remove reset */
  1226. gpio_set_value(GPIO_PTG4, 1);
  1227. #endif
  1228. return platform_add_devices(ecovec_devices,
  1229. ARRAY_SIZE(ecovec_devices));
  1230. }
  1231. arch_initcall(arch_setup);
  1232. static int __init devices_setup(void)
  1233. {
  1234. sh_eth_init(&sh_eth_plat);
  1235. return 0;
  1236. }
  1237. device_initcall(devices_setup);
  1238. static struct sh_machine_vector mv_ecovec __initmv = {
  1239. .mv_name = "R0P7724 (EcoVec)",
  1240. };