time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/kernel_stat.h>
  17. #include <linux/errno.h>
  18. #include <linux/module.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/param.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/cpu.h>
  26. #include <linux/stop_machine.h>
  27. #include <linux/time.h>
  28. #include <linux/device.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/smp.h>
  32. #include <linux/types.h>
  33. #include <linux/profile.h>
  34. #include <linux/timex.h>
  35. #include <linux/notifier.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/gfp.h>
  39. #include <linux/kprobes.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/delay.h>
  42. #include <asm/div64.h>
  43. #include <asm/vdso.h>
  44. #include <asm/irq.h>
  45. #include <asm/irq_regs.h>
  46. #include <asm/timer.h>
  47. #include <asm/etr.h>
  48. #include <asm/cio.h>
  49. #include "entry.h"
  50. /* change this if you have some constant time drift */
  51. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  52. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  53. u64 sched_clock_base_cc = -1; /* Force to data section. */
  54. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  55. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  56. /*
  57. * Scheduler clock - returns current time in nanosec units.
  58. */
  59. unsigned long long notrace __kprobes sched_clock(void)
  60. {
  61. return (get_clock_monotonic() * 125) >> 9;
  62. }
  63. /*
  64. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  65. */
  66. unsigned long long monotonic_clock(void)
  67. {
  68. return sched_clock();
  69. }
  70. EXPORT_SYMBOL(monotonic_clock);
  71. void tod_to_timeval(__u64 todval, struct timespec *xt)
  72. {
  73. unsigned long long sec;
  74. sec = todval >> 12;
  75. do_div(sec, 1000000);
  76. xt->tv_sec = sec;
  77. todval -= (sec * 1000000) << 12;
  78. xt->tv_nsec = ((todval * 1000) >> 12);
  79. }
  80. EXPORT_SYMBOL(tod_to_timeval);
  81. void clock_comparator_work(void)
  82. {
  83. struct clock_event_device *cd;
  84. S390_lowcore.clock_comparator = -1ULL;
  85. set_clock_comparator(S390_lowcore.clock_comparator);
  86. cd = &__get_cpu_var(comparators);
  87. cd->event_handler(cd);
  88. }
  89. /*
  90. * Fixup the clock comparator.
  91. */
  92. static void fixup_clock_comparator(unsigned long long delta)
  93. {
  94. /* If nobody is waiting there's nothing to fix. */
  95. if (S390_lowcore.clock_comparator == -1ULL)
  96. return;
  97. S390_lowcore.clock_comparator += delta;
  98. set_clock_comparator(S390_lowcore.clock_comparator);
  99. }
  100. static int s390_next_ktime(ktime_t expires,
  101. struct clock_event_device *evt)
  102. {
  103. struct timespec ts;
  104. u64 nsecs;
  105. ts.tv_sec = ts.tv_nsec = 0;
  106. monotonic_to_bootbased(&ts);
  107. nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
  108. do_div(nsecs, 125);
  109. S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
  110. set_clock_comparator(S390_lowcore.clock_comparator);
  111. return 0;
  112. }
  113. static void s390_set_mode(enum clock_event_mode mode,
  114. struct clock_event_device *evt)
  115. {
  116. }
  117. /*
  118. * Set up lowcore and control register of the current cpu to
  119. * enable TOD clock and clock comparator interrupts.
  120. */
  121. void init_cpu_timer(void)
  122. {
  123. struct clock_event_device *cd;
  124. int cpu;
  125. S390_lowcore.clock_comparator = -1ULL;
  126. set_clock_comparator(S390_lowcore.clock_comparator);
  127. cpu = smp_processor_id();
  128. cd = &per_cpu(comparators, cpu);
  129. cd->name = "comparator";
  130. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  131. CLOCK_EVT_FEAT_KTIME;
  132. cd->mult = 16777;
  133. cd->shift = 12;
  134. cd->min_delta_ns = 1;
  135. cd->max_delta_ns = LONG_MAX;
  136. cd->rating = 400;
  137. cd->cpumask = cpumask_of(cpu);
  138. cd->set_next_ktime = s390_next_ktime;
  139. cd->set_mode = s390_set_mode;
  140. clockevents_register_device(cd);
  141. /* Enable clock comparator timer interrupt. */
  142. __ctl_set_bit(0,11);
  143. /* Always allow the timing alert external interrupt. */
  144. __ctl_set_bit(0, 4);
  145. }
  146. static void clock_comparator_interrupt(struct ext_code ext_code,
  147. unsigned int param32,
  148. unsigned long param64)
  149. {
  150. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  151. if (S390_lowcore.clock_comparator == -1ULL)
  152. set_clock_comparator(S390_lowcore.clock_comparator);
  153. }
  154. static void etr_timing_alert(struct etr_irq_parm *);
  155. static void stp_timing_alert(struct stp_irq_parm *);
  156. static void timing_alert_interrupt(struct ext_code ext_code,
  157. unsigned int param32, unsigned long param64)
  158. {
  159. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  160. if (param32 & 0x00c40000)
  161. etr_timing_alert((struct etr_irq_parm *) &param32);
  162. if (param32 & 0x00038000)
  163. stp_timing_alert((struct stp_irq_parm *) &param32);
  164. }
  165. static void etr_reset(void);
  166. static void stp_reset(void);
  167. void read_persistent_clock(struct timespec *ts)
  168. {
  169. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  170. }
  171. void read_boot_clock(struct timespec *ts)
  172. {
  173. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  174. }
  175. static cycle_t read_tod_clock(struct clocksource *cs)
  176. {
  177. return get_clock();
  178. }
  179. static struct clocksource clocksource_tod = {
  180. .name = "tod",
  181. .rating = 400,
  182. .read = read_tod_clock,
  183. .mask = -1ULL,
  184. .mult = 1000,
  185. .shift = 12,
  186. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  187. };
  188. struct clocksource * __init clocksource_default_clock(void)
  189. {
  190. return &clocksource_tod;
  191. }
  192. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  193. struct clocksource *clock, u32 mult)
  194. {
  195. if (clock != &clocksource_tod)
  196. return;
  197. /* Make userspace gettimeofday spin until we're done. */
  198. ++vdso_data->tb_update_count;
  199. smp_wmb();
  200. vdso_data->xtime_tod_stamp = clock->cycle_last;
  201. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  202. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  203. vdso_data->wtom_clock_sec = wtm->tv_sec;
  204. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  205. vdso_data->ntp_mult = mult;
  206. smp_wmb();
  207. ++vdso_data->tb_update_count;
  208. }
  209. extern struct timezone sys_tz;
  210. void update_vsyscall_tz(void)
  211. {
  212. /* Make userspace gettimeofday spin until we're done. */
  213. ++vdso_data->tb_update_count;
  214. smp_wmb();
  215. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  216. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  217. smp_wmb();
  218. ++vdso_data->tb_update_count;
  219. }
  220. /*
  221. * Initialize the TOD clock and the CPU timer of
  222. * the boot cpu.
  223. */
  224. void __init time_init(void)
  225. {
  226. /* Reset time synchronization interfaces. */
  227. etr_reset();
  228. stp_reset();
  229. /* request the clock comparator external interrupt */
  230. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  231. panic("Couldn't request external interrupt 0x1004");
  232. /* request the timing alert external interrupt */
  233. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  234. panic("Couldn't request external interrupt 0x1406");
  235. if (clocksource_register(&clocksource_tod) != 0)
  236. panic("Could not register TOD clock source");
  237. /* Enable TOD clock interrupts on the boot cpu. */
  238. init_cpu_timer();
  239. /* Enable cpu timer interrupts on the boot cpu. */
  240. vtime_init();
  241. }
  242. /*
  243. * The time is "clock". old is what we think the time is.
  244. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  245. * "delay" is an approximation how long the synchronization took. If
  246. * the time correction is positive, then "delay" is subtracted from
  247. * the time difference and only the remaining part is passed to ntp.
  248. */
  249. static unsigned long long adjust_time(unsigned long long old,
  250. unsigned long long clock,
  251. unsigned long long delay)
  252. {
  253. unsigned long long delta, ticks;
  254. struct timex adjust;
  255. if (clock > old) {
  256. /* It is later than we thought. */
  257. delta = ticks = clock - old;
  258. delta = ticks = (delta < delay) ? 0 : delta - delay;
  259. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  260. adjust.offset = ticks * (1000000 / HZ);
  261. } else {
  262. /* It is earlier than we thought. */
  263. delta = ticks = old - clock;
  264. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  265. delta = -delta;
  266. adjust.offset = -ticks * (1000000 / HZ);
  267. }
  268. sched_clock_base_cc += delta;
  269. if (adjust.offset != 0) {
  270. pr_notice("The ETR interface has adjusted the clock "
  271. "by %li microseconds\n", adjust.offset);
  272. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  273. do_adjtimex(&adjust);
  274. }
  275. return delta;
  276. }
  277. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  278. static DEFINE_MUTEX(clock_sync_mutex);
  279. static unsigned long clock_sync_flags;
  280. #define CLOCK_SYNC_HAS_ETR 0
  281. #define CLOCK_SYNC_HAS_STP 1
  282. #define CLOCK_SYNC_ETR 2
  283. #define CLOCK_SYNC_STP 3
  284. /*
  285. * The synchronous get_clock function. It will write the current clock
  286. * value to the clock pointer and return 0 if the clock is in sync with
  287. * the external time source. If the clock mode is local it will return
  288. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  289. * reference.
  290. */
  291. int get_sync_clock(unsigned long long *clock)
  292. {
  293. atomic_t *sw_ptr;
  294. unsigned int sw0, sw1;
  295. sw_ptr = &get_cpu_var(clock_sync_word);
  296. sw0 = atomic_read(sw_ptr);
  297. *clock = get_clock();
  298. sw1 = atomic_read(sw_ptr);
  299. put_cpu_var(clock_sync_word);
  300. if (sw0 == sw1 && (sw0 & 0x80000000U))
  301. /* Success: time is in sync. */
  302. return 0;
  303. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  304. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  305. return -ENOSYS;
  306. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  307. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  308. return -EACCES;
  309. return -EAGAIN;
  310. }
  311. EXPORT_SYMBOL(get_sync_clock);
  312. /*
  313. * Make get_sync_clock return -EAGAIN.
  314. */
  315. static void disable_sync_clock(void *dummy)
  316. {
  317. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  318. /*
  319. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  320. * fail until the sync bit is turned back on. In addition
  321. * increase the "sequence" counter to avoid the race of an
  322. * etr event and the complete recovery against get_sync_clock.
  323. */
  324. atomic_clear_mask(0x80000000, sw_ptr);
  325. atomic_inc(sw_ptr);
  326. }
  327. /*
  328. * Make get_sync_clock return 0 again.
  329. * Needs to be called from a context disabled for preemption.
  330. */
  331. static void enable_sync_clock(void)
  332. {
  333. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  334. atomic_set_mask(0x80000000, sw_ptr);
  335. }
  336. /*
  337. * Function to check if the clock is in sync.
  338. */
  339. static inline int check_sync_clock(void)
  340. {
  341. atomic_t *sw_ptr;
  342. int rc;
  343. sw_ptr = &get_cpu_var(clock_sync_word);
  344. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  345. put_cpu_var(clock_sync_word);
  346. return rc;
  347. }
  348. /* Single threaded workqueue used for etr and stp sync events */
  349. static struct workqueue_struct *time_sync_wq;
  350. static void __init time_init_wq(void)
  351. {
  352. if (time_sync_wq)
  353. return;
  354. time_sync_wq = create_singlethread_workqueue("timesync");
  355. }
  356. /*
  357. * External Time Reference (ETR) code.
  358. */
  359. static int etr_port0_online;
  360. static int etr_port1_online;
  361. static int etr_steai_available;
  362. static int __init early_parse_etr(char *p)
  363. {
  364. if (strncmp(p, "off", 3) == 0)
  365. etr_port0_online = etr_port1_online = 0;
  366. else if (strncmp(p, "port0", 5) == 0)
  367. etr_port0_online = 1;
  368. else if (strncmp(p, "port1", 5) == 0)
  369. etr_port1_online = 1;
  370. else if (strncmp(p, "on", 2) == 0)
  371. etr_port0_online = etr_port1_online = 1;
  372. return 0;
  373. }
  374. early_param("etr", early_parse_etr);
  375. enum etr_event {
  376. ETR_EVENT_PORT0_CHANGE,
  377. ETR_EVENT_PORT1_CHANGE,
  378. ETR_EVENT_PORT_ALERT,
  379. ETR_EVENT_SYNC_CHECK,
  380. ETR_EVENT_SWITCH_LOCAL,
  381. ETR_EVENT_UPDATE,
  382. };
  383. /*
  384. * Valid bit combinations of the eacr register are (x = don't care):
  385. * e0 e1 dp p0 p1 ea es sl
  386. * 0 0 x 0 0 0 0 0 initial, disabled state
  387. * 0 0 x 0 1 1 0 0 port 1 online
  388. * 0 0 x 1 0 1 0 0 port 0 online
  389. * 0 0 x 1 1 1 0 0 both ports online
  390. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  391. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  392. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  393. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  394. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  395. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  396. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  397. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  398. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  399. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  400. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  401. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  402. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  403. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  404. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  405. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  406. */
  407. static struct etr_eacr etr_eacr;
  408. static u64 etr_tolec; /* time of last eacr update */
  409. static struct etr_aib etr_port0;
  410. static int etr_port0_uptodate;
  411. static struct etr_aib etr_port1;
  412. static int etr_port1_uptodate;
  413. static unsigned long etr_events;
  414. static struct timer_list etr_timer;
  415. static void etr_timeout(unsigned long dummy);
  416. static void etr_work_fn(struct work_struct *work);
  417. static DEFINE_MUTEX(etr_work_mutex);
  418. static DECLARE_WORK(etr_work, etr_work_fn);
  419. /*
  420. * Reset ETR attachment.
  421. */
  422. static void etr_reset(void)
  423. {
  424. etr_eacr = (struct etr_eacr) {
  425. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  426. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  427. .es = 0, .sl = 0 };
  428. if (etr_setr(&etr_eacr) == 0) {
  429. etr_tolec = get_clock();
  430. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  431. if (etr_port0_online && etr_port1_online)
  432. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  433. } else if (etr_port0_online || etr_port1_online) {
  434. pr_warning("The real or virtual hardware system does "
  435. "not provide an ETR interface\n");
  436. etr_port0_online = etr_port1_online = 0;
  437. }
  438. }
  439. static int __init etr_init(void)
  440. {
  441. struct etr_aib aib;
  442. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  443. return 0;
  444. time_init_wq();
  445. /* Check if this machine has the steai instruction. */
  446. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  447. etr_steai_available = 1;
  448. setup_timer(&etr_timer, etr_timeout, 0UL);
  449. if (etr_port0_online) {
  450. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  451. queue_work(time_sync_wq, &etr_work);
  452. }
  453. if (etr_port1_online) {
  454. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  455. queue_work(time_sync_wq, &etr_work);
  456. }
  457. return 0;
  458. }
  459. arch_initcall(etr_init);
  460. /*
  461. * Two sorts of ETR machine checks. The architecture reads:
  462. * "When a machine-check niterruption occurs and if a switch-to-local or
  463. * ETR-sync-check interrupt request is pending but disabled, this pending
  464. * disabled interruption request is indicated and is cleared".
  465. * Which means that we can get etr_switch_to_local events from the machine
  466. * check handler although the interruption condition is disabled. Lovely..
  467. */
  468. /*
  469. * Switch to local machine check. This is called when the last usable
  470. * ETR port goes inactive. After switch to local the clock is not in sync.
  471. */
  472. void etr_switch_to_local(void)
  473. {
  474. if (!etr_eacr.sl)
  475. return;
  476. disable_sync_clock(NULL);
  477. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  478. etr_eacr.es = etr_eacr.sl = 0;
  479. etr_setr(&etr_eacr);
  480. queue_work(time_sync_wq, &etr_work);
  481. }
  482. }
  483. /*
  484. * ETR sync check machine check. This is called when the ETR OTE and the
  485. * local clock OTE are farther apart than the ETR sync check tolerance.
  486. * After a ETR sync check the clock is not in sync. The machine check
  487. * is broadcasted to all cpus at the same time.
  488. */
  489. void etr_sync_check(void)
  490. {
  491. if (!etr_eacr.es)
  492. return;
  493. disable_sync_clock(NULL);
  494. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  495. etr_eacr.es = 0;
  496. etr_setr(&etr_eacr);
  497. queue_work(time_sync_wq, &etr_work);
  498. }
  499. }
  500. /*
  501. * ETR timing alert. There are two causes:
  502. * 1) port state change, check the usability of the port
  503. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  504. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  505. * or ETR-data word 4 (edf4) has changed.
  506. */
  507. static void etr_timing_alert(struct etr_irq_parm *intparm)
  508. {
  509. if (intparm->pc0)
  510. /* ETR port 0 state change. */
  511. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  512. if (intparm->pc1)
  513. /* ETR port 1 state change. */
  514. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  515. if (intparm->eai)
  516. /*
  517. * ETR port alert on either port 0, 1 or both.
  518. * Both ports are not up-to-date now.
  519. */
  520. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  521. queue_work(time_sync_wq, &etr_work);
  522. }
  523. static void etr_timeout(unsigned long dummy)
  524. {
  525. set_bit(ETR_EVENT_UPDATE, &etr_events);
  526. queue_work(time_sync_wq, &etr_work);
  527. }
  528. /*
  529. * Check if the etr mode is pss.
  530. */
  531. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  532. {
  533. return eacr.es && !eacr.sl;
  534. }
  535. /*
  536. * Check if the etr mode is etr.
  537. */
  538. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  539. {
  540. return eacr.es && eacr.sl;
  541. }
  542. /*
  543. * Check if the port can be used for TOD synchronization.
  544. * For PPS mode the port has to receive OTEs. For ETR mode
  545. * the port has to receive OTEs, the ETR stepping bit has to
  546. * be zero and the validity bits for data frame 1, 2, and 3
  547. * have to be 1.
  548. */
  549. static int etr_port_valid(struct etr_aib *aib, int port)
  550. {
  551. unsigned int psc;
  552. /* Check that this port is receiving OTEs. */
  553. if (aib->tsp == 0)
  554. return 0;
  555. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  556. if (psc == etr_lpsc_pps_mode)
  557. return 1;
  558. if (psc == etr_lpsc_operational_step)
  559. return !aib->esw.y && aib->slsw.v1 &&
  560. aib->slsw.v2 && aib->slsw.v3;
  561. return 0;
  562. }
  563. /*
  564. * Check if two ports are on the same network.
  565. */
  566. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  567. {
  568. // FIXME: any other fields we have to compare?
  569. return aib1->edf1.net_id == aib2->edf1.net_id;
  570. }
  571. /*
  572. * Wrapper for etr_stei that converts physical port states
  573. * to logical port states to be consistent with the output
  574. * of stetr (see etr_psc vs. etr_lpsc).
  575. */
  576. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  577. {
  578. BUG_ON(etr_steai(aib, func) != 0);
  579. /* Convert port state to logical port state. */
  580. if (aib->esw.psc0 == 1)
  581. aib->esw.psc0 = 2;
  582. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  583. aib->esw.psc0 = 1;
  584. if (aib->esw.psc1 == 1)
  585. aib->esw.psc1 = 2;
  586. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  587. aib->esw.psc1 = 1;
  588. }
  589. /*
  590. * Check if the aib a2 is still connected to the same attachment as
  591. * aib a1, the etv values differ by one and a2 is valid.
  592. */
  593. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  594. {
  595. int state_a1, state_a2;
  596. /* Paranoia check: e0/e1 should better be the same. */
  597. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  598. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  599. return 0;
  600. /* Still connected to the same etr ? */
  601. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  602. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  603. if (state_a1 == etr_lpsc_operational_step) {
  604. if (state_a2 != etr_lpsc_operational_step ||
  605. a1->edf1.net_id != a2->edf1.net_id ||
  606. a1->edf1.etr_id != a2->edf1.etr_id ||
  607. a1->edf1.etr_pn != a2->edf1.etr_pn)
  608. return 0;
  609. } else if (state_a2 != etr_lpsc_pps_mode)
  610. return 0;
  611. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  612. if (a1->edf2.etv + 1 != a2->edf2.etv)
  613. return 0;
  614. if (!etr_port_valid(a2, p))
  615. return 0;
  616. return 1;
  617. }
  618. struct clock_sync_data {
  619. atomic_t cpus;
  620. int in_sync;
  621. unsigned long long fixup_cc;
  622. int etr_port;
  623. struct etr_aib *etr_aib;
  624. };
  625. static void clock_sync_cpu(struct clock_sync_data *sync)
  626. {
  627. atomic_dec(&sync->cpus);
  628. enable_sync_clock();
  629. /*
  630. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  631. * is called on all other cpus while the TOD clocks is stopped.
  632. * __udelay will stop the cpu on an enabled wait psw until the
  633. * TOD is running again.
  634. */
  635. while (sync->in_sync == 0) {
  636. __udelay(1);
  637. /*
  638. * A different cpu changes *in_sync. Therefore use
  639. * barrier() to force memory access.
  640. */
  641. barrier();
  642. }
  643. if (sync->in_sync != 1)
  644. /* Didn't work. Clear per-cpu in sync bit again. */
  645. disable_sync_clock(NULL);
  646. /*
  647. * This round of TOD syncing is done. Set the clock comparator
  648. * to the next tick and let the processor continue.
  649. */
  650. fixup_clock_comparator(sync->fixup_cc);
  651. }
  652. /*
  653. * Sync the TOD clock using the port referred to by aibp. This port
  654. * has to be enabled and the other port has to be disabled. The
  655. * last eacr update has to be more than 1.6 seconds in the past.
  656. */
  657. static int etr_sync_clock(void *data)
  658. {
  659. static int first;
  660. unsigned long long clock, old_clock, delay, delta;
  661. struct clock_sync_data *etr_sync;
  662. struct etr_aib *sync_port, *aib;
  663. int port;
  664. int rc;
  665. etr_sync = data;
  666. if (xchg(&first, 1) == 1) {
  667. /* Slave */
  668. clock_sync_cpu(etr_sync);
  669. return 0;
  670. }
  671. /* Wait until all other cpus entered the sync function. */
  672. while (atomic_read(&etr_sync->cpus) != 0)
  673. cpu_relax();
  674. port = etr_sync->etr_port;
  675. aib = etr_sync->etr_aib;
  676. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  677. enable_sync_clock();
  678. /* Set clock to next OTE. */
  679. __ctl_set_bit(14, 21);
  680. __ctl_set_bit(0, 29);
  681. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  682. old_clock = get_clock();
  683. if (set_clock(clock) == 0) {
  684. __udelay(1); /* Wait for the clock to start. */
  685. __ctl_clear_bit(0, 29);
  686. __ctl_clear_bit(14, 21);
  687. etr_stetr(aib);
  688. /* Adjust Linux timing variables. */
  689. delay = (unsigned long long)
  690. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  691. delta = adjust_time(old_clock, clock, delay);
  692. etr_sync->fixup_cc = delta;
  693. fixup_clock_comparator(delta);
  694. /* Verify that the clock is properly set. */
  695. if (!etr_aib_follows(sync_port, aib, port)) {
  696. /* Didn't work. */
  697. disable_sync_clock(NULL);
  698. etr_sync->in_sync = -EAGAIN;
  699. rc = -EAGAIN;
  700. } else {
  701. etr_sync->in_sync = 1;
  702. rc = 0;
  703. }
  704. } else {
  705. /* Could not set the clock ?!? */
  706. __ctl_clear_bit(0, 29);
  707. __ctl_clear_bit(14, 21);
  708. disable_sync_clock(NULL);
  709. etr_sync->in_sync = -EAGAIN;
  710. rc = -EAGAIN;
  711. }
  712. xchg(&first, 0);
  713. return rc;
  714. }
  715. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  716. {
  717. struct clock_sync_data etr_sync;
  718. struct etr_aib *sync_port;
  719. int follows;
  720. int rc;
  721. /* Check if the current aib is adjacent to the sync port aib. */
  722. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  723. follows = etr_aib_follows(sync_port, aib, port);
  724. memcpy(sync_port, aib, sizeof(*aib));
  725. if (!follows)
  726. return -EAGAIN;
  727. memset(&etr_sync, 0, sizeof(etr_sync));
  728. etr_sync.etr_aib = aib;
  729. etr_sync.etr_port = port;
  730. get_online_cpus();
  731. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  732. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  733. put_online_cpus();
  734. return rc;
  735. }
  736. /*
  737. * Handle the immediate effects of the different events.
  738. * The port change event is used for online/offline changes.
  739. */
  740. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  741. {
  742. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  743. eacr.es = 0;
  744. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  745. eacr.es = eacr.sl = 0;
  746. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  747. etr_port0_uptodate = etr_port1_uptodate = 0;
  748. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  749. if (eacr.e0)
  750. /*
  751. * Port change of an enabled port. We have to
  752. * assume that this can have caused an stepping
  753. * port switch.
  754. */
  755. etr_tolec = get_clock();
  756. eacr.p0 = etr_port0_online;
  757. if (!eacr.p0)
  758. eacr.e0 = 0;
  759. etr_port0_uptodate = 0;
  760. }
  761. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  762. if (eacr.e1)
  763. /*
  764. * Port change of an enabled port. We have to
  765. * assume that this can have caused an stepping
  766. * port switch.
  767. */
  768. etr_tolec = get_clock();
  769. eacr.p1 = etr_port1_online;
  770. if (!eacr.p1)
  771. eacr.e1 = 0;
  772. etr_port1_uptodate = 0;
  773. }
  774. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  775. return eacr;
  776. }
  777. /*
  778. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  779. * one of the ports needs an update.
  780. */
  781. static void etr_set_tolec_timeout(unsigned long long now)
  782. {
  783. unsigned long micros;
  784. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  785. (!etr_eacr.p1 || etr_port1_uptodate))
  786. return;
  787. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  788. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  789. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  790. }
  791. /*
  792. * Set up a time that expires after 1/2 second.
  793. */
  794. static void etr_set_sync_timeout(void)
  795. {
  796. mod_timer(&etr_timer, jiffies + HZ/2);
  797. }
  798. /*
  799. * Update the aib information for one or both ports.
  800. */
  801. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  802. struct etr_eacr eacr)
  803. {
  804. /* With both ports disabled the aib information is useless. */
  805. if (!eacr.e0 && !eacr.e1)
  806. return eacr;
  807. /* Update port0 or port1 with aib stored in etr_work_fn. */
  808. if (aib->esw.q == 0) {
  809. /* Information for port 0 stored. */
  810. if (eacr.p0 && !etr_port0_uptodate) {
  811. etr_port0 = *aib;
  812. if (etr_port0_online)
  813. etr_port0_uptodate = 1;
  814. }
  815. } else {
  816. /* Information for port 1 stored. */
  817. if (eacr.p1 && !etr_port1_uptodate) {
  818. etr_port1 = *aib;
  819. if (etr_port0_online)
  820. etr_port1_uptodate = 1;
  821. }
  822. }
  823. /*
  824. * Do not try to get the alternate port aib if the clock
  825. * is not in sync yet.
  826. */
  827. if (!eacr.es || !check_sync_clock())
  828. return eacr;
  829. /*
  830. * If steai is available we can get the information about
  831. * the other port immediately. If only stetr is available the
  832. * data-port bit toggle has to be used.
  833. */
  834. if (etr_steai_available) {
  835. if (eacr.p0 && !etr_port0_uptodate) {
  836. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  837. etr_port0_uptodate = 1;
  838. }
  839. if (eacr.p1 && !etr_port1_uptodate) {
  840. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  841. etr_port1_uptodate = 1;
  842. }
  843. } else {
  844. /*
  845. * One port was updated above, if the other
  846. * port is not uptodate toggle dp bit.
  847. */
  848. if ((eacr.p0 && !etr_port0_uptodate) ||
  849. (eacr.p1 && !etr_port1_uptodate))
  850. eacr.dp ^= 1;
  851. else
  852. eacr.dp = 0;
  853. }
  854. return eacr;
  855. }
  856. /*
  857. * Write new etr control register if it differs from the current one.
  858. * Return 1 if etr_tolec has been updated as well.
  859. */
  860. static void etr_update_eacr(struct etr_eacr eacr)
  861. {
  862. int dp_changed;
  863. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  864. /* No change, return. */
  865. return;
  866. /*
  867. * The disable of an active port of the change of the data port
  868. * bit can/will cause a change in the data port.
  869. */
  870. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  871. (etr_eacr.dp ^ eacr.dp) != 0;
  872. etr_eacr = eacr;
  873. etr_setr(&etr_eacr);
  874. if (dp_changed)
  875. etr_tolec = get_clock();
  876. }
  877. /*
  878. * ETR work. In this function you'll find the main logic. In
  879. * particular this is the only function that calls etr_update_eacr(),
  880. * it "controls" the etr control register.
  881. */
  882. static void etr_work_fn(struct work_struct *work)
  883. {
  884. unsigned long long now;
  885. struct etr_eacr eacr;
  886. struct etr_aib aib;
  887. int sync_port;
  888. /* prevent multiple execution. */
  889. mutex_lock(&etr_work_mutex);
  890. /* Create working copy of etr_eacr. */
  891. eacr = etr_eacr;
  892. /* Check for the different events and their immediate effects. */
  893. eacr = etr_handle_events(eacr);
  894. /* Check if ETR is supposed to be active. */
  895. eacr.ea = eacr.p0 || eacr.p1;
  896. if (!eacr.ea) {
  897. /* Both ports offline. Reset everything. */
  898. eacr.dp = eacr.es = eacr.sl = 0;
  899. on_each_cpu(disable_sync_clock, NULL, 1);
  900. del_timer_sync(&etr_timer);
  901. etr_update_eacr(eacr);
  902. goto out_unlock;
  903. }
  904. /* Store aib to get the current ETR status word. */
  905. BUG_ON(etr_stetr(&aib) != 0);
  906. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  907. now = get_clock();
  908. /*
  909. * Update the port information if the last stepping port change
  910. * or data port change is older than 1.6 seconds.
  911. */
  912. if (now >= etr_tolec + (1600000 << 12))
  913. eacr = etr_handle_update(&aib, eacr);
  914. /*
  915. * Select ports to enable. The preferred synchronization mode is PPS.
  916. * If a port can be enabled depends on a number of things:
  917. * 1) The port needs to be online and uptodate. A port is not
  918. * disabled just because it is not uptodate, but it is only
  919. * enabled if it is uptodate.
  920. * 2) The port needs to have the same mode (pps / etr).
  921. * 3) The port needs to be usable -> etr_port_valid() == 1
  922. * 4) To enable the second port the clock needs to be in sync.
  923. * 5) If both ports are useable and are ETR ports, the network id
  924. * has to be the same.
  925. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  926. */
  927. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  928. eacr.sl = 0;
  929. eacr.e0 = 1;
  930. if (!etr_mode_is_pps(etr_eacr))
  931. eacr.es = 0;
  932. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  933. eacr.e1 = 0;
  934. // FIXME: uptodate checks ?
  935. else if (etr_port0_uptodate && etr_port1_uptodate)
  936. eacr.e1 = 1;
  937. sync_port = (etr_port0_uptodate &&
  938. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  939. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  940. eacr.sl = 0;
  941. eacr.e0 = 0;
  942. eacr.e1 = 1;
  943. if (!etr_mode_is_pps(etr_eacr))
  944. eacr.es = 0;
  945. sync_port = (etr_port1_uptodate &&
  946. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  947. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  948. eacr.sl = 1;
  949. eacr.e0 = 1;
  950. if (!etr_mode_is_etr(etr_eacr))
  951. eacr.es = 0;
  952. if (!eacr.es || !eacr.p1 ||
  953. aib.esw.psc1 != etr_lpsc_operational_alt)
  954. eacr.e1 = 0;
  955. else if (etr_port0_uptodate && etr_port1_uptodate &&
  956. etr_compare_network(&etr_port0, &etr_port1))
  957. eacr.e1 = 1;
  958. sync_port = (etr_port0_uptodate &&
  959. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  960. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  961. eacr.sl = 1;
  962. eacr.e0 = 0;
  963. eacr.e1 = 1;
  964. if (!etr_mode_is_etr(etr_eacr))
  965. eacr.es = 0;
  966. sync_port = (etr_port1_uptodate &&
  967. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  968. } else {
  969. /* Both ports not usable. */
  970. eacr.es = eacr.sl = 0;
  971. sync_port = -1;
  972. }
  973. /*
  974. * If the clock is in sync just update the eacr and return.
  975. * If there is no valid sync port wait for a port update.
  976. */
  977. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  978. etr_update_eacr(eacr);
  979. etr_set_tolec_timeout(now);
  980. goto out_unlock;
  981. }
  982. /*
  983. * Prepare control register for clock syncing
  984. * (reset data port bit, set sync check control.
  985. */
  986. eacr.dp = 0;
  987. eacr.es = 1;
  988. /*
  989. * Update eacr and try to synchronize the clock. If the update
  990. * of eacr caused a stepping port switch (or if we have to
  991. * assume that a stepping port switch has occurred) or the
  992. * clock syncing failed, reset the sync check control bit
  993. * and set up a timer to try again after 0.5 seconds
  994. */
  995. etr_update_eacr(eacr);
  996. if (now < etr_tolec + (1600000 << 12) ||
  997. etr_sync_clock_stop(&aib, sync_port) != 0) {
  998. /* Sync failed. Try again in 1/2 second. */
  999. eacr.es = 0;
  1000. etr_update_eacr(eacr);
  1001. etr_set_sync_timeout();
  1002. } else
  1003. etr_set_tolec_timeout(now);
  1004. out_unlock:
  1005. mutex_unlock(&etr_work_mutex);
  1006. }
  1007. /*
  1008. * Sysfs interface functions
  1009. */
  1010. static struct bus_type etr_subsys = {
  1011. .name = "etr",
  1012. .dev_name = "etr",
  1013. };
  1014. static struct device etr_port0_dev = {
  1015. .id = 0,
  1016. .bus = &etr_subsys,
  1017. };
  1018. static struct device etr_port1_dev = {
  1019. .id = 1,
  1020. .bus = &etr_subsys,
  1021. };
  1022. /*
  1023. * ETR subsys attributes
  1024. */
  1025. static ssize_t etr_stepping_port_show(struct device *dev,
  1026. struct device_attribute *attr,
  1027. char *buf)
  1028. {
  1029. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1030. }
  1031. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1032. static ssize_t etr_stepping_mode_show(struct device *dev,
  1033. struct device_attribute *attr,
  1034. char *buf)
  1035. {
  1036. char *mode_str;
  1037. if (etr_mode_is_pps(etr_eacr))
  1038. mode_str = "pps";
  1039. else if (etr_mode_is_etr(etr_eacr))
  1040. mode_str = "etr";
  1041. else
  1042. mode_str = "local";
  1043. return sprintf(buf, "%s\n", mode_str);
  1044. }
  1045. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1046. /*
  1047. * ETR port attributes
  1048. */
  1049. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1050. {
  1051. if (dev == &etr_port0_dev)
  1052. return etr_port0_online ? &etr_port0 : NULL;
  1053. else
  1054. return etr_port1_online ? &etr_port1 : NULL;
  1055. }
  1056. static ssize_t etr_online_show(struct device *dev,
  1057. struct device_attribute *attr,
  1058. char *buf)
  1059. {
  1060. unsigned int online;
  1061. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1062. return sprintf(buf, "%i\n", online);
  1063. }
  1064. static ssize_t etr_online_store(struct device *dev,
  1065. struct device_attribute *attr,
  1066. const char *buf, size_t count)
  1067. {
  1068. unsigned int value;
  1069. value = simple_strtoul(buf, NULL, 0);
  1070. if (value != 0 && value != 1)
  1071. return -EINVAL;
  1072. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1073. return -EOPNOTSUPP;
  1074. mutex_lock(&clock_sync_mutex);
  1075. if (dev == &etr_port0_dev) {
  1076. if (etr_port0_online == value)
  1077. goto out; /* Nothing to do. */
  1078. etr_port0_online = value;
  1079. if (etr_port0_online && etr_port1_online)
  1080. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1081. else
  1082. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1083. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1084. queue_work(time_sync_wq, &etr_work);
  1085. } else {
  1086. if (etr_port1_online == value)
  1087. goto out; /* Nothing to do. */
  1088. etr_port1_online = value;
  1089. if (etr_port0_online && etr_port1_online)
  1090. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1091. else
  1092. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1093. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1094. queue_work(time_sync_wq, &etr_work);
  1095. }
  1096. out:
  1097. mutex_unlock(&clock_sync_mutex);
  1098. return count;
  1099. }
  1100. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1101. static ssize_t etr_stepping_control_show(struct device *dev,
  1102. struct device_attribute *attr,
  1103. char *buf)
  1104. {
  1105. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1106. etr_eacr.e0 : etr_eacr.e1);
  1107. }
  1108. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1109. static ssize_t etr_mode_code_show(struct device *dev,
  1110. struct device_attribute *attr, char *buf)
  1111. {
  1112. if (!etr_port0_online && !etr_port1_online)
  1113. /* Status word is not uptodate if both ports are offline. */
  1114. return -ENODATA;
  1115. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1116. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1117. }
  1118. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1119. static ssize_t etr_untuned_show(struct device *dev,
  1120. struct device_attribute *attr, char *buf)
  1121. {
  1122. struct etr_aib *aib = etr_aib_from_dev(dev);
  1123. if (!aib || !aib->slsw.v1)
  1124. return -ENODATA;
  1125. return sprintf(buf, "%i\n", aib->edf1.u);
  1126. }
  1127. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1128. static ssize_t etr_network_id_show(struct device *dev,
  1129. struct device_attribute *attr, char *buf)
  1130. {
  1131. struct etr_aib *aib = etr_aib_from_dev(dev);
  1132. if (!aib || !aib->slsw.v1)
  1133. return -ENODATA;
  1134. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1135. }
  1136. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1137. static ssize_t etr_id_show(struct device *dev,
  1138. struct device_attribute *attr, char *buf)
  1139. {
  1140. struct etr_aib *aib = etr_aib_from_dev(dev);
  1141. if (!aib || !aib->slsw.v1)
  1142. return -ENODATA;
  1143. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1144. }
  1145. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1146. static ssize_t etr_port_number_show(struct device *dev,
  1147. struct device_attribute *attr, char *buf)
  1148. {
  1149. struct etr_aib *aib = etr_aib_from_dev(dev);
  1150. if (!aib || !aib->slsw.v1)
  1151. return -ENODATA;
  1152. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1153. }
  1154. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1155. static ssize_t etr_coupled_show(struct device *dev,
  1156. struct device_attribute *attr, char *buf)
  1157. {
  1158. struct etr_aib *aib = etr_aib_from_dev(dev);
  1159. if (!aib || !aib->slsw.v3)
  1160. return -ENODATA;
  1161. return sprintf(buf, "%i\n", aib->edf3.c);
  1162. }
  1163. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1164. static ssize_t etr_local_time_show(struct device *dev,
  1165. struct device_attribute *attr, char *buf)
  1166. {
  1167. struct etr_aib *aib = etr_aib_from_dev(dev);
  1168. if (!aib || !aib->slsw.v3)
  1169. return -ENODATA;
  1170. return sprintf(buf, "%i\n", aib->edf3.blto);
  1171. }
  1172. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1173. static ssize_t etr_utc_offset_show(struct device *dev,
  1174. struct device_attribute *attr, char *buf)
  1175. {
  1176. struct etr_aib *aib = etr_aib_from_dev(dev);
  1177. if (!aib || !aib->slsw.v3)
  1178. return -ENODATA;
  1179. return sprintf(buf, "%i\n", aib->edf3.buo);
  1180. }
  1181. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1182. static struct device_attribute *etr_port_attributes[] = {
  1183. &dev_attr_online,
  1184. &dev_attr_stepping_control,
  1185. &dev_attr_state_code,
  1186. &dev_attr_untuned,
  1187. &dev_attr_network,
  1188. &dev_attr_id,
  1189. &dev_attr_port,
  1190. &dev_attr_coupled,
  1191. &dev_attr_local_time,
  1192. &dev_attr_utc_offset,
  1193. NULL
  1194. };
  1195. static int __init etr_register_port(struct device *dev)
  1196. {
  1197. struct device_attribute **attr;
  1198. int rc;
  1199. rc = device_register(dev);
  1200. if (rc)
  1201. goto out;
  1202. for (attr = etr_port_attributes; *attr; attr++) {
  1203. rc = device_create_file(dev, *attr);
  1204. if (rc)
  1205. goto out_unreg;
  1206. }
  1207. return 0;
  1208. out_unreg:
  1209. for (; attr >= etr_port_attributes; attr--)
  1210. device_remove_file(dev, *attr);
  1211. device_unregister(dev);
  1212. out:
  1213. return rc;
  1214. }
  1215. static void __init etr_unregister_port(struct device *dev)
  1216. {
  1217. struct device_attribute **attr;
  1218. for (attr = etr_port_attributes; *attr; attr++)
  1219. device_remove_file(dev, *attr);
  1220. device_unregister(dev);
  1221. }
  1222. static int __init etr_init_sysfs(void)
  1223. {
  1224. int rc;
  1225. rc = subsys_system_register(&etr_subsys, NULL);
  1226. if (rc)
  1227. goto out;
  1228. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1229. if (rc)
  1230. goto out_unreg_subsys;
  1231. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1232. if (rc)
  1233. goto out_remove_stepping_port;
  1234. rc = etr_register_port(&etr_port0_dev);
  1235. if (rc)
  1236. goto out_remove_stepping_mode;
  1237. rc = etr_register_port(&etr_port1_dev);
  1238. if (rc)
  1239. goto out_remove_port0;
  1240. return 0;
  1241. out_remove_port0:
  1242. etr_unregister_port(&etr_port0_dev);
  1243. out_remove_stepping_mode:
  1244. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1245. out_remove_stepping_port:
  1246. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1247. out_unreg_subsys:
  1248. bus_unregister(&etr_subsys);
  1249. out:
  1250. return rc;
  1251. }
  1252. device_initcall(etr_init_sysfs);
  1253. /*
  1254. * Server Time Protocol (STP) code.
  1255. */
  1256. static int stp_online;
  1257. static struct stp_sstpi stp_info;
  1258. static void *stp_page;
  1259. static void stp_work_fn(struct work_struct *work);
  1260. static DEFINE_MUTEX(stp_work_mutex);
  1261. static DECLARE_WORK(stp_work, stp_work_fn);
  1262. static struct timer_list stp_timer;
  1263. static int __init early_parse_stp(char *p)
  1264. {
  1265. if (strncmp(p, "off", 3) == 0)
  1266. stp_online = 0;
  1267. else if (strncmp(p, "on", 2) == 0)
  1268. stp_online = 1;
  1269. return 0;
  1270. }
  1271. early_param("stp", early_parse_stp);
  1272. /*
  1273. * Reset STP attachment.
  1274. */
  1275. static void __init stp_reset(void)
  1276. {
  1277. int rc;
  1278. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1279. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1280. if (rc == 0)
  1281. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1282. else if (stp_online) {
  1283. pr_warning("The real or virtual hardware system does "
  1284. "not provide an STP interface\n");
  1285. free_page((unsigned long) stp_page);
  1286. stp_page = NULL;
  1287. stp_online = 0;
  1288. }
  1289. }
  1290. static void stp_timeout(unsigned long dummy)
  1291. {
  1292. queue_work(time_sync_wq, &stp_work);
  1293. }
  1294. static int __init stp_init(void)
  1295. {
  1296. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1297. return 0;
  1298. setup_timer(&stp_timer, stp_timeout, 0UL);
  1299. time_init_wq();
  1300. if (!stp_online)
  1301. return 0;
  1302. queue_work(time_sync_wq, &stp_work);
  1303. return 0;
  1304. }
  1305. arch_initcall(stp_init);
  1306. /*
  1307. * STP timing alert. There are three causes:
  1308. * 1) timing status change
  1309. * 2) link availability change
  1310. * 3) time control parameter change
  1311. * In all three cases we are only interested in the clock source state.
  1312. * If a STP clock source is now available use it.
  1313. */
  1314. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1315. {
  1316. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1317. queue_work(time_sync_wq, &stp_work);
  1318. }
  1319. /*
  1320. * STP sync check machine check. This is called when the timing state
  1321. * changes from the synchronized state to the unsynchronized state.
  1322. * After a STP sync check the clock is not in sync. The machine check
  1323. * is broadcasted to all cpus at the same time.
  1324. */
  1325. void stp_sync_check(void)
  1326. {
  1327. disable_sync_clock(NULL);
  1328. queue_work(time_sync_wq, &stp_work);
  1329. }
  1330. /*
  1331. * STP island condition machine check. This is called when an attached
  1332. * server attempts to communicate over an STP link and the servers
  1333. * have matching CTN ids and have a valid stratum-1 configuration
  1334. * but the configurations do not match.
  1335. */
  1336. void stp_island_check(void)
  1337. {
  1338. disable_sync_clock(NULL);
  1339. queue_work(time_sync_wq, &stp_work);
  1340. }
  1341. static int stp_sync_clock(void *data)
  1342. {
  1343. static int first;
  1344. unsigned long long old_clock, delta;
  1345. struct clock_sync_data *stp_sync;
  1346. int rc;
  1347. stp_sync = data;
  1348. if (xchg(&first, 1) == 1) {
  1349. /* Slave */
  1350. clock_sync_cpu(stp_sync);
  1351. return 0;
  1352. }
  1353. /* Wait until all other cpus entered the sync function. */
  1354. while (atomic_read(&stp_sync->cpus) != 0)
  1355. cpu_relax();
  1356. enable_sync_clock();
  1357. rc = 0;
  1358. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1359. stp_info.todoff[2] || stp_info.todoff[3] ||
  1360. stp_info.tmd != 2) {
  1361. old_clock = get_clock();
  1362. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1363. if (rc == 0) {
  1364. delta = adjust_time(old_clock, get_clock(), 0);
  1365. fixup_clock_comparator(delta);
  1366. rc = chsc_sstpi(stp_page, &stp_info,
  1367. sizeof(struct stp_sstpi));
  1368. if (rc == 0 && stp_info.tmd != 2)
  1369. rc = -EAGAIN;
  1370. }
  1371. }
  1372. if (rc) {
  1373. disable_sync_clock(NULL);
  1374. stp_sync->in_sync = -EAGAIN;
  1375. } else
  1376. stp_sync->in_sync = 1;
  1377. xchg(&first, 0);
  1378. return 0;
  1379. }
  1380. /*
  1381. * STP work. Check for the STP state and take over the clock
  1382. * synchronization if the STP clock source is usable.
  1383. */
  1384. static void stp_work_fn(struct work_struct *work)
  1385. {
  1386. struct clock_sync_data stp_sync;
  1387. int rc;
  1388. /* prevent multiple execution. */
  1389. mutex_lock(&stp_work_mutex);
  1390. if (!stp_online) {
  1391. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1392. del_timer_sync(&stp_timer);
  1393. goto out_unlock;
  1394. }
  1395. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1396. if (rc)
  1397. goto out_unlock;
  1398. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1399. if (rc || stp_info.c == 0)
  1400. goto out_unlock;
  1401. /* Skip synchronization if the clock is already in sync. */
  1402. if (check_sync_clock())
  1403. goto out_unlock;
  1404. memset(&stp_sync, 0, sizeof(stp_sync));
  1405. get_online_cpus();
  1406. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1407. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1408. put_online_cpus();
  1409. if (!check_sync_clock())
  1410. /*
  1411. * There is a usable clock but the synchonization failed.
  1412. * Retry after a second.
  1413. */
  1414. mod_timer(&stp_timer, jiffies + HZ);
  1415. out_unlock:
  1416. mutex_unlock(&stp_work_mutex);
  1417. }
  1418. /*
  1419. * STP subsys sysfs interface functions
  1420. */
  1421. static struct bus_type stp_subsys = {
  1422. .name = "stp",
  1423. .dev_name = "stp",
  1424. };
  1425. static ssize_t stp_ctn_id_show(struct device *dev,
  1426. struct device_attribute *attr,
  1427. char *buf)
  1428. {
  1429. if (!stp_online)
  1430. return -ENODATA;
  1431. return sprintf(buf, "%016llx\n",
  1432. *(unsigned long long *) stp_info.ctnid);
  1433. }
  1434. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1435. static ssize_t stp_ctn_type_show(struct device *dev,
  1436. struct device_attribute *attr,
  1437. char *buf)
  1438. {
  1439. if (!stp_online)
  1440. return -ENODATA;
  1441. return sprintf(buf, "%i\n", stp_info.ctn);
  1442. }
  1443. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1444. static ssize_t stp_dst_offset_show(struct device *dev,
  1445. struct device_attribute *attr,
  1446. char *buf)
  1447. {
  1448. if (!stp_online || !(stp_info.vbits & 0x2000))
  1449. return -ENODATA;
  1450. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1451. }
  1452. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1453. static ssize_t stp_leap_seconds_show(struct device *dev,
  1454. struct device_attribute *attr,
  1455. char *buf)
  1456. {
  1457. if (!stp_online || !(stp_info.vbits & 0x8000))
  1458. return -ENODATA;
  1459. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1460. }
  1461. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1462. static ssize_t stp_stratum_show(struct device *dev,
  1463. struct device_attribute *attr,
  1464. char *buf)
  1465. {
  1466. if (!stp_online)
  1467. return -ENODATA;
  1468. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1469. }
  1470. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1471. static ssize_t stp_time_offset_show(struct device *dev,
  1472. struct device_attribute *attr,
  1473. char *buf)
  1474. {
  1475. if (!stp_online || !(stp_info.vbits & 0x0800))
  1476. return -ENODATA;
  1477. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1478. }
  1479. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1480. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1481. struct device_attribute *attr,
  1482. char *buf)
  1483. {
  1484. if (!stp_online || !(stp_info.vbits & 0x4000))
  1485. return -ENODATA;
  1486. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1487. }
  1488. static DEVICE_ATTR(time_zone_offset, 0400,
  1489. stp_time_zone_offset_show, NULL);
  1490. static ssize_t stp_timing_mode_show(struct device *dev,
  1491. struct device_attribute *attr,
  1492. char *buf)
  1493. {
  1494. if (!stp_online)
  1495. return -ENODATA;
  1496. return sprintf(buf, "%i\n", stp_info.tmd);
  1497. }
  1498. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1499. static ssize_t stp_timing_state_show(struct device *dev,
  1500. struct device_attribute *attr,
  1501. char *buf)
  1502. {
  1503. if (!stp_online)
  1504. return -ENODATA;
  1505. return sprintf(buf, "%i\n", stp_info.tst);
  1506. }
  1507. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1508. static ssize_t stp_online_show(struct device *dev,
  1509. struct device_attribute *attr,
  1510. char *buf)
  1511. {
  1512. return sprintf(buf, "%i\n", stp_online);
  1513. }
  1514. static ssize_t stp_online_store(struct device *dev,
  1515. struct device_attribute *attr,
  1516. const char *buf, size_t count)
  1517. {
  1518. unsigned int value;
  1519. value = simple_strtoul(buf, NULL, 0);
  1520. if (value != 0 && value != 1)
  1521. return -EINVAL;
  1522. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1523. return -EOPNOTSUPP;
  1524. mutex_lock(&clock_sync_mutex);
  1525. stp_online = value;
  1526. if (stp_online)
  1527. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1528. else
  1529. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1530. queue_work(time_sync_wq, &stp_work);
  1531. mutex_unlock(&clock_sync_mutex);
  1532. return count;
  1533. }
  1534. /*
  1535. * Can't use DEVICE_ATTR because the attribute should be named
  1536. * stp/online but dev_attr_online already exists in this file ..
  1537. */
  1538. static struct device_attribute dev_attr_stp_online = {
  1539. .attr = { .name = "online", .mode = 0600 },
  1540. .show = stp_online_show,
  1541. .store = stp_online_store,
  1542. };
  1543. static struct device_attribute *stp_attributes[] = {
  1544. &dev_attr_ctn_id,
  1545. &dev_attr_ctn_type,
  1546. &dev_attr_dst_offset,
  1547. &dev_attr_leap_seconds,
  1548. &dev_attr_stp_online,
  1549. &dev_attr_stratum,
  1550. &dev_attr_time_offset,
  1551. &dev_attr_time_zone_offset,
  1552. &dev_attr_timing_mode,
  1553. &dev_attr_timing_state,
  1554. NULL
  1555. };
  1556. static int __init stp_init_sysfs(void)
  1557. {
  1558. struct device_attribute **attr;
  1559. int rc;
  1560. rc = subsys_system_register(&stp_subsys, NULL);
  1561. if (rc)
  1562. goto out;
  1563. for (attr = stp_attributes; *attr; attr++) {
  1564. rc = device_create_file(stp_subsys.dev_root, *attr);
  1565. if (rc)
  1566. goto out_unreg;
  1567. }
  1568. return 0;
  1569. out_unreg:
  1570. for (; attr >= stp_attributes; attr--)
  1571. device_remove_file(stp_subsys.dev_root, *attr);
  1572. bus_unregister(&stp_subsys);
  1573. out:
  1574. return rc;
  1575. }
  1576. device_initcall(stp_init_sysfs);