exceptions-64s.S 27 KB

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  1. /*
  2. * This file contains the 64-bit "server" PowerPC variant
  3. * of the low level exception handling including exception
  4. * vectors, exception return, part of the slb and stab
  5. * handling and other fixed offset specific things.
  6. *
  7. * This file is meant to be #included from head_64.S due to
  8. * position dependent assembly.
  9. *
  10. * Most of this originates from head_64.S and thus has the same
  11. * copyright history.
  12. *
  13. */
  14. #include <asm/hw_irq.h>
  15. #include <asm/exception-64s.h>
  16. #include <asm/ptrace.h>
  17. /*
  18. * We layout physical memory as follows:
  19. * 0x0000 - 0x00ff : Secondary processor spin code
  20. * 0x0100 - 0x2fff : pSeries Interrupt prologs
  21. * 0x3000 - 0x5fff : interrupt support common interrupt prologs
  22. * 0x6000 - 0x6fff : Initial (CPU0) segment table
  23. * 0x7000 - 0x7fff : FWNMI data area
  24. * 0x8000 - : Early init and support code
  25. */
  26. /*
  27. * This is the start of the interrupt handlers for pSeries
  28. * This code runs with relocation off.
  29. * Code from here to __end_interrupts gets copied down to real
  30. * address 0x100 when we are running a relocatable kernel.
  31. * Therefore any relative branches in this section must only
  32. * branch to labels in this section.
  33. */
  34. . = 0x100
  35. .globl __start_interrupts
  36. __start_interrupts:
  37. .globl system_reset_pSeries;
  38. system_reset_pSeries:
  39. HMT_MEDIUM;
  40. SET_SCRATCH0(r13)
  41. #ifdef CONFIG_PPC_P7_NAP
  42. BEGIN_FTR_SECTION
  43. /* Running native on arch 2.06 or later, check if we are
  44. * waking up from nap. We only handle no state loss and
  45. * supervisor state loss. We do -not- handle hypervisor
  46. * state loss at this time.
  47. */
  48. mfspr r13,SPRN_SRR1
  49. rlwinm. r13,r13,47-31,30,31
  50. beq 9f
  51. /* waking up from powersave (nap) state */
  52. cmpwi cr1,r13,2
  53. /* Total loss of HV state is fatal, we could try to use the
  54. * PIR to locate a PACA, then use an emergency stack etc...
  55. * but for now, let's just stay stuck here
  56. */
  57. bgt cr1,.
  58. GET_PACA(r13)
  59. #ifdef CONFIG_KVM_BOOK3S_64_HV
  60. lbz r0,PACAPROCSTART(r13)
  61. cmpwi r0,0x80
  62. bne 1f
  63. li r0,1
  64. stb r0,PACAPROCSTART(r13)
  65. b kvm_start_guest
  66. 1:
  67. #endif
  68. beq cr1,2f
  69. b .power7_wakeup_noloss
  70. 2: b .power7_wakeup_loss
  71. 9:
  72. END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
  73. #endif /* CONFIG_PPC_P7_NAP */
  74. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
  75. NOTEST, 0x100)
  76. . = 0x200
  77. machine_check_pSeries_1:
  78. /* This is moved out of line as it can be patched by FW, but
  79. * some code path might still want to branch into the original
  80. * vector
  81. */
  82. b machine_check_pSeries
  83. . = 0x300
  84. .globl data_access_pSeries
  85. data_access_pSeries:
  86. HMT_MEDIUM
  87. SET_SCRATCH0(r13)
  88. #ifndef CONFIG_POWER4_ONLY
  89. BEGIN_FTR_SECTION
  90. b data_access_check_stab
  91. data_access_not_stab:
  92. END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
  93. #endif
  94. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
  95. KVMTEST, 0x300)
  96. . = 0x380
  97. .globl data_access_slb_pSeries
  98. data_access_slb_pSeries:
  99. HMT_MEDIUM
  100. SET_SCRATCH0(r13)
  101. EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
  102. std r3,PACA_EXSLB+EX_R3(r13)
  103. mfspr r3,SPRN_DAR
  104. #ifdef __DISABLED__
  105. /* Keep that around for when we re-implement dynamic VSIDs */
  106. cmpdi r3,0
  107. bge slb_miss_user_pseries
  108. #endif /* __DISABLED__ */
  109. mfspr r12,SPRN_SRR1
  110. #ifndef CONFIG_RELOCATABLE
  111. b .slb_miss_realmode
  112. #else
  113. /*
  114. * We can't just use a direct branch to .slb_miss_realmode
  115. * because the distance from here to there depends on where
  116. * the kernel ends up being put.
  117. */
  118. mfctr r11
  119. ld r10,PACAKBASE(r13)
  120. LOAD_HANDLER(r10, .slb_miss_realmode)
  121. mtctr r10
  122. bctr
  123. #endif
  124. STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
  125. . = 0x480
  126. .globl instruction_access_slb_pSeries
  127. instruction_access_slb_pSeries:
  128. HMT_MEDIUM
  129. SET_SCRATCH0(r13)
  130. EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
  131. std r3,PACA_EXSLB+EX_R3(r13)
  132. mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
  133. #ifdef __DISABLED__
  134. /* Keep that around for when we re-implement dynamic VSIDs */
  135. cmpdi r3,0
  136. bge slb_miss_user_pseries
  137. #endif /* __DISABLED__ */
  138. mfspr r12,SPRN_SRR1
  139. #ifndef CONFIG_RELOCATABLE
  140. b .slb_miss_realmode
  141. #else
  142. mfctr r11
  143. ld r10,PACAKBASE(r13)
  144. LOAD_HANDLER(r10, .slb_miss_realmode)
  145. mtctr r10
  146. bctr
  147. #endif
  148. /* We open code these as we can't have a ". = x" (even with
  149. * x = "." within a feature section
  150. */
  151. . = 0x500;
  152. .globl hardware_interrupt_pSeries;
  153. .globl hardware_interrupt_hv;
  154. hardware_interrupt_pSeries:
  155. hardware_interrupt_hv:
  156. BEGIN_FTR_SECTION
  157. _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
  158. EXC_HV, SOFTEN_TEST_HV)
  159. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
  160. FTR_SECTION_ELSE
  161. _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
  162. EXC_STD, SOFTEN_TEST_HV_201)
  163. KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
  164. ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
  165. STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
  166. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
  167. STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
  168. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
  169. STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
  170. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  171. MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
  172. MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
  173. STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
  174. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
  175. STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
  176. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
  177. . = 0xc00
  178. .globl system_call_pSeries
  179. system_call_pSeries:
  180. HMT_MEDIUM
  181. #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
  182. SET_SCRATCH0(r13)
  183. GET_PACA(r13)
  184. std r9,PACA_EXGEN+EX_R9(r13)
  185. std r10,PACA_EXGEN+EX_R10(r13)
  186. mfcr r9
  187. KVMTEST(0xc00)
  188. GET_SCRATCH0(r13)
  189. #endif
  190. BEGIN_FTR_SECTION
  191. cmpdi r0,0x1ebe
  192. beq- 1f
  193. END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
  194. mr r9,r13
  195. GET_PACA(r13)
  196. mfspr r11,SPRN_SRR0
  197. mfspr r12,SPRN_SRR1
  198. ld r10,PACAKBASE(r13)
  199. LOAD_HANDLER(r10, system_call_entry)
  200. mtspr SPRN_SRR0,r10
  201. ld r10,PACAKMSR(r13)
  202. mtspr SPRN_SRR1,r10
  203. rfid
  204. b . /* prevent speculative execution */
  205. KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
  206. /* Fast LE/BE switch system call */
  207. 1: mfspr r12,SPRN_SRR1
  208. xori r12,r12,MSR_LE
  209. mtspr SPRN_SRR1,r12
  210. rfid /* return to userspace */
  211. b .
  212. STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
  213. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
  214. /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
  215. * out of line to handle them
  216. */
  217. . = 0xe00
  218. b h_data_storage_hv
  219. . = 0xe20
  220. b h_instr_storage_hv
  221. . = 0xe40
  222. b emulation_assist_hv
  223. . = 0xe50
  224. b hmi_exception_hv
  225. . = 0xe60
  226. b hmi_exception_hv
  227. /* We need to deal with the Altivec unavailable exception
  228. * here which is at 0xf20, thus in the middle of the
  229. * prolog code of the PerformanceMonitor one. A little
  230. * trickery is thus necessary
  231. */
  232. performance_monitor_pSeries_1:
  233. . = 0xf00
  234. b performance_monitor_pSeries
  235. altivec_unavailable_pSeries_1:
  236. . = 0xf20
  237. b altivec_unavailable_pSeries
  238. vsx_unavailable_pSeries_1:
  239. . = 0xf40
  240. b vsx_unavailable_pSeries
  241. #ifdef CONFIG_CBE_RAS
  242. STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
  243. KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
  244. #endif /* CONFIG_CBE_RAS */
  245. STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
  246. KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
  247. #ifdef CONFIG_CBE_RAS
  248. STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
  249. KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
  250. #endif /* CONFIG_CBE_RAS */
  251. STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
  252. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
  253. #ifdef CONFIG_CBE_RAS
  254. STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
  255. KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
  256. #endif /* CONFIG_CBE_RAS */
  257. . = 0x3000
  258. /*** Out of line interrupts support ***/
  259. /* moved from 0x200 */
  260. machine_check_pSeries:
  261. .globl machine_check_fwnmi
  262. machine_check_fwnmi:
  263. HMT_MEDIUM
  264. SET_SCRATCH0(r13) /* save r13 */
  265. EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
  266. EXC_STD, KVMTEST, 0x200)
  267. KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
  268. #ifndef CONFIG_POWER4_ONLY
  269. /* moved from 0x300 */
  270. data_access_check_stab:
  271. GET_PACA(r13)
  272. std r9,PACA_EXSLB+EX_R9(r13)
  273. std r10,PACA_EXSLB+EX_R10(r13)
  274. mfspr r10,SPRN_DAR
  275. mfspr r9,SPRN_DSISR
  276. srdi r10,r10,60
  277. rlwimi r10,r9,16,0x20
  278. #ifdef CONFIG_KVM_BOOK3S_PR
  279. lbz r9,HSTATE_IN_GUEST(r13)
  280. rlwimi r10,r9,8,0x300
  281. #endif
  282. mfcr r9
  283. cmpwi r10,0x2c
  284. beq do_stab_bolted_pSeries
  285. mtcrf 0x80,r9
  286. ld r9,PACA_EXSLB+EX_R9(r13)
  287. ld r10,PACA_EXSLB+EX_R10(r13)
  288. b data_access_not_stab
  289. do_stab_bolted_pSeries:
  290. std r11,PACA_EXSLB+EX_R11(r13)
  291. std r12,PACA_EXSLB+EX_R12(r13)
  292. GET_SCRATCH0(r10)
  293. std r10,PACA_EXSLB+EX_R13(r13)
  294. EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
  295. #endif /* CONFIG_POWER4_ONLY */
  296. KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
  297. KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
  298. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
  299. KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
  300. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
  301. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
  302. .align 7
  303. /* moved from 0xe00 */
  304. STD_EXCEPTION_HV(., 0xe02, h_data_storage)
  305. KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
  306. STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
  307. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
  308. STD_EXCEPTION_HV(., 0xe42, emulation_assist)
  309. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
  310. STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
  311. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
  312. /* moved from 0xf00 */
  313. STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
  314. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
  315. STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
  316. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
  317. STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
  318. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
  319. /*
  320. * An interrupt came in while soft-disabled. We set paca->irq_happened,
  321. * then, if it was a decrementer interrupt, we bump the dec to max and
  322. * and return, else we hard disable and return. This is called with
  323. * r10 containing the value to OR to the paca field.
  324. */
  325. #define MASKED_INTERRUPT(_H) \
  326. masked_##_H##interrupt: \
  327. std r11,PACA_EXGEN+EX_R11(r13); \
  328. lbz r11,PACAIRQHAPPENED(r13); \
  329. or r11,r11,r10; \
  330. stb r11,PACAIRQHAPPENED(r13); \
  331. andi. r10,r10,PACA_IRQ_DEC; \
  332. beq 1f; \
  333. lis r10,0x7fff; \
  334. ori r10,r10,0xffff; \
  335. mtspr SPRN_DEC,r10; \
  336. b 2f; \
  337. 1: mfspr r10,SPRN_##_H##SRR1; \
  338. rldicl r10,r10,48,1; /* clear MSR_EE */ \
  339. rotldi r10,r10,16; \
  340. mtspr SPRN_##_H##SRR1,r10; \
  341. 2: mtcrf 0x80,r9; \
  342. ld r9,PACA_EXGEN+EX_R9(r13); \
  343. ld r10,PACA_EXGEN+EX_R10(r13); \
  344. ld r11,PACA_EXGEN+EX_R11(r13); \
  345. GET_SCRATCH0(r13); \
  346. ##_H##rfid; \
  347. b .
  348. MASKED_INTERRUPT()
  349. MASKED_INTERRUPT(H)
  350. /*
  351. * Called from arch_local_irq_enable when an interrupt needs
  352. * to be resent. r3 contains 0x500 or 0x900 to indicate which
  353. * kind of interrupt. MSR:EE is already off. We generate a
  354. * stackframe like if a real interrupt had happened.
  355. *
  356. * Note: While MSR:EE is off, we need to make sure that _MSR
  357. * in the generated frame has EE set to 1 or the exception
  358. * handler will not properly re-enable them.
  359. */
  360. _GLOBAL(__replay_interrupt)
  361. /* We are going to jump to the exception common code which
  362. * will retrieve various register values from the PACA which
  363. * we don't give a damn about, so we don't bother storing them.
  364. */
  365. mfmsr r12
  366. mflr r11
  367. mfcr r9
  368. ori r12,r12,MSR_EE
  369. andi. r3,r3,0x0800
  370. bne decrementer_common
  371. b hardware_interrupt_common
  372. #ifdef CONFIG_PPC_PSERIES
  373. /*
  374. * Vectors for the FWNMI option. Share common code.
  375. */
  376. .globl system_reset_fwnmi
  377. .align 7
  378. system_reset_fwnmi:
  379. HMT_MEDIUM
  380. SET_SCRATCH0(r13) /* save r13 */
  381. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
  382. NOTEST, 0x100)
  383. #endif /* CONFIG_PPC_PSERIES */
  384. #ifdef __DISABLED__
  385. /*
  386. * This is used for when the SLB miss handler has to go virtual,
  387. * which doesn't happen for now anymore but will once we re-implement
  388. * dynamic VSIDs for shared page tables
  389. */
  390. slb_miss_user_pseries:
  391. std r10,PACA_EXGEN+EX_R10(r13)
  392. std r11,PACA_EXGEN+EX_R11(r13)
  393. std r12,PACA_EXGEN+EX_R12(r13)
  394. GET_SCRATCH0(r10)
  395. ld r11,PACA_EXSLB+EX_R9(r13)
  396. ld r12,PACA_EXSLB+EX_R3(r13)
  397. std r10,PACA_EXGEN+EX_R13(r13)
  398. std r11,PACA_EXGEN+EX_R9(r13)
  399. std r12,PACA_EXGEN+EX_R3(r13)
  400. clrrdi r12,r13,32
  401. mfmsr r10
  402. mfspr r11,SRR0 /* save SRR0 */
  403. ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
  404. ori r10,r10,MSR_IR|MSR_DR|MSR_RI
  405. mtspr SRR0,r12
  406. mfspr r12,SRR1 /* and SRR1 */
  407. mtspr SRR1,r10
  408. rfid
  409. b . /* prevent spec. execution */
  410. #endif /* __DISABLED__ */
  411. .align 7
  412. .globl __end_interrupts
  413. __end_interrupts:
  414. /*
  415. * Code from here down to __end_handlers is invoked from the
  416. * exception prologs above. Because the prologs assemble the
  417. * addresses of these handlers using the LOAD_HANDLER macro,
  418. * which uses an addi instruction, these handlers must be in
  419. * the first 32k of the kernel image.
  420. */
  421. /*** Common interrupt handlers ***/
  422. STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
  423. /*
  424. * Machine check is different because we use a different
  425. * save area: PACA_EXMC instead of PACA_EXGEN.
  426. */
  427. .align 7
  428. .globl machine_check_common
  429. machine_check_common:
  430. EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
  431. FINISH_NAP
  432. DISABLE_INTS
  433. bl .save_nvgprs
  434. addi r3,r1,STACK_FRAME_OVERHEAD
  435. bl .machine_check_exception
  436. b .ret_from_except
  437. STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
  438. STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
  439. STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
  440. STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
  441. STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
  442. STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
  443. STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
  444. STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
  445. STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
  446. STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
  447. #ifdef CONFIG_ALTIVEC
  448. STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
  449. #else
  450. STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
  451. #endif
  452. #ifdef CONFIG_CBE_RAS
  453. STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
  454. STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
  455. STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
  456. #endif /* CONFIG_CBE_RAS */
  457. .align 7
  458. system_call_entry:
  459. b system_call_common
  460. ppc64_runlatch_on_trampoline:
  461. b .__ppc64_runlatch_on
  462. /*
  463. * Here we have detected that the kernel stack pointer is bad.
  464. * R9 contains the saved CR, r13 points to the paca,
  465. * r10 contains the (bad) kernel stack pointer,
  466. * r11 and r12 contain the saved SRR0 and SRR1.
  467. * We switch to using an emergency stack, save the registers there,
  468. * and call kernel_bad_stack(), which panics.
  469. */
  470. bad_stack:
  471. ld r1,PACAEMERGSP(r13)
  472. subi r1,r1,64+INT_FRAME_SIZE
  473. std r9,_CCR(r1)
  474. std r10,GPR1(r1)
  475. std r11,_NIP(r1)
  476. std r12,_MSR(r1)
  477. mfspr r11,SPRN_DAR
  478. mfspr r12,SPRN_DSISR
  479. std r11,_DAR(r1)
  480. std r12,_DSISR(r1)
  481. mflr r10
  482. mfctr r11
  483. mfxer r12
  484. std r10,_LINK(r1)
  485. std r11,_CTR(r1)
  486. std r12,_XER(r1)
  487. SAVE_GPR(0,r1)
  488. SAVE_GPR(2,r1)
  489. ld r10,EX_R3(r3)
  490. std r10,GPR3(r1)
  491. SAVE_GPR(4,r1)
  492. SAVE_4GPRS(5,r1)
  493. ld r9,EX_R9(r3)
  494. ld r10,EX_R10(r3)
  495. SAVE_2GPRS(9,r1)
  496. ld r9,EX_R11(r3)
  497. ld r10,EX_R12(r3)
  498. ld r11,EX_R13(r3)
  499. std r9,GPR11(r1)
  500. std r10,GPR12(r1)
  501. std r11,GPR13(r1)
  502. BEGIN_FTR_SECTION
  503. ld r10,EX_CFAR(r3)
  504. std r10,ORIG_GPR3(r1)
  505. END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
  506. SAVE_8GPRS(14,r1)
  507. SAVE_10GPRS(22,r1)
  508. lhz r12,PACA_TRAP_SAVE(r13)
  509. std r12,_TRAP(r1)
  510. addi r11,r1,INT_FRAME_SIZE
  511. std r11,0(r1)
  512. li r12,0
  513. std r12,0(r11)
  514. ld r2,PACATOC(r13)
  515. ld r11,exception_marker@toc(r2)
  516. std r12,RESULT(r1)
  517. std r11,STACK_FRAME_OVERHEAD-16(r1)
  518. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  519. bl .kernel_bad_stack
  520. b 1b
  521. /*
  522. * Here r13 points to the paca, r9 contains the saved CR,
  523. * SRR0 and SRR1 are saved in r11 and r12,
  524. * r9 - r13 are saved in paca->exgen.
  525. */
  526. .align 7
  527. .globl data_access_common
  528. data_access_common:
  529. mfspr r10,SPRN_DAR
  530. std r10,PACA_EXGEN+EX_DAR(r13)
  531. mfspr r10,SPRN_DSISR
  532. stw r10,PACA_EXGEN+EX_DSISR(r13)
  533. EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
  534. DISABLE_INTS
  535. ld r12,_MSR(r1)
  536. ld r3,PACA_EXGEN+EX_DAR(r13)
  537. lwz r4,PACA_EXGEN+EX_DSISR(r13)
  538. li r5,0x300
  539. b .do_hash_page /* Try to handle as hpte fault */
  540. .align 7
  541. .globl h_data_storage_common
  542. h_data_storage_common:
  543. mfspr r10,SPRN_HDAR
  544. std r10,PACA_EXGEN+EX_DAR(r13)
  545. mfspr r10,SPRN_HDSISR
  546. stw r10,PACA_EXGEN+EX_DSISR(r13)
  547. EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
  548. bl .save_nvgprs
  549. DISABLE_INTS
  550. addi r3,r1,STACK_FRAME_OVERHEAD
  551. bl .unknown_exception
  552. b .ret_from_except
  553. .align 7
  554. .globl instruction_access_common
  555. instruction_access_common:
  556. EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
  557. DISABLE_INTS
  558. ld r12,_MSR(r1)
  559. ld r3,_NIP(r1)
  560. andis. r4,r12,0x5820
  561. li r5,0x400
  562. b .do_hash_page /* Try to handle as hpte fault */
  563. STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
  564. /*
  565. * Here is the common SLB miss user that is used when going to virtual
  566. * mode for SLB misses, that is currently not used
  567. */
  568. #ifdef __DISABLED__
  569. .align 7
  570. .globl slb_miss_user_common
  571. slb_miss_user_common:
  572. mflr r10
  573. std r3,PACA_EXGEN+EX_DAR(r13)
  574. stw r9,PACA_EXGEN+EX_CCR(r13)
  575. std r10,PACA_EXGEN+EX_LR(r13)
  576. std r11,PACA_EXGEN+EX_SRR0(r13)
  577. bl .slb_allocate_user
  578. ld r10,PACA_EXGEN+EX_LR(r13)
  579. ld r3,PACA_EXGEN+EX_R3(r13)
  580. lwz r9,PACA_EXGEN+EX_CCR(r13)
  581. ld r11,PACA_EXGEN+EX_SRR0(r13)
  582. mtlr r10
  583. beq- slb_miss_fault
  584. andi. r10,r12,MSR_RI /* check for unrecoverable exception */
  585. beq- unrecov_user_slb
  586. mfmsr r10
  587. .machine push
  588. .machine "power4"
  589. mtcrf 0x80,r9
  590. .machine pop
  591. clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
  592. mtmsrd r10,1
  593. mtspr SRR0,r11
  594. mtspr SRR1,r12
  595. ld r9,PACA_EXGEN+EX_R9(r13)
  596. ld r10,PACA_EXGEN+EX_R10(r13)
  597. ld r11,PACA_EXGEN+EX_R11(r13)
  598. ld r12,PACA_EXGEN+EX_R12(r13)
  599. ld r13,PACA_EXGEN+EX_R13(r13)
  600. rfid
  601. b .
  602. slb_miss_fault:
  603. EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
  604. ld r4,PACA_EXGEN+EX_DAR(r13)
  605. li r5,0
  606. std r4,_DAR(r1)
  607. std r5,_DSISR(r1)
  608. b handle_page_fault
  609. unrecov_user_slb:
  610. EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
  611. DISABLE_INTS
  612. bl .save_nvgprs
  613. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  614. bl .unrecoverable_exception
  615. b 1b
  616. #endif /* __DISABLED__ */
  617. /*
  618. * r13 points to the PACA, r9 contains the saved CR,
  619. * r12 contain the saved SRR1, SRR0 is still ready for return
  620. * r3 has the faulting address
  621. * r9 - r13 are saved in paca->exslb.
  622. * r3 is saved in paca->slb_r3
  623. * We assume we aren't going to take any exceptions during this procedure.
  624. */
  625. _GLOBAL(slb_miss_realmode)
  626. mflr r10
  627. #ifdef CONFIG_RELOCATABLE
  628. mtctr r11
  629. #endif
  630. stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
  631. std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
  632. bl .slb_allocate_realmode
  633. /* All done -- return from exception. */
  634. ld r10,PACA_EXSLB+EX_LR(r13)
  635. ld r3,PACA_EXSLB+EX_R3(r13)
  636. lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
  637. mtlr r10
  638. andi. r10,r12,MSR_RI /* check for unrecoverable exception */
  639. beq- 2f
  640. .machine push
  641. .machine "power4"
  642. mtcrf 0x80,r9
  643. mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
  644. .machine pop
  645. ld r9,PACA_EXSLB+EX_R9(r13)
  646. ld r10,PACA_EXSLB+EX_R10(r13)
  647. ld r11,PACA_EXSLB+EX_R11(r13)
  648. ld r12,PACA_EXSLB+EX_R12(r13)
  649. ld r13,PACA_EXSLB+EX_R13(r13)
  650. rfid
  651. b . /* prevent speculative execution */
  652. 2: mfspr r11,SPRN_SRR0
  653. ld r10,PACAKBASE(r13)
  654. LOAD_HANDLER(r10,unrecov_slb)
  655. mtspr SPRN_SRR0,r10
  656. ld r10,PACAKMSR(r13)
  657. mtspr SPRN_SRR1,r10
  658. rfid
  659. b .
  660. unrecov_slb:
  661. EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
  662. DISABLE_INTS
  663. bl .save_nvgprs
  664. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  665. bl .unrecoverable_exception
  666. b 1b
  667. #ifdef CONFIG_PPC_970_NAP
  668. power4_fixup_nap:
  669. andc r9,r9,r10
  670. std r9,TI_LOCAL_FLAGS(r11)
  671. ld r10,_LINK(r1) /* make idle task do the */
  672. std r10,_NIP(r1) /* equivalent of a blr */
  673. blr
  674. #endif
  675. .align 7
  676. .globl alignment_common
  677. alignment_common:
  678. mfspr r10,SPRN_DAR
  679. std r10,PACA_EXGEN+EX_DAR(r13)
  680. mfspr r10,SPRN_DSISR
  681. stw r10,PACA_EXGEN+EX_DSISR(r13)
  682. EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
  683. ld r3,PACA_EXGEN+EX_DAR(r13)
  684. lwz r4,PACA_EXGEN+EX_DSISR(r13)
  685. std r3,_DAR(r1)
  686. std r4,_DSISR(r1)
  687. bl .save_nvgprs
  688. addi r3,r1,STACK_FRAME_OVERHEAD
  689. ENABLE_INTS
  690. bl .alignment_exception
  691. b .ret_from_except
  692. .align 7
  693. .globl program_check_common
  694. program_check_common:
  695. EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
  696. bl .save_nvgprs
  697. DISABLE_INTS
  698. addi r3,r1,STACK_FRAME_OVERHEAD
  699. bl .program_check_exception
  700. b .ret_from_except
  701. .align 7
  702. .globl fp_unavailable_common
  703. fp_unavailable_common:
  704. EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
  705. bne 1f /* if from user, just load it up */
  706. bl .save_nvgprs
  707. DISABLE_INTS
  708. addi r3,r1,STACK_FRAME_OVERHEAD
  709. bl .kernel_fp_unavailable_exception
  710. BUG_OPCODE
  711. 1: bl .load_up_fpu
  712. b fast_exception_return
  713. .align 7
  714. .globl altivec_unavailable_common
  715. altivec_unavailable_common:
  716. EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
  717. #ifdef CONFIG_ALTIVEC
  718. BEGIN_FTR_SECTION
  719. beq 1f
  720. bl .load_up_altivec
  721. b fast_exception_return
  722. 1:
  723. END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
  724. #endif
  725. bl .save_nvgprs
  726. DISABLE_INTS
  727. addi r3,r1,STACK_FRAME_OVERHEAD
  728. bl .altivec_unavailable_exception
  729. b .ret_from_except
  730. .align 7
  731. .globl vsx_unavailable_common
  732. vsx_unavailable_common:
  733. EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
  734. #ifdef CONFIG_VSX
  735. BEGIN_FTR_SECTION
  736. beq 1f
  737. b .load_up_vsx
  738. 1:
  739. END_FTR_SECTION_IFSET(CPU_FTR_VSX)
  740. #endif
  741. bl .save_nvgprs
  742. DISABLE_INTS
  743. addi r3,r1,STACK_FRAME_OVERHEAD
  744. bl .vsx_unavailable_exception
  745. b .ret_from_except
  746. .align 7
  747. .globl __end_handlers
  748. __end_handlers:
  749. /*
  750. * Hash table stuff
  751. */
  752. .align 7
  753. _STATIC(do_hash_page)
  754. std r3,_DAR(r1)
  755. std r4,_DSISR(r1)
  756. andis. r0,r4,0xa410 /* weird error? */
  757. bne- handle_page_fault /* if not, try to insert a HPTE */
  758. andis. r0,r4,DSISR_DABRMATCH@h
  759. bne- handle_dabr_fault
  760. BEGIN_FTR_SECTION
  761. andis. r0,r4,0x0020 /* Is it a segment table fault? */
  762. bne- do_ste_alloc /* If so handle it */
  763. END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
  764. clrrdi r11,r1,THREAD_SHIFT
  765. lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
  766. andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
  767. bne 77f /* then don't call hash_page now */
  768. /*
  769. * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
  770. * accessing a userspace segment (even from the kernel). We assume
  771. * kernel addresses always have the high bit set.
  772. */
  773. rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
  774. rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
  775. orc r0,r12,r0 /* MSR_PR | ~high_bit */
  776. rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
  777. ori r4,r4,1 /* add _PAGE_PRESENT */
  778. rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
  779. /*
  780. * r3 contains the faulting address
  781. * r4 contains the required access permissions
  782. * r5 contains the trap number
  783. *
  784. * at return r3 = 0 for success, 1 for page fault, negative for error
  785. */
  786. bl .hash_page /* build HPTE if possible */
  787. cmpdi r3,0 /* see if hash_page succeeded */
  788. /* Success */
  789. beq fast_exc_return_irq /* Return from exception on success */
  790. /* Error */
  791. blt- 13f
  792. /* Here we have a page fault that hash_page can't handle. */
  793. handle_page_fault:
  794. 11: ld r4,_DAR(r1)
  795. ld r5,_DSISR(r1)
  796. addi r3,r1,STACK_FRAME_OVERHEAD
  797. bl .do_page_fault
  798. cmpdi r3,0
  799. beq+ 12f
  800. bl .save_nvgprs
  801. mr r5,r3
  802. addi r3,r1,STACK_FRAME_OVERHEAD
  803. lwz r4,_DAR(r1)
  804. bl .bad_page_fault
  805. b .ret_from_except
  806. /* We have a data breakpoint exception - handle it */
  807. handle_dabr_fault:
  808. bl .save_nvgprs
  809. ld r4,_DAR(r1)
  810. ld r5,_DSISR(r1)
  811. addi r3,r1,STACK_FRAME_OVERHEAD
  812. bl .do_dabr
  813. 12: b .ret_from_except_lite
  814. /* We have a page fault that hash_page could handle but HV refused
  815. * the PTE insertion
  816. */
  817. 13: bl .save_nvgprs
  818. mr r5,r3
  819. addi r3,r1,STACK_FRAME_OVERHEAD
  820. ld r4,_DAR(r1)
  821. bl .low_hash_fault
  822. b .ret_from_except
  823. /*
  824. * We come here as a result of a DSI at a point where we don't want
  825. * to call hash_page, such as when we are accessing memory (possibly
  826. * user memory) inside a PMU interrupt that occurred while interrupts
  827. * were soft-disabled. We want to invoke the exception handler for
  828. * the access, or panic if there isn't a handler.
  829. */
  830. 77: bl .save_nvgprs
  831. mr r4,r3
  832. addi r3,r1,STACK_FRAME_OVERHEAD
  833. li r5,SIGSEGV
  834. bl .bad_page_fault
  835. b .ret_from_except
  836. /* here we have a segment miss */
  837. do_ste_alloc:
  838. bl .ste_allocate /* try to insert stab entry */
  839. cmpdi r3,0
  840. bne- handle_page_fault
  841. b fast_exception_return
  842. /*
  843. * r13 points to the PACA, r9 contains the saved CR,
  844. * r11 and r12 contain the saved SRR0 and SRR1.
  845. * r9 - r13 are saved in paca->exslb.
  846. * We assume we aren't going to take any exceptions during this procedure.
  847. * We assume (DAR >> 60) == 0xc.
  848. */
  849. .align 7
  850. _GLOBAL(do_stab_bolted)
  851. stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
  852. std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
  853. /* Hash to the primary group */
  854. ld r10,PACASTABVIRT(r13)
  855. mfspr r11,SPRN_DAR
  856. srdi r11,r11,28
  857. rldimi r10,r11,7,52 /* r10 = first ste of the group */
  858. /* Calculate VSID */
  859. /* This is a kernel address, so protovsid = ESID */
  860. ASM_VSID_SCRAMBLE(r11, r9, 256M)
  861. rldic r9,r11,12,16 /* r9 = vsid << 12 */
  862. /* Search the primary group for a free entry */
  863. 1: ld r11,0(r10) /* Test valid bit of the current ste */
  864. andi. r11,r11,0x80
  865. beq 2f
  866. addi r10,r10,16
  867. andi. r11,r10,0x70
  868. bne 1b
  869. /* Stick for only searching the primary group for now. */
  870. /* At least for now, we use a very simple random castout scheme */
  871. /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
  872. mftb r11
  873. rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
  874. ori r11,r11,0x10
  875. /* r10 currently points to an ste one past the group of interest */
  876. /* make it point to the randomly selected entry */
  877. subi r10,r10,128
  878. or r10,r10,r11 /* r10 is the entry to invalidate */
  879. isync /* mark the entry invalid */
  880. ld r11,0(r10)
  881. rldicl r11,r11,56,1 /* clear the valid bit */
  882. rotldi r11,r11,8
  883. std r11,0(r10)
  884. sync
  885. clrrdi r11,r11,28 /* Get the esid part of the ste */
  886. slbie r11
  887. 2: std r9,8(r10) /* Store the vsid part of the ste */
  888. eieio
  889. mfspr r11,SPRN_DAR /* Get the new esid */
  890. clrrdi r11,r11,28 /* Permits a full 32b of ESID */
  891. ori r11,r11,0x90 /* Turn on valid and kp */
  892. std r11,0(r10) /* Put new entry back into the stab */
  893. sync
  894. /* All done -- return from exception. */
  895. lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
  896. ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
  897. andi. r10,r12,MSR_RI
  898. beq- unrecov_slb
  899. mtcrf 0x80,r9 /* restore CR */
  900. mfmsr r10
  901. clrrdi r10,r10,2
  902. mtmsrd r10,1
  903. mtspr SPRN_SRR0,r11
  904. mtspr SPRN_SRR1,r12
  905. ld r9,PACA_EXSLB+EX_R9(r13)
  906. ld r10,PACA_EXSLB+EX_R10(r13)
  907. ld r11,PACA_EXSLB+EX_R11(r13)
  908. ld r12,PACA_EXSLB+EX_R12(r13)
  909. ld r13,PACA_EXSLB+EX_R13(r13)
  910. rfid
  911. b . /* prevent speculative execution */
  912. #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
  913. /*
  914. * Data area reserved for FWNMI option.
  915. * This address (0x7000) is fixed by the RPA.
  916. */
  917. .= 0x7000
  918. .globl fwnmi_data_area
  919. fwnmi_data_area:
  920. /* pseries and powernv need to keep the whole page from
  921. * 0x7000 to 0x8000 free for use by the firmware
  922. */
  923. . = 0x8000
  924. #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
  925. /* Space for CPU0's segment table */
  926. .balign 4096
  927. .globl initial_stab
  928. initial_stab:
  929. .space 4096
  930. #ifdef CONFIG_PPC_POWERNV
  931. _GLOBAL(opal_mc_secondary_handler)
  932. HMT_MEDIUM
  933. SET_SCRATCH0(r13)
  934. GET_PACA(r13)
  935. clrldi r3,r3,2
  936. tovirt(r3,r3)
  937. std r3,PACA_OPAL_MC_EVT(r13)
  938. ld r13,OPAL_MC_SRR0(r3)
  939. mtspr SPRN_SRR0,r13
  940. ld r13,OPAL_MC_SRR1(r3)
  941. mtspr SPRN_SRR1,r13
  942. ld r3,OPAL_MC_GPR3(r3)
  943. GET_SCRATCH0(r13)
  944. b machine_check_pSeries
  945. #endif /* CONFIG_PPC_POWERNV */