dma.c 5.7 KB

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  1. /*
  2. * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
  3. *
  4. * Provide default implementations of the DMA mapping callbacks for
  5. * directly mapped busses.
  6. */
  7. #include <linux/device.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/dma-debug.h>
  10. #include <linux/gfp.h>
  11. #include <linux/memblock.h>
  12. #include <linux/export.h>
  13. #include <asm/bug.h>
  14. #include <asm/abs_addr.h>
  15. #include <asm/machdep.h>
  16. /*
  17. * Generic direct DMA implementation
  18. *
  19. * This implementation supports a per-device offset that can be applied if
  20. * the address at which memory is visible to devices is not 0. Platform code
  21. * can set archdata.dma_data to an unsigned long holding the offset. By
  22. * default the offset is PCI_DRAM_OFFSET.
  23. */
  24. void *dma_direct_alloc_coherent(struct device *dev, size_t size,
  25. dma_addr_t *dma_handle, gfp_t flag)
  26. {
  27. void *ret;
  28. #ifdef CONFIG_NOT_COHERENT_CACHE
  29. ret = __dma_alloc_coherent(dev, size, dma_handle, flag);
  30. if (ret == NULL)
  31. return NULL;
  32. *dma_handle += get_dma_offset(dev);
  33. return ret;
  34. #else
  35. struct page *page;
  36. int node = dev_to_node(dev);
  37. /* ignore region specifiers */
  38. flag &= ~(__GFP_HIGHMEM);
  39. page = alloc_pages_node(node, flag, get_order(size));
  40. if (page == NULL)
  41. return NULL;
  42. ret = page_address(page);
  43. memset(ret, 0, size);
  44. *dma_handle = virt_to_abs(ret) + get_dma_offset(dev);
  45. return ret;
  46. #endif
  47. }
  48. void dma_direct_free_coherent(struct device *dev, size_t size,
  49. void *vaddr, dma_addr_t dma_handle)
  50. {
  51. #ifdef CONFIG_NOT_COHERENT_CACHE
  52. __dma_free_coherent(size, vaddr);
  53. #else
  54. free_pages((unsigned long)vaddr, get_order(size));
  55. #endif
  56. }
  57. static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
  58. int nents, enum dma_data_direction direction,
  59. struct dma_attrs *attrs)
  60. {
  61. struct scatterlist *sg;
  62. int i;
  63. for_each_sg(sgl, sg, nents, i) {
  64. sg->dma_address = sg_phys(sg) + get_dma_offset(dev);
  65. sg->dma_length = sg->length;
  66. __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
  67. }
  68. return nents;
  69. }
  70. static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
  71. int nents, enum dma_data_direction direction,
  72. struct dma_attrs *attrs)
  73. {
  74. }
  75. static int dma_direct_dma_supported(struct device *dev, u64 mask)
  76. {
  77. #ifdef CONFIG_PPC64
  78. /* Could be improved so platforms can set the limit in case
  79. * they have limited DMA windows
  80. */
  81. return mask >= get_dma_offset(dev) + (memblock_end_of_DRAM() - 1);
  82. #else
  83. return 1;
  84. #endif
  85. }
  86. static u64 dma_direct_get_required_mask(struct device *dev)
  87. {
  88. u64 end, mask;
  89. end = memblock_end_of_DRAM() + get_dma_offset(dev);
  90. mask = 1ULL << (fls64(end) - 1);
  91. mask += mask - 1;
  92. return mask;
  93. }
  94. static inline dma_addr_t dma_direct_map_page(struct device *dev,
  95. struct page *page,
  96. unsigned long offset,
  97. size_t size,
  98. enum dma_data_direction dir,
  99. struct dma_attrs *attrs)
  100. {
  101. BUG_ON(dir == DMA_NONE);
  102. __dma_sync_page(page, offset, size, dir);
  103. return page_to_phys(page) + offset + get_dma_offset(dev);
  104. }
  105. static inline void dma_direct_unmap_page(struct device *dev,
  106. dma_addr_t dma_address,
  107. size_t size,
  108. enum dma_data_direction direction,
  109. struct dma_attrs *attrs)
  110. {
  111. }
  112. #ifdef CONFIG_NOT_COHERENT_CACHE
  113. static inline void dma_direct_sync_sg(struct device *dev,
  114. struct scatterlist *sgl, int nents,
  115. enum dma_data_direction direction)
  116. {
  117. struct scatterlist *sg;
  118. int i;
  119. for_each_sg(sgl, sg, nents, i)
  120. __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
  121. }
  122. static inline void dma_direct_sync_single(struct device *dev,
  123. dma_addr_t dma_handle, size_t size,
  124. enum dma_data_direction direction)
  125. {
  126. __dma_sync(bus_to_virt(dma_handle), size, direction);
  127. }
  128. #endif
  129. struct dma_map_ops dma_direct_ops = {
  130. .alloc_coherent = dma_direct_alloc_coherent,
  131. .free_coherent = dma_direct_free_coherent,
  132. .map_sg = dma_direct_map_sg,
  133. .unmap_sg = dma_direct_unmap_sg,
  134. .dma_supported = dma_direct_dma_supported,
  135. .map_page = dma_direct_map_page,
  136. .unmap_page = dma_direct_unmap_page,
  137. .get_required_mask = dma_direct_get_required_mask,
  138. #ifdef CONFIG_NOT_COHERENT_CACHE
  139. .sync_single_for_cpu = dma_direct_sync_single,
  140. .sync_single_for_device = dma_direct_sync_single,
  141. .sync_sg_for_cpu = dma_direct_sync_sg,
  142. .sync_sg_for_device = dma_direct_sync_sg,
  143. #endif
  144. };
  145. EXPORT_SYMBOL(dma_direct_ops);
  146. #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
  147. int dma_set_mask(struct device *dev, u64 dma_mask)
  148. {
  149. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  150. if (ppc_md.dma_set_mask)
  151. return ppc_md.dma_set_mask(dev, dma_mask);
  152. if ((dma_ops != NULL) && (dma_ops->set_dma_mask != NULL))
  153. return dma_ops->set_dma_mask(dev, dma_mask);
  154. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  155. return -EIO;
  156. *dev->dma_mask = dma_mask;
  157. return 0;
  158. }
  159. EXPORT_SYMBOL(dma_set_mask);
  160. u64 dma_get_required_mask(struct device *dev)
  161. {
  162. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  163. if (ppc_md.dma_get_required_mask)
  164. return ppc_md.dma_get_required_mask(dev);
  165. if (unlikely(dma_ops == NULL))
  166. return 0;
  167. if (dma_ops->get_required_mask)
  168. return dma_ops->get_required_mask(dev);
  169. return DMA_BIT_MASK(8 * sizeof(dma_addr_t));
  170. }
  171. EXPORT_SYMBOL_GPL(dma_get_required_mask);
  172. static int __init dma_init(void)
  173. {
  174. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  175. return 0;
  176. }
  177. fs_initcall(dma_init);
  178. int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
  179. void *cpu_addr, dma_addr_t handle, size_t size)
  180. {
  181. unsigned long pfn;
  182. #ifdef CONFIG_NOT_COHERENT_CACHE
  183. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  184. pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr);
  185. #else
  186. pfn = page_to_pfn(virt_to_page(cpu_addr));
  187. #endif
  188. return remap_pfn_range(vma, vma->vm_start,
  189. pfn + vma->vm_pgoff,
  190. vma->vm_end - vma->vm_start,
  191. vma->vm_page_prot);
  192. }
  193. EXPORT_SYMBOL_GPL(dma_mmap_coherent);