exception-64s.h 11 KB

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  1. #ifndef _ASM_POWERPC_EXCEPTION_H
  2. #define _ASM_POWERPC_EXCEPTION_H
  3. /*
  4. * Extracted from head_64.S
  5. *
  6. * PowerPC version
  7. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  8. *
  9. * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  10. * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  11. * Adapted for Power Macintosh by Paul Mackerras.
  12. * Low-level exception handlers and MMU support
  13. * rewritten by Paul Mackerras.
  14. * Copyright (C) 1996 Paul Mackerras.
  15. *
  16. * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  17. * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  18. *
  19. * This file contains the low-level support and setup for the
  20. * PowerPC-64 platform, including trap and interrupt dispatch.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License
  24. * as published by the Free Software Foundation; either version
  25. * 2 of the License, or (at your option) any later version.
  26. */
  27. /*
  28. * The following macros define the code that appears as
  29. * the prologue to each of the exception handlers. They
  30. * are split into two parts to allow a single kernel binary
  31. * to be used for pSeries and iSeries.
  32. *
  33. * We make as much of the exception code common between native
  34. * exception handlers (including pSeries LPAR) and iSeries LPAR
  35. * implementations as possible.
  36. */
  37. #define EX_R9 0
  38. #define EX_R10 8
  39. #define EX_R11 16
  40. #define EX_R12 24
  41. #define EX_R13 32
  42. #define EX_SRR0 40
  43. #define EX_DAR 48
  44. #define EX_DSISR 56
  45. #define EX_CCR 60
  46. #define EX_R3 64
  47. #define EX_LR 72
  48. #define EX_CFAR 80
  49. /*
  50. * We're short on space and time in the exception prolog, so we can't
  51. * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
  52. * low halfword of the address, but for Kdump we need the whole low
  53. * word.
  54. */
  55. #define LOAD_HANDLER(reg, label) \
  56. addi reg,reg,(label)-_stext; /* virt addr of handler ... */
  57. /* Exception register prefixes */
  58. #define EXC_HV H
  59. #define EXC_STD
  60. #define __EXCEPTION_PROLOG_1(area, extra, vec) \
  61. GET_PACA(r13); \
  62. std r9,area+EX_R9(r13); /* save r9 - r12 */ \
  63. std r10,area+EX_R10(r13); \
  64. BEGIN_FTR_SECTION_NESTED(66); \
  65. mfspr r10,SPRN_CFAR; \
  66. std r10,area+EX_CFAR(r13); \
  67. END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
  68. mfcr r9; \
  69. extra(vec); \
  70. std r11,area+EX_R11(r13); \
  71. std r12,area+EX_R12(r13); \
  72. GET_SCRATCH0(r10); \
  73. std r10,area+EX_R13(r13)
  74. #define EXCEPTION_PROLOG_1(area, extra, vec) \
  75. __EXCEPTION_PROLOG_1(area, extra, vec)
  76. #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
  77. ld r12,PACAKBASE(r13); /* get high part of &label */ \
  78. ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
  79. mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
  80. LOAD_HANDLER(r12,label) \
  81. mtspr SPRN_##h##SRR0,r12; \
  82. mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
  83. mtspr SPRN_##h##SRR1,r10; \
  84. h##rfid; \
  85. b . /* prevent speculative execution */
  86. #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
  87. __EXCEPTION_PROLOG_PSERIES_1(label, h)
  88. #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
  89. EXCEPTION_PROLOG_1(area, extra, vec); \
  90. EXCEPTION_PROLOG_PSERIES_1(label, h);
  91. #define __KVMTEST(n) \
  92. lbz r10,HSTATE_IN_GUEST(r13); \
  93. cmpwi r10,0; \
  94. bne do_kvm_##n
  95. #define __KVM_HANDLER(area, h, n) \
  96. do_kvm_##n: \
  97. ld r10,area+EX_R10(r13); \
  98. stw r9,HSTATE_SCRATCH1(r13); \
  99. ld r9,area+EX_R9(r13); \
  100. std r12,HSTATE_SCRATCH0(r13); \
  101. li r12,n; \
  102. b kvmppc_interrupt
  103. #define __KVM_HANDLER_SKIP(area, h, n) \
  104. do_kvm_##n: \
  105. cmpwi r10,KVM_GUEST_MODE_SKIP; \
  106. ld r10,area+EX_R10(r13); \
  107. beq 89f; \
  108. stw r9,HSTATE_SCRATCH1(r13); \
  109. ld r9,area+EX_R9(r13); \
  110. std r12,HSTATE_SCRATCH0(r13); \
  111. li r12,n; \
  112. b kvmppc_interrupt; \
  113. 89: mtocrf 0x80,r9; \
  114. ld r9,area+EX_R9(r13); \
  115. b kvmppc_skip_##h##interrupt
  116. #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
  117. #define KVMTEST(n) __KVMTEST(n)
  118. #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
  119. #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
  120. #else
  121. #define KVMTEST(n)
  122. #define KVM_HANDLER(area, h, n)
  123. #define KVM_HANDLER_SKIP(area, h, n)
  124. #endif
  125. #ifdef CONFIG_KVM_BOOK3S_PR
  126. #define KVMTEST_PR(n) __KVMTEST(n)
  127. #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
  128. #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
  129. #else
  130. #define KVMTEST_PR(n)
  131. #define KVM_HANDLER_PR(area, h, n)
  132. #define KVM_HANDLER_PR_SKIP(area, h, n)
  133. #endif
  134. #define NOTEST(n)
  135. /*
  136. * The common exception prolog is used for all except a few exceptions
  137. * such as a segment miss on a kernel address. We have to be prepared
  138. * to take another exception from the point where we first touch the
  139. * kernel stack onwards.
  140. *
  141. * On entry r13 points to the paca, r9-r13 are saved in the paca,
  142. * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
  143. * SRR1, and relocation is on.
  144. */
  145. #define EXCEPTION_PROLOG_COMMON(n, area) \
  146. andi. r10,r12,MSR_PR; /* See if coming from user */ \
  147. mr r10,r1; /* Save r1 */ \
  148. subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
  149. beq- 1f; \
  150. ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
  151. 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
  152. blt+ cr1,3f; /* abort if it is */ \
  153. li r1,(n); /* will be reloaded later */ \
  154. sth r1,PACA_TRAP_SAVE(r13); \
  155. std r3,area+EX_R3(r13); \
  156. addi r3,r13,area; /* r3 -> where regs are saved*/ \
  157. b bad_stack; \
  158. 3: std r9,_CCR(r1); /* save CR in stackframe */ \
  159. std r11,_NIP(r1); /* save SRR0 in stackframe */ \
  160. std r12,_MSR(r1); /* save SRR1 in stackframe */ \
  161. std r10,0(r1); /* make stack chain pointer */ \
  162. std r0,GPR0(r1); /* save r0 in stackframe */ \
  163. std r10,GPR1(r1); /* save r1 in stackframe */ \
  164. ACCOUNT_CPU_USER_ENTRY(r9, r10); \
  165. std r2,GPR2(r1); /* save r2 in stackframe */ \
  166. SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
  167. SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
  168. ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
  169. ld r10,area+EX_R10(r13); \
  170. std r9,GPR9(r1); \
  171. std r10,GPR10(r1); \
  172. ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
  173. ld r10,area+EX_R12(r13); \
  174. ld r11,area+EX_R13(r13); \
  175. std r9,GPR11(r1); \
  176. std r10,GPR12(r1); \
  177. std r11,GPR13(r1); \
  178. BEGIN_FTR_SECTION_NESTED(66); \
  179. ld r10,area+EX_CFAR(r13); \
  180. std r10,ORIG_GPR3(r1); \
  181. END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
  182. ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
  183. mflr r9; /* save LR in stackframe */ \
  184. std r9,_LINK(r1); \
  185. mfctr r10; /* save CTR in stackframe */ \
  186. std r10,_CTR(r1); \
  187. lbz r10,PACASOFTIRQEN(r13); \
  188. mfspr r11,SPRN_XER; /* save XER in stackframe */ \
  189. std r10,SOFTE(r1); \
  190. std r11,_XER(r1); \
  191. li r9,(n)+1; \
  192. std r9,_TRAP(r1); /* set trap number */ \
  193. li r10,0; \
  194. ld r11,exception_marker@toc(r2); \
  195. std r10,RESULT(r1); /* clear regs->result */ \
  196. std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
  197. ACCOUNT_STOLEN_TIME
  198. /*
  199. * Exception vectors.
  200. */
  201. #define STD_EXCEPTION_PSERIES(loc, vec, label) \
  202. . = loc; \
  203. .globl label##_pSeries; \
  204. label##_pSeries: \
  205. HMT_MEDIUM; \
  206. SET_SCRATCH0(r13); /* save r13 */ \
  207. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
  208. EXC_STD, KVMTEST_PR, vec)
  209. #define STD_EXCEPTION_HV(loc, vec, label) \
  210. . = loc; \
  211. .globl label##_hv; \
  212. label##_hv: \
  213. HMT_MEDIUM; \
  214. SET_SCRATCH0(r13); /* save r13 */ \
  215. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
  216. EXC_HV, KVMTEST, vec)
  217. /* This associate vector numbers with bits in paca->irq_happened */
  218. #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
  219. #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
  220. #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
  221. #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
  222. #define __SOFTEN_TEST(h, vec) \
  223. lbz r10,PACASOFTIRQEN(r13); \
  224. cmpwi r10,0; \
  225. li r10,SOFTEN_VALUE_##vec; \
  226. beq masked_##h##interrupt
  227. #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
  228. #define SOFTEN_TEST_PR(vec) \
  229. KVMTEST_PR(vec); \
  230. _SOFTEN_TEST(EXC_STD, vec)
  231. #define SOFTEN_TEST_HV(vec) \
  232. KVMTEST(vec); \
  233. _SOFTEN_TEST(EXC_HV, vec)
  234. #define SOFTEN_TEST_HV_201(vec) \
  235. KVMTEST(vec); \
  236. _SOFTEN_TEST(EXC_STD, vec)
  237. #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
  238. HMT_MEDIUM; \
  239. SET_SCRATCH0(r13); /* save r13 */ \
  240. __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
  241. EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
  242. #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
  243. __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
  244. #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
  245. . = loc; \
  246. .globl label##_pSeries; \
  247. label##_pSeries: \
  248. _MASKABLE_EXCEPTION_PSERIES(vec, label, \
  249. EXC_STD, SOFTEN_TEST_PR)
  250. #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
  251. . = loc; \
  252. .globl label##_hv; \
  253. label##_hv: \
  254. _MASKABLE_EXCEPTION_PSERIES(vec, label, \
  255. EXC_HV, SOFTEN_TEST_HV)
  256. /*
  257. * Our exception common code can be passed various "additions"
  258. * to specify the behaviour of interrupts, whether to kick the
  259. * runlatch, etc...
  260. */
  261. /* Exception addition: Hard disable interrupts */
  262. #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
  263. /* Exception addition: Keep interrupt state */
  264. #define ENABLE_INTS \
  265. ld r11,PACAKMSR(r13); \
  266. ld r12,_MSR(r1); \
  267. rlwimi r11,r12,0,MSR_EE; \
  268. mtmsrd r11,1
  269. #define ADD_NVGPRS \
  270. bl .save_nvgprs
  271. #define RUNLATCH_ON \
  272. BEGIN_FTR_SECTION \
  273. clrrdi r3,r1,THREAD_SHIFT; \
  274. ld r4,TI_LOCAL_FLAGS(r3); \
  275. andi. r0,r4,_TLF_RUNLATCH; \
  276. beql ppc64_runlatch_on_trampoline; \
  277. END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
  278. #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
  279. .align 7; \
  280. .globl label##_common; \
  281. label##_common: \
  282. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  283. additions; \
  284. addi r3,r1,STACK_FRAME_OVERHEAD; \
  285. bl hdlr; \
  286. b ret
  287. #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
  288. EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
  289. ADD_NVGPRS;DISABLE_INTS)
  290. /*
  291. * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
  292. * in the idle task and therefore need the special idle handling
  293. * (finish nap and runlatch)
  294. */
  295. #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
  296. EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
  297. FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
  298. /*
  299. * When the idle code in power4_idle puts the CPU into NAP mode,
  300. * it has to do so in a loop, and relies on the external interrupt
  301. * and decrementer interrupt entry code to get it out of the loop.
  302. * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
  303. * to signal that it is in the loop and needs help to get out.
  304. */
  305. #ifdef CONFIG_PPC_970_NAP
  306. #define FINISH_NAP \
  307. BEGIN_FTR_SECTION \
  308. clrrdi r11,r1,THREAD_SHIFT; \
  309. ld r9,TI_LOCAL_FLAGS(r11); \
  310. andi. r10,r9,_TLF_NAPPING; \
  311. bnel power4_fixup_nap; \
  312. END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
  313. #else
  314. #define FINISH_NAP
  315. #endif
  316. #endif /* _ASM_POWERPC_EXCEPTION_H */