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arch
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mips
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powertv
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asic
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asic-gaia.c

asic-gaia.c 4.2 KB
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  1. /*
    2. 

  2.  * Locations of devices in the Gaia ASIC
    3. 

  3.  *
    4. 

  4.  * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
    5. 

  5.  *
    6. 

  6.  * This program is free software; you can redistribute it and/or modify
    7. 

  7.  * it under the terms of the GNU General Public License as published by
    8. 

  8.  * the Free Software Foundation; either version 2 of the License, or
    9. 

  9.  * (at your option) any later version.
    10. 

  10.  *
    11. 

  11.  * This program is distributed in the hope that it will be useful,
    12. 

  12.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    13. 

  13.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    14. 

  14.  * GNU General Public License for more details.
    15. 

  15.  *
    16. 

  16.  * You should have received a copy of the GNU General Public License
    17. 

  17.  * along with this program; if not, write to the Free Software
    18. 

  18.  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
    19. 

  19.  *
    20. 

  20.  * Author:       David VomLehn
    21. 

  21.  */
    22. 

  22. 

  23. #include <linux/init.h>
    24. 

  24. #include <asm/mach-powertv/asic.h>
    25. 

  25. 

  26. const struct register_map gaia_register_map __initdata = {
    27. 

  27. 	.eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000},
    28. 

  28. 	.eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038},
    29. 

  29. 	.eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C},
    30. 

  30. 

  31. 	.chipver3 = {.phys = GAIA_IO_BASE + 0x2A0800},
    32. 

  32. 	.chipver2 = {.phys = GAIA_IO_BASE + 0x2A0804},
    33. 

  33. 	.chipver1 = {.phys = GAIA_IO_BASE + 0x2A0808},
    34. 

  34. 	.chipver0 = {.phys = GAIA_IO_BASE + 0x2A080C},
    35. 

  35. 

  36. 	/* The registers of IRBlaster */
    37. 

  37. 	.uart1_intstat = {.phys = GAIA_IO_BASE + 0x2A1800},
    38. 

  38. 	.uart1_inten = {.phys = GAIA_IO_BASE + 0x2A1804},
    39. 

  39. 	.uart1_config1 = {.phys = GAIA_IO_BASE + 0x2A1808},
    40. 

  40. 	.uart1_config2 = {.phys = GAIA_IO_BASE + 0x2A180C},
    41. 

  41. 	.uart1_divisorhi = {.phys = GAIA_IO_BASE + 0x2A1810},
    42. 

  42. 	.uart1_divisorlo = {.phys = GAIA_IO_BASE + 0x2A1814},
    43. 

  43. 	.uart1_data = {.phys = GAIA_IO_BASE + 0x2A1818},
    44. 

  44. 	.uart1_status = {.phys = GAIA_IO_BASE + 0x2A181C},
    45. 

  45. 

  46. 	.int_stat_3 = {.phys = GAIA_IO_BASE + 0x2A2800},
    47. 

  47. 	.int_stat_2 = {.phys = GAIA_IO_BASE + 0x2A2804},
    48. 

  48. 	.int_stat_1 = {.phys = GAIA_IO_BASE + 0x2A2808},
    49. 

  49. 	.int_stat_0 = {.phys = GAIA_IO_BASE + 0x2A280C},
    50. 

  50. 	.int_config = {.phys = GAIA_IO_BASE + 0x2A2810},
    51. 

  51. 	.int_int_scan = {.phys = GAIA_IO_BASE + 0x2A2818},
    52. 

  52. 	.ien_int_3 = {.phys = GAIA_IO_BASE + 0x2A2830},
    53. 

  53. 	.ien_int_2 = {.phys = GAIA_IO_BASE + 0x2A2834},
    54. 

  54. 	.ien_int_1 = {.phys = GAIA_IO_BASE + 0x2A2838},
    55. 

  55. 	.ien_int_0 = {.phys = GAIA_IO_BASE + 0x2A283C},
    56. 

  56. 	.int_level_3_3 = {.phys = GAIA_IO_BASE + 0x2A2880},
    57. 

  57. 	.int_level_3_2 = {.phys = GAIA_IO_BASE + 0x2A2884},
    58. 

  58. 	.int_level_3_1 = {.phys = GAIA_IO_BASE + 0x2A2888},
    59. 

  59. 	.int_level_3_0 = {.phys = GAIA_IO_BASE + 0x2A288C},
    60. 

  60. 	.int_level_2_3 = {.phys = GAIA_IO_BASE + 0x2A2890},
    61. 

  61. 	.int_level_2_2 = {.phys = GAIA_IO_BASE + 0x2A2894},
    62. 

  62. 	.int_level_2_1 = {.phys = GAIA_IO_BASE + 0x2A2898},
    63. 

  63. 	.int_level_2_0 = {.phys = GAIA_IO_BASE + 0x2A289C},
    64. 

  64. 	.int_level_1_3 = {.phys = GAIA_IO_BASE + 0x2A28A0},
    65. 

  65. 	.int_level_1_2 = {.phys = GAIA_IO_BASE + 0x2A28A4},
    66. 

  66. 	.int_level_1_1 = {.phys = GAIA_IO_BASE + 0x2A28A8},
    67. 

  67. 	.int_level_1_0 = {.phys = GAIA_IO_BASE + 0x2A28AC},
    68. 

  68. 	.int_level_0_3 = {.phys = GAIA_IO_BASE + 0x2A28B0},
    69. 

  69. 	.int_level_0_2 = {.phys = GAIA_IO_BASE + 0x2A28B4},
    70. 

  70. 	.int_level_0_1 = {.phys = GAIA_IO_BASE + 0x2A28B8},
    71. 

  71. 	.int_level_0_0 = {.phys = GAIA_IO_BASE + 0x2A28BC},
    72. 

  72. 	.int_docsis_en = {.phys = GAIA_IO_BASE + 0x2A28F4},
    73. 

  73. 

  74. 	.mips_pll_setup = {.phys = GAIA_IO_BASE + 0x1C0000},
    75. 

  75. 	.fs432x4b4_usb_ctl = {.phys = GAIA_IO_BASE + 0x1C0024},
    76. 

  76. 	.test_bus = {.phys = GAIA_IO_BASE + 0x1C00CC},
    77. 

  77. 	.crt_spare = {.phys = GAIA_IO_BASE + 0x1c0108},
    78. 

  78. 	.usb2_ohci_int_mask = {.phys = GAIA_IO_BASE + 0x20000C},
    79. 

  79. 	.usb2_strap = {.phys = GAIA_IO_BASE + 0x200014},
    80. 

  80. 	.ehci_hcapbase = {.phys = GAIA_IO_BASE + 0x21FE00},
    81. 

  81. 	.ohci_hc_revision = {.phys = GAIA_IO_BASE + 0x21fc00},
    82. 

  82. 	.bcm1_bs_lmi_steer = {.phys = GAIA_IO_BASE + 0x2E0004},
    83. 

  83. 	.usb2_control = {.phys = GAIA_IO_BASE + 0x2E004C},
    84. 

  84. 	.usb2_stbus_obc = {.phys = GAIA_IO_BASE + 0x21FF00},
    85. 

  85. 	.usb2_stbus_mess_size = {.phys = GAIA_IO_BASE + 0x21FF04},
    86. 

  86. 	.usb2_stbus_chunk_size = {.phys = GAIA_IO_BASE + 0x21FF08},
    87. 

  87. 

  88. 	.pcie_regs = {.phys = GAIA_IO_BASE + 0x220000},
    89. 

  89. 	.tim_ch = {.phys = GAIA_IO_BASE + 0x2A2C10},
    90. 

  90. 	.tim_cl = {.phys = GAIA_IO_BASE + 0x2A2C14},
    91. 

  91. 	.gpio_dout = {.phys = GAIA_IO_BASE + 0x2A2C20},
    92. 

  92. 	.gpio_din = {.phys = GAIA_IO_BASE + 0x2A2C24},
    93. 

  93. 	.gpio_dir = {.phys = GAIA_IO_BASE + 0x2A2C2C},
    94. 

  94. 	.watchdog = {.phys = GAIA_IO_BASE + 0x2A2C30},
    95. 

  95. 	.front_panel = {.phys = GAIA_IO_BASE + 0x2A3800},
    96. 

  96. };
    97.