db1300.c 20 KB

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  1. /*
  2. * DBAu1300 init and platform device setup.
  3. *
  4. * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
  5. */
  6. #include <linux/dma-mapping.h>
  7. #include <linux/gpio.h>
  8. #include <linux/gpio_keys.h>
  9. #include <linux/init.h>
  10. #include <linux/input.h> /* KEY_* codes */
  11. #include <linux/i2c.h>
  12. #include <linux/io.h>
  13. #include <linux/leds.h>
  14. #include <linux/ata_platform.h>
  15. #include <linux/mmc/host.h>
  16. #include <linux/module.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/mtd/nand.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/smsc911x.h>
  22. #include <asm/mach-au1x00/au1000.h>
  23. #include <asm/mach-au1x00/au1100_mmc.h>
  24. #include <asm/mach-au1x00/au1200fb.h>
  25. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  26. #include <asm/mach-au1x00/au1xxx_psc.h>
  27. #include <asm/mach-db1x00/db1300.h>
  28. #include <asm/mach-db1x00/bcsr.h>
  29. #include <asm/mach-au1x00/prom.h>
  30. #include "platform.h"
  31. static struct i2c_board_info db1300_i2c_devs[] __initdata = {
  32. { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
  33. { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
  34. };
  35. /* multifunction pins to assign to GPIO controller */
  36. static int db1300_gpio_pins[] __initdata = {
  37. AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
  38. AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
  39. AU1300_PIN_EXTCLK1,
  40. -1, /* terminator */
  41. };
  42. /* multifunction pins to assign to device functions */
  43. static int db1300_dev_pins[] __initdata = {
  44. /* wake-from-str pins 0-3 */
  45. AU1300_PIN_WAKE0,
  46. /* external clock sources for PSC0 */
  47. AU1300_PIN_EXTCLK0,
  48. /* 8bit MMC interface on SD0: 6-9 */
  49. AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
  50. AU1300_PIN_SD0DAT7,
  51. /* UART1 pins: 11-18 */
  52. AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
  53. AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
  54. AU1300_PIN_U1RX, AU1300_PIN_U1TX,
  55. /* UART0 pins: 19-24 */
  56. AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
  57. AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
  58. /* UART2: 25-26 */
  59. AU1300_PIN_U2RX, AU1300_PIN_U2TX,
  60. /* UART3: 27-28 */
  61. AU1300_PIN_U3RX, AU1300_PIN_U3TX,
  62. /* LCD controller PWMs, ext pixclock: 30-31 */
  63. AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
  64. /* SD1 interface: 32-37 */
  65. AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
  66. AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
  67. /* SD2 interface: 38-43 */
  68. AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
  69. AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
  70. /* PSC0/1 clocks: 44-45 */
  71. AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
  72. /* PSCs: 46-49/50-53/54-57/58-61 */
  73. AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
  74. AU1300_PIN_PSC0D1,
  75. AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
  76. AU1300_PIN_PSC1D1,
  77. AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
  78. AU1300_PIN_PSC2D1,
  79. AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
  80. AU1300_PIN_PSC3D1,
  81. /* PCMCIA interface: 62-70 */
  82. AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
  83. AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
  84. AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
  85. /* camera interface H/V sync inputs: 71-72 */
  86. AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
  87. /* PSC2/3 clocks: 73-74 */
  88. AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
  89. -1, /* terminator */
  90. };
  91. static void __init db1300_gpio_config(void)
  92. {
  93. int *i;
  94. i = &db1300_dev_pins[0];
  95. while (*i != -1)
  96. au1300_pinfunc_to_dev(*i++);
  97. i = &db1300_gpio_pins[0];
  98. while (*i != -1)
  99. au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
  100. au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
  101. }
  102. char *get_system_type(void)
  103. {
  104. return "DB1300";
  105. }
  106. /**********************************************************************/
  107. static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  108. unsigned int ctrl)
  109. {
  110. struct nand_chip *this = mtd->priv;
  111. unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
  112. ioaddr &= 0xffffff00;
  113. if (ctrl & NAND_CLE) {
  114. ioaddr += MEM_STNAND_CMD;
  115. } else if (ctrl & NAND_ALE) {
  116. ioaddr += MEM_STNAND_ADDR;
  117. } else {
  118. /* assume we want to r/w real data by default */
  119. ioaddr += MEM_STNAND_DATA;
  120. }
  121. this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
  122. if (cmd != NAND_CMD_NONE) {
  123. __raw_writeb(cmd, this->IO_ADDR_W);
  124. wmb();
  125. }
  126. }
  127. static int au1300_nand_device_ready(struct mtd_info *mtd)
  128. {
  129. return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
  130. }
  131. static const char *db1300_part_probes[] = { "cmdlinepart", NULL };
  132. static struct mtd_partition db1300_nand_parts[] = {
  133. {
  134. .name = "NAND FS 0",
  135. .offset = 0,
  136. .size = 8 * 1024 * 1024,
  137. },
  138. {
  139. .name = "NAND FS 1",
  140. .offset = MTDPART_OFS_APPEND,
  141. .size = MTDPART_SIZ_FULL
  142. },
  143. };
  144. struct platform_nand_data db1300_nand_platdata = {
  145. .chip = {
  146. .nr_chips = 1,
  147. .chip_offset = 0,
  148. .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
  149. .partitions = db1300_nand_parts,
  150. .chip_delay = 20,
  151. .part_probe_types = db1300_part_probes,
  152. },
  153. .ctrl = {
  154. .dev_ready = au1300_nand_device_ready,
  155. .cmd_ctrl = au1300_nand_cmd_ctrl,
  156. },
  157. };
  158. static struct resource db1300_nand_res[] = {
  159. [0] = {
  160. .start = DB1300_NAND_PHYS_ADDR,
  161. .end = DB1300_NAND_PHYS_ADDR + 0xff,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. };
  165. static struct platform_device db1300_nand_dev = {
  166. .name = "gen_nand",
  167. .num_resources = ARRAY_SIZE(db1300_nand_res),
  168. .resource = db1300_nand_res,
  169. .id = -1,
  170. .dev = {
  171. .platform_data = &db1300_nand_platdata,
  172. }
  173. };
  174. /**********************************************************************/
  175. static struct resource db1300_eth_res[] = {
  176. [0] = {
  177. .start = DB1300_ETH_PHYS_ADDR,
  178. .end = DB1300_ETH_PHYS_END,
  179. .flags = IORESOURCE_MEM,
  180. },
  181. [1] = {
  182. .start = DB1300_ETH_INT,
  183. .end = DB1300_ETH_INT,
  184. .flags = IORESOURCE_IRQ,
  185. },
  186. };
  187. static struct smsc911x_platform_config db1300_eth_config = {
  188. .phy_interface = PHY_INTERFACE_MODE_MII,
  189. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  190. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  191. .flags = SMSC911X_USE_32BIT,
  192. };
  193. static struct platform_device db1300_eth_dev = {
  194. .name = "smsc911x",
  195. .id = -1,
  196. .num_resources = ARRAY_SIZE(db1300_eth_res),
  197. .resource = db1300_eth_res,
  198. .dev = {
  199. .platform_data = &db1300_eth_config,
  200. },
  201. };
  202. /**********************************************************************/
  203. static struct resource au1300_psc1_res[] = {
  204. [0] = {
  205. .start = AU1300_PSC1_PHYS_ADDR,
  206. .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
  207. .flags = IORESOURCE_MEM,
  208. },
  209. [1] = {
  210. .start = AU1300_PSC1_INT,
  211. .end = AU1300_PSC1_INT,
  212. .flags = IORESOURCE_IRQ,
  213. },
  214. [2] = {
  215. .start = AU1300_DSCR_CMD0_PSC1_TX,
  216. .end = AU1300_DSCR_CMD0_PSC1_TX,
  217. .flags = IORESOURCE_DMA,
  218. },
  219. [3] = {
  220. .start = AU1300_DSCR_CMD0_PSC1_RX,
  221. .end = AU1300_DSCR_CMD0_PSC1_RX,
  222. .flags = IORESOURCE_DMA,
  223. },
  224. };
  225. static struct platform_device db1300_ac97_dev = {
  226. .name = "au1xpsc_ac97",
  227. .id = 1, /* PSC ID. match with AC97 codec ID! */
  228. .num_resources = ARRAY_SIZE(au1300_psc1_res),
  229. .resource = au1300_psc1_res,
  230. };
  231. /**********************************************************************/
  232. static struct resource au1300_psc2_res[] = {
  233. [0] = {
  234. .start = AU1300_PSC2_PHYS_ADDR,
  235. .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. [1] = {
  239. .start = AU1300_PSC2_INT,
  240. .end = AU1300_PSC2_INT,
  241. .flags = IORESOURCE_IRQ,
  242. },
  243. [2] = {
  244. .start = AU1300_DSCR_CMD0_PSC2_TX,
  245. .end = AU1300_DSCR_CMD0_PSC2_TX,
  246. .flags = IORESOURCE_DMA,
  247. },
  248. [3] = {
  249. .start = AU1300_DSCR_CMD0_PSC2_RX,
  250. .end = AU1300_DSCR_CMD0_PSC2_RX,
  251. .flags = IORESOURCE_DMA,
  252. },
  253. };
  254. static struct platform_device db1300_i2s_dev = {
  255. .name = "au1xpsc_i2s",
  256. .id = 2, /* PSC ID */
  257. .num_resources = ARRAY_SIZE(au1300_psc2_res),
  258. .resource = au1300_psc2_res,
  259. };
  260. /**********************************************************************/
  261. static struct resource au1300_psc3_res[] = {
  262. [0] = {
  263. .start = AU1300_PSC3_PHYS_ADDR,
  264. .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
  265. .flags = IORESOURCE_MEM,
  266. },
  267. [1] = {
  268. .start = AU1300_PSC3_INT,
  269. .end = AU1300_PSC3_INT,
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. [2] = {
  273. .start = AU1300_DSCR_CMD0_PSC3_TX,
  274. .end = AU1300_DSCR_CMD0_PSC3_TX,
  275. .flags = IORESOURCE_DMA,
  276. },
  277. [3] = {
  278. .start = AU1300_DSCR_CMD0_PSC3_RX,
  279. .end = AU1300_DSCR_CMD0_PSC3_RX,
  280. .flags = IORESOURCE_DMA,
  281. },
  282. };
  283. static struct platform_device db1300_i2c_dev = {
  284. .name = "au1xpsc_smbus",
  285. .id = 0, /* bus number */
  286. .num_resources = ARRAY_SIZE(au1300_psc3_res),
  287. .resource = au1300_psc3_res,
  288. };
  289. /**********************************************************************/
  290. /* proper key assignments when facing the LCD panel. For key assignments
  291. * according to the schematics swap up with down and left with right.
  292. * I chose to use it to emulate the arrow keys of a keyboard.
  293. */
  294. static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
  295. {
  296. .code = KEY_DOWN,
  297. .gpio = AU1300_PIN_LCDPWM0,
  298. .type = EV_KEY,
  299. .debounce_interval = 1,
  300. .active_low = 1,
  301. .desc = "5waysw-down",
  302. },
  303. {
  304. .code = KEY_UP,
  305. .gpio = AU1300_PIN_PSC2SYNC1,
  306. .type = EV_KEY,
  307. .debounce_interval = 1,
  308. .active_low = 1,
  309. .desc = "5waysw-up",
  310. },
  311. {
  312. .code = KEY_RIGHT,
  313. .gpio = AU1300_PIN_WAKE3,
  314. .type = EV_KEY,
  315. .debounce_interval = 1,
  316. .active_low = 1,
  317. .desc = "5waysw-right",
  318. },
  319. {
  320. .code = KEY_LEFT,
  321. .gpio = AU1300_PIN_WAKE2,
  322. .type = EV_KEY,
  323. .debounce_interval = 1,
  324. .active_low = 1,
  325. .desc = "5waysw-left",
  326. },
  327. {
  328. .code = KEY_ENTER,
  329. .gpio = AU1300_PIN_WAKE1,
  330. .type = EV_KEY,
  331. .debounce_interval = 1,
  332. .active_low = 1,
  333. .desc = "5waysw-push",
  334. },
  335. };
  336. static struct gpio_keys_platform_data db1300_5waysw_data = {
  337. .buttons = db1300_5waysw_arrowkeys,
  338. .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
  339. .rep = 1,
  340. .name = "db1300-5wayswitch",
  341. };
  342. static struct platform_device db1300_5waysw_dev = {
  343. .name = "gpio-keys",
  344. .dev = {
  345. .platform_data = &db1300_5waysw_data,
  346. },
  347. };
  348. /**********************************************************************/
  349. static struct pata_platform_info db1300_ide_info = {
  350. .ioport_shift = DB1300_IDE_REG_SHIFT,
  351. };
  352. #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
  353. static struct resource db1300_ide_res[] = {
  354. [0] = {
  355. .start = DB1300_IDE_PHYS_ADDR,
  356. .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
  357. .flags = IORESOURCE_MEM,
  358. },
  359. [1] = {
  360. .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
  361. .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
  362. .flags = IORESOURCE_MEM,
  363. },
  364. [2] = {
  365. .start = DB1300_IDE_INT,
  366. .end = DB1300_IDE_INT,
  367. .flags = IORESOURCE_IRQ,
  368. },
  369. };
  370. static struct platform_device db1300_ide_dev = {
  371. .dev = {
  372. .platform_data = &db1300_ide_info,
  373. },
  374. .name = "pata_platform",
  375. .resource = db1300_ide_res,
  376. .num_resources = ARRAY_SIZE(db1300_ide_res),
  377. };
  378. /**********************************************************************/
  379. static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
  380. {
  381. void(*mmc_cd)(struct mmc_host *, unsigned long);
  382. /* disable the one currently screaming. No other way to shut it up */
  383. if (irq == DB1300_SD1_INSERT_INT) {
  384. disable_irq_nosync(DB1300_SD1_INSERT_INT);
  385. enable_irq(DB1300_SD1_EJECT_INT);
  386. } else {
  387. disable_irq_nosync(DB1300_SD1_EJECT_INT);
  388. enable_irq(DB1300_SD1_INSERT_INT);
  389. }
  390. /* link against CONFIG_MMC=m. We can only be called once MMC core has
  391. * initialized the controller, so symbol_get() should always succeed.
  392. */
  393. mmc_cd = symbol_get(mmc_detect_change);
  394. mmc_cd(ptr, msecs_to_jiffies(500));
  395. symbol_put(mmc_detect_change);
  396. return IRQ_HANDLED;
  397. }
  398. static int db1300_mmc_card_readonly(void *mmc_host)
  399. {
  400. /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
  401. return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
  402. }
  403. static int db1300_mmc_card_inserted(void *mmc_host)
  404. {
  405. return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
  406. }
  407. static int db1300_mmc_cd_setup(void *mmc_host, int en)
  408. {
  409. int ret;
  410. if (en) {
  411. ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
  412. "sd_insert", mmc_host);
  413. if (ret)
  414. goto out;
  415. ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
  416. "sd_eject", mmc_host);
  417. if (ret) {
  418. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  419. goto out;
  420. }
  421. if (db1300_mmc_card_inserted(mmc_host))
  422. enable_irq(DB1300_SD1_EJECT_INT);
  423. else
  424. enable_irq(DB1300_SD1_INSERT_INT);
  425. } else {
  426. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  427. free_irq(DB1300_SD1_EJECT_INT, mmc_host);
  428. }
  429. ret = 0;
  430. out:
  431. return ret;
  432. }
  433. static void db1300_mmcled_set(struct led_classdev *led,
  434. enum led_brightness brightness)
  435. {
  436. if (brightness != LED_OFF)
  437. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
  438. else
  439. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
  440. }
  441. static struct led_classdev db1300_mmc_led = {
  442. .brightness_set = db1300_mmcled_set,
  443. };
  444. struct au1xmmc_platform_data db1300_sd1_platdata = {
  445. .cd_setup = db1300_mmc_cd_setup,
  446. .card_inserted = db1300_mmc_card_inserted,
  447. .card_readonly = db1300_mmc_card_readonly,
  448. .led = &db1300_mmc_led,
  449. };
  450. static struct resource au1300_sd1_res[] = {
  451. [0] = {
  452. .start = AU1300_SD1_PHYS_ADDR,
  453. .end = AU1300_SD1_PHYS_ADDR,
  454. .flags = IORESOURCE_MEM,
  455. },
  456. [1] = {
  457. .start = AU1300_SD1_INT,
  458. .end = AU1300_SD1_INT,
  459. .flags = IORESOURCE_IRQ,
  460. },
  461. [2] = {
  462. .start = AU1300_DSCR_CMD0_SDMS_TX1,
  463. .end = AU1300_DSCR_CMD0_SDMS_TX1,
  464. .flags = IORESOURCE_DMA,
  465. },
  466. [3] = {
  467. .start = AU1300_DSCR_CMD0_SDMS_RX1,
  468. .end = AU1300_DSCR_CMD0_SDMS_RX1,
  469. .flags = IORESOURCE_DMA,
  470. },
  471. };
  472. static struct platform_device db1300_sd1_dev = {
  473. .dev = {
  474. .platform_data = &db1300_sd1_platdata,
  475. },
  476. .name = "au1xxx-mmc",
  477. .id = 1,
  478. .resource = au1300_sd1_res,
  479. .num_resources = ARRAY_SIZE(au1300_sd1_res),
  480. };
  481. /**********************************************************************/
  482. static int db1300_movinand_inserted(void *mmc_host)
  483. {
  484. return 0; /* disable for now, it doesn't work yet */
  485. }
  486. static int db1300_movinand_readonly(void *mmc_host)
  487. {
  488. return 0;
  489. }
  490. static void db1300_movinand_led_set(struct led_classdev *led,
  491. enum led_brightness brightness)
  492. {
  493. if (brightness != LED_OFF)
  494. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
  495. else
  496. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
  497. }
  498. static struct led_classdev db1300_movinand_led = {
  499. .brightness_set = db1300_movinand_led_set,
  500. };
  501. struct au1xmmc_platform_data db1300_sd0_platdata = {
  502. .card_inserted = db1300_movinand_inserted,
  503. .card_readonly = db1300_movinand_readonly,
  504. .led = &db1300_movinand_led,
  505. .mask_host_caps = MMC_CAP_NEEDS_POLL,
  506. };
  507. static struct resource au1300_sd0_res[] = {
  508. [0] = {
  509. .start = AU1100_SD0_PHYS_ADDR,
  510. .end = AU1100_SD0_PHYS_ADDR,
  511. .flags = IORESOURCE_MEM,
  512. },
  513. [1] = {
  514. .start = AU1300_SD0_INT,
  515. .end = AU1300_SD0_INT,
  516. .flags = IORESOURCE_IRQ,
  517. },
  518. [2] = {
  519. .start = AU1300_DSCR_CMD0_SDMS_TX0,
  520. .end = AU1300_DSCR_CMD0_SDMS_TX0,
  521. .flags = IORESOURCE_DMA,
  522. },
  523. [3] = {
  524. .start = AU1300_DSCR_CMD0_SDMS_RX0,
  525. .end = AU1300_DSCR_CMD0_SDMS_RX0,
  526. .flags = IORESOURCE_DMA,
  527. },
  528. };
  529. static struct platform_device db1300_sd0_dev = {
  530. .dev = {
  531. .platform_data = &db1300_sd0_platdata,
  532. },
  533. .name = "au1xxx-mmc",
  534. .id = 0,
  535. .resource = au1300_sd0_res,
  536. .num_resources = ARRAY_SIZE(au1300_sd0_res),
  537. };
  538. /**********************************************************************/
  539. static struct platform_device db1300_wm9715_dev = {
  540. .name = "wm9712-codec",
  541. .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
  542. };
  543. static struct platform_device db1300_ac97dma_dev = {
  544. .name = "au1xpsc-pcm",
  545. .id = 1, /* PSC ID */
  546. };
  547. static struct platform_device db1300_i2sdma_dev = {
  548. .name = "au1xpsc-pcm",
  549. .id = 2, /* PSC ID */
  550. };
  551. static struct platform_device db1300_sndac97_dev = {
  552. .name = "db1300-ac97",
  553. };
  554. static struct platform_device db1300_sndi2s_dev = {
  555. .name = "db1300-i2s",
  556. };
  557. /**********************************************************************/
  558. static int db1300fb_panel_index(void)
  559. {
  560. return 9; /* DB1300_800x480 */
  561. }
  562. static int db1300fb_panel_init(void)
  563. {
  564. /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  565. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
  566. BCSR_BOARD_LCDBL);
  567. return 0;
  568. }
  569. static int db1300fb_panel_shutdown(void)
  570. {
  571. /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  572. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
  573. BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
  574. return 0;
  575. }
  576. static struct au1200fb_platdata db1300fb_pd = {
  577. .panel_index = db1300fb_panel_index,
  578. .panel_init = db1300fb_panel_init,
  579. .panel_shutdown = db1300fb_panel_shutdown,
  580. };
  581. static struct resource au1300_lcd_res[] = {
  582. [0] = {
  583. .start = AU1200_LCD_PHYS_ADDR,
  584. .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
  585. .flags = IORESOURCE_MEM,
  586. },
  587. [1] = {
  588. .start = AU1300_LCD_INT,
  589. .end = AU1300_LCD_INT,
  590. .flags = IORESOURCE_IRQ,
  591. }
  592. };
  593. static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
  594. static struct platform_device db1300_lcd_dev = {
  595. .name = "au1200-lcd",
  596. .id = 0,
  597. .dev = {
  598. .dma_mask = &au1300_lcd_dmamask,
  599. .coherent_dma_mask = DMA_BIT_MASK(32),
  600. .platform_data = &db1300fb_pd,
  601. },
  602. .num_resources = ARRAY_SIZE(au1300_lcd_res),
  603. .resource = au1300_lcd_res,
  604. };
  605. /**********************************************************************/
  606. static struct platform_device *db1300_dev[] __initdata = {
  607. &db1300_eth_dev,
  608. &db1300_i2c_dev,
  609. &db1300_5waysw_dev,
  610. &db1300_nand_dev,
  611. &db1300_ide_dev,
  612. &db1300_sd0_dev,
  613. &db1300_sd1_dev,
  614. &db1300_lcd_dev,
  615. &db1300_ac97_dev,
  616. &db1300_i2s_dev,
  617. &db1300_wm9715_dev,
  618. &db1300_ac97dma_dev,
  619. &db1300_i2sdma_dev,
  620. &db1300_sndac97_dev,
  621. &db1300_sndi2s_dev,
  622. };
  623. static int __init db1300_device_init(void)
  624. {
  625. int swapped, cpldirq;
  626. /* setup CPLD IRQ muxer */
  627. cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
  628. irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
  629. bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
  630. /* insert/eject IRQs: one always triggers so don't enable them
  631. * when doing request_irq() on them. DB1200 has this bug too.
  632. */
  633. irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
  634. irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
  635. irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
  636. irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
  637. /*
  638. * setup board
  639. */
  640. prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
  641. i2c_register_board_info(0, db1300_i2c_devs,
  642. ARRAY_SIZE(db1300_i2c_devs));
  643. /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  644. __raw_writel(PSC_SEL_CLK_SERCLK,
  645. (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
  646. wmb();
  647. __raw_writel(PSC_SEL_CLK_SERCLK,
  648. (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
  649. wmb();
  650. /* I2C uses internal 48MHz EXTCLK1 */
  651. __raw_writel(PSC_SEL_CLK_INTCLK,
  652. (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
  653. wmb();
  654. /* enable power to USB ports */
  655. bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
  656. /* although it is socket #0, it uses the CPLD bits which previous boards
  657. * have used for socket #1.
  658. */
  659. db1x_register_pcmcia_socket(
  660. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  661. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
  662. AU1000_PCMCIA_MEM_PHYS_ADDR,
  663. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
  664. AU1000_PCMCIA_IO_PHYS_ADDR,
  665. AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
  666. DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
  667. swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
  668. db1x_register_norflash(64 << 20, 2, swapped);
  669. return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
  670. }
  671. device_initcall(db1300_device_init);
  672. void __init board_setup(void)
  673. {
  674. unsigned short whoami;
  675. db1300_gpio_config();
  676. bcsr_init(DB1300_BCSR_PHYS_ADDR,
  677. DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
  678. whoami = bcsr_read(BCSR_WHOAMI);
  679. printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
  680. "BoardID %d CPLD Rev %d DaughtercardID %d\n",
  681. BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
  682. BCSR_WHOAMI_DCID(whoami));
  683. /* enable UARTs, YAMON only enables #2 */
  684. alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
  685. alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
  686. alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
  687. }