fault-armv.c 6.7 KB

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  1. /*
  2. * linux/arch/arm/mm/fault-armv.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Modifications for ARM processor (c) 1995-2002 Russell King
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/sched.h>
  12. #include <linux/kernel.h>
  13. #include <linux/mm.h>
  14. #include <linux/bitops.h>
  15. #include <linux/vmalloc.h>
  16. #include <linux/init.h>
  17. #include <linux/pagemap.h>
  18. #include <linux/gfp.h>
  19. #include <asm/bugs.h>
  20. #include <asm/cacheflush.h>
  21. #include <asm/cachetype.h>
  22. #include <asm/pgtable.h>
  23. #include <asm/tlbflush.h>
  24. #include "mm.h"
  25. static pteval_t shared_pte_mask = L_PTE_MT_BUFFERABLE;
  26. #if __LINUX_ARM_ARCH__ < 6
  27. /*
  28. * We take the easy way out of this problem - we make the
  29. * PTE uncacheable. However, we leave the write buffer on.
  30. *
  31. * Note that the pte lock held when calling update_mmu_cache must also
  32. * guard the pte (somewhere else in the same mm) that we modify here.
  33. * Therefore those configurations which might call adjust_pte (those
  34. * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
  35. */
  36. static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
  37. unsigned long pfn, pte_t *ptep)
  38. {
  39. pte_t entry = *ptep;
  40. int ret;
  41. /*
  42. * If this page is present, it's actually being shared.
  43. */
  44. ret = pte_present(entry);
  45. /*
  46. * If this page isn't present, or is already setup to
  47. * fault (ie, is old), we can safely ignore any issues.
  48. */
  49. if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
  50. flush_cache_page(vma, address, pfn);
  51. outer_flush_range((pfn << PAGE_SHIFT),
  52. (pfn << PAGE_SHIFT) + PAGE_SIZE);
  53. pte_val(entry) &= ~L_PTE_MT_MASK;
  54. pte_val(entry) |= shared_pte_mask;
  55. set_pte_at(vma->vm_mm, address, ptep, entry);
  56. flush_tlb_page(vma, address);
  57. }
  58. return ret;
  59. }
  60. #if USE_SPLIT_PTLOCKS
  61. /*
  62. * If we are using split PTE locks, then we need to take the page
  63. * lock here. Otherwise we are using shared mm->page_table_lock
  64. * which is already locked, thus cannot take it.
  65. */
  66. static inline void do_pte_lock(spinlock_t *ptl)
  67. {
  68. /*
  69. * Use nested version here to indicate that we are already
  70. * holding one similar spinlock.
  71. */
  72. spin_lock_nested(ptl, SINGLE_DEPTH_NESTING);
  73. }
  74. static inline void do_pte_unlock(spinlock_t *ptl)
  75. {
  76. spin_unlock(ptl);
  77. }
  78. #else /* !USE_SPLIT_PTLOCKS */
  79. static inline void do_pte_lock(spinlock_t *ptl) {}
  80. static inline void do_pte_unlock(spinlock_t *ptl) {}
  81. #endif /* USE_SPLIT_PTLOCKS */
  82. static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
  83. unsigned long pfn)
  84. {
  85. spinlock_t *ptl;
  86. pgd_t *pgd;
  87. pud_t *pud;
  88. pmd_t *pmd;
  89. pte_t *pte;
  90. int ret;
  91. pgd = pgd_offset(vma->vm_mm, address);
  92. if (pgd_none_or_clear_bad(pgd))
  93. return 0;
  94. pud = pud_offset(pgd, address);
  95. if (pud_none_or_clear_bad(pud))
  96. return 0;
  97. pmd = pmd_offset(pud, address);
  98. if (pmd_none_or_clear_bad(pmd))
  99. return 0;
  100. /*
  101. * This is called while another page table is mapped, so we
  102. * must use the nested version. This also means we need to
  103. * open-code the spin-locking.
  104. */
  105. ptl = pte_lockptr(vma->vm_mm, pmd);
  106. pte = pte_offset_map(pmd, address);
  107. do_pte_lock(ptl);
  108. ret = do_adjust_pte(vma, address, pfn, pte);
  109. do_pte_unlock(ptl);
  110. pte_unmap(pte);
  111. return ret;
  112. }
  113. static void
  114. make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
  115. unsigned long addr, pte_t *ptep, unsigned long pfn)
  116. {
  117. struct mm_struct *mm = vma->vm_mm;
  118. struct vm_area_struct *mpnt;
  119. struct prio_tree_iter iter;
  120. unsigned long offset;
  121. pgoff_t pgoff;
  122. int aliases = 0;
  123. pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
  124. /*
  125. * If we have any shared mappings that are in the same mm
  126. * space, then we need to handle them specially to maintain
  127. * cache coherency.
  128. */
  129. flush_dcache_mmap_lock(mapping);
  130. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  131. /*
  132. * If this VMA is not in our MM, we can ignore it.
  133. * Note that we intentionally mask out the VMA
  134. * that we are fixing up.
  135. */
  136. if (mpnt->vm_mm != mm || mpnt == vma)
  137. continue;
  138. if (!(mpnt->vm_flags & VM_MAYSHARE))
  139. continue;
  140. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  141. aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn);
  142. }
  143. flush_dcache_mmap_unlock(mapping);
  144. if (aliases)
  145. do_adjust_pte(vma, addr, pfn, ptep);
  146. }
  147. /*
  148. * Take care of architecture specific things when placing a new PTE into
  149. * a page table, or changing an existing PTE. Basically, there are two
  150. * things that we need to take care of:
  151. *
  152. * 1. If PG_dcache_clean is not set for the page, we need to ensure
  153. * that any cache entries for the kernels virtual memory
  154. * range are written back to the page.
  155. * 2. If we have multiple shared mappings of the same space in
  156. * an object, we need to deal with the cache aliasing issues.
  157. *
  158. * Note that the pte lock will be held.
  159. */
  160. void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
  161. pte_t *ptep)
  162. {
  163. unsigned long pfn = pte_pfn(*ptep);
  164. struct address_space *mapping;
  165. struct page *page;
  166. if (!pfn_valid(pfn))
  167. return;
  168. /*
  169. * The zero page is never written to, so never has any dirty
  170. * cache lines, and therefore never needs to be flushed.
  171. */
  172. page = pfn_to_page(pfn);
  173. if (page == ZERO_PAGE(0))
  174. return;
  175. mapping = page_mapping(page);
  176. if (!test_and_set_bit(PG_dcache_clean, &page->flags))
  177. __flush_dcache_page(mapping, page);
  178. if (mapping) {
  179. if (cache_is_vivt())
  180. make_coherent(mapping, vma, addr, ptep, pfn);
  181. else if (vma->vm_flags & VM_EXEC)
  182. __flush_icache_all();
  183. }
  184. }
  185. #endif /* __LINUX_ARM_ARCH__ < 6 */
  186. /*
  187. * Check whether the write buffer has physical address aliasing
  188. * issues. If it has, we need to avoid them for the case where
  189. * we have several shared mappings of the same object in user
  190. * space.
  191. */
  192. static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
  193. {
  194. register unsigned long zero = 0, one = 1, val;
  195. local_irq_disable();
  196. mb();
  197. *p1 = one;
  198. mb();
  199. *p2 = zero;
  200. mb();
  201. val = *p1;
  202. mb();
  203. local_irq_enable();
  204. return val != zero;
  205. }
  206. void __init check_writebuffer_bugs(void)
  207. {
  208. struct page *page;
  209. const char *reason;
  210. unsigned long v = 1;
  211. printk(KERN_INFO "CPU: Testing write buffer coherency: ");
  212. page = alloc_page(GFP_KERNEL);
  213. if (page) {
  214. unsigned long *p1, *p2;
  215. pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
  216. L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
  217. p1 = vmap(&page, 1, VM_IOREMAP, prot);
  218. p2 = vmap(&page, 1, VM_IOREMAP, prot);
  219. if (p1 && p2) {
  220. v = check_writebuffer(p1, p2);
  221. reason = "enabling work-around";
  222. } else {
  223. reason = "unable to map memory\n";
  224. }
  225. vunmap(p1);
  226. vunmap(p2);
  227. put_page(page);
  228. } else {
  229. reason = "unable to grab page\n";
  230. }
  231. if (v) {
  232. printk("failed, %s\n", reason);
  233. shared_pte_mask = L_PTE_MT_UNCACHED;
  234. } else {
  235. printk("ok\n");
  236. }
  237. }