dma-mapping.c 18 KB

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  1. /*
  2. * linux/arch/arm/mm/dma-mapping.c
  3. *
  4. * Copyright (C) 2000-2004 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * DMA uncached mapping support.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/mm.h>
  14. #include <linux/gfp.h>
  15. #include <linux/errno.h>
  16. #include <linux/list.h>
  17. #include <linux/init.h>
  18. #include <linux/device.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/highmem.h>
  21. #include <linux/slab.h>
  22. #include <asm/memory.h>
  23. #include <asm/highmem.h>
  24. #include <asm/cacheflush.h>
  25. #include <asm/tlbflush.h>
  26. #include <asm/sizes.h>
  27. #include <asm/mach/arch.h>
  28. #include "mm.h"
  29. static u64 get_coherent_dma_mask(struct device *dev)
  30. {
  31. u64 mask = (u64)arm_dma_limit;
  32. if (dev) {
  33. mask = dev->coherent_dma_mask;
  34. /*
  35. * Sanity check the DMA mask - it must be non-zero, and
  36. * must be able to be satisfied by a DMA allocation.
  37. */
  38. if (mask == 0) {
  39. dev_warn(dev, "coherent DMA mask is unset\n");
  40. return 0;
  41. }
  42. if ((~mask) & (u64)arm_dma_limit) {
  43. dev_warn(dev, "coherent DMA mask %#llx is smaller "
  44. "than system GFP_DMA mask %#llx\n",
  45. mask, (u64)arm_dma_limit);
  46. return 0;
  47. }
  48. }
  49. return mask;
  50. }
  51. /*
  52. * Allocate a DMA buffer for 'dev' of size 'size' using the
  53. * specified gfp mask. Note that 'size' must be page aligned.
  54. */
  55. static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
  56. {
  57. unsigned long order = get_order(size);
  58. struct page *page, *p, *e;
  59. void *ptr;
  60. u64 mask = get_coherent_dma_mask(dev);
  61. #ifdef CONFIG_DMA_API_DEBUG
  62. u64 limit = (mask + 1) & ~mask;
  63. if (limit && size >= limit) {
  64. dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
  65. size, mask);
  66. return NULL;
  67. }
  68. #endif
  69. if (!mask)
  70. return NULL;
  71. if (mask < 0xffffffffULL)
  72. gfp |= GFP_DMA;
  73. page = alloc_pages(gfp, order);
  74. if (!page)
  75. return NULL;
  76. /*
  77. * Now split the huge page and free the excess pages
  78. */
  79. split_page(page, order);
  80. for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
  81. __free_page(p);
  82. /*
  83. * Ensure that the allocated pages are zeroed, and that any data
  84. * lurking in the kernel direct-mapped region is invalidated.
  85. */
  86. ptr = page_address(page);
  87. memset(ptr, 0, size);
  88. dmac_flush_range(ptr, ptr + size);
  89. outer_flush_range(__pa(ptr), __pa(ptr) + size);
  90. return page;
  91. }
  92. /*
  93. * Free a DMA buffer. 'size' must be page aligned.
  94. */
  95. static void __dma_free_buffer(struct page *page, size_t size)
  96. {
  97. struct page *e = page + (size >> PAGE_SHIFT);
  98. while (page < e) {
  99. __free_page(page);
  100. page++;
  101. }
  102. }
  103. #ifdef CONFIG_MMU
  104. #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT)
  105. #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT)
  106. /*
  107. * These are the page tables (2MB each) covering uncached, DMA consistent allocations
  108. */
  109. static pte_t **consistent_pte;
  110. #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
  111. unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
  112. void __init init_consistent_dma_size(unsigned long size)
  113. {
  114. unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M);
  115. BUG_ON(consistent_pte); /* Check we're called before DMA region init */
  116. BUG_ON(base < VMALLOC_END);
  117. /* Grow region to accommodate specified size */
  118. if (base < consistent_base)
  119. consistent_base = base;
  120. }
  121. #include "vmregion.h"
  122. static struct arm_vmregion_head consistent_head = {
  123. .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
  124. .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
  125. .vm_end = CONSISTENT_END,
  126. };
  127. #ifdef CONFIG_HUGETLB_PAGE
  128. #error ARM Coherent DMA allocator does not (yet) support huge TLB
  129. #endif
  130. /*
  131. * Initialise the consistent memory allocation.
  132. */
  133. static int __init consistent_init(void)
  134. {
  135. int ret = 0;
  136. pgd_t *pgd;
  137. pud_t *pud;
  138. pmd_t *pmd;
  139. pte_t *pte;
  140. int i = 0;
  141. unsigned long base = consistent_base;
  142. unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
  143. consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
  144. if (!consistent_pte) {
  145. pr_err("%s: no memory\n", __func__);
  146. return -ENOMEM;
  147. }
  148. pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END);
  149. consistent_head.vm_start = base;
  150. do {
  151. pgd = pgd_offset(&init_mm, base);
  152. pud = pud_alloc(&init_mm, pgd, base);
  153. if (!pud) {
  154. printk(KERN_ERR "%s: no pud tables\n", __func__);
  155. ret = -ENOMEM;
  156. break;
  157. }
  158. pmd = pmd_alloc(&init_mm, pud, base);
  159. if (!pmd) {
  160. printk(KERN_ERR "%s: no pmd tables\n", __func__);
  161. ret = -ENOMEM;
  162. break;
  163. }
  164. WARN_ON(!pmd_none(*pmd));
  165. pte = pte_alloc_kernel(pmd, base);
  166. if (!pte) {
  167. printk(KERN_ERR "%s: no pte tables\n", __func__);
  168. ret = -ENOMEM;
  169. break;
  170. }
  171. consistent_pte[i++] = pte;
  172. base += PMD_SIZE;
  173. } while (base < CONSISTENT_END);
  174. return ret;
  175. }
  176. core_initcall(consistent_init);
  177. static void *
  178. __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
  179. const void *caller)
  180. {
  181. struct arm_vmregion *c;
  182. size_t align;
  183. int bit;
  184. if (!consistent_pte) {
  185. printk(KERN_ERR "%s: not initialised\n", __func__);
  186. dump_stack();
  187. return NULL;
  188. }
  189. /*
  190. * Align the virtual region allocation - maximum alignment is
  191. * a section size, minimum is a page size. This helps reduce
  192. * fragmentation of the DMA space, and also prevents allocations
  193. * smaller than a section from crossing a section boundary.
  194. */
  195. bit = fls(size - 1);
  196. if (bit > SECTION_SHIFT)
  197. bit = SECTION_SHIFT;
  198. align = 1 << bit;
  199. /*
  200. * Allocate a virtual address in the consistent mapping region.
  201. */
  202. c = arm_vmregion_alloc(&consistent_head, align, size,
  203. gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller);
  204. if (c) {
  205. pte_t *pte;
  206. int idx = CONSISTENT_PTE_INDEX(c->vm_start);
  207. u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
  208. pte = consistent_pte[idx] + off;
  209. c->vm_pages = page;
  210. do {
  211. BUG_ON(!pte_none(*pte));
  212. set_pte_ext(pte, mk_pte(page, prot), 0);
  213. page++;
  214. pte++;
  215. off++;
  216. if (off >= PTRS_PER_PTE) {
  217. off = 0;
  218. pte = consistent_pte[++idx];
  219. }
  220. } while (size -= PAGE_SIZE);
  221. dsb();
  222. return (void *)c->vm_start;
  223. }
  224. return NULL;
  225. }
  226. static void __dma_free_remap(void *cpu_addr, size_t size)
  227. {
  228. struct arm_vmregion *c;
  229. unsigned long addr;
  230. pte_t *ptep;
  231. int idx;
  232. u32 off;
  233. c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
  234. if (!c) {
  235. printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
  236. __func__, cpu_addr);
  237. dump_stack();
  238. return;
  239. }
  240. if ((c->vm_end - c->vm_start) != size) {
  241. printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
  242. __func__, c->vm_end - c->vm_start, size);
  243. dump_stack();
  244. size = c->vm_end - c->vm_start;
  245. }
  246. idx = CONSISTENT_PTE_INDEX(c->vm_start);
  247. off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
  248. ptep = consistent_pte[idx] + off;
  249. addr = c->vm_start;
  250. do {
  251. pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
  252. ptep++;
  253. addr += PAGE_SIZE;
  254. off++;
  255. if (off >= PTRS_PER_PTE) {
  256. off = 0;
  257. ptep = consistent_pte[++idx];
  258. }
  259. if (pte_none(pte) || !pte_present(pte))
  260. printk(KERN_CRIT "%s: bad page in kernel page table\n",
  261. __func__);
  262. } while (size -= PAGE_SIZE);
  263. flush_tlb_kernel_range(c->vm_start, c->vm_end);
  264. arm_vmregion_free(&consistent_head, c);
  265. }
  266. #else /* !CONFIG_MMU */
  267. #define __dma_alloc_remap(page, size, gfp, prot, c) page_address(page)
  268. #define __dma_free_remap(addr, size) do { } while (0)
  269. #endif /* CONFIG_MMU */
  270. static void *
  271. __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
  272. pgprot_t prot, const void *caller)
  273. {
  274. struct page *page;
  275. void *addr;
  276. /*
  277. * Following is a work-around (a.k.a. hack) to prevent pages
  278. * with __GFP_COMP being passed to split_page() which cannot
  279. * handle them. The real problem is that this flag probably
  280. * should be 0 on ARM as it is not supported on this
  281. * platform; see CONFIG_HUGETLBFS.
  282. */
  283. gfp &= ~(__GFP_COMP);
  284. *handle = ~0;
  285. size = PAGE_ALIGN(size);
  286. page = __dma_alloc_buffer(dev, size, gfp);
  287. if (!page)
  288. return NULL;
  289. if (!arch_is_coherent())
  290. addr = __dma_alloc_remap(page, size, gfp, prot, caller);
  291. else
  292. addr = page_address(page);
  293. if (addr)
  294. *handle = pfn_to_dma(dev, page_to_pfn(page));
  295. else
  296. __dma_free_buffer(page, size);
  297. return addr;
  298. }
  299. /*
  300. * Allocate DMA-coherent memory space and return both the kernel remapped
  301. * virtual and bus address for that space.
  302. */
  303. void *
  304. dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  305. {
  306. void *memory;
  307. if (dma_alloc_from_coherent(dev, size, handle, &memory))
  308. return memory;
  309. return __dma_alloc(dev, size, handle, gfp,
  310. pgprot_dmacoherent(pgprot_kernel),
  311. __builtin_return_address(0));
  312. }
  313. EXPORT_SYMBOL(dma_alloc_coherent);
  314. /*
  315. * Allocate a writecombining region, in much the same way as
  316. * dma_alloc_coherent above.
  317. */
  318. void *
  319. dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  320. {
  321. return __dma_alloc(dev, size, handle, gfp,
  322. pgprot_writecombine(pgprot_kernel),
  323. __builtin_return_address(0));
  324. }
  325. EXPORT_SYMBOL(dma_alloc_writecombine);
  326. static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
  327. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  328. {
  329. int ret = -ENXIO;
  330. #ifdef CONFIG_MMU
  331. unsigned long user_size, kern_size;
  332. struct arm_vmregion *c;
  333. user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  334. c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
  335. if (c) {
  336. unsigned long off = vma->vm_pgoff;
  337. kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
  338. if (off < kern_size &&
  339. user_size <= (kern_size - off)) {
  340. ret = remap_pfn_range(vma, vma->vm_start,
  341. page_to_pfn(c->vm_pages) + off,
  342. user_size << PAGE_SHIFT,
  343. vma->vm_page_prot);
  344. }
  345. }
  346. #endif /* CONFIG_MMU */
  347. return ret;
  348. }
  349. int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
  350. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  351. {
  352. vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
  353. return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
  354. }
  355. EXPORT_SYMBOL(dma_mmap_coherent);
  356. int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
  357. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  358. {
  359. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  360. return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
  361. }
  362. EXPORT_SYMBOL(dma_mmap_writecombine);
  363. /*
  364. * free a page as defined by the above mapping.
  365. * Must not be called with IRQs disabled.
  366. */
  367. void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
  368. {
  369. WARN_ON(irqs_disabled());
  370. if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
  371. return;
  372. size = PAGE_ALIGN(size);
  373. if (!arch_is_coherent())
  374. __dma_free_remap(cpu_addr, size);
  375. __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);
  376. }
  377. EXPORT_SYMBOL(dma_free_coherent);
  378. /*
  379. * Make an area consistent for devices.
  380. * Note: Drivers should NOT use this function directly, as it will break
  381. * platforms with CONFIG_DMABOUNCE.
  382. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  383. */
  384. void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,
  385. enum dma_data_direction dir)
  386. {
  387. unsigned long paddr;
  388. BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
  389. dmac_map_area(kaddr, size, dir);
  390. paddr = __pa(kaddr);
  391. if (dir == DMA_FROM_DEVICE) {
  392. outer_inv_range(paddr, paddr + size);
  393. } else {
  394. outer_clean_range(paddr, paddr + size);
  395. }
  396. /* FIXME: non-speculating: flush on bidirectional mappings? */
  397. }
  398. EXPORT_SYMBOL(___dma_single_cpu_to_dev);
  399. void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,
  400. enum dma_data_direction dir)
  401. {
  402. BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
  403. /* FIXME: non-speculating: not required */
  404. /* don't bother invalidating if DMA to device */
  405. if (dir != DMA_TO_DEVICE) {
  406. unsigned long paddr = __pa(kaddr);
  407. outer_inv_range(paddr, paddr + size);
  408. }
  409. dmac_unmap_area(kaddr, size, dir);
  410. }
  411. EXPORT_SYMBOL(___dma_single_dev_to_cpu);
  412. static void dma_cache_maint_page(struct page *page, unsigned long offset,
  413. size_t size, enum dma_data_direction dir,
  414. void (*op)(const void *, size_t, int))
  415. {
  416. /*
  417. * A single sg entry may refer to multiple physically contiguous
  418. * pages. But we still need to process highmem pages individually.
  419. * If highmem is not configured then the bulk of this loop gets
  420. * optimized out.
  421. */
  422. size_t left = size;
  423. do {
  424. size_t len = left;
  425. void *vaddr;
  426. if (PageHighMem(page)) {
  427. if (len + offset > PAGE_SIZE) {
  428. if (offset >= PAGE_SIZE) {
  429. page += offset / PAGE_SIZE;
  430. offset %= PAGE_SIZE;
  431. }
  432. len = PAGE_SIZE - offset;
  433. }
  434. vaddr = kmap_high_get(page);
  435. if (vaddr) {
  436. vaddr += offset;
  437. op(vaddr, len, dir);
  438. kunmap_high(page);
  439. } else if (cache_is_vipt()) {
  440. /* unmapped pages might still be cached */
  441. vaddr = kmap_atomic(page);
  442. op(vaddr + offset, len, dir);
  443. kunmap_atomic(vaddr);
  444. }
  445. } else {
  446. vaddr = page_address(page) + offset;
  447. op(vaddr, len, dir);
  448. }
  449. offset = 0;
  450. page++;
  451. left -= len;
  452. } while (left);
  453. }
  454. void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
  455. size_t size, enum dma_data_direction dir)
  456. {
  457. unsigned long paddr;
  458. dma_cache_maint_page(page, off, size, dir, dmac_map_area);
  459. paddr = page_to_phys(page) + off;
  460. if (dir == DMA_FROM_DEVICE) {
  461. outer_inv_range(paddr, paddr + size);
  462. } else {
  463. outer_clean_range(paddr, paddr + size);
  464. }
  465. /* FIXME: non-speculating: flush on bidirectional mappings? */
  466. }
  467. EXPORT_SYMBOL(___dma_page_cpu_to_dev);
  468. void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
  469. size_t size, enum dma_data_direction dir)
  470. {
  471. unsigned long paddr = page_to_phys(page) + off;
  472. /* FIXME: non-speculating: not required */
  473. /* don't bother invalidating if DMA to device */
  474. if (dir != DMA_TO_DEVICE)
  475. outer_inv_range(paddr, paddr + size);
  476. dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
  477. /*
  478. * Mark the D-cache clean for this page to avoid extra flushing.
  479. */
  480. if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
  481. set_bit(PG_dcache_clean, &page->flags);
  482. }
  483. EXPORT_SYMBOL(___dma_page_dev_to_cpu);
  484. /**
  485. * dma_map_sg - map a set of SG buffers for streaming mode DMA
  486. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  487. * @sg: list of buffers
  488. * @nents: number of buffers to map
  489. * @dir: DMA transfer direction
  490. *
  491. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  492. * This is the scatter-gather version of the dma_map_single interface.
  493. * Here the scatter gather list elements are each tagged with the
  494. * appropriate dma address and length. They are obtained via
  495. * sg_dma_{address,length}.
  496. *
  497. * Device ownership issues as mentioned for dma_map_single are the same
  498. * here.
  499. */
  500. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  501. enum dma_data_direction dir)
  502. {
  503. struct scatterlist *s;
  504. int i, j;
  505. BUG_ON(!valid_dma_direction(dir));
  506. for_each_sg(sg, s, nents, i) {
  507. s->dma_address = __dma_map_page(dev, sg_page(s), s->offset,
  508. s->length, dir);
  509. if (dma_mapping_error(dev, s->dma_address))
  510. goto bad_mapping;
  511. }
  512. debug_dma_map_sg(dev, sg, nents, nents, dir);
  513. return nents;
  514. bad_mapping:
  515. for_each_sg(sg, s, i, j)
  516. __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
  517. return 0;
  518. }
  519. EXPORT_SYMBOL(dma_map_sg);
  520. /**
  521. * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
  522. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  523. * @sg: list of buffers
  524. * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
  525. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  526. *
  527. * Unmap a set of streaming mode DMA translations. Again, CPU access
  528. * rules concerning calls here are the same as for dma_unmap_single().
  529. */
  530. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
  531. enum dma_data_direction dir)
  532. {
  533. struct scatterlist *s;
  534. int i;
  535. debug_dma_unmap_sg(dev, sg, nents, dir);
  536. for_each_sg(sg, s, nents, i)
  537. __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
  538. }
  539. EXPORT_SYMBOL(dma_unmap_sg);
  540. /**
  541. * dma_sync_sg_for_cpu
  542. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  543. * @sg: list of buffers
  544. * @nents: number of buffers to map (returned from dma_map_sg)
  545. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  546. */
  547. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
  548. int nents, enum dma_data_direction dir)
  549. {
  550. struct scatterlist *s;
  551. int i;
  552. for_each_sg(sg, s, nents, i) {
  553. if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
  554. sg_dma_len(s), dir))
  555. continue;
  556. __dma_page_dev_to_cpu(sg_page(s), s->offset,
  557. s->length, dir);
  558. }
  559. debug_dma_sync_sg_for_cpu(dev, sg, nents, dir);
  560. }
  561. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  562. /**
  563. * dma_sync_sg_for_device
  564. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  565. * @sg: list of buffers
  566. * @nents: number of buffers to map (returned from dma_map_sg)
  567. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  568. */
  569. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  570. int nents, enum dma_data_direction dir)
  571. {
  572. struct scatterlist *s;
  573. int i;
  574. for_each_sg(sg, s, nents, i) {
  575. if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
  576. sg_dma_len(s), dir))
  577. continue;
  578. __dma_page_cpu_to_dev(sg_page(s), s->offset,
  579. s->length, dir);
  580. }
  581. debug_dma_sync_sg_for_device(dev, sg, nents, dir);
  582. }
  583. EXPORT_SYMBOL(dma_sync_sg_for_device);
  584. /*
  585. * Return whether the given device DMA address mask can be supported
  586. * properly. For example, if your device can only drive the low 24-bits
  587. * during bus mastering, then you would pass 0x00ffffff as the mask
  588. * to this function.
  589. */
  590. int dma_supported(struct device *dev, u64 mask)
  591. {
  592. if (mask < (u64)arm_dma_limit)
  593. return 0;
  594. return 1;
  595. }
  596. EXPORT_SYMBOL(dma_supported);
  597. int dma_set_mask(struct device *dev, u64 dma_mask)
  598. {
  599. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  600. return -EIO;
  601. #ifndef CONFIG_DMABOUNCE
  602. *dev->dma_mask = dma_mask;
  603. #endif
  604. return 0;
  605. }
  606. EXPORT_SYMBOL(dma_set_mask);
  607. #define PREALLOC_DMA_DEBUG_ENTRIES 4096
  608. static int __init dma_debug_do_init(void)
  609. {
  610. #ifdef CONFIG_MMU
  611. arm_vmregion_create_proc("dma-mappings", &consistent_head);
  612. #endif
  613. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  614. return 0;
  615. }
  616. fs_initcall(dma_debug_do_init);