mach-crag6410.c 19 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/leds.h>
  22. #include <linux/delay.h>
  23. #include <linux/mmc/host.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/regulator/fixed.h>
  26. #include <linux/pwm_backlight.h>
  27. #include <linux/dm9000.h>
  28. #include <linux/gpio_keys.h>
  29. #include <linux/basic_mmio_gpio.h>
  30. #include <linux/spi/spi.h>
  31. #include <linux/i2c/pca953x.h>
  32. #include <video/platform_lcd.h>
  33. #include <linux/mfd/wm831x/core.h>
  34. #include <linux/mfd/wm831x/pdata.h>
  35. #include <linux/mfd/wm831x/irq.h>
  36. #include <linux/mfd/wm831x/gpio.h>
  37. #include <sound/wm1250-ev1.h>
  38. #include <asm/hardware/vic.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach-types.h>
  41. #include <mach/hardware.h>
  42. #include <mach/map.h>
  43. #include <mach/regs-sys.h>
  44. #include <mach/regs-gpio.h>
  45. #include <mach/regs-modem.h>
  46. #include <mach/crag6410.h>
  47. #include <mach/regs-gpio-memport.h>
  48. #include <plat/regs-serial.h>
  49. #include <plat/regs-fb-v4.h>
  50. #include <plat/fb.h>
  51. #include <plat/sdhci.h>
  52. #include <plat/gpio-cfg.h>
  53. #include <plat/s3c64xx-spi.h>
  54. #include <plat/udc-hs.h>
  55. #include <plat/keypad.h>
  56. #include <plat/clock.h>
  57. #include <plat/devs.h>
  58. #include <plat/cpu.h>
  59. #include <plat/adc.h>
  60. #include <plat/iic.h>
  61. #include <plat/pm.h>
  62. #include "common.h"
  63. /* serial port setup */
  64. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  65. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  66. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  67. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  68. [0] = {
  69. .hwport = 0,
  70. .flags = 0,
  71. .ucon = UCON,
  72. .ulcon = ULCON,
  73. .ufcon = UFCON,
  74. },
  75. [1] = {
  76. .hwport = 1,
  77. .flags = 0,
  78. .ucon = UCON,
  79. .ulcon = ULCON,
  80. .ufcon = UFCON,
  81. },
  82. [2] = {
  83. .hwport = 2,
  84. .flags = 0,
  85. .ucon = UCON,
  86. .ulcon = ULCON,
  87. .ufcon = UFCON,
  88. },
  89. [3] = {
  90. .hwport = 3,
  91. .flags = 0,
  92. .ucon = UCON,
  93. .ulcon = ULCON,
  94. .ufcon = UFCON,
  95. },
  96. };
  97. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  98. .pwm_id = 0,
  99. .max_brightness = 1000,
  100. .dft_brightness = 600,
  101. .pwm_period_ns = 100000, /* about 1kHz */
  102. };
  103. static struct platform_device crag6410_backlight_device = {
  104. .name = "pwm-backlight",
  105. .id = -1,
  106. .dev = {
  107. .parent = &s3c_device_timer[0].dev,
  108. .platform_data = &crag6410_backlight_data,
  109. },
  110. };
  111. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  112. {
  113. pr_debug("%s: setting power %d\n", __func__, power);
  114. if (power) {
  115. gpio_set_value(S3C64XX_GPB(0), 1);
  116. msleep(1);
  117. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  118. } else {
  119. gpio_direction_output(S3C64XX_GPF(14), 0);
  120. gpio_set_value(S3C64XX_GPB(0), 0);
  121. }
  122. }
  123. static struct platform_device crag6410_lcd_powerdev = {
  124. .name = "platform-lcd",
  125. .id = -1,
  126. .dev.parent = &s3c_device_fb.dev,
  127. .dev.platform_data = &(struct plat_lcd_data) {
  128. .set_power = crag6410_lcd_power_set,
  129. },
  130. };
  131. /* 640x480 URT */
  132. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  133. /* this is to ensure we use win0 */
  134. .win_mode = {
  135. .left_margin = 150,
  136. .right_margin = 80,
  137. .upper_margin = 40,
  138. .lower_margin = 5,
  139. .hsync_len = 40,
  140. .vsync_len = 5,
  141. .xres = 640,
  142. .yres = 480,
  143. },
  144. .max_bpp = 32,
  145. .default_bpp = 16,
  146. .virtual_y = 480 * 2,
  147. .virtual_x = 640,
  148. };
  149. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  150. static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
  151. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  152. .win[0] = &crag6410_fb_win0,
  153. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  154. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  155. };
  156. /* 2x6 keypad */
  157. static uint32_t crag6410_keymap[] __initdata = {
  158. /* KEY(row, col, keycode) */
  159. KEY(0, 0, KEY_VOLUMEUP),
  160. KEY(0, 1, KEY_HOME),
  161. KEY(0, 2, KEY_VOLUMEDOWN),
  162. KEY(0, 3, KEY_HELP),
  163. KEY(0, 4, KEY_MENU),
  164. KEY(0, 5, KEY_MEDIA),
  165. KEY(1, 0, 232),
  166. KEY(1, 1, KEY_DOWN),
  167. KEY(1, 2, KEY_LEFT),
  168. KEY(1, 3, KEY_UP),
  169. KEY(1, 4, KEY_RIGHT),
  170. KEY(1, 5, KEY_CAMERA),
  171. };
  172. static struct matrix_keymap_data crag6410_keymap_data __initdata = {
  173. .keymap = crag6410_keymap,
  174. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  175. };
  176. static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
  177. .keymap_data = &crag6410_keymap_data,
  178. .rows = 2,
  179. .cols = 6,
  180. };
  181. static struct gpio_keys_button crag6410_gpio_keys[] = {
  182. [0] = {
  183. .code = KEY_SUSPEND,
  184. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  185. .type = EV_KEY,
  186. .wakeup = 1,
  187. .active_low = 1,
  188. },
  189. [1] = {
  190. .code = SW_FRONT_PROXIMITY,
  191. .gpio = S3C64XX_GPN(11), /* EINT 11 */
  192. .type = EV_SW,
  193. },
  194. };
  195. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  196. .buttons = crag6410_gpio_keys,
  197. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  198. };
  199. static struct platform_device crag6410_gpio_keydev = {
  200. .name = "gpio-keys",
  201. .id = 0,
  202. .dev.platform_data = &crag6410_gpio_keydata,
  203. };
  204. static struct resource crag6410_dm9k_resource[] = {
  205. [0] = {
  206. .start = S3C64XX_PA_XM0CSN5,
  207. .end = S3C64XX_PA_XM0CSN5 + 1,
  208. .flags = IORESOURCE_MEM,
  209. },
  210. [1] = {
  211. .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
  212. .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
  213. .flags = IORESOURCE_MEM,
  214. },
  215. [2] = {
  216. .start = S3C_EINT(17),
  217. .end = S3C_EINT(17),
  218. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  219. },
  220. };
  221. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  222. .flags = DM9000_PLATF_16BITONLY,
  223. };
  224. static struct platform_device crag6410_dm9k_device = {
  225. .name = "dm9000",
  226. .id = -1,
  227. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  228. .resource = crag6410_dm9k_resource,
  229. .dev.platform_data = &mini6410_dm9k_pdata,
  230. };
  231. static struct resource crag6410_mmgpio_resource[] = {
  232. [0] = {
  233. .name = "dat",
  234. .start = S3C64XX_PA_XM0CSN4 + 1,
  235. .end = S3C64XX_PA_XM0CSN4 + 1,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. };
  239. static struct platform_device crag6410_mmgpio = {
  240. .name = "basic-mmio-gpio",
  241. .id = -1,
  242. .resource = crag6410_mmgpio_resource,
  243. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  244. .dev.platform_data = &(struct bgpio_pdata) {
  245. .base = MMGPIO_GPIO_BASE,
  246. },
  247. };
  248. static struct platform_device speyside_device = {
  249. .name = "speyside",
  250. .id = -1,
  251. };
  252. static struct platform_device lowland_device = {
  253. .name = "lowland",
  254. .id = -1,
  255. };
  256. static struct platform_device tobermory_device = {
  257. .name = "tobermory",
  258. .id = -1,
  259. };
  260. static struct platform_device littlemill_device = {
  261. .name = "littlemill",
  262. .id = -1,
  263. };
  264. static struct regulator_consumer_supply wallvdd_consumers[] = {
  265. REGULATOR_SUPPLY("SPKVDD", "1-001a"),
  266. REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
  267. REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
  268. REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
  269. REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
  270. };
  271. static struct regulator_init_data wallvdd_data = {
  272. .constraints = {
  273. .always_on = 1,
  274. },
  275. .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
  276. .consumer_supplies = wallvdd_consumers,
  277. };
  278. static struct fixed_voltage_config wallvdd_pdata = {
  279. .supply_name = "WALLVDD",
  280. .microvolts = 5000000,
  281. .init_data = &wallvdd_data,
  282. .gpio = -EINVAL,
  283. };
  284. static struct platform_device wallvdd_device = {
  285. .name = "reg-fixed-voltage",
  286. .id = -1,
  287. .dev = {
  288. .platform_data = &wallvdd_pdata,
  289. },
  290. };
  291. static struct platform_device *crag6410_devices[] __initdata = {
  292. &s3c_device_hsmmc0,
  293. &s3c_device_hsmmc2,
  294. &s3c_device_i2c0,
  295. &s3c_device_i2c1,
  296. &s3c_device_fb,
  297. &s3c_device_ohci,
  298. &s3c_device_usb_hsotg,
  299. &s3c_device_timer[0],
  300. &s3c64xx_device_iis0,
  301. &s3c64xx_device_iis1,
  302. &samsung_asoc_dma,
  303. &samsung_device_keypad,
  304. &crag6410_gpio_keydev,
  305. &crag6410_dm9k_device,
  306. &s3c64xx_device_spi0,
  307. &crag6410_mmgpio,
  308. &crag6410_lcd_powerdev,
  309. &crag6410_backlight_device,
  310. &speyside_device,
  311. &tobermory_device,
  312. &littlemill_device,
  313. &lowland_device,
  314. &wallvdd_device,
  315. };
  316. static struct pca953x_platform_data crag6410_pca_data = {
  317. .gpio_base = PCA935X_GPIO_BASE,
  318. .irq_base = -1,
  319. };
  320. /* VDDARM is controlled by DVS1 connected to GPK(0) */
  321. static struct wm831x_buckv_pdata vddarm_pdata = {
  322. .dvs_control_src = 1,
  323. .dvs_gpio = S3C64XX_GPK(0),
  324. };
  325. static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
  326. REGULATOR_SUPPLY("vddarm", NULL),
  327. };
  328. static struct regulator_init_data vddarm __initdata = {
  329. .constraints = {
  330. .name = "VDDARM",
  331. .min_uV = 1000000,
  332. .max_uV = 1300000,
  333. .always_on = 1,
  334. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  335. },
  336. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  337. .consumer_supplies = vddarm_consumers,
  338. .supply_regulator = "WALLVDD",
  339. .driver_data = &vddarm_pdata,
  340. };
  341. static struct regulator_consumer_supply vddint_consumers[] __initdata = {
  342. REGULATOR_SUPPLY("vddint", NULL),
  343. };
  344. static struct regulator_init_data vddint __initdata = {
  345. .constraints = {
  346. .name = "VDDINT",
  347. .min_uV = 1000000,
  348. .max_uV = 1200000,
  349. .always_on = 1,
  350. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  351. },
  352. .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
  353. .consumer_supplies = vddint_consumers,
  354. .supply_regulator = "WALLVDD",
  355. };
  356. static struct regulator_init_data vddmem __initdata = {
  357. .constraints = {
  358. .name = "VDDMEM",
  359. .always_on = 1,
  360. },
  361. };
  362. static struct regulator_init_data vddsys __initdata = {
  363. .constraints = {
  364. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  365. .always_on = 1,
  366. },
  367. };
  368. static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
  369. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  370. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  371. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  372. };
  373. static struct regulator_init_data vddmmc __initdata = {
  374. .constraints = {
  375. .name = "VDDMMC,UH",
  376. .always_on = 1,
  377. },
  378. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  379. .consumer_supplies = vddmmc_consumers,
  380. .supply_regulator = "WALLVDD",
  381. };
  382. static struct regulator_init_data vddotgi __initdata = {
  383. .constraints = {
  384. .name = "VDDOTGi",
  385. .always_on = 1,
  386. },
  387. .supply_regulator = "WALLVDD",
  388. };
  389. static struct regulator_init_data vddotg __initdata = {
  390. .constraints = {
  391. .name = "VDDOTG",
  392. .always_on = 1,
  393. },
  394. .supply_regulator = "WALLVDD",
  395. };
  396. static struct regulator_init_data vddhi __initdata = {
  397. .constraints = {
  398. .name = "VDDHI",
  399. .always_on = 1,
  400. },
  401. .supply_regulator = "WALLVDD",
  402. };
  403. static struct regulator_init_data vddadc __initdata = {
  404. .constraints = {
  405. .name = "VDDADC,VDDDAC",
  406. .always_on = 1,
  407. },
  408. .supply_regulator = "WALLVDD",
  409. };
  410. static struct regulator_init_data vddmem0 __initdata = {
  411. .constraints = {
  412. .name = "VDDMEM0",
  413. .always_on = 1,
  414. },
  415. .supply_regulator = "WALLVDD",
  416. };
  417. static struct regulator_init_data vddpll __initdata = {
  418. .constraints = {
  419. .name = "VDDPLL",
  420. .always_on = 1,
  421. },
  422. .supply_regulator = "WALLVDD",
  423. };
  424. static struct regulator_init_data vddlcd __initdata = {
  425. .constraints = {
  426. .name = "VDDLCD",
  427. .always_on = 1,
  428. },
  429. .supply_regulator = "WALLVDD",
  430. };
  431. static struct regulator_init_data vddalive __initdata = {
  432. .constraints = {
  433. .name = "VDDALIVE",
  434. .always_on = 1,
  435. },
  436. .supply_regulator = "WALLVDD",
  437. };
  438. static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
  439. .charger_enable = 1,
  440. .vlim = 2500, /* mV */
  441. .ilim = 200, /* uA */
  442. };
  443. static struct wm831x_status_pdata banff_red_led __initdata = {
  444. .name = "banff:red:",
  445. .default_src = WM831X_STATUS_MANUAL,
  446. };
  447. static struct wm831x_status_pdata banff_green_led __initdata = {
  448. .name = "banff:green:",
  449. .default_src = WM831X_STATUS_MANUAL,
  450. };
  451. static struct wm831x_touch_pdata touch_pdata __initdata = {
  452. .data_irq = S3C_EINT(26),
  453. .pd_irq = S3C_EINT(27),
  454. };
  455. static struct wm831x_pdata crag_pmic_pdata __initdata = {
  456. .wm831x_num = 1,
  457. .irq_base = BANFF_PMIC_IRQ_BASE,
  458. .gpio_base = BANFF_PMIC_GPIO_BASE,
  459. .soft_shutdown = true,
  460. .backup = &banff_backup_pdata,
  461. .gpio_defaults = {
  462. /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
  463. [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
  464. /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
  465. [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
  466. /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
  467. [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
  468. },
  469. .dcdc = {
  470. &vddarm, /* DCDC1 */
  471. &vddint, /* DCDC2 */
  472. &vddmem, /* DCDC3 */
  473. },
  474. .ldo = {
  475. &vddsys, /* LDO1 */
  476. &vddmmc, /* LDO2 */
  477. NULL, /* LDO3 */
  478. &vddotgi, /* LDO4 */
  479. &vddotg, /* LDO5 */
  480. &vddhi, /* LDO6 */
  481. &vddadc, /* LDO7 */
  482. &vddmem0, /* LDO8 */
  483. &vddpll, /* LDO9 */
  484. &vddlcd, /* LDO10 */
  485. &vddalive, /* LDO11 */
  486. },
  487. .status = {
  488. &banff_green_led,
  489. &banff_red_led,
  490. },
  491. .touch = &touch_pdata,
  492. };
  493. static struct i2c_board_info i2c_devs0[] __initdata = {
  494. { I2C_BOARD_INFO("24c08", 0x50), },
  495. { I2C_BOARD_INFO("tca6408", 0x20),
  496. .platform_data = &crag6410_pca_data,
  497. },
  498. { I2C_BOARD_INFO("wm8312", 0x34),
  499. .platform_data = &crag_pmic_pdata,
  500. .irq = S3C_EINT(23),
  501. },
  502. };
  503. static struct s3c2410_platform_i2c i2c0_pdata = {
  504. .frequency = 400000,
  505. };
  506. static struct regulator_consumer_supply pvdd_1v2_consumers[] __initdata = {
  507. REGULATOR_SUPPLY("DCVDD", "spi0.0"),
  508. REGULATOR_SUPPLY("AVDD", "spi0.0"),
  509. };
  510. static struct regulator_init_data pvdd_1v2 __initdata = {
  511. .constraints = {
  512. .name = "PVDD_1V2",
  513. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  514. },
  515. .consumer_supplies = pvdd_1v2_consumers,
  516. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
  517. };
  518. static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
  519. REGULATOR_SUPPLY("LDOVDD", "1-001a"),
  520. REGULATOR_SUPPLY("PLLVDD", "1-001a"),
  521. REGULATOR_SUPPLY("DBVDD", "1-001a"),
  522. REGULATOR_SUPPLY("DBVDD1", "1-001a"),
  523. REGULATOR_SUPPLY("DBVDD2", "1-001a"),
  524. REGULATOR_SUPPLY("DBVDD3", "1-001a"),
  525. REGULATOR_SUPPLY("CPVDD", "1-001a"),
  526. REGULATOR_SUPPLY("AVDD2", "1-001a"),
  527. REGULATOR_SUPPLY("DCVDD", "1-001a"),
  528. REGULATOR_SUPPLY("AVDD", "1-001a"),
  529. REGULATOR_SUPPLY("DBVDD", "spi0.0"),
  530. };
  531. static struct regulator_init_data pvdd_1v8 __initdata = {
  532. .constraints = {
  533. .name = "PVDD_1V8",
  534. .always_on = 1,
  535. },
  536. .consumer_supplies = pvdd_1v8_consumers,
  537. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
  538. };
  539. static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
  540. REGULATOR_SUPPLY("MICVDD", "1-001a"),
  541. REGULATOR_SUPPLY("AVDD1", "1-001a"),
  542. };
  543. static struct regulator_init_data pvdd_3v3 __initdata = {
  544. .constraints = {
  545. .name = "PVDD_3V3",
  546. .always_on = 1,
  547. },
  548. .consumer_supplies = pvdd_3v3_consumers,
  549. .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
  550. };
  551. static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
  552. .wm831x_num = 2,
  553. .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
  554. .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
  555. .soft_shutdown = true,
  556. .gpio_defaults = {
  557. /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
  558. [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  559. [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  560. [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  561. },
  562. .dcdc = {
  563. &pvdd_1v2, /* DCDC1 */
  564. &pvdd_1v8, /* DCDC2 */
  565. &pvdd_3v3, /* DCDC3 */
  566. },
  567. .disable_touch = true,
  568. };
  569. static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
  570. .gpios = {
  571. [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
  572. [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
  573. [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
  574. [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
  575. [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
  576. },
  577. };
  578. static struct i2c_board_info i2c_devs1[] __initdata = {
  579. { I2C_BOARD_INFO("wm8311", 0x34),
  580. .irq = S3C_EINT(0),
  581. .platform_data = &glenfarclas_pmic_pdata },
  582. { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
  583. { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
  584. { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
  585. { I2C_BOARD_INFO("wm1250-ev1", 0x27),
  586. .platform_data = &wm1250_ev1_pdata },
  587. };
  588. static struct s3c2410_platform_i2c i2c1_pdata = {
  589. .frequency = 400000,
  590. .bus_num = 1,
  591. };
  592. static void __init crag6410_map_io(void)
  593. {
  594. s3c64xx_init_io(NULL, 0);
  595. s3c24xx_init_clocks(12000000);
  596. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  597. /* LCD type and Bypass set by bootloader */
  598. }
  599. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  600. .max_width = 4,
  601. .cd_type = S3C_SDHCI_CD_PERMANENT,
  602. .host_caps = MMC_CAP_POWER_OFF_CARD,
  603. };
  604. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  605. {
  606. /* Set all the necessary GPG pins to special-function 2 */
  607. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  608. /* force card-detected for prototype 0 */
  609. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  610. }
  611. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  612. .max_width = 4,
  613. .cd_type = S3C_SDHCI_CD_INTERNAL,
  614. .cfg_gpio = crag6410_cfg_sdhci0,
  615. .host_caps = MMC_CAP_POWER_OFF_CARD,
  616. };
  617. static const struct gpio_led gpio_leds[] = {
  618. {
  619. .name = "d13:green:",
  620. .gpio = MMGPIO_GPIO_BASE + 0,
  621. .default_state = LEDS_GPIO_DEFSTATE_ON,
  622. },
  623. {
  624. .name = "d14:green:",
  625. .gpio = MMGPIO_GPIO_BASE + 1,
  626. .default_state = LEDS_GPIO_DEFSTATE_ON,
  627. },
  628. {
  629. .name = "d15:green:",
  630. .gpio = MMGPIO_GPIO_BASE + 2,
  631. .default_state = LEDS_GPIO_DEFSTATE_ON,
  632. },
  633. {
  634. .name = "d16:green:",
  635. .gpio = MMGPIO_GPIO_BASE + 3,
  636. .default_state = LEDS_GPIO_DEFSTATE_ON,
  637. },
  638. {
  639. .name = "d17:green:",
  640. .gpio = MMGPIO_GPIO_BASE + 4,
  641. .default_state = LEDS_GPIO_DEFSTATE_ON,
  642. },
  643. {
  644. .name = "d18:green:",
  645. .gpio = MMGPIO_GPIO_BASE + 5,
  646. .default_state = LEDS_GPIO_DEFSTATE_ON,
  647. },
  648. {
  649. .name = "d19:green:",
  650. .gpio = MMGPIO_GPIO_BASE + 6,
  651. .default_state = LEDS_GPIO_DEFSTATE_ON,
  652. },
  653. {
  654. .name = "d20:green:",
  655. .gpio = MMGPIO_GPIO_BASE + 7,
  656. .default_state = LEDS_GPIO_DEFSTATE_ON,
  657. },
  658. };
  659. static const struct gpio_led_platform_data gpio_leds_pdata = {
  660. .leds = gpio_leds,
  661. .num_leds = ARRAY_SIZE(gpio_leds),
  662. };
  663. static struct s3c_hsotg_plat crag6410_hsotg_pdata;
  664. static void __init crag6410_machine_init(void)
  665. {
  666. /* Open drain IRQs need pullups */
  667. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  668. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  669. gpio_request(S3C64XX_GPB(0), "LCD power");
  670. gpio_direction_output(S3C64XX_GPB(0), 0);
  671. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  672. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  673. gpio_request(S3C64XX_GPB(1), "SD power");
  674. gpio_direction_output(S3C64XX_GPB(1), 0);
  675. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  676. gpio_direction_output(S3C64XX_GPF(10), 1);
  677. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  678. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  679. s3c_i2c0_set_platdata(&i2c0_pdata);
  680. s3c_i2c1_set_platdata(&i2c1_pdata);
  681. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  682. s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
  683. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  684. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  685. samsung_keypad_set_platdata(&crag6410_keypad_data);
  686. s3c64xx_spi0_set_platdata(&s3c64xx_spi0_pdata, 0, 1);
  687. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  688. gpio_led_register_device(-1, &gpio_leds_pdata);
  689. regulator_has_full_constraints();
  690. s3c64xx_pm_init();
  691. }
  692. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  693. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  694. .atag_offset = 0x100,
  695. .init_irq = s3c6410_init_irq,
  696. .handle_irq = vic_handle_irq,
  697. .map_io = crag6410_map_io,
  698. .init_machine = crag6410_machine_init,
  699. .timer = &s3c24xx_timer,
  700. .restart = s3c64xx_restart,
  701. MACHINE_END