iomap.h 7.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197
  1. /*
  2. * IO mappings for OMAP2+
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  10. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  12. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  13. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  14. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  15. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  16. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  17. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  18. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  19. *
  20. * You should have received a copy of the GNU General Public License along
  21. * with this program; if not, write to the Free Software Foundation, Inc.,
  22. * 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #define OMAP2_L3_IO_OFFSET 0x90000000
  25. #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
  26. #define OMAP2_L4_IO_OFFSET 0xb2000000
  27. #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
  28. #define OMAP4_L3_IO_OFFSET 0xb4000000
  29. #define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
  30. #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
  31. #define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
  32. #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
  33. #define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
  34. #define OMAP4_GPMC_IO_OFFSET 0xa9000000
  35. #define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
  36. #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
  37. #define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
  38. /*
  39. * ----------------------------------------------------------------------------
  40. * Omap2 specific IO mapping
  41. * ----------------------------------------------------------------------------
  42. */
  43. /* We map both L3 and L4 on OMAP2 */
  44. #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
  45. #define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
  46. #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
  47. #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
  48. #define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
  49. #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
  50. #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
  51. #define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
  52. #define L4_WK_243X_SIZE SZ_1M
  53. #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
  54. #define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
  55. /* 0x6e000000 --> 0xfe000000 */
  56. #define OMAP243X_GPMC_SIZE SZ_1M
  57. #define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
  58. /* 0x6D000000 --> 0xfd000000 */
  59. #define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
  60. #define OMAP243X_SDRC_SIZE SZ_1M
  61. #define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
  62. /* 0x6c000000 --> 0xfc000000 */
  63. #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
  64. #define OMAP243X_SMS_SIZE SZ_1M
  65. /* 2420 IVA */
  66. #define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
  67. /* 0x58000000 --> 0xfc100000 */
  68. #define DSP_MEM_2420_VIRT 0xfc100000
  69. #define DSP_MEM_2420_SIZE 0x28000
  70. #define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
  71. /* 0x59000000 --> 0xfc128000 */
  72. #define DSP_IPI_2420_VIRT 0xfc128000
  73. #define DSP_IPI_2420_SIZE SZ_4K
  74. #define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
  75. /* 0x5a000000 --> 0xfc129000 */
  76. #define DSP_MMU_2420_VIRT 0xfc129000
  77. #define DSP_MMU_2420_SIZE SZ_4K
  78. /* 2430 IVA2.1 - currently unmapped */
  79. /*
  80. * ----------------------------------------------------------------------------
  81. * Omap3 specific IO mapping
  82. * ----------------------------------------------------------------------------
  83. */
  84. /* We map both L3 and L4 on OMAP3 */
  85. #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
  86. #define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
  87. #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
  88. #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
  89. #define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
  90. #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
  91. /*
  92. * ----------------------------------------------------------------------------
  93. * AM33XX specific IO mapping
  94. * ----------------------------------------------------------------------------
  95. */
  96. #define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
  97. #define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
  98. #define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
  99. /*
  100. * Need to look at the Size 4M for L4.
  101. * VPOM3430 was not working for Int controller
  102. */
  103. #define L4_PER_34XX_PHYS L4_PER_34XX_BASE
  104. /* 0x49000000 --> 0xfb000000 */
  105. #define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
  106. #define L4_PER_34XX_SIZE SZ_1M
  107. #define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
  108. /* 0x54000000 --> 0xfe800000 */
  109. #define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
  110. #define L4_EMU_34XX_SIZE SZ_8M
  111. #define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
  112. /* 0x6e000000 --> 0xfe000000 */
  113. #define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
  114. #define OMAP34XX_GPMC_SIZE SZ_1M
  115. #define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
  116. /* 0x6c000000 --> 0xfc000000 */
  117. #define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
  118. #define OMAP343X_SMS_SIZE SZ_1M
  119. #define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
  120. /* 0x6D000000 --> 0xfd000000 */
  121. #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
  122. #define OMAP343X_SDRC_SIZE SZ_1M
  123. /* 3430 IVA - currently unmapped */
  124. /*
  125. * ----------------------------------------------------------------------------
  126. * Omap4 specific IO mapping
  127. * ----------------------------------------------------------------------------
  128. */
  129. /* We map both L3 and L4 on OMAP4 */
  130. #define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
  131. #define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
  132. #define L3_44XX_SIZE SZ_1M
  133. #define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
  134. #define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
  135. #define L4_44XX_SIZE SZ_4M
  136. #define L4_PER_44XX_PHYS L4_PER_44XX_BASE
  137. /* 0x48000000 --> 0xfa000000 */
  138. #define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
  139. #define L4_PER_44XX_SIZE SZ_4M
  140. #define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
  141. /* 0x49000000 --> 0xfb000000 */
  142. #define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
  143. #define L4_ABE_44XX_SIZE SZ_1M
  144. #define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
  145. /* 0x54000000 --> 0xfe800000 */
  146. #define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
  147. #define L4_EMU_44XX_SIZE SZ_8M
  148. #define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
  149. /* 0x50000000 --> 0xf9000000 */
  150. #define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
  151. #define OMAP44XX_GPMC_SIZE SZ_1M
  152. #define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
  153. /* 0x4c000000 --> 0xfd100000 */
  154. #define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
  155. #define OMAP44XX_EMIF1_SIZE SZ_1M
  156. #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
  157. /* 0x4d000000 --> 0xfd200000 */
  158. #define OMAP44XX_EMIF2_SIZE SZ_1M
  159. #define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
  160. #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
  161. /* 0x4e000000 --> 0xfd300000 */
  162. #define OMAP44XX_DMM_SIZE SZ_1M
  163. #define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)