devices.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/gpio.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/io.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <linux/platform_data/omap4-keypad.h>
  21. #include <mach/hardware.h>
  22. #include <mach/irqs.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/pmu.h>
  26. #include "iomap.h"
  27. #include <plat/board.h>
  28. #include <plat/mmc.h>
  29. #include <plat/dma.h>
  30. #include <plat/omap_hwmod.h>
  31. #include <plat/omap_device.h>
  32. #include <plat/omap4-keypad.h>
  33. #include "mux.h"
  34. #include "control.h"
  35. #include "devices.h"
  36. #define L3_MODULES_MAX_LEN 12
  37. #define L3_MODULES 3
  38. static int __init omap3_l3_init(void)
  39. {
  40. int l;
  41. struct omap_hwmod *oh;
  42. struct platform_device *pdev;
  43. char oh_name[L3_MODULES_MAX_LEN];
  44. /*
  45. * To avoid code running on other OMAPs in
  46. * multi-omap builds
  47. */
  48. if (!(cpu_is_omap34xx()))
  49. return -ENODEV;
  50. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  51. oh = omap_hwmod_lookup(oh_name);
  52. if (!oh)
  53. pr_err("could not look up %s\n", oh_name);
  54. pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  55. NULL, 0, 0);
  56. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  57. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  58. }
  59. postcore_initcall(omap3_l3_init);
  60. static int __init omap4_l3_init(void)
  61. {
  62. int l, i;
  63. struct omap_hwmod *oh[3];
  64. struct platform_device *pdev;
  65. char oh_name[L3_MODULES_MAX_LEN];
  66. /* If dtb is there, the devices will be created dynamically */
  67. if (of_have_populated_dt())
  68. return -ENODEV;
  69. /*
  70. * To avoid code running on other OMAPs in
  71. * multi-omap builds
  72. */
  73. if (!(cpu_is_omap44xx()))
  74. return -ENODEV;
  75. for (i = 0; i < L3_MODULES; i++) {
  76. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  77. oh[i] = omap_hwmod_lookup(oh_name);
  78. if (!(oh[i]))
  79. pr_err("could not look up %s\n", oh_name);
  80. }
  81. pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  82. 0, NULL, 0, 0);
  83. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  84. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  85. }
  86. postcore_initcall(omap4_l3_init);
  87. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  88. static struct resource omap2cam_resources[] = {
  89. {
  90. .start = OMAP24XX_CAMERA_BASE,
  91. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  92. .flags = IORESOURCE_MEM,
  93. },
  94. {
  95. .start = INT_24XX_CAM_IRQ,
  96. .flags = IORESOURCE_IRQ,
  97. }
  98. };
  99. static struct platform_device omap2cam_device = {
  100. .name = "omap24xxcam",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(omap2cam_resources),
  103. .resource = omap2cam_resources,
  104. };
  105. #endif
  106. #if defined(CONFIG_IOMMU_API)
  107. #include <plat/iommu.h>
  108. static struct resource omap3isp_resources[] = {
  109. {
  110. .start = OMAP3430_ISP_BASE,
  111. .end = OMAP3430_ISP_END,
  112. .flags = IORESOURCE_MEM,
  113. },
  114. {
  115. .start = OMAP3430_ISP_CCP2_BASE,
  116. .end = OMAP3430_ISP_CCP2_END,
  117. .flags = IORESOURCE_MEM,
  118. },
  119. {
  120. .start = OMAP3430_ISP_CCDC_BASE,
  121. .end = OMAP3430_ISP_CCDC_END,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. {
  125. .start = OMAP3430_ISP_HIST_BASE,
  126. .end = OMAP3430_ISP_HIST_END,
  127. .flags = IORESOURCE_MEM,
  128. },
  129. {
  130. .start = OMAP3430_ISP_H3A_BASE,
  131. .end = OMAP3430_ISP_H3A_END,
  132. .flags = IORESOURCE_MEM,
  133. },
  134. {
  135. .start = OMAP3430_ISP_PREV_BASE,
  136. .end = OMAP3430_ISP_PREV_END,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. {
  140. .start = OMAP3430_ISP_RESZ_BASE,
  141. .end = OMAP3430_ISP_RESZ_END,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. {
  145. .start = OMAP3430_ISP_SBL_BASE,
  146. .end = OMAP3430_ISP_SBL_END,
  147. .flags = IORESOURCE_MEM,
  148. },
  149. {
  150. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  151. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  152. .flags = IORESOURCE_MEM,
  153. },
  154. {
  155. .start = OMAP3430_ISP_CSIPHY2_BASE,
  156. .end = OMAP3430_ISP_CSIPHY2_END,
  157. .flags = IORESOURCE_MEM,
  158. },
  159. {
  160. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  161. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. {
  165. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  166. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  167. .flags = IORESOURCE_MEM,
  168. },
  169. {
  170. .start = OMAP3630_ISP_CSIPHY1_BASE,
  171. .end = OMAP3630_ISP_CSIPHY1_END,
  172. .flags = IORESOURCE_MEM,
  173. },
  174. {
  175. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  176. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  177. .flags = IORESOURCE_MEM,
  178. },
  179. {
  180. .start = INT_34XX_CAM_IRQ,
  181. .flags = IORESOURCE_IRQ,
  182. }
  183. };
  184. static struct platform_device omap3isp_device = {
  185. .name = "omap3isp",
  186. .id = -1,
  187. .num_resources = ARRAY_SIZE(omap3isp_resources),
  188. .resource = omap3isp_resources,
  189. };
  190. static struct omap_iommu_arch_data omap3_isp_iommu = {
  191. .name = "isp",
  192. };
  193. int omap3_init_camera(struct isp_platform_data *pdata)
  194. {
  195. omap3isp_device.dev.platform_data = pdata;
  196. omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
  197. return platform_device_register(&omap3isp_device);
  198. }
  199. #else /* !CONFIG_IOMMU_API */
  200. int omap3_init_camera(struct isp_platform_data *pdata)
  201. {
  202. return 0;
  203. }
  204. #endif
  205. static inline void omap_init_camera(void)
  206. {
  207. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  208. if (cpu_is_omap24xx())
  209. platform_device_register(&omap2cam_device);
  210. #endif
  211. }
  212. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  213. *sdp4430_keypad_data, struct omap_board_data *bdata)
  214. {
  215. struct platform_device *pdev;
  216. struct omap_hwmod *oh;
  217. struct omap4_keypad_platform_data *keypad_data;
  218. unsigned int id = -1;
  219. char *oh_name = "kbd";
  220. char *name = "omap4-keypad";
  221. oh = omap_hwmod_lookup(oh_name);
  222. if (!oh) {
  223. pr_err("Could not look up %s\n", oh_name);
  224. return -ENODEV;
  225. }
  226. keypad_data = sdp4430_keypad_data;
  227. pdev = omap_device_build(name, id, oh, keypad_data,
  228. sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
  229. if (IS_ERR(pdev)) {
  230. WARN(1, "Can't build omap_device for %s:%s.\n",
  231. name, oh->name);
  232. return PTR_ERR(pdev);
  233. }
  234. oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
  235. return 0;
  236. }
  237. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  238. static inline void __init omap_init_mbox(void)
  239. {
  240. struct omap_hwmod *oh;
  241. struct platform_device *pdev;
  242. oh = omap_hwmod_lookup("mailbox");
  243. if (!oh) {
  244. pr_err("%s: unable to find hwmod\n", __func__);
  245. return;
  246. }
  247. pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
  248. WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
  249. __func__, PTR_ERR(pdev));
  250. }
  251. #else
  252. static inline void omap_init_mbox(void) { }
  253. #endif /* CONFIG_OMAP_MBOX_FWK */
  254. static inline void omap_init_sti(void) {}
  255. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  256. static struct platform_device omap_pcm = {
  257. .name = "omap-pcm-audio",
  258. .id = -1,
  259. };
  260. static void omap_init_audio(void)
  261. {
  262. platform_device_register(&omap_pcm);
  263. }
  264. #else
  265. static inline void omap_init_audio(void) {}
  266. #endif
  267. #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
  268. defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
  269. static void __init omap_init_mcpdm(void)
  270. {
  271. struct omap_hwmod *oh;
  272. struct platform_device *pdev;
  273. oh = omap_hwmod_lookup("mcpdm");
  274. if (!oh) {
  275. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  276. return;
  277. }
  278. pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
  279. WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
  280. }
  281. #else
  282. static inline void omap_init_mcpdm(void) {}
  283. #endif
  284. #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
  285. defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
  286. static void __init omap_init_dmic(void)
  287. {
  288. struct omap_hwmod *oh;
  289. struct platform_device *pdev;
  290. oh = omap_hwmod_lookup("dmic");
  291. if (!oh) {
  292. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  293. return;
  294. }
  295. pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
  296. WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
  297. }
  298. #else
  299. static inline void omap_init_dmic(void) {}
  300. #endif
  301. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  302. #include <plat/mcspi.h>
  303. static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  304. {
  305. struct platform_device *pdev;
  306. char *name = "omap2_mcspi";
  307. struct omap2_mcspi_platform_config *pdata;
  308. static int spi_num;
  309. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  310. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  311. if (!pdata) {
  312. pr_err("Memory allocation for McSPI device failed\n");
  313. return -ENOMEM;
  314. }
  315. pdata->num_cs = mcspi_attrib->num_chipselect;
  316. switch (oh->class->rev) {
  317. case OMAP2_MCSPI_REV:
  318. case OMAP3_MCSPI_REV:
  319. pdata->regs_offset = 0;
  320. break;
  321. case OMAP4_MCSPI_REV:
  322. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  323. break;
  324. default:
  325. pr_err("Invalid McSPI Revision value\n");
  326. kfree(pdata);
  327. return -EINVAL;
  328. }
  329. spi_num++;
  330. pdev = omap_device_build(name, spi_num, oh, pdata,
  331. sizeof(*pdata), NULL, 0, 0);
  332. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
  333. name, oh->name);
  334. kfree(pdata);
  335. return 0;
  336. }
  337. static void omap_init_mcspi(void)
  338. {
  339. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  340. }
  341. #else
  342. static inline void omap_init_mcspi(void) {}
  343. #endif
  344. static struct resource omap2_pmu_resource = {
  345. .start = 3,
  346. .end = 3,
  347. .flags = IORESOURCE_IRQ,
  348. };
  349. static struct resource omap3_pmu_resource = {
  350. .start = INT_34XX_BENCH_MPU_EMUL,
  351. .end = INT_34XX_BENCH_MPU_EMUL,
  352. .flags = IORESOURCE_IRQ,
  353. };
  354. static struct platform_device omap_pmu_device = {
  355. .name = "arm-pmu",
  356. .id = ARM_PMU_DEVICE_CPU,
  357. .num_resources = 1,
  358. };
  359. static void omap_init_pmu(void)
  360. {
  361. if (cpu_is_omap24xx())
  362. omap_pmu_device.resource = &omap2_pmu_resource;
  363. else if (cpu_is_omap34xx())
  364. omap_pmu_device.resource = &omap3_pmu_resource;
  365. else
  366. return;
  367. platform_device_register(&omap_pmu_device);
  368. }
  369. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  370. #ifdef CONFIG_ARCH_OMAP2
  371. static struct resource omap2_sham_resources[] = {
  372. {
  373. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  374. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. {
  378. .start = INT_24XX_SHA1MD5,
  379. .flags = IORESOURCE_IRQ,
  380. }
  381. };
  382. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  383. #else
  384. #define omap2_sham_resources NULL
  385. #define omap2_sham_resources_sz 0
  386. #endif
  387. #ifdef CONFIG_ARCH_OMAP3
  388. static struct resource omap3_sham_resources[] = {
  389. {
  390. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  391. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  392. .flags = IORESOURCE_MEM,
  393. },
  394. {
  395. .start = INT_34XX_SHA1MD52_IRQ,
  396. .flags = IORESOURCE_IRQ,
  397. },
  398. {
  399. .start = OMAP34XX_DMA_SHA1MD5_RX,
  400. .flags = IORESOURCE_DMA,
  401. }
  402. };
  403. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  404. #else
  405. #define omap3_sham_resources NULL
  406. #define omap3_sham_resources_sz 0
  407. #endif
  408. static struct platform_device sham_device = {
  409. .name = "omap-sham",
  410. .id = -1,
  411. };
  412. static void omap_init_sham(void)
  413. {
  414. if (cpu_is_omap24xx()) {
  415. sham_device.resource = omap2_sham_resources;
  416. sham_device.num_resources = omap2_sham_resources_sz;
  417. } else if (cpu_is_omap34xx()) {
  418. sham_device.resource = omap3_sham_resources;
  419. sham_device.num_resources = omap3_sham_resources_sz;
  420. } else {
  421. pr_err("%s: platform not supported\n", __func__);
  422. return;
  423. }
  424. platform_device_register(&sham_device);
  425. }
  426. #else
  427. static inline void omap_init_sham(void) { }
  428. #endif
  429. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  430. #ifdef CONFIG_ARCH_OMAP2
  431. static struct resource omap2_aes_resources[] = {
  432. {
  433. .start = OMAP24XX_SEC_AES_BASE,
  434. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  435. .flags = IORESOURCE_MEM,
  436. },
  437. {
  438. .start = OMAP24XX_DMA_AES_TX,
  439. .flags = IORESOURCE_DMA,
  440. },
  441. {
  442. .start = OMAP24XX_DMA_AES_RX,
  443. .flags = IORESOURCE_DMA,
  444. }
  445. };
  446. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  447. #else
  448. #define omap2_aes_resources NULL
  449. #define omap2_aes_resources_sz 0
  450. #endif
  451. #ifdef CONFIG_ARCH_OMAP3
  452. static struct resource omap3_aes_resources[] = {
  453. {
  454. .start = OMAP34XX_SEC_AES_BASE,
  455. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  456. .flags = IORESOURCE_MEM,
  457. },
  458. {
  459. .start = OMAP34XX_DMA_AES2_TX,
  460. .flags = IORESOURCE_DMA,
  461. },
  462. {
  463. .start = OMAP34XX_DMA_AES2_RX,
  464. .flags = IORESOURCE_DMA,
  465. }
  466. };
  467. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  468. #else
  469. #define omap3_aes_resources NULL
  470. #define omap3_aes_resources_sz 0
  471. #endif
  472. static struct platform_device aes_device = {
  473. .name = "omap-aes",
  474. .id = -1,
  475. };
  476. static void omap_init_aes(void)
  477. {
  478. if (cpu_is_omap24xx()) {
  479. aes_device.resource = omap2_aes_resources;
  480. aes_device.num_resources = omap2_aes_resources_sz;
  481. } else if (cpu_is_omap34xx()) {
  482. aes_device.resource = omap3_aes_resources;
  483. aes_device.num_resources = omap3_aes_resources_sz;
  484. } else {
  485. pr_err("%s: platform not supported\n", __func__);
  486. return;
  487. }
  488. platform_device_register(&aes_device);
  489. }
  490. #else
  491. static inline void omap_init_aes(void) { }
  492. #endif
  493. /*-------------------------------------------------------------------------*/
  494. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  495. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  496. *mmc_controller)
  497. {
  498. if ((mmc_controller->slots[0].switch_pin > 0) && \
  499. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  500. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  501. OMAP_PIN_INPUT_PULLUP);
  502. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  503. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  504. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  505. OMAP_PIN_INPUT_PULLUP);
  506. omap_mux_init_signal("sdmmc_cmd", 0);
  507. omap_mux_init_signal("sdmmc_clki", 0);
  508. omap_mux_init_signal("sdmmc_clko", 0);
  509. omap_mux_init_signal("sdmmc_dat0", 0);
  510. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  511. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  512. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  513. omap_mux_init_signal("sdmmc_dat1", 0);
  514. omap_mux_init_signal("sdmmc_dat2", 0);
  515. omap_mux_init_signal("sdmmc_dat3", 0);
  516. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  517. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  518. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  519. }
  520. /*
  521. * Use internal loop-back in MMC/SDIO Module Input Clock
  522. * selection
  523. */
  524. if (mmc_controller->slots[0].internal_clock) {
  525. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  526. v |= (1 << 24);
  527. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  528. }
  529. }
  530. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  531. {
  532. char *name = "mmci-omap";
  533. if (!mmc_data[0]) {
  534. pr_err("%s fails: Incomplete platform data\n", __func__);
  535. return;
  536. }
  537. omap242x_mmc_mux(mmc_data[0]);
  538. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  539. INT_24XX_MMC_IRQ, mmc_data[0]);
  540. }
  541. #endif
  542. /*-------------------------------------------------------------------------*/
  543. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  544. #define OMAP_HDQ_BASE 0x480B2000
  545. static struct resource omap_hdq_resources[] = {
  546. {
  547. .start = OMAP_HDQ_BASE,
  548. .end = OMAP_HDQ_BASE + 0x1C,
  549. .flags = IORESOURCE_MEM,
  550. },
  551. {
  552. .start = INT_24XX_HDQ_IRQ,
  553. .flags = IORESOURCE_IRQ,
  554. },
  555. };
  556. static struct platform_device omap_hdq_dev = {
  557. .name = "omap_hdq",
  558. .id = 0,
  559. .dev = {
  560. .platform_data = NULL,
  561. },
  562. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  563. .resource = omap_hdq_resources,
  564. };
  565. static inline void omap_hdq_init(void)
  566. {
  567. if (cpu_is_omap2420())
  568. return;
  569. platform_device_register(&omap_hdq_dev);
  570. }
  571. #else
  572. static inline void omap_hdq_init(void) {}
  573. #endif
  574. /*---------------------------------------------------------------------------*/
  575. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  576. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  577. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  578. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  579. };
  580. #else
  581. static struct resource omap_vout_resource[2] = {
  582. };
  583. #endif
  584. static struct platform_device omap_vout_device = {
  585. .name = "omap_vout",
  586. .num_resources = ARRAY_SIZE(omap_vout_resource),
  587. .resource = &omap_vout_resource[0],
  588. .id = -1,
  589. };
  590. static void omap_init_vout(void)
  591. {
  592. if (platform_device_register(&omap_vout_device) < 0)
  593. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  594. }
  595. #else
  596. static inline void omap_init_vout(void) {}
  597. #endif
  598. /*-------------------------------------------------------------------------*/
  599. static int __init omap2_init_devices(void)
  600. {
  601. /*
  602. * please keep these calls, and their implementations above,
  603. * in alphabetical order so they're easier to sort through.
  604. */
  605. omap_init_audio();
  606. omap_init_mcpdm();
  607. omap_init_dmic();
  608. omap_init_camera();
  609. omap_init_mbox();
  610. omap_init_mcspi();
  611. omap_init_pmu();
  612. omap_hdq_init();
  613. omap_init_sti();
  614. omap_init_sham();
  615. omap_init_aes();
  616. omap_init_vout();
  617. return 0;
  618. }
  619. arch_initcall(omap2_init_devices);
  620. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  621. static int __init omap_init_wdt(void)
  622. {
  623. int id = -1;
  624. struct platform_device *pdev;
  625. struct omap_hwmod *oh;
  626. char *oh_name = "wd_timer2";
  627. char *dev_name = "omap_wdt";
  628. if (!cpu_class_is_omap2())
  629. return 0;
  630. oh = omap_hwmod_lookup(oh_name);
  631. if (!oh) {
  632. pr_err("Could not look up wd_timer%d hwmod\n", id);
  633. return -EINVAL;
  634. }
  635. pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
  636. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
  637. dev_name, oh->name);
  638. return 0;
  639. }
  640. subsys_initcall(omap_init_wdt);
  641. #endif