board-3430sdp.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/board.h>
  32. #include <plat/usb.h>
  33. #include "common.h"
  34. #include <plat/dma.h>
  35. #include <plat/gpmc.h>
  36. #include <video/omapdss.h>
  37. #include <video/omap-panel-dvi.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static struct gpio sdp3430_dss_gpios[] __initdata = {
  98. {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
  99. {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
  100. };
  101. static int lcd_enabled;
  102. static int dvi_enabled;
  103. static void __init sdp3430_display_init(void)
  104. {
  105. int r;
  106. r = gpio_request_array(sdp3430_dss_gpios,
  107. ARRAY_SIZE(sdp3430_dss_gpios));
  108. if (r)
  109. printk(KERN_ERR "failed to get LCD control GPIOs\n");
  110. }
  111. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  112. {
  113. if (dvi_enabled) {
  114. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  115. return -EINVAL;
  116. }
  117. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
  118. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
  119. lcd_enabled = 1;
  120. return 0;
  121. }
  122. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  123. {
  124. lcd_enabled = 0;
  125. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
  126. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
  127. }
  128. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  129. {
  130. if (lcd_enabled) {
  131. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  132. return -EINVAL;
  133. }
  134. dvi_enabled = 1;
  135. return 0;
  136. }
  137. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  138. {
  139. dvi_enabled = 0;
  140. }
  141. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  142. {
  143. return 0;
  144. }
  145. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  146. {
  147. }
  148. static struct omap_dss_device sdp3430_lcd_device = {
  149. .name = "lcd",
  150. .driver_name = "sharp_ls_panel",
  151. .type = OMAP_DISPLAY_TYPE_DPI,
  152. .phy.dpi.data_lines = 16,
  153. .platform_enable = sdp3430_panel_enable_lcd,
  154. .platform_disable = sdp3430_panel_disable_lcd,
  155. };
  156. static struct panel_dvi_platform_data dvi_panel = {
  157. .platform_enable = sdp3430_panel_enable_dvi,
  158. .platform_disable = sdp3430_panel_disable_dvi,
  159. };
  160. static struct omap_dss_device sdp3430_dvi_device = {
  161. .name = "dvi",
  162. .type = OMAP_DISPLAY_TYPE_DPI,
  163. .driver_name = "dvi",
  164. .data = &dvi_panel,
  165. .phy.dpi.data_lines = 24,
  166. };
  167. static struct omap_dss_device sdp3430_tv_device = {
  168. .name = "tv",
  169. .driver_name = "venc",
  170. .type = OMAP_DISPLAY_TYPE_VENC,
  171. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  172. .platform_enable = sdp3430_panel_enable_tv,
  173. .platform_disable = sdp3430_panel_disable_tv,
  174. };
  175. static struct omap_dss_device *sdp3430_dss_devices[] = {
  176. &sdp3430_lcd_device,
  177. &sdp3430_dvi_device,
  178. &sdp3430_tv_device,
  179. };
  180. static struct omap_dss_board_info sdp3430_dss_data = {
  181. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  182. .devices = sdp3430_dss_devices,
  183. .default_device = &sdp3430_lcd_device,
  184. };
  185. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  186. };
  187. static struct omap2_hsmmc_info mmc[] = {
  188. {
  189. .mmc = 1,
  190. /* 8 bits (default) requires S6.3 == ON,
  191. * so the SIM card isn't used; else 4 bits.
  192. */
  193. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  194. .gpio_wp = 4,
  195. .deferred = true,
  196. },
  197. {
  198. .mmc = 2,
  199. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  200. .gpio_wp = 7,
  201. .deferred = true,
  202. },
  203. {} /* Terminator */
  204. };
  205. static int sdp3430_twl_gpio_setup(struct device *dev,
  206. unsigned gpio, unsigned ngpio)
  207. {
  208. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  209. * gpio + 1 is "mmc1_cd" (input/IRQ)
  210. */
  211. mmc[0].gpio_cd = gpio + 0;
  212. mmc[1].gpio_cd = gpio + 1;
  213. omap_hsmmc_late_init(mmc);
  214. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  215. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  216. /* gpio + 15 is "sub_lcd_nRST" (output) */
  217. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  218. return 0;
  219. }
  220. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  221. .gpio_base = OMAP_MAX_GPIO_LINES,
  222. .irq_base = TWL4030_GPIO_IRQ_BASE,
  223. .irq_end = TWL4030_GPIO_IRQ_END,
  224. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  225. | BIT(16) | BIT(17),
  226. .setup = sdp3430_twl_gpio_setup,
  227. };
  228. /* regulator consumer mappings */
  229. /* ads7846 on SPI */
  230. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  231. REGULATOR_SUPPLY("vcc", "spi1.0"),
  232. };
  233. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  234. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  235. };
  236. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  237. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  238. };
  239. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  240. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  241. };
  242. /*
  243. * Apply all the fixed voltages since most versions of U-Boot
  244. * don't bother with that initialization.
  245. */
  246. /* VAUX1 for mainboard (irda and sub-lcd) */
  247. static struct regulator_init_data sdp3430_vaux1 = {
  248. .constraints = {
  249. .min_uV = 2800000,
  250. .max_uV = 2800000,
  251. .apply_uV = true,
  252. .valid_modes_mask = REGULATOR_MODE_NORMAL
  253. | REGULATOR_MODE_STANDBY,
  254. .valid_ops_mask = REGULATOR_CHANGE_MODE
  255. | REGULATOR_CHANGE_STATUS,
  256. },
  257. };
  258. /* VAUX2 for camera module */
  259. static struct regulator_init_data sdp3430_vaux2 = {
  260. .constraints = {
  261. .min_uV = 2800000,
  262. .max_uV = 2800000,
  263. .apply_uV = true,
  264. .valid_modes_mask = REGULATOR_MODE_NORMAL
  265. | REGULATOR_MODE_STANDBY,
  266. .valid_ops_mask = REGULATOR_CHANGE_MODE
  267. | REGULATOR_CHANGE_STATUS,
  268. },
  269. };
  270. /* VAUX3 for LCD board */
  271. static struct regulator_init_data sdp3430_vaux3 = {
  272. .constraints = {
  273. .min_uV = 2800000,
  274. .max_uV = 2800000,
  275. .apply_uV = true,
  276. .valid_modes_mask = REGULATOR_MODE_NORMAL
  277. | REGULATOR_MODE_STANDBY,
  278. .valid_ops_mask = REGULATOR_CHANGE_MODE
  279. | REGULATOR_CHANGE_STATUS,
  280. },
  281. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  282. .consumer_supplies = sdp3430_vaux3_supplies,
  283. };
  284. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  285. static struct regulator_init_data sdp3430_vaux4 = {
  286. .constraints = {
  287. .min_uV = 1800000,
  288. .max_uV = 1800000,
  289. .apply_uV = true,
  290. .valid_modes_mask = REGULATOR_MODE_NORMAL
  291. | REGULATOR_MODE_STANDBY,
  292. .valid_ops_mask = REGULATOR_CHANGE_MODE
  293. | REGULATOR_CHANGE_STATUS,
  294. },
  295. };
  296. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  297. static struct regulator_init_data sdp3430_vmmc1 = {
  298. .constraints = {
  299. .min_uV = 1850000,
  300. .max_uV = 3150000,
  301. .valid_modes_mask = REGULATOR_MODE_NORMAL
  302. | REGULATOR_MODE_STANDBY,
  303. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  304. | REGULATOR_CHANGE_MODE
  305. | REGULATOR_CHANGE_STATUS,
  306. },
  307. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  308. .consumer_supplies = sdp3430_vmmc1_supplies,
  309. };
  310. /* VMMC2 for MMC2 card */
  311. static struct regulator_init_data sdp3430_vmmc2 = {
  312. .constraints = {
  313. .min_uV = 1850000,
  314. .max_uV = 1850000,
  315. .apply_uV = true,
  316. .valid_modes_mask = REGULATOR_MODE_NORMAL
  317. | REGULATOR_MODE_STANDBY,
  318. .valid_ops_mask = REGULATOR_CHANGE_MODE
  319. | REGULATOR_CHANGE_STATUS,
  320. },
  321. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  322. .consumer_supplies = sdp3430_vmmc2_supplies,
  323. };
  324. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  325. static struct regulator_init_data sdp3430_vsim = {
  326. .constraints = {
  327. .min_uV = 1800000,
  328. .max_uV = 3000000,
  329. .valid_modes_mask = REGULATOR_MODE_NORMAL
  330. | REGULATOR_MODE_STANDBY,
  331. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  332. | REGULATOR_CHANGE_MODE
  333. | REGULATOR_CHANGE_STATUS,
  334. },
  335. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  336. .consumer_supplies = sdp3430_vsim_supplies,
  337. };
  338. static struct twl4030_platform_data sdp3430_twldata = {
  339. /* platform_data for children goes here */
  340. .gpio = &sdp3430_gpio_data,
  341. .keypad = &sdp3430_kp_data,
  342. .vaux1 = &sdp3430_vaux1,
  343. .vaux2 = &sdp3430_vaux2,
  344. .vaux3 = &sdp3430_vaux3,
  345. .vaux4 = &sdp3430_vaux4,
  346. .vmmc1 = &sdp3430_vmmc1,
  347. .vmmc2 = &sdp3430_vmmc2,
  348. .vsim = &sdp3430_vsim,
  349. };
  350. static int __init omap3430_i2c_init(void)
  351. {
  352. /* i2c1 for PMIC only */
  353. omap3_pmic_get_config(&sdp3430_twldata,
  354. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  355. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  356. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  357. sdp3430_twldata.vdac->constraints.apply_uV = true;
  358. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  359. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  360. omap3_pmic_init("twl4030", &sdp3430_twldata);
  361. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  362. omap_register_i2c_bus(2, 400, NULL, 0);
  363. /* i2c3 on display connector (for DVI, tfp410) */
  364. omap_register_i2c_bus(3, 400, NULL, 0);
  365. return 0;
  366. }
  367. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  368. static struct omap_smc91x_platform_data board_smc91x_data = {
  369. .cs = 3,
  370. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  371. IORESOURCE_IRQ_LOWLEVEL,
  372. };
  373. static void __init board_smc91x_init(void)
  374. {
  375. if (omap_rev() > OMAP3430_REV_ES1_0)
  376. board_smc91x_data.gpio_irq = 6;
  377. else
  378. board_smc91x_data.gpio_irq = 29;
  379. gpmc_smc91x_init(&board_smc91x_data);
  380. }
  381. #else
  382. static inline void board_smc91x_init(void)
  383. {
  384. }
  385. #endif
  386. static void enable_board_wakeup_source(void)
  387. {
  388. /* T2 interrupt line (keypad) */
  389. omap_mux_init_signal("sys_nirq",
  390. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  391. }
  392. static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
  393. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  394. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  395. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  396. .phy_reset = true,
  397. .reset_gpio_port[0] = 57,
  398. .reset_gpio_port[1] = 61,
  399. .reset_gpio_port[2] = -EINVAL
  400. };
  401. #ifdef CONFIG_OMAP_MUX
  402. static struct omap_board_mux board_mux[] __initdata = {
  403. { .reg_offset = OMAP_MUX_TERMINATOR },
  404. };
  405. #else
  406. #define board_mux NULL
  407. #endif
  408. /*
  409. * SDP3430 V2 Board CS organization
  410. * Different from SDP3430 V1. Now 4 switches used to specify CS
  411. *
  412. * See also the Switch S8 settings in the comments.
  413. */
  414. static char chip_sel_3430[][GPMC_CS_NUM] = {
  415. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  416. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  417. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  418. };
  419. static struct mtd_partition sdp_nor_partitions[] = {
  420. /* bootloader (U-Boot, etc) in first sector */
  421. {
  422. .name = "Bootloader-NOR",
  423. .offset = 0,
  424. .size = SZ_256K,
  425. .mask_flags = MTD_WRITEABLE, /* force read-only */
  426. },
  427. /* bootloader params in the next sector */
  428. {
  429. .name = "Params-NOR",
  430. .offset = MTDPART_OFS_APPEND,
  431. .size = SZ_256K,
  432. .mask_flags = 0,
  433. },
  434. /* kernel */
  435. {
  436. .name = "Kernel-NOR",
  437. .offset = MTDPART_OFS_APPEND,
  438. .size = SZ_2M,
  439. .mask_flags = 0
  440. },
  441. /* file system */
  442. {
  443. .name = "Filesystem-NOR",
  444. .offset = MTDPART_OFS_APPEND,
  445. .size = MTDPART_SIZ_FULL,
  446. .mask_flags = 0
  447. }
  448. };
  449. static struct mtd_partition sdp_onenand_partitions[] = {
  450. {
  451. .name = "X-Loader-OneNAND",
  452. .offset = 0,
  453. .size = 4 * (64 * 2048),
  454. .mask_flags = MTD_WRITEABLE /* force read-only */
  455. },
  456. {
  457. .name = "U-Boot-OneNAND",
  458. .offset = MTDPART_OFS_APPEND,
  459. .size = 2 * (64 * 2048),
  460. .mask_flags = MTD_WRITEABLE /* force read-only */
  461. },
  462. {
  463. .name = "U-Boot Environment-OneNAND",
  464. .offset = MTDPART_OFS_APPEND,
  465. .size = 1 * (64 * 2048),
  466. },
  467. {
  468. .name = "Kernel-OneNAND",
  469. .offset = MTDPART_OFS_APPEND,
  470. .size = 16 * (64 * 2048),
  471. },
  472. {
  473. .name = "File System-OneNAND",
  474. .offset = MTDPART_OFS_APPEND,
  475. .size = MTDPART_SIZ_FULL,
  476. },
  477. };
  478. static struct mtd_partition sdp_nand_partitions[] = {
  479. /* All the partition sizes are listed in terms of NAND block size */
  480. {
  481. .name = "X-Loader-NAND",
  482. .offset = 0,
  483. .size = 4 * (64 * 2048),
  484. .mask_flags = MTD_WRITEABLE, /* force read-only */
  485. },
  486. {
  487. .name = "U-Boot-NAND",
  488. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  489. .size = 10 * (64 * 2048),
  490. .mask_flags = MTD_WRITEABLE, /* force read-only */
  491. },
  492. {
  493. .name = "Boot Env-NAND",
  494. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  495. .size = 6 * (64 * 2048),
  496. },
  497. {
  498. .name = "Kernel-NAND",
  499. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  500. .size = 40 * (64 * 2048),
  501. },
  502. {
  503. .name = "File System - NAND",
  504. .size = MTDPART_SIZ_FULL,
  505. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  506. },
  507. };
  508. static struct flash_partitions sdp_flash_partitions[] = {
  509. {
  510. .parts = sdp_nor_partitions,
  511. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  512. },
  513. {
  514. .parts = sdp_onenand_partitions,
  515. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  516. },
  517. {
  518. .parts = sdp_nand_partitions,
  519. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  520. },
  521. };
  522. static void __init omap_3430sdp_init(void)
  523. {
  524. int gpio_pendown;
  525. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  526. omap_board_config = sdp3430_config;
  527. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  528. omap_hsmmc_init(mmc);
  529. omap3430_i2c_init();
  530. omap_display_init(&sdp3430_dss_data);
  531. if (omap_rev() > OMAP3430_REV_ES1_0)
  532. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  533. else
  534. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  535. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  536. omap_serial_init();
  537. omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
  538. usb_musb_init(NULL);
  539. board_smc91x_init();
  540. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  541. sdp3430_display_init();
  542. enable_board_wakeup_source();
  543. usbhs_init(&usbhs_bdata);
  544. }
  545. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  546. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  547. .atag_offset = 0x100,
  548. .reserve = omap_reserve,
  549. .map_io = omap3_map_io,
  550. .init_early = omap3430_init_early,
  551. .init_irq = omap3_init_irq,
  552. .handle_irq = omap3_intc_handle_irq,
  553. .init_machine = omap_3430sdp_init,
  554. .timer = &omap3_timer,
  555. .restart = omap_prcm_restart,
  556. MACHINE_END