board-dm646x-evm.c 17 KB

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  1. /*
  2. * TI DaVinci DM646X EVM board
  3. *
  4. * Derived from: arch/arm/mach-davinci/board-evm.c
  5. * Copyright (C) 2006 Texas Instruments.
  6. *
  7. * (C) 2007-2008, MontaVista Software, Inc.
  8. *
  9. * This file is licensed under the terms of the GNU General Public License
  10. * version 2. This program is licensed "as is" without any warranty of any
  11. * kind, whether express or implied.
  12. *
  13. */
  14. /**************************************************************************
  15. * Included Files
  16. **************************************************************************/
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/leds.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/at24.h>
  24. #include <linux/i2c/pcf857x.h>
  25. #include <media/tvp514x.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/nand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/clk.h>
  30. #include <linux/export.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <mach/common.h>
  34. #include <mach/serial.h>
  35. #include <mach/i2c.h>
  36. #include <mach/nand.h>
  37. #include <mach/clock.h>
  38. #include <mach/cdce949.h>
  39. #include <mach/aemif.h>
  40. #include "davinci.h"
  41. #include "clock.h"
  42. #define NAND_BLOCK_SIZE SZ_128K
  43. /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
  44. * and U-Boot environment this avoids dependency on any particular combination
  45. * of UBL, U-Boot or flashing tools etc.
  46. */
  47. static struct mtd_partition davinci_nand_partitions[] = {
  48. {
  49. /* UBL, U-Boot with environment */
  50. .name = "bootloader",
  51. .offset = MTDPART_OFS_APPEND,
  52. .size = 16 * NAND_BLOCK_SIZE,
  53. .mask_flags = MTD_WRITEABLE, /* force read-only */
  54. }, {
  55. .name = "kernel",
  56. .offset = MTDPART_OFS_APPEND,
  57. .size = SZ_4M,
  58. .mask_flags = 0,
  59. }, {
  60. .name = "filesystem",
  61. .offset = MTDPART_OFS_APPEND,
  62. .size = MTDPART_SIZ_FULL,
  63. .mask_flags = 0,
  64. }
  65. };
  66. static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
  67. .wsetup = 29,
  68. .wstrobe = 24,
  69. .whold = 14,
  70. .rsetup = 19,
  71. .rstrobe = 33,
  72. .rhold = 0,
  73. .ta = 29,
  74. };
  75. static struct davinci_nand_pdata davinci_nand_data = {
  76. .mask_cle = 0x80000,
  77. .mask_ale = 0x40000,
  78. .parts = davinci_nand_partitions,
  79. .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
  80. .ecc_mode = NAND_ECC_HW,
  81. .options = 0,
  82. };
  83. static struct resource davinci_nand_resources[] = {
  84. {
  85. .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
  86. .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
  87. .flags = IORESOURCE_MEM,
  88. }, {
  89. .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
  90. .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
  91. .flags = IORESOURCE_MEM,
  92. },
  93. };
  94. static struct platform_device davinci_nand_device = {
  95. .name = "davinci_nand",
  96. .id = 0,
  97. .num_resources = ARRAY_SIZE(davinci_nand_resources),
  98. .resource = davinci_nand_resources,
  99. .dev = {
  100. .platform_data = &davinci_nand_data,
  101. },
  102. };
  103. #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
  104. defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
  105. #define HAS_ATA 1
  106. #else
  107. #define HAS_ATA 0
  108. #endif
  109. /* CPLD Register 0 bits to control ATA */
  110. #define DM646X_EVM_ATA_RST BIT(0)
  111. #define DM646X_EVM_ATA_PWD BIT(1)
  112. /* CPLD Register 0 Client: used for I/O Control */
  113. static int cpld_reg0_probe(struct i2c_client *client,
  114. const struct i2c_device_id *id)
  115. {
  116. if (HAS_ATA) {
  117. u8 data;
  118. struct i2c_msg msg[2] = {
  119. {
  120. .addr = client->addr,
  121. .flags = I2C_M_RD,
  122. .len = 1,
  123. .buf = &data,
  124. },
  125. {
  126. .addr = client->addr,
  127. .flags = 0,
  128. .len = 1,
  129. .buf = &data,
  130. },
  131. };
  132. /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
  133. i2c_transfer(client->adapter, msg, 1);
  134. data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
  135. i2c_transfer(client->adapter, msg + 1, 1);
  136. }
  137. return 0;
  138. }
  139. static const struct i2c_device_id cpld_reg_ids[] = {
  140. { "cpld_reg0", 0, },
  141. { },
  142. };
  143. static struct i2c_driver dm6467evm_cpld_driver = {
  144. .driver.name = "cpld_reg0",
  145. .id_table = cpld_reg_ids,
  146. .probe = cpld_reg0_probe,
  147. };
  148. /* LEDS */
  149. static struct gpio_led evm_leds[] = {
  150. { .name = "DS1", .active_low = 1, },
  151. { .name = "DS2", .active_low = 1, },
  152. { .name = "DS3", .active_low = 1, },
  153. { .name = "DS4", .active_low = 1, },
  154. };
  155. static const struct gpio_led_platform_data evm_led_data = {
  156. .num_leds = ARRAY_SIZE(evm_leds),
  157. .leds = evm_leds,
  158. };
  159. static struct platform_device *evm_led_dev;
  160. static int evm_led_setup(struct i2c_client *client, int gpio,
  161. unsigned int ngpio, void *c)
  162. {
  163. struct gpio_led *leds = evm_leds;
  164. int status;
  165. while (ngpio--) {
  166. leds->gpio = gpio++;
  167. leds++;
  168. };
  169. evm_led_dev = platform_device_alloc("leds-gpio", 0);
  170. platform_device_add_data(evm_led_dev, &evm_led_data,
  171. sizeof(evm_led_data));
  172. evm_led_dev->dev.parent = &client->dev;
  173. status = platform_device_add(evm_led_dev);
  174. if (status < 0) {
  175. platform_device_put(evm_led_dev);
  176. evm_led_dev = NULL;
  177. }
  178. return status;
  179. }
  180. static int evm_led_teardown(struct i2c_client *client, int gpio,
  181. unsigned ngpio, void *c)
  182. {
  183. if (evm_led_dev) {
  184. platform_device_unregister(evm_led_dev);
  185. evm_led_dev = NULL;
  186. }
  187. return 0;
  188. }
  189. static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
  190. static int evm_sw_setup(struct i2c_client *client, int gpio,
  191. unsigned ngpio, void *c)
  192. {
  193. int status;
  194. int i;
  195. char label[10];
  196. for (i = 0; i < 4; ++i) {
  197. snprintf(label, 10, "user_sw%d", i);
  198. status = gpio_request(gpio, label);
  199. if (status)
  200. goto out_free;
  201. evm_sw_gpio[i] = gpio++;
  202. status = gpio_direction_input(evm_sw_gpio[i]);
  203. if (status) {
  204. gpio_free(evm_sw_gpio[i]);
  205. evm_sw_gpio[i] = -EINVAL;
  206. goto out_free;
  207. }
  208. status = gpio_export(evm_sw_gpio[i], 0);
  209. if (status) {
  210. gpio_free(evm_sw_gpio[i]);
  211. evm_sw_gpio[i] = -EINVAL;
  212. goto out_free;
  213. }
  214. }
  215. return status;
  216. out_free:
  217. for (i = 0; i < 4; ++i) {
  218. if (evm_sw_gpio[i] != -EINVAL) {
  219. gpio_free(evm_sw_gpio[i]);
  220. evm_sw_gpio[i] = -EINVAL;
  221. }
  222. }
  223. return status;
  224. }
  225. static int evm_sw_teardown(struct i2c_client *client, int gpio,
  226. unsigned ngpio, void *c)
  227. {
  228. int i;
  229. for (i = 0; i < 4; ++i) {
  230. if (evm_sw_gpio[i] != -EINVAL) {
  231. gpio_unexport(evm_sw_gpio[i]);
  232. gpio_free(evm_sw_gpio[i]);
  233. evm_sw_gpio[i] = -EINVAL;
  234. }
  235. }
  236. return 0;
  237. }
  238. static int evm_pcf_setup(struct i2c_client *client, int gpio,
  239. unsigned int ngpio, void *c)
  240. {
  241. int status;
  242. if (ngpio < 8)
  243. return -EINVAL;
  244. status = evm_sw_setup(client, gpio, 4, c);
  245. if (status)
  246. return status;
  247. return evm_led_setup(client, gpio+4, 4, c);
  248. }
  249. static int evm_pcf_teardown(struct i2c_client *client, int gpio,
  250. unsigned int ngpio, void *c)
  251. {
  252. BUG_ON(ngpio < 8);
  253. evm_sw_teardown(client, gpio, 4, c);
  254. evm_led_teardown(client, gpio+4, 4, c);
  255. return 0;
  256. }
  257. static struct pcf857x_platform_data pcf_data = {
  258. .gpio_base = DAVINCI_N_GPIO+1,
  259. .setup = evm_pcf_setup,
  260. .teardown = evm_pcf_teardown,
  261. };
  262. /* Most of this EEPROM is unused, but U-Boot uses some data:
  263. * - 0x7f00, 6 bytes Ethernet Address
  264. * - ... newer boards may have more
  265. */
  266. static struct at24_platform_data eeprom_info = {
  267. .byte_len = (256*1024) / 8,
  268. .page_size = 64,
  269. .flags = AT24_FLAG_ADDR16,
  270. .setup = davinci_get_mac_addr,
  271. .context = (void *)0x7f00,
  272. };
  273. static u8 dm646x_iis_serializer_direction[] = {
  274. TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
  275. };
  276. static u8 dm646x_dit_serializer_direction[] = {
  277. TX_MODE,
  278. };
  279. static struct snd_platform_data dm646x_evm_snd_data[] = {
  280. {
  281. .tx_dma_offset = 0x400,
  282. .rx_dma_offset = 0x400,
  283. .op_mode = DAVINCI_MCASP_IIS_MODE,
  284. .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
  285. .tdm_slots = 2,
  286. .serial_dir = dm646x_iis_serializer_direction,
  287. .asp_chan_q = EVENTQ_0,
  288. },
  289. {
  290. .tx_dma_offset = 0x400,
  291. .rx_dma_offset = 0,
  292. .op_mode = DAVINCI_MCASP_DIT_MODE,
  293. .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
  294. .tdm_slots = 32,
  295. .serial_dir = dm646x_dit_serializer_direction,
  296. .asp_chan_q = EVENTQ_0,
  297. },
  298. };
  299. static struct i2c_client *cpld_client;
  300. static int cpld_video_probe(struct i2c_client *client,
  301. const struct i2c_device_id *id)
  302. {
  303. cpld_client = client;
  304. return 0;
  305. }
  306. static int __devexit cpld_video_remove(struct i2c_client *client)
  307. {
  308. cpld_client = NULL;
  309. return 0;
  310. }
  311. static const struct i2c_device_id cpld_video_id[] = {
  312. { "cpld_video", 0 },
  313. { }
  314. };
  315. static struct i2c_driver cpld_video_driver = {
  316. .driver = {
  317. .name = "cpld_video",
  318. },
  319. .probe = cpld_video_probe,
  320. .remove = cpld_video_remove,
  321. .id_table = cpld_video_id,
  322. };
  323. static void evm_init_cpld(void)
  324. {
  325. i2c_add_driver(&cpld_video_driver);
  326. }
  327. static struct i2c_board_info __initdata i2c_info[] = {
  328. {
  329. I2C_BOARD_INFO("24c256", 0x50),
  330. .platform_data = &eeprom_info,
  331. },
  332. {
  333. I2C_BOARD_INFO("pcf8574a", 0x38),
  334. .platform_data = &pcf_data,
  335. },
  336. {
  337. I2C_BOARD_INFO("cpld_reg0", 0x3a),
  338. },
  339. {
  340. I2C_BOARD_INFO("tlv320aic33", 0x18),
  341. },
  342. {
  343. I2C_BOARD_INFO("cpld_video", 0x3b),
  344. },
  345. {
  346. I2C_BOARD_INFO("cdce949", 0x6c),
  347. },
  348. };
  349. static struct davinci_i2c_platform_data i2c_pdata = {
  350. .bus_freq = 100 /* kHz */,
  351. .bus_delay = 0 /* usec */,
  352. };
  353. #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
  354. #define VCH2CLK_SYSCLK8 (BIT(9))
  355. #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
  356. #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
  357. #define VCH3CLK_SYSCLK8 (BIT(13))
  358. #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
  359. #define VIDCH2CLK (BIT(10))
  360. #define VIDCH3CLK (BIT(11))
  361. #define VIDCH1CLK (BIT(4))
  362. #define TVP7002_INPUT (BIT(4))
  363. #define TVP5147_INPUT (~BIT(4))
  364. #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
  365. #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
  366. #define TVP5147_CH0 "tvp514x-0"
  367. #define TVP5147_CH1 "tvp514x-1"
  368. /* spin lock for updating above registers */
  369. static spinlock_t vpif_reg_lock;
  370. static int set_vpif_clock(int mux_mode, int hd)
  371. {
  372. unsigned long flags;
  373. unsigned int value;
  374. int val = 0;
  375. int err = 0;
  376. if (!cpld_client)
  377. return -ENXIO;
  378. /* disable the clock */
  379. spin_lock_irqsave(&vpif_reg_lock, flags);
  380. value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
  381. value |= (VIDCH3CLK | VIDCH2CLK);
  382. __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
  383. spin_unlock_irqrestore(&vpif_reg_lock, flags);
  384. val = i2c_smbus_read_byte(cpld_client);
  385. if (val < 0)
  386. return val;
  387. if (mux_mode == 1)
  388. val &= ~0x40;
  389. else
  390. val |= 0x40;
  391. err = i2c_smbus_write_byte(cpld_client, val);
  392. if (err)
  393. return err;
  394. value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
  395. value &= ~(VCH2CLK_MASK);
  396. value &= ~(VCH3CLK_MASK);
  397. if (hd >= 1)
  398. value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
  399. else
  400. value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
  401. __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
  402. spin_lock_irqsave(&vpif_reg_lock, flags);
  403. value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
  404. /* enable the clock */
  405. value &= ~(VIDCH3CLK | VIDCH2CLK);
  406. __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
  407. spin_unlock_irqrestore(&vpif_reg_lock, flags);
  408. return 0;
  409. }
  410. static struct vpif_subdev_info dm646x_vpif_subdev[] = {
  411. {
  412. .name = "adv7343",
  413. .board_info = {
  414. I2C_BOARD_INFO("adv7343", 0x2a),
  415. },
  416. },
  417. {
  418. .name = "ths7303",
  419. .board_info = {
  420. I2C_BOARD_INFO("ths7303", 0x2c),
  421. },
  422. },
  423. };
  424. static const char *output[] = {
  425. "Composite",
  426. "Component",
  427. "S-Video",
  428. };
  429. static struct vpif_display_config dm646x_vpif_display_config = {
  430. .set_clock = set_vpif_clock,
  431. .subdevinfo = dm646x_vpif_subdev,
  432. .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
  433. .output = output,
  434. .output_count = ARRAY_SIZE(output),
  435. .card_name = "DM646x EVM",
  436. };
  437. /**
  438. * setup_vpif_input_path()
  439. * @channel: channel id (0 - CH0, 1 - CH1)
  440. * @sub_dev_name: ptr sub device name
  441. *
  442. * This will set vpif input to capture data from tvp514x or
  443. * tvp7002.
  444. */
  445. static int setup_vpif_input_path(int channel, const char *sub_dev_name)
  446. {
  447. int err = 0;
  448. int val;
  449. /* for channel 1, we don't do anything */
  450. if (channel != 0)
  451. return 0;
  452. if (!cpld_client)
  453. return -ENXIO;
  454. val = i2c_smbus_read_byte(cpld_client);
  455. if (val < 0)
  456. return val;
  457. if (!strcmp(sub_dev_name, TVP5147_CH0) ||
  458. !strcmp(sub_dev_name, TVP5147_CH1))
  459. val &= TVP5147_INPUT;
  460. else
  461. val |= TVP7002_INPUT;
  462. err = i2c_smbus_write_byte(cpld_client, val);
  463. if (err)
  464. return err;
  465. return 0;
  466. }
  467. /**
  468. * setup_vpif_input_channel_mode()
  469. * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
  470. *
  471. * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
  472. */
  473. static int setup_vpif_input_channel_mode(int mux_mode)
  474. {
  475. unsigned long flags;
  476. int err = 0;
  477. int val;
  478. u32 value;
  479. if (!cpld_client)
  480. return -ENXIO;
  481. val = i2c_smbus_read_byte(cpld_client);
  482. if (val < 0)
  483. return val;
  484. spin_lock_irqsave(&vpif_reg_lock, flags);
  485. value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
  486. if (mux_mode) {
  487. val &= VPIF_INPUT_TWO_CHANNEL;
  488. value |= VIDCH1CLK;
  489. } else {
  490. val |= VPIF_INPUT_ONE_CHANNEL;
  491. value &= ~VIDCH1CLK;
  492. }
  493. __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
  494. spin_unlock_irqrestore(&vpif_reg_lock, flags);
  495. err = i2c_smbus_write_byte(cpld_client, val);
  496. if (err)
  497. return err;
  498. return 0;
  499. }
  500. static struct tvp514x_platform_data tvp5146_pdata = {
  501. .clk_polarity = 0,
  502. .hs_polarity = 1,
  503. .vs_polarity = 1
  504. };
  505. #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
  506. static struct vpif_subdev_info vpif_capture_sdev_info[] = {
  507. {
  508. .name = TVP5147_CH0,
  509. .board_info = {
  510. I2C_BOARD_INFO("tvp5146", 0x5d),
  511. .platform_data = &tvp5146_pdata,
  512. },
  513. .input = INPUT_CVBS_VI2B,
  514. .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
  515. .can_route = 1,
  516. .vpif_if = {
  517. .if_type = VPIF_IF_BT656,
  518. .hd_pol = 1,
  519. .vd_pol = 1,
  520. .fid_pol = 0,
  521. },
  522. },
  523. {
  524. .name = TVP5147_CH1,
  525. .board_info = {
  526. I2C_BOARD_INFO("tvp5146", 0x5c),
  527. .platform_data = &tvp5146_pdata,
  528. },
  529. .input = INPUT_SVIDEO_VI2C_VI1C,
  530. .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
  531. .can_route = 1,
  532. .vpif_if = {
  533. .if_type = VPIF_IF_BT656,
  534. .hd_pol = 1,
  535. .vd_pol = 1,
  536. .fid_pol = 0,
  537. },
  538. },
  539. };
  540. static const struct vpif_input dm6467_ch0_inputs[] = {
  541. {
  542. .input = {
  543. .index = 0,
  544. .name = "Composite",
  545. .type = V4L2_INPUT_TYPE_CAMERA,
  546. .std = TVP514X_STD_ALL,
  547. },
  548. .subdev_name = TVP5147_CH0,
  549. },
  550. };
  551. static const struct vpif_input dm6467_ch1_inputs[] = {
  552. {
  553. .input = {
  554. .index = 0,
  555. .name = "S-Video",
  556. .type = V4L2_INPUT_TYPE_CAMERA,
  557. .std = TVP514X_STD_ALL,
  558. },
  559. .subdev_name = TVP5147_CH1,
  560. },
  561. };
  562. static struct vpif_capture_config dm646x_vpif_capture_cfg = {
  563. .setup_input_path = setup_vpif_input_path,
  564. .setup_input_channel_mode = setup_vpif_input_channel_mode,
  565. .subdev_info = vpif_capture_sdev_info,
  566. .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
  567. .chan_config[0] = {
  568. .inputs = dm6467_ch0_inputs,
  569. .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
  570. },
  571. .chan_config[1] = {
  572. .inputs = dm6467_ch1_inputs,
  573. .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
  574. },
  575. };
  576. static void __init evm_init_video(void)
  577. {
  578. spin_lock_init(&vpif_reg_lock);
  579. dm646x_setup_vpif(&dm646x_vpif_display_config,
  580. &dm646x_vpif_capture_cfg);
  581. }
  582. static void __init evm_init_i2c(void)
  583. {
  584. davinci_init_i2c(&i2c_pdata);
  585. i2c_add_driver(&dm6467evm_cpld_driver);
  586. i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
  587. evm_init_cpld();
  588. evm_init_video();
  589. }
  590. #define CDCE949_XIN_RATE 27000000
  591. /* CDCE949 support - "lpsc" field is overridden to work as clock number */
  592. static struct clk cdce_clk_in = {
  593. .name = "cdce_xin",
  594. .rate = CDCE949_XIN_RATE,
  595. };
  596. static struct clk_lookup cdce_clks[] = {
  597. CLK(NULL, "xin", &cdce_clk_in),
  598. CLK(NULL, NULL, NULL),
  599. };
  600. static void __init cdce_clk_init(void)
  601. {
  602. struct clk_lookup *c;
  603. struct clk *clk;
  604. for (c = cdce_clks; c->clk; c++) {
  605. clk = c->clk;
  606. clkdev_add(c);
  607. clk_register(clk);
  608. }
  609. }
  610. #define DM6467T_EVM_REF_FREQ 33000000
  611. static void __init davinci_map_io(void)
  612. {
  613. dm646x_init();
  614. if (machine_is_davinci_dm6467tevm())
  615. davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
  616. cdce_clk_init();
  617. }
  618. static struct davinci_uart_config uart_config __initdata = {
  619. .enabled_uarts = (1 << 0),
  620. };
  621. #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
  622. /*
  623. * The following EDMA channels/slots are not being used by drivers (for
  624. * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
  625. * reserved for codecs on the DSP side.
  626. */
  627. static const s16 dm646x_dma_rsv_chans[][2] = {
  628. /* (offset, number) */
  629. { 0, 4},
  630. {13, 3},
  631. {24, 4},
  632. {30, 2},
  633. {54, 3},
  634. {-1, -1}
  635. };
  636. static const s16 dm646x_dma_rsv_slots[][2] = {
  637. /* (offset, number) */
  638. { 0, 4},
  639. {13, 3},
  640. {24, 4},
  641. {30, 2},
  642. {54, 3},
  643. {128, 384},
  644. {-1, -1}
  645. };
  646. static struct edma_rsv_info dm646x_edma_rsv[] = {
  647. {
  648. .rsv_chans = dm646x_dma_rsv_chans,
  649. .rsv_slots = dm646x_dma_rsv_slots,
  650. },
  651. };
  652. static __init void evm_init(void)
  653. {
  654. struct davinci_soc_info *soc_info = &davinci_soc_info;
  655. evm_init_i2c();
  656. davinci_serial_init(&uart_config);
  657. dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
  658. dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
  659. if (machine_is_davinci_dm6467tevm())
  660. davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
  661. platform_device_register(&davinci_nand_device);
  662. dm646x_init_edma(dm646x_edma_rsv);
  663. if (HAS_ATA)
  664. davinci_init_ide();
  665. soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
  666. }
  667. MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
  668. .atag_offset = 0x100,
  669. .map_io = davinci_map_io,
  670. .init_irq = davinci_irq_init,
  671. .timer = &davinci_timer,
  672. .init_machine = evm_init,
  673. .dma_zone_size = SZ_128M,
  674. .restart = davinci_restart,
  675. MACHINE_END
  676. MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
  677. .atag_offset = 0x100,
  678. .map_io = davinci_map_io,
  679. .init_irq = davinci_irq_init,
  680. .timer = &davinci_timer,
  681. .init_machine = evm_init,
  682. .dma_zone_size = SZ_128M,
  683. .restart = davinci_restart,
  684. MACHINE_END