mxser.c 69 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/smp_lock.h>
  26. #include <linux/timer.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/tty.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_reg.h>
  32. #include <linux/major.h>
  33. #include <linux/string.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/ptrace.h>
  36. #include <linux/gfp.h>
  37. #include <linux/ioport.h>
  38. #include <linux/mm.h>
  39. #include <linux/delay.h>
  40. #include <linux/pci.h>
  41. #include <linux/bitops.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/uaccess.h>
  46. #include "mxser.h"
  47. #define MXSER_VERSION "2.0.5" /* 1.14 */
  48. #define MXSERMAJOR 174
  49. #define MXSER_BOARDS 4 /* Max. boards */
  50. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  51. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  52. #define MXSER_ISR_PASS_LIMIT 100
  53. /*CheckIsMoxaMust return value*/
  54. #define MOXA_OTHER_UART 0x00
  55. #define MOXA_MUST_MU150_HWID 0x01
  56. #define MOXA_MUST_MU860_HWID 0x02
  57. #define WAKEUP_CHARS 256
  58. #define UART_MCR_AFE 0x20
  59. #define UART_LSR_SPECIAL 0x1E
  60. #define PCI_DEVICE_ID_POS104UL 0x1044
  61. #define PCI_DEVICE_ID_CB108 0x1080
  62. #define PCI_DEVICE_ID_CP102UF 0x1023
  63. #define PCI_DEVICE_ID_CP112UL 0x1120
  64. #define PCI_DEVICE_ID_CB114 0x1142
  65. #define PCI_DEVICE_ID_CP114UL 0x1143
  66. #define PCI_DEVICE_ID_CB134I 0x1341
  67. #define PCI_DEVICE_ID_CP138U 0x1380
  68. #define C168_ASIC_ID 1
  69. #define C104_ASIC_ID 2
  70. #define C102_ASIC_ID 0xB
  71. #define CI132_ASIC_ID 4
  72. #define CI134_ASIC_ID 3
  73. #define CI104J_ASIC_ID 5
  74. #define MXSER_HIGHBAUD 1
  75. #define MXSER_HAS2 2
  76. /* This is only for PCI */
  77. static const struct {
  78. int type;
  79. int tx_fifo;
  80. int rx_fifo;
  81. int xmit_fifo_size;
  82. int rx_high_water;
  83. int rx_trigger;
  84. int rx_low_water;
  85. long max_baud;
  86. } Gpci_uart_info[] = {
  87. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  88. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  89. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  90. };
  91. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  92. struct mxser_cardinfo {
  93. char *name;
  94. unsigned int nports;
  95. unsigned int flags;
  96. };
  97. static const struct mxser_cardinfo mxser_cards[] = {
  98. /* 0*/ { "C168 series", 8, },
  99. { "C104 series", 4, },
  100. { "CI-104J series", 4, },
  101. { "C168H/PCI series", 8, },
  102. { "C104H/PCI series", 4, },
  103. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  104. { "CI-132 series", 4, MXSER_HAS2 },
  105. { "CI-134 series", 4, },
  106. { "CP-132 series", 2, },
  107. { "CP-114 series", 4, },
  108. /*10*/ { "CT-114 series", 4, },
  109. { "CP-102 series", 2, MXSER_HIGHBAUD },
  110. { "CP-104U series", 4, },
  111. { "CP-168U series", 8, },
  112. { "CP-132U series", 2, },
  113. /*15*/ { "CP-134U series", 4, },
  114. { "CP-104JU series", 4, },
  115. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  116. { "CP-118U series", 8, },
  117. { "CP-102UL series", 2, },
  118. /*20*/ { "CP-102U series", 2, },
  119. { "CP-118EL series", 8, },
  120. { "CP-168EL series", 8, },
  121. { "CP-104EL series", 4, },
  122. { "CB-108 series", 8, },
  123. /*25*/ { "CB-114 series", 4, },
  124. { "CB-134I series", 4, },
  125. { "CP-138U series", 8, },
  126. { "POS-104UL series", 4, },
  127. { "CP-114UL series", 4, },
  128. /*30*/ { "CP-102UF series", 2, },
  129. { "CP-112UL series", 2, },
  130. };
  131. /* driver_data correspond to the lines in the structure above
  132. see also ISA probe function before you change something */
  133. static struct pci_device_id mxser_pcibrds[] = {
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  159. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
  160. { }
  161. };
  162. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  163. static unsigned long ioaddr[MXSER_BOARDS];
  164. static int ttymajor = MXSERMAJOR;
  165. /* Variables for insmod */
  166. MODULE_AUTHOR("Casper Yang");
  167. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  168. module_param_array(ioaddr, ulong, NULL, 0);
  169. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  170. module_param(ttymajor, int, 0);
  171. MODULE_LICENSE("GPL");
  172. struct mxser_log {
  173. int tick;
  174. unsigned long rxcnt[MXSER_PORTS];
  175. unsigned long txcnt[MXSER_PORTS];
  176. };
  177. struct mxser_mon {
  178. unsigned long rxcnt;
  179. unsigned long txcnt;
  180. unsigned long up_rxcnt;
  181. unsigned long up_txcnt;
  182. int modem_status;
  183. unsigned char hold_reason;
  184. };
  185. struct mxser_mon_ext {
  186. unsigned long rx_cnt[32];
  187. unsigned long tx_cnt[32];
  188. unsigned long up_rxcnt[32];
  189. unsigned long up_txcnt[32];
  190. int modem_status[32];
  191. long baudrate[32];
  192. int databits[32];
  193. int stopbits[32];
  194. int parity[32];
  195. int flowctrl[32];
  196. int fifo[32];
  197. int iftype[32];
  198. };
  199. struct mxser_board;
  200. struct mxser_port {
  201. struct tty_port port;
  202. struct mxser_board *board;
  203. unsigned long ioaddr;
  204. unsigned long opmode_ioaddr;
  205. int max_baud;
  206. int rx_high_water;
  207. int rx_trigger; /* Rx fifo trigger level */
  208. int rx_low_water;
  209. int baud_base; /* max. speed */
  210. int type; /* UART type */
  211. int x_char; /* xon/xoff character */
  212. int IER; /* Interrupt Enable Register */
  213. int MCR; /* Modem control register */
  214. unsigned char stop_rx;
  215. unsigned char ldisc_stop_rx;
  216. int custom_divisor;
  217. unsigned char err_shadow;
  218. struct async_icount icount; /* kernel counters for 4 input interrupts */
  219. int timeout;
  220. int read_status_mask;
  221. int ignore_status_mask;
  222. int xmit_fifo_size;
  223. int xmit_head;
  224. int xmit_tail;
  225. int xmit_cnt;
  226. struct ktermios normal_termios;
  227. struct mxser_mon mon_data;
  228. spinlock_t slock;
  229. };
  230. struct mxser_board {
  231. unsigned int idx;
  232. int irq;
  233. const struct mxser_cardinfo *info;
  234. unsigned long vector;
  235. unsigned long vector_mask;
  236. int chip_flag;
  237. int uart_type;
  238. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  239. };
  240. struct mxser_mstatus {
  241. tcflag_t cflag;
  242. int cts;
  243. int dsr;
  244. int ri;
  245. int dcd;
  246. };
  247. static struct mxser_board mxser_boards[MXSER_BOARDS];
  248. static struct tty_driver *mxvar_sdriver;
  249. static struct mxser_log mxvar_log;
  250. static int mxser_set_baud_method[MXSER_PORTS + 1];
  251. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  252. {
  253. u8 oldlcr;
  254. u8 efr;
  255. oldlcr = inb(baseio + UART_LCR);
  256. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  257. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  258. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  259. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  260. outb(oldlcr, baseio + UART_LCR);
  261. }
  262. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  263. {
  264. u8 oldlcr;
  265. u8 efr;
  266. oldlcr = inb(baseio + UART_LCR);
  267. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  268. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  269. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  270. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  271. outb(oldlcr, baseio + UART_LCR);
  272. }
  273. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  274. {
  275. u8 oldlcr;
  276. u8 efr;
  277. oldlcr = inb(baseio + UART_LCR);
  278. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  279. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  280. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  281. efr |= MOXA_MUST_EFR_BANK0;
  282. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  283. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  284. outb(oldlcr, baseio + UART_LCR);
  285. }
  286. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  287. {
  288. u8 oldlcr;
  289. u8 efr;
  290. oldlcr = inb(baseio + UART_LCR);
  291. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  292. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  293. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  294. efr |= MOXA_MUST_EFR_BANK0;
  295. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  296. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  297. outb(oldlcr, baseio + UART_LCR);
  298. }
  299. static void mxser_set_must_fifo_value(struct mxser_port *info)
  300. {
  301. u8 oldlcr;
  302. u8 efr;
  303. oldlcr = inb(info->ioaddr + UART_LCR);
  304. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  305. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  306. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  307. efr |= MOXA_MUST_EFR_BANK1;
  308. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  309. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  310. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  311. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  312. outb(oldlcr, info->ioaddr + UART_LCR);
  313. }
  314. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  315. {
  316. u8 oldlcr;
  317. u8 efr;
  318. oldlcr = inb(baseio + UART_LCR);
  319. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  320. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  321. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  322. efr |= MOXA_MUST_EFR_BANK2;
  323. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  324. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  325. outb(oldlcr, baseio + UART_LCR);
  326. }
  327. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  328. {
  329. u8 oldlcr;
  330. u8 efr;
  331. oldlcr = inb(baseio + UART_LCR);
  332. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  333. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  334. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  335. efr |= MOXA_MUST_EFR_BANK2;
  336. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  337. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  338. outb(oldlcr, baseio + UART_LCR);
  339. }
  340. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  341. {
  342. u8 oldlcr;
  343. u8 efr;
  344. oldlcr = inb(baseio + UART_LCR);
  345. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  346. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  347. efr &= ~MOXA_MUST_EFR_SF_MASK;
  348. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  349. outb(oldlcr, baseio + UART_LCR);
  350. }
  351. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  352. {
  353. u8 oldlcr;
  354. u8 efr;
  355. oldlcr = inb(baseio + UART_LCR);
  356. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  357. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  358. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  359. efr |= MOXA_MUST_EFR_SF_TX1;
  360. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  361. outb(oldlcr, baseio + UART_LCR);
  362. }
  363. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  364. {
  365. u8 oldlcr;
  366. u8 efr;
  367. oldlcr = inb(baseio + UART_LCR);
  368. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  369. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  370. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  371. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  372. outb(oldlcr, baseio + UART_LCR);
  373. }
  374. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  375. {
  376. u8 oldlcr;
  377. u8 efr;
  378. oldlcr = inb(baseio + UART_LCR);
  379. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  380. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  381. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  382. efr |= MOXA_MUST_EFR_SF_RX1;
  383. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  384. outb(oldlcr, baseio + UART_LCR);
  385. }
  386. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  387. {
  388. u8 oldlcr;
  389. u8 efr;
  390. oldlcr = inb(baseio + UART_LCR);
  391. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  392. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  393. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  394. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  395. outb(oldlcr, baseio + UART_LCR);
  396. }
  397. #ifdef CONFIG_PCI
  398. static int __devinit CheckIsMoxaMust(unsigned long io)
  399. {
  400. u8 oldmcr, hwid;
  401. int i;
  402. outb(0, io + UART_LCR);
  403. mxser_disable_must_enchance_mode(io);
  404. oldmcr = inb(io + UART_MCR);
  405. outb(0, io + UART_MCR);
  406. mxser_set_must_xon1_value(io, 0x11);
  407. if ((hwid = inb(io + UART_MCR)) != 0) {
  408. outb(oldmcr, io + UART_MCR);
  409. return MOXA_OTHER_UART;
  410. }
  411. mxser_get_must_hardware_id(io, &hwid);
  412. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  413. if (hwid == Gpci_uart_info[i].type)
  414. return (int)hwid;
  415. }
  416. return MOXA_OTHER_UART;
  417. }
  418. #endif
  419. static void process_txrx_fifo(struct mxser_port *info)
  420. {
  421. int i;
  422. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  423. info->rx_trigger = 1;
  424. info->rx_high_water = 1;
  425. info->rx_low_water = 1;
  426. info->xmit_fifo_size = 1;
  427. } else
  428. for (i = 0; i < UART_INFO_NUM; i++)
  429. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  430. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  431. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  432. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  433. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  434. break;
  435. }
  436. }
  437. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  438. {
  439. static unsigned char mxser_msr[MXSER_PORTS + 1];
  440. unsigned char status = 0;
  441. status = inb(baseaddr + UART_MSR);
  442. mxser_msr[port] &= 0x0F;
  443. mxser_msr[port] |= status;
  444. status = mxser_msr[port];
  445. if (mode)
  446. mxser_msr[port] = 0;
  447. return status;
  448. }
  449. static int mxser_carrier_raised(struct tty_port *port)
  450. {
  451. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  452. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  453. }
  454. static void mxser_dtr_rts(struct tty_port *port, int on)
  455. {
  456. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  457. unsigned long flags;
  458. spin_lock_irqsave(&mp->slock, flags);
  459. if (on)
  460. outb(inb(mp->ioaddr + UART_MCR) |
  461. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  462. else
  463. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  464. mp->ioaddr + UART_MCR);
  465. spin_unlock_irqrestore(&mp->slock, flags);
  466. }
  467. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  468. {
  469. struct mxser_port *info = tty->driver_data;
  470. int quot = 0, baud;
  471. unsigned char cval;
  472. if (!info->ioaddr)
  473. return -1;
  474. if (newspd > info->max_baud)
  475. return -1;
  476. if (newspd == 134) {
  477. quot = 2 * info->baud_base / 269;
  478. tty_encode_baud_rate(tty, 134, 134);
  479. } else if (newspd) {
  480. quot = info->baud_base / newspd;
  481. if (quot == 0)
  482. quot = 1;
  483. baud = info->baud_base/quot;
  484. tty_encode_baud_rate(tty, baud, baud);
  485. } else {
  486. quot = 0;
  487. }
  488. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  489. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  490. if (quot) {
  491. info->MCR |= UART_MCR_DTR;
  492. outb(info->MCR, info->ioaddr + UART_MCR);
  493. } else {
  494. info->MCR &= ~UART_MCR_DTR;
  495. outb(info->MCR, info->ioaddr + UART_MCR);
  496. return 0;
  497. }
  498. cval = inb(info->ioaddr + UART_LCR);
  499. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  500. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  501. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  502. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  503. #ifdef BOTHER
  504. if (C_BAUD(tty) == BOTHER) {
  505. quot = info->baud_base % newspd;
  506. quot *= 8;
  507. if (quot % newspd > newspd / 2) {
  508. quot /= newspd;
  509. quot++;
  510. } else
  511. quot /= newspd;
  512. mxser_set_must_enum_value(info->ioaddr, quot);
  513. } else
  514. #endif
  515. mxser_set_must_enum_value(info->ioaddr, 0);
  516. return 0;
  517. }
  518. /*
  519. * This routine is called to set the UART divisor registers to match
  520. * the specified baud rate for a serial port.
  521. */
  522. static int mxser_change_speed(struct tty_struct *tty,
  523. struct ktermios *old_termios)
  524. {
  525. struct mxser_port *info = tty->driver_data;
  526. unsigned cflag, cval, fcr;
  527. int ret = 0;
  528. unsigned char status;
  529. cflag = tty->termios->c_cflag;
  530. if (!info->ioaddr)
  531. return ret;
  532. if (mxser_set_baud_method[tty->index] == 0)
  533. mxser_set_baud(tty, tty_get_baud_rate(tty));
  534. /* byte size and parity */
  535. switch (cflag & CSIZE) {
  536. case CS5:
  537. cval = 0x00;
  538. break;
  539. case CS6:
  540. cval = 0x01;
  541. break;
  542. case CS7:
  543. cval = 0x02;
  544. break;
  545. case CS8:
  546. cval = 0x03;
  547. break;
  548. default:
  549. cval = 0x00;
  550. break; /* too keep GCC shut... */
  551. }
  552. if (cflag & CSTOPB)
  553. cval |= 0x04;
  554. if (cflag & PARENB)
  555. cval |= UART_LCR_PARITY;
  556. if (!(cflag & PARODD))
  557. cval |= UART_LCR_EPAR;
  558. if (cflag & CMSPAR)
  559. cval |= UART_LCR_SPAR;
  560. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  561. if (info->board->chip_flag) {
  562. fcr = UART_FCR_ENABLE_FIFO;
  563. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  564. mxser_set_must_fifo_value(info);
  565. } else
  566. fcr = 0;
  567. } else {
  568. fcr = UART_FCR_ENABLE_FIFO;
  569. if (info->board->chip_flag) {
  570. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  571. mxser_set_must_fifo_value(info);
  572. } else {
  573. switch (info->rx_trigger) {
  574. case 1:
  575. fcr |= UART_FCR_TRIGGER_1;
  576. break;
  577. case 4:
  578. fcr |= UART_FCR_TRIGGER_4;
  579. break;
  580. case 8:
  581. fcr |= UART_FCR_TRIGGER_8;
  582. break;
  583. default:
  584. fcr |= UART_FCR_TRIGGER_14;
  585. break;
  586. }
  587. }
  588. }
  589. /* CTS flow control flag and modem status interrupts */
  590. info->IER &= ~UART_IER_MSI;
  591. info->MCR &= ~UART_MCR_AFE;
  592. if (cflag & CRTSCTS) {
  593. info->port.flags |= ASYNC_CTS_FLOW;
  594. info->IER |= UART_IER_MSI;
  595. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  596. info->MCR |= UART_MCR_AFE;
  597. } else {
  598. status = inb(info->ioaddr + UART_MSR);
  599. if (tty->hw_stopped) {
  600. if (status & UART_MSR_CTS) {
  601. tty->hw_stopped = 0;
  602. if (info->type != PORT_16550A &&
  603. !info->board->chip_flag) {
  604. outb(info->IER & ~UART_IER_THRI,
  605. info->ioaddr +
  606. UART_IER);
  607. info->IER |= UART_IER_THRI;
  608. outb(info->IER, info->ioaddr +
  609. UART_IER);
  610. }
  611. tty_wakeup(tty);
  612. }
  613. } else {
  614. if (!(status & UART_MSR_CTS)) {
  615. tty->hw_stopped = 1;
  616. if ((info->type != PORT_16550A) &&
  617. (!info->board->chip_flag)) {
  618. info->IER &= ~UART_IER_THRI;
  619. outb(info->IER, info->ioaddr +
  620. UART_IER);
  621. }
  622. }
  623. }
  624. }
  625. } else {
  626. info->port.flags &= ~ASYNC_CTS_FLOW;
  627. }
  628. outb(info->MCR, info->ioaddr + UART_MCR);
  629. if (cflag & CLOCAL) {
  630. info->port.flags &= ~ASYNC_CHECK_CD;
  631. } else {
  632. info->port.flags |= ASYNC_CHECK_CD;
  633. info->IER |= UART_IER_MSI;
  634. }
  635. outb(info->IER, info->ioaddr + UART_IER);
  636. /*
  637. * Set up parity check flag
  638. */
  639. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  640. if (I_INPCK(tty))
  641. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  642. if (I_BRKINT(tty) || I_PARMRK(tty))
  643. info->read_status_mask |= UART_LSR_BI;
  644. info->ignore_status_mask = 0;
  645. if (I_IGNBRK(tty)) {
  646. info->ignore_status_mask |= UART_LSR_BI;
  647. info->read_status_mask |= UART_LSR_BI;
  648. /*
  649. * If we're ignore parity and break indicators, ignore
  650. * overruns too. (For real raw support).
  651. */
  652. if (I_IGNPAR(tty)) {
  653. info->ignore_status_mask |=
  654. UART_LSR_OE |
  655. UART_LSR_PE |
  656. UART_LSR_FE;
  657. info->read_status_mask |=
  658. UART_LSR_OE |
  659. UART_LSR_PE |
  660. UART_LSR_FE;
  661. }
  662. }
  663. if (info->board->chip_flag) {
  664. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  665. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  666. if (I_IXON(tty)) {
  667. mxser_enable_must_rx_software_flow_control(
  668. info->ioaddr);
  669. } else {
  670. mxser_disable_must_rx_software_flow_control(
  671. info->ioaddr);
  672. }
  673. if (I_IXOFF(tty)) {
  674. mxser_enable_must_tx_software_flow_control(
  675. info->ioaddr);
  676. } else {
  677. mxser_disable_must_tx_software_flow_control(
  678. info->ioaddr);
  679. }
  680. }
  681. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  682. outb(cval, info->ioaddr + UART_LCR);
  683. return ret;
  684. }
  685. static void mxser_check_modem_status(struct tty_struct *tty,
  686. struct mxser_port *port, int status)
  687. {
  688. /* update input line counters */
  689. if (status & UART_MSR_TERI)
  690. port->icount.rng++;
  691. if (status & UART_MSR_DDSR)
  692. port->icount.dsr++;
  693. if (status & UART_MSR_DDCD)
  694. port->icount.dcd++;
  695. if (status & UART_MSR_DCTS)
  696. port->icount.cts++;
  697. port->mon_data.modem_status = status;
  698. wake_up_interruptible(&port->port.delta_msr_wait);
  699. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  700. if (status & UART_MSR_DCD)
  701. wake_up_interruptible(&port->port.open_wait);
  702. }
  703. if (port->port.flags & ASYNC_CTS_FLOW) {
  704. if (tty->hw_stopped) {
  705. if (status & UART_MSR_CTS) {
  706. tty->hw_stopped = 0;
  707. if ((port->type != PORT_16550A) &&
  708. (!port->board->chip_flag)) {
  709. outb(port->IER & ~UART_IER_THRI,
  710. port->ioaddr + UART_IER);
  711. port->IER |= UART_IER_THRI;
  712. outb(port->IER, port->ioaddr +
  713. UART_IER);
  714. }
  715. tty_wakeup(tty);
  716. }
  717. } else {
  718. if (!(status & UART_MSR_CTS)) {
  719. tty->hw_stopped = 1;
  720. if (port->type != PORT_16550A &&
  721. !port->board->chip_flag) {
  722. port->IER &= ~UART_IER_THRI;
  723. outb(port->IER, port->ioaddr +
  724. UART_IER);
  725. }
  726. }
  727. }
  728. }
  729. }
  730. static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
  731. {
  732. struct mxser_port *info = container_of(port, struct mxser_port, port);
  733. unsigned long page;
  734. unsigned long flags;
  735. page = __get_free_page(GFP_KERNEL);
  736. if (!page)
  737. return -ENOMEM;
  738. spin_lock_irqsave(&info->slock, flags);
  739. if (!info->ioaddr || !info->type) {
  740. set_bit(TTY_IO_ERROR, &tty->flags);
  741. free_page(page);
  742. spin_unlock_irqrestore(&info->slock, flags);
  743. return 0;
  744. }
  745. info->port.xmit_buf = (unsigned char *) page;
  746. /*
  747. * Clear the FIFO buffers and disable them
  748. * (they will be reenabled in mxser_change_speed())
  749. */
  750. if (info->board->chip_flag)
  751. outb((UART_FCR_CLEAR_RCVR |
  752. UART_FCR_CLEAR_XMIT |
  753. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  754. else
  755. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  756. info->ioaddr + UART_FCR);
  757. /*
  758. * At this point there's no way the LSR could still be 0xFF;
  759. * if it is, then bail out, because there's likely no UART
  760. * here.
  761. */
  762. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  763. spin_unlock_irqrestore(&info->slock, flags);
  764. if (capable(CAP_SYS_ADMIN)) {
  765. if (tty)
  766. set_bit(TTY_IO_ERROR, &tty->flags);
  767. return 0;
  768. } else
  769. return -ENODEV;
  770. }
  771. /*
  772. * Clear the interrupt registers.
  773. */
  774. (void) inb(info->ioaddr + UART_LSR);
  775. (void) inb(info->ioaddr + UART_RX);
  776. (void) inb(info->ioaddr + UART_IIR);
  777. (void) inb(info->ioaddr + UART_MSR);
  778. /*
  779. * Now, initialize the UART
  780. */
  781. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  782. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  783. outb(info->MCR, info->ioaddr + UART_MCR);
  784. /*
  785. * Finally, enable interrupts
  786. */
  787. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  788. if (info->board->chip_flag)
  789. info->IER |= MOXA_MUST_IER_EGDAI;
  790. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  791. /*
  792. * And clear the interrupt registers again for luck.
  793. */
  794. (void) inb(info->ioaddr + UART_LSR);
  795. (void) inb(info->ioaddr + UART_RX);
  796. (void) inb(info->ioaddr + UART_IIR);
  797. (void) inb(info->ioaddr + UART_MSR);
  798. clear_bit(TTY_IO_ERROR, &tty->flags);
  799. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  800. /*
  801. * and set the speed of the serial port
  802. */
  803. mxser_change_speed(tty, NULL);
  804. spin_unlock_irqrestore(&info->slock, flags);
  805. return 0;
  806. }
  807. /*
  808. * This routine will shutdown a serial port
  809. */
  810. static void mxser_shutdown_port(struct tty_port *port)
  811. {
  812. struct mxser_port *info = container_of(port, struct mxser_port, port);
  813. unsigned long flags;
  814. spin_lock_irqsave(&info->slock, flags);
  815. /*
  816. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  817. * here so the queue might never be waken up
  818. */
  819. wake_up_interruptible(&info->port.delta_msr_wait);
  820. /*
  821. * Free the xmit buffer, if necessary
  822. */
  823. if (info->port.xmit_buf) {
  824. free_page((unsigned long) info->port.xmit_buf);
  825. info->port.xmit_buf = NULL;
  826. }
  827. info->IER = 0;
  828. outb(0x00, info->ioaddr + UART_IER);
  829. /* clear Rx/Tx FIFO's */
  830. if (info->board->chip_flag)
  831. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  832. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  833. info->ioaddr + UART_FCR);
  834. else
  835. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  836. info->ioaddr + UART_FCR);
  837. /* read data port to reset things */
  838. (void) inb(info->ioaddr + UART_RX);
  839. if (info->board->chip_flag)
  840. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  841. spin_unlock_irqrestore(&info->slock, flags);
  842. }
  843. /*
  844. * This routine is called whenever a serial port is opened. It
  845. * enables interrupts for a serial port, linking in its async structure into
  846. * the IRQ chain. It also performs the serial-specific
  847. * initialization for the tty structure.
  848. */
  849. static int mxser_open(struct tty_struct *tty, struct file *filp)
  850. {
  851. struct mxser_port *info;
  852. int line;
  853. line = tty->index;
  854. if (line == MXSER_PORTS)
  855. return 0;
  856. if (line < 0 || line > MXSER_PORTS)
  857. return -ENODEV;
  858. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  859. if (!info->ioaddr)
  860. return -ENODEV;
  861. return tty_port_open(&info->port, tty, filp);
  862. }
  863. static void mxser_flush_buffer(struct tty_struct *tty)
  864. {
  865. struct mxser_port *info = tty->driver_data;
  866. char fcr;
  867. unsigned long flags;
  868. spin_lock_irqsave(&info->slock, flags);
  869. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  870. fcr = inb(info->ioaddr + UART_FCR);
  871. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  872. info->ioaddr + UART_FCR);
  873. outb(fcr, info->ioaddr + UART_FCR);
  874. spin_unlock_irqrestore(&info->slock, flags);
  875. tty_wakeup(tty);
  876. }
  877. static void mxser_close_port(struct tty_port *port)
  878. {
  879. struct mxser_port *info = container_of(port, struct mxser_port, port);
  880. unsigned long timeout;
  881. /*
  882. * At this point we stop accepting input. To do this, we
  883. * disable the receive line status interrupts, and tell the
  884. * interrupt driver to stop checking the data ready bit in the
  885. * line status register.
  886. */
  887. info->IER &= ~UART_IER_RLSI;
  888. if (info->board->chip_flag)
  889. info->IER &= ~MOXA_MUST_RECV_ISR;
  890. outb(info->IER, info->ioaddr + UART_IER);
  891. /*
  892. * Before we drop DTR, make sure the UART transmitter
  893. * has completely drained; this is especially
  894. * important if there is a transmit FIFO!
  895. */
  896. timeout = jiffies + HZ;
  897. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  898. schedule_timeout_interruptible(5);
  899. if (time_after(jiffies, timeout))
  900. break;
  901. }
  902. }
  903. /*
  904. * This routine is called when the serial port gets closed. First, we
  905. * wait for the last remaining data to be sent. Then, we unlink its
  906. * async structure from the interrupt chain if necessary, and we free
  907. * that IRQ if nothing is left in the chain.
  908. */
  909. static void mxser_close(struct tty_struct *tty, struct file *filp)
  910. {
  911. struct mxser_port *info = tty->driver_data;
  912. struct tty_port *port = &info->port;
  913. if (tty->index == MXSER_PORTS)
  914. return;
  915. if (tty_port_close_start(port, tty, filp) == 0)
  916. return;
  917. mutex_lock(&port->mutex);
  918. mxser_close_port(port);
  919. mxser_flush_buffer(tty);
  920. mxser_shutdown_port(port);
  921. clear_bit(ASYNCB_INITIALIZED, &port->flags);
  922. mutex_unlock(&port->mutex);
  923. /* Right now the tty_port set is done outside of the close_end helper
  924. as we don't yet have everyone using refcounts */
  925. tty_port_close_end(port, tty);
  926. tty_port_tty_set(port, NULL);
  927. }
  928. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  929. {
  930. int c, total = 0;
  931. struct mxser_port *info = tty->driver_data;
  932. unsigned long flags;
  933. if (!info->port.xmit_buf)
  934. return 0;
  935. while (1) {
  936. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  937. SERIAL_XMIT_SIZE - info->xmit_head));
  938. if (c <= 0)
  939. break;
  940. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  941. spin_lock_irqsave(&info->slock, flags);
  942. info->xmit_head = (info->xmit_head + c) &
  943. (SERIAL_XMIT_SIZE - 1);
  944. info->xmit_cnt += c;
  945. spin_unlock_irqrestore(&info->slock, flags);
  946. buf += c;
  947. count -= c;
  948. total += c;
  949. }
  950. if (info->xmit_cnt && !tty->stopped) {
  951. if (!tty->hw_stopped ||
  952. (info->type == PORT_16550A) ||
  953. (info->board->chip_flag)) {
  954. spin_lock_irqsave(&info->slock, flags);
  955. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  956. UART_IER);
  957. info->IER |= UART_IER_THRI;
  958. outb(info->IER, info->ioaddr + UART_IER);
  959. spin_unlock_irqrestore(&info->slock, flags);
  960. }
  961. }
  962. return total;
  963. }
  964. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  965. {
  966. struct mxser_port *info = tty->driver_data;
  967. unsigned long flags;
  968. if (!info->port.xmit_buf)
  969. return 0;
  970. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  971. return 0;
  972. spin_lock_irqsave(&info->slock, flags);
  973. info->port.xmit_buf[info->xmit_head++] = ch;
  974. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  975. info->xmit_cnt++;
  976. spin_unlock_irqrestore(&info->slock, flags);
  977. if (!tty->stopped) {
  978. if (!tty->hw_stopped ||
  979. (info->type == PORT_16550A) ||
  980. info->board->chip_flag) {
  981. spin_lock_irqsave(&info->slock, flags);
  982. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  983. info->IER |= UART_IER_THRI;
  984. outb(info->IER, info->ioaddr + UART_IER);
  985. spin_unlock_irqrestore(&info->slock, flags);
  986. }
  987. }
  988. return 1;
  989. }
  990. static void mxser_flush_chars(struct tty_struct *tty)
  991. {
  992. struct mxser_port *info = tty->driver_data;
  993. unsigned long flags;
  994. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  995. (tty->hw_stopped && info->type != PORT_16550A &&
  996. !info->board->chip_flag))
  997. return;
  998. spin_lock_irqsave(&info->slock, flags);
  999. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1000. info->IER |= UART_IER_THRI;
  1001. outb(info->IER, info->ioaddr + UART_IER);
  1002. spin_unlock_irqrestore(&info->slock, flags);
  1003. }
  1004. static int mxser_write_room(struct tty_struct *tty)
  1005. {
  1006. struct mxser_port *info = tty->driver_data;
  1007. int ret;
  1008. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1009. return ret < 0 ? 0 : ret;
  1010. }
  1011. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1012. {
  1013. struct mxser_port *info = tty->driver_data;
  1014. return info->xmit_cnt;
  1015. }
  1016. /*
  1017. * ------------------------------------------------------------
  1018. * friends of mxser_ioctl()
  1019. * ------------------------------------------------------------
  1020. */
  1021. static int mxser_get_serial_info(struct tty_struct *tty,
  1022. struct serial_struct __user *retinfo)
  1023. {
  1024. struct mxser_port *info = tty->driver_data;
  1025. struct serial_struct tmp = {
  1026. .type = info->type,
  1027. .line = tty->index,
  1028. .port = info->ioaddr,
  1029. .irq = info->board->irq,
  1030. .flags = info->port.flags,
  1031. .baud_base = info->baud_base,
  1032. .close_delay = info->port.close_delay,
  1033. .closing_wait = info->port.closing_wait,
  1034. .custom_divisor = info->custom_divisor,
  1035. .hub6 = 0
  1036. };
  1037. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1038. return -EFAULT;
  1039. return 0;
  1040. }
  1041. static int mxser_set_serial_info(struct tty_struct *tty,
  1042. struct serial_struct __user *new_info)
  1043. {
  1044. struct mxser_port *info = tty->driver_data;
  1045. struct serial_struct new_serial;
  1046. speed_t baud;
  1047. unsigned long sl_flags;
  1048. unsigned int flags;
  1049. int retval = 0;
  1050. if (!new_info || !info->ioaddr)
  1051. return -ENODEV;
  1052. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1053. return -EFAULT;
  1054. if (new_serial.irq != info->board->irq ||
  1055. new_serial.port != info->ioaddr)
  1056. return -EINVAL;
  1057. flags = info->port.flags & ASYNC_SPD_MASK;
  1058. if (!capable(CAP_SYS_ADMIN)) {
  1059. if ((new_serial.baud_base != info->baud_base) ||
  1060. (new_serial.close_delay != info->port.close_delay) ||
  1061. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1062. return -EPERM;
  1063. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1064. (new_serial.flags & ASYNC_USR_MASK));
  1065. } else {
  1066. /*
  1067. * OK, past this point, all the error checking has been done.
  1068. * At this point, we start making changes.....
  1069. */
  1070. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1071. (new_serial.flags & ASYNC_FLAGS));
  1072. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1073. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1074. tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
  1075. ? 1 : 0;
  1076. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1077. (new_serial.baud_base != info->baud_base ||
  1078. new_serial.custom_divisor !=
  1079. info->custom_divisor)) {
  1080. baud = new_serial.baud_base / new_serial.custom_divisor;
  1081. tty_encode_baud_rate(tty, baud, baud);
  1082. }
  1083. }
  1084. info->type = new_serial.type;
  1085. process_txrx_fifo(info);
  1086. if (info->port.flags & ASYNC_INITIALIZED) {
  1087. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1088. spin_lock_irqsave(&info->slock, sl_flags);
  1089. mxser_change_speed(tty, NULL);
  1090. spin_unlock_irqrestore(&info->slock, sl_flags);
  1091. }
  1092. } else {
  1093. mutex_lock(&info->port.mutex);
  1094. retval = mxser_activate(&info->port, tty);
  1095. if (retval == 0)
  1096. set_bit(ASYNCB_INITIALIZED, &info->port.flags);
  1097. mutex_unlock(&info->port.mutex);
  1098. }
  1099. return retval;
  1100. }
  1101. /*
  1102. * mxser_get_lsr_info - get line status register info
  1103. *
  1104. * Purpose: Let user call ioctl() to get info when the UART physically
  1105. * is emptied. On bus types like RS485, the transmitter must
  1106. * release the bus after transmitting. This must be done when
  1107. * the transmit shift register is empty, not be done when the
  1108. * transmit holding register is empty. This functionality
  1109. * allows an RS485 driver to be written in user space.
  1110. */
  1111. static int mxser_get_lsr_info(struct mxser_port *info,
  1112. unsigned int __user *value)
  1113. {
  1114. unsigned char status;
  1115. unsigned int result;
  1116. unsigned long flags;
  1117. spin_lock_irqsave(&info->slock, flags);
  1118. status = inb(info->ioaddr + UART_LSR);
  1119. spin_unlock_irqrestore(&info->slock, flags);
  1120. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1121. return put_user(result, value);
  1122. }
  1123. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1124. {
  1125. struct mxser_port *info = tty->driver_data;
  1126. unsigned char control, status;
  1127. unsigned long flags;
  1128. if (tty->index == MXSER_PORTS)
  1129. return -ENOIOCTLCMD;
  1130. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1131. return -EIO;
  1132. control = info->MCR;
  1133. spin_lock_irqsave(&info->slock, flags);
  1134. status = inb(info->ioaddr + UART_MSR);
  1135. if (status & UART_MSR_ANY_DELTA)
  1136. mxser_check_modem_status(tty, info, status);
  1137. spin_unlock_irqrestore(&info->slock, flags);
  1138. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1139. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1140. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1141. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1142. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1143. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1144. }
  1145. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1146. unsigned int set, unsigned int clear)
  1147. {
  1148. struct mxser_port *info = tty->driver_data;
  1149. unsigned long flags;
  1150. if (tty->index == MXSER_PORTS)
  1151. return -ENOIOCTLCMD;
  1152. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1153. return -EIO;
  1154. spin_lock_irqsave(&info->slock, flags);
  1155. if (set & TIOCM_RTS)
  1156. info->MCR |= UART_MCR_RTS;
  1157. if (set & TIOCM_DTR)
  1158. info->MCR |= UART_MCR_DTR;
  1159. if (clear & TIOCM_RTS)
  1160. info->MCR &= ~UART_MCR_RTS;
  1161. if (clear & TIOCM_DTR)
  1162. info->MCR &= ~UART_MCR_DTR;
  1163. outb(info->MCR, info->ioaddr + UART_MCR);
  1164. spin_unlock_irqrestore(&info->slock, flags);
  1165. return 0;
  1166. }
  1167. static int __init mxser_program_mode(int port)
  1168. {
  1169. int id, i, j, n;
  1170. outb(0, port);
  1171. outb(0, port);
  1172. outb(0, port);
  1173. (void)inb(port);
  1174. (void)inb(port);
  1175. outb(0, port);
  1176. (void)inb(port);
  1177. id = inb(port + 1) & 0x1F;
  1178. if ((id != C168_ASIC_ID) &&
  1179. (id != C104_ASIC_ID) &&
  1180. (id != C102_ASIC_ID) &&
  1181. (id != CI132_ASIC_ID) &&
  1182. (id != CI134_ASIC_ID) &&
  1183. (id != CI104J_ASIC_ID))
  1184. return -1;
  1185. for (i = 0, j = 0; i < 4; i++) {
  1186. n = inb(port + 2);
  1187. if (n == 'M') {
  1188. j = 1;
  1189. } else if ((j == 1) && (n == 1)) {
  1190. j = 2;
  1191. break;
  1192. } else
  1193. j = 0;
  1194. }
  1195. if (j != 2)
  1196. id = -2;
  1197. return id;
  1198. }
  1199. static void __init mxser_normal_mode(int port)
  1200. {
  1201. int i, n;
  1202. outb(0xA5, port + 1);
  1203. outb(0x80, port + 3);
  1204. outb(12, port + 0); /* 9600 bps */
  1205. outb(0, port + 1);
  1206. outb(0x03, port + 3); /* 8 data bits */
  1207. outb(0x13, port + 4); /* loop back mode */
  1208. for (i = 0; i < 16; i++) {
  1209. n = inb(port + 5);
  1210. if ((n & 0x61) == 0x60)
  1211. break;
  1212. if ((n & 1) == 1)
  1213. (void)inb(port);
  1214. }
  1215. outb(0x00, port + 4);
  1216. }
  1217. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1218. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1219. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1220. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1221. #define EN_CCMD 0x000 /* Chip's command register */
  1222. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1223. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1224. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1225. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1226. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1227. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1228. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1229. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1230. static int __init mxser_read_register(int port, unsigned short *regs)
  1231. {
  1232. int i, k, value, id;
  1233. unsigned int j;
  1234. id = mxser_program_mode(port);
  1235. if (id < 0)
  1236. return id;
  1237. for (i = 0; i < 14; i++) {
  1238. k = (i & 0x3F) | 0x180;
  1239. for (j = 0x100; j > 0; j >>= 1) {
  1240. outb(CHIP_CS, port);
  1241. if (k & j) {
  1242. outb(CHIP_CS | CHIP_DO, port);
  1243. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1244. } else {
  1245. outb(CHIP_CS, port);
  1246. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1247. }
  1248. }
  1249. (void)inb(port);
  1250. value = 0;
  1251. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1252. outb(CHIP_CS, port);
  1253. outb(CHIP_CS | CHIP_SK, port);
  1254. if (inb(port) & CHIP_DI)
  1255. value |= j;
  1256. }
  1257. regs[i] = value;
  1258. outb(0, port);
  1259. }
  1260. mxser_normal_mode(port);
  1261. return id;
  1262. }
  1263. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1264. {
  1265. struct mxser_port *port;
  1266. struct tty_struct *tty;
  1267. int result, status;
  1268. unsigned int i, j;
  1269. int ret = 0;
  1270. switch (cmd) {
  1271. case MOXA_GET_MAJOR:
  1272. if (printk_ratelimit())
  1273. printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1274. "%x (GET_MAJOR), fix your userspace\n",
  1275. current->comm, cmd);
  1276. return put_user(ttymajor, (int __user *)argp);
  1277. case MOXA_CHKPORTENABLE:
  1278. result = 0;
  1279. lock_kernel();
  1280. for (i = 0; i < MXSER_BOARDS; i++)
  1281. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1282. if (mxser_boards[i].ports[j].ioaddr)
  1283. result |= (1 << i);
  1284. unlock_kernel();
  1285. return put_user(result, (unsigned long __user *)argp);
  1286. case MOXA_GETDATACOUNT:
  1287. lock_kernel();
  1288. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1289. ret = -EFAULT;
  1290. unlock_kernel();
  1291. return ret;
  1292. case MOXA_GETMSTATUS: {
  1293. struct mxser_mstatus ms, __user *msu = argp;
  1294. lock_kernel();
  1295. for (i = 0; i < MXSER_BOARDS; i++)
  1296. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1297. port = &mxser_boards[i].ports[j];
  1298. memset(&ms, 0, sizeof(ms));
  1299. if (!port->ioaddr)
  1300. goto copy;
  1301. tty = tty_port_tty_get(&port->port);
  1302. if (!tty || !tty->termios)
  1303. ms.cflag = port->normal_termios.c_cflag;
  1304. else
  1305. ms.cflag = tty->termios->c_cflag;
  1306. tty_kref_put(tty);
  1307. status = inb(port->ioaddr + UART_MSR);
  1308. if (status & UART_MSR_DCD)
  1309. ms.dcd = 1;
  1310. if (status & UART_MSR_DSR)
  1311. ms.dsr = 1;
  1312. if (status & UART_MSR_CTS)
  1313. ms.cts = 1;
  1314. copy:
  1315. if (copy_to_user(msu, &ms, sizeof(ms))) {
  1316. unlock_kernel();
  1317. return -EFAULT;
  1318. }
  1319. msu++;
  1320. }
  1321. unlock_kernel();
  1322. return 0;
  1323. }
  1324. case MOXA_ASPP_MON_EXT: {
  1325. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1326. unsigned int cflag, iflag, p;
  1327. u8 opmode;
  1328. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1329. if (!me)
  1330. return -ENOMEM;
  1331. lock_kernel();
  1332. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1333. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1334. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1335. i = MXSER_BOARDS;
  1336. break;
  1337. }
  1338. port = &mxser_boards[i].ports[j];
  1339. if (!port->ioaddr)
  1340. continue;
  1341. status = mxser_get_msr(port->ioaddr, 0, p);
  1342. if (status & UART_MSR_TERI)
  1343. port->icount.rng++;
  1344. if (status & UART_MSR_DDSR)
  1345. port->icount.dsr++;
  1346. if (status & UART_MSR_DDCD)
  1347. port->icount.dcd++;
  1348. if (status & UART_MSR_DCTS)
  1349. port->icount.cts++;
  1350. port->mon_data.modem_status = status;
  1351. me->rx_cnt[p] = port->mon_data.rxcnt;
  1352. me->tx_cnt[p] = port->mon_data.txcnt;
  1353. me->up_rxcnt[p] = port->mon_data.up_rxcnt;
  1354. me->up_txcnt[p] = port->mon_data.up_txcnt;
  1355. me->modem_status[p] =
  1356. port->mon_data.modem_status;
  1357. tty = tty_port_tty_get(&port->port);
  1358. if (!tty || !tty->termios) {
  1359. cflag = port->normal_termios.c_cflag;
  1360. iflag = port->normal_termios.c_iflag;
  1361. me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
  1362. } else {
  1363. cflag = tty->termios->c_cflag;
  1364. iflag = tty->termios->c_iflag;
  1365. me->baudrate[p] = tty_get_baud_rate(tty);
  1366. }
  1367. tty_kref_put(tty);
  1368. me->databits[p] = cflag & CSIZE;
  1369. me->stopbits[p] = cflag & CSTOPB;
  1370. me->parity[p] = cflag & (PARENB | PARODD |
  1371. CMSPAR);
  1372. if (cflag & CRTSCTS)
  1373. me->flowctrl[p] |= 0x03;
  1374. if (iflag & (IXON | IXOFF))
  1375. me->flowctrl[p] |= 0x0C;
  1376. if (port->type == PORT_16550A)
  1377. me->fifo[p] = 1;
  1378. opmode = inb(port->opmode_ioaddr) >>
  1379. ((p % 4) * 2);
  1380. opmode &= OP_MODE_MASK;
  1381. me->iftype[p] = opmode;
  1382. }
  1383. }
  1384. unlock_kernel();
  1385. if (copy_to_user(argp, me, sizeof(*me)))
  1386. ret = -EFAULT;
  1387. kfree(me);
  1388. return ret;
  1389. }
  1390. default:
  1391. return -ENOIOCTLCMD;
  1392. }
  1393. return 0;
  1394. }
  1395. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1396. struct async_icount *cprev)
  1397. {
  1398. struct async_icount cnow;
  1399. unsigned long flags;
  1400. int ret;
  1401. spin_lock_irqsave(&info->slock, flags);
  1402. cnow = info->icount; /* atomic copy */
  1403. spin_unlock_irqrestore(&info->slock, flags);
  1404. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1405. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1406. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1407. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1408. *cprev = cnow;
  1409. return ret;
  1410. }
  1411. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1412. unsigned int cmd, unsigned long arg)
  1413. {
  1414. struct mxser_port *info = tty->driver_data;
  1415. struct async_icount cnow;
  1416. unsigned long flags;
  1417. void __user *argp = (void __user *)arg;
  1418. int retval;
  1419. if (tty->index == MXSER_PORTS)
  1420. return mxser_ioctl_special(cmd, argp);
  1421. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1422. int p;
  1423. unsigned long opmode;
  1424. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1425. int shiftbit;
  1426. unsigned char val, mask;
  1427. p = tty->index % 4;
  1428. if (cmd == MOXA_SET_OP_MODE) {
  1429. if (get_user(opmode, (int __user *) argp))
  1430. return -EFAULT;
  1431. if (opmode != RS232_MODE &&
  1432. opmode != RS485_2WIRE_MODE &&
  1433. opmode != RS422_MODE &&
  1434. opmode != RS485_4WIRE_MODE)
  1435. return -EFAULT;
  1436. lock_kernel();
  1437. mask = ModeMask[p];
  1438. shiftbit = p * 2;
  1439. val = inb(info->opmode_ioaddr);
  1440. val &= mask;
  1441. val |= (opmode << shiftbit);
  1442. outb(val, info->opmode_ioaddr);
  1443. unlock_kernel();
  1444. } else {
  1445. lock_kernel();
  1446. shiftbit = p * 2;
  1447. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1448. opmode &= OP_MODE_MASK;
  1449. unlock_kernel();
  1450. if (put_user(opmode, (int __user *)argp))
  1451. return -EFAULT;
  1452. }
  1453. return 0;
  1454. }
  1455. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1456. test_bit(TTY_IO_ERROR, &tty->flags))
  1457. return -EIO;
  1458. switch (cmd) {
  1459. case TIOCGSERIAL:
  1460. lock_kernel();
  1461. retval = mxser_get_serial_info(tty, argp);
  1462. unlock_kernel();
  1463. return retval;
  1464. case TIOCSSERIAL:
  1465. lock_kernel();
  1466. retval = mxser_set_serial_info(tty, argp);
  1467. unlock_kernel();
  1468. return retval;
  1469. case TIOCSERGETLSR: /* Get line status register */
  1470. return mxser_get_lsr_info(info, argp);
  1471. /*
  1472. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1473. * - mask passed in arg for lines of interest
  1474. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1475. * Caller should use TIOCGICOUNT to see which one it was
  1476. */
  1477. case TIOCMIWAIT:
  1478. spin_lock_irqsave(&info->slock, flags);
  1479. cnow = info->icount; /* note the counters on entry */
  1480. spin_unlock_irqrestore(&info->slock, flags);
  1481. return wait_event_interruptible(info->port.delta_msr_wait,
  1482. mxser_cflags_changed(info, arg, &cnow));
  1483. /*
  1484. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1485. * Return: write counters to the user passed counter struct
  1486. * NB: both 1->0 and 0->1 transitions are counted except for
  1487. * RI where only 0->1 is counted.
  1488. */
  1489. case TIOCGICOUNT: {
  1490. struct serial_icounter_struct icnt = { 0 };
  1491. spin_lock_irqsave(&info->slock, flags);
  1492. cnow = info->icount;
  1493. spin_unlock_irqrestore(&info->slock, flags);
  1494. icnt.frame = cnow.frame;
  1495. icnt.brk = cnow.brk;
  1496. icnt.overrun = cnow.overrun;
  1497. icnt.buf_overrun = cnow.buf_overrun;
  1498. icnt.parity = cnow.parity;
  1499. icnt.rx = cnow.rx;
  1500. icnt.tx = cnow.tx;
  1501. icnt.cts = cnow.cts;
  1502. icnt.dsr = cnow.dsr;
  1503. icnt.rng = cnow.rng;
  1504. icnt.dcd = cnow.dcd;
  1505. return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
  1506. }
  1507. case MOXA_HighSpeedOn:
  1508. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1509. case MOXA_SDS_RSTICOUNTER:
  1510. lock_kernel();
  1511. info->mon_data.rxcnt = 0;
  1512. info->mon_data.txcnt = 0;
  1513. unlock_kernel();
  1514. return 0;
  1515. case MOXA_ASPP_OQUEUE:{
  1516. int len, lsr;
  1517. lock_kernel();
  1518. len = mxser_chars_in_buffer(tty);
  1519. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
  1520. len += (lsr ? 0 : 1);
  1521. unlock_kernel();
  1522. return put_user(len, (int __user *)argp);
  1523. }
  1524. case MOXA_ASPP_MON: {
  1525. int mcr, status;
  1526. lock_kernel();
  1527. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1528. mxser_check_modem_status(tty, info, status);
  1529. mcr = inb(info->ioaddr + UART_MCR);
  1530. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1531. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1532. else
  1533. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1534. if (mcr & MOXA_MUST_MCR_TX_XON)
  1535. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1536. else
  1537. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1538. if (tty->hw_stopped)
  1539. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1540. else
  1541. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1542. unlock_kernel();
  1543. if (copy_to_user(argp, &info->mon_data,
  1544. sizeof(struct mxser_mon)))
  1545. return -EFAULT;
  1546. return 0;
  1547. }
  1548. case MOXA_ASPP_LSTATUS: {
  1549. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1550. return -EFAULT;
  1551. info->err_shadow = 0;
  1552. return 0;
  1553. }
  1554. case MOXA_SET_BAUD_METHOD: {
  1555. int method;
  1556. if (get_user(method, (int __user *)argp))
  1557. return -EFAULT;
  1558. mxser_set_baud_method[tty->index] = method;
  1559. return put_user(method, (int __user *)argp);
  1560. }
  1561. default:
  1562. return -ENOIOCTLCMD;
  1563. }
  1564. return 0;
  1565. }
  1566. static void mxser_stoprx(struct tty_struct *tty)
  1567. {
  1568. struct mxser_port *info = tty->driver_data;
  1569. info->ldisc_stop_rx = 1;
  1570. if (I_IXOFF(tty)) {
  1571. if (info->board->chip_flag) {
  1572. info->IER &= ~MOXA_MUST_RECV_ISR;
  1573. outb(info->IER, info->ioaddr + UART_IER);
  1574. } else {
  1575. info->x_char = STOP_CHAR(tty);
  1576. outb(0, info->ioaddr + UART_IER);
  1577. info->IER |= UART_IER_THRI;
  1578. outb(info->IER, info->ioaddr + UART_IER);
  1579. }
  1580. }
  1581. if (tty->termios->c_cflag & CRTSCTS) {
  1582. info->MCR &= ~UART_MCR_RTS;
  1583. outb(info->MCR, info->ioaddr + UART_MCR);
  1584. }
  1585. }
  1586. /*
  1587. * This routine is called by the upper-layer tty layer to signal that
  1588. * incoming characters should be throttled.
  1589. */
  1590. static void mxser_throttle(struct tty_struct *tty)
  1591. {
  1592. mxser_stoprx(tty);
  1593. }
  1594. static void mxser_unthrottle(struct tty_struct *tty)
  1595. {
  1596. struct mxser_port *info = tty->driver_data;
  1597. /* startrx */
  1598. info->ldisc_stop_rx = 0;
  1599. if (I_IXOFF(tty)) {
  1600. if (info->x_char)
  1601. info->x_char = 0;
  1602. else {
  1603. if (info->board->chip_flag) {
  1604. info->IER |= MOXA_MUST_RECV_ISR;
  1605. outb(info->IER, info->ioaddr + UART_IER);
  1606. } else {
  1607. info->x_char = START_CHAR(tty);
  1608. outb(0, info->ioaddr + UART_IER);
  1609. info->IER |= UART_IER_THRI;
  1610. outb(info->IER, info->ioaddr + UART_IER);
  1611. }
  1612. }
  1613. }
  1614. if (tty->termios->c_cflag & CRTSCTS) {
  1615. info->MCR |= UART_MCR_RTS;
  1616. outb(info->MCR, info->ioaddr + UART_MCR);
  1617. }
  1618. }
  1619. /*
  1620. * mxser_stop() and mxser_start()
  1621. *
  1622. * This routines are called before setting or resetting tty->stopped.
  1623. * They enable or disable transmitter interrupts, as necessary.
  1624. */
  1625. static void mxser_stop(struct tty_struct *tty)
  1626. {
  1627. struct mxser_port *info = tty->driver_data;
  1628. unsigned long flags;
  1629. spin_lock_irqsave(&info->slock, flags);
  1630. if (info->IER & UART_IER_THRI) {
  1631. info->IER &= ~UART_IER_THRI;
  1632. outb(info->IER, info->ioaddr + UART_IER);
  1633. }
  1634. spin_unlock_irqrestore(&info->slock, flags);
  1635. }
  1636. static void mxser_start(struct tty_struct *tty)
  1637. {
  1638. struct mxser_port *info = tty->driver_data;
  1639. unsigned long flags;
  1640. spin_lock_irqsave(&info->slock, flags);
  1641. if (info->xmit_cnt && info->port.xmit_buf) {
  1642. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1643. info->IER |= UART_IER_THRI;
  1644. outb(info->IER, info->ioaddr + UART_IER);
  1645. }
  1646. spin_unlock_irqrestore(&info->slock, flags);
  1647. }
  1648. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1649. {
  1650. struct mxser_port *info = tty->driver_data;
  1651. unsigned long flags;
  1652. spin_lock_irqsave(&info->slock, flags);
  1653. mxser_change_speed(tty, old_termios);
  1654. spin_unlock_irqrestore(&info->slock, flags);
  1655. if ((old_termios->c_cflag & CRTSCTS) &&
  1656. !(tty->termios->c_cflag & CRTSCTS)) {
  1657. tty->hw_stopped = 0;
  1658. mxser_start(tty);
  1659. }
  1660. /* Handle sw stopped */
  1661. if ((old_termios->c_iflag & IXON) &&
  1662. !(tty->termios->c_iflag & IXON)) {
  1663. tty->stopped = 0;
  1664. if (info->board->chip_flag) {
  1665. spin_lock_irqsave(&info->slock, flags);
  1666. mxser_disable_must_rx_software_flow_control(
  1667. info->ioaddr);
  1668. spin_unlock_irqrestore(&info->slock, flags);
  1669. }
  1670. mxser_start(tty);
  1671. }
  1672. }
  1673. /*
  1674. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1675. */
  1676. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1677. {
  1678. struct mxser_port *info = tty->driver_data;
  1679. unsigned long orig_jiffies, char_time;
  1680. int lsr;
  1681. if (info->type == PORT_UNKNOWN)
  1682. return;
  1683. if (info->xmit_fifo_size == 0)
  1684. return; /* Just in case.... */
  1685. orig_jiffies = jiffies;
  1686. /*
  1687. * Set the check interval to be 1/5 of the estimated time to
  1688. * send a single character, and make it at least 1. The check
  1689. * interval should also be less than the timeout.
  1690. *
  1691. * Note: we have to use pretty tight timings here to satisfy
  1692. * the NIST-PCTS.
  1693. */
  1694. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1695. char_time = char_time / 5;
  1696. if (char_time == 0)
  1697. char_time = 1;
  1698. if (timeout && timeout < char_time)
  1699. char_time = timeout;
  1700. /*
  1701. * If the transmitter hasn't cleared in twice the approximate
  1702. * amount of time to send the entire FIFO, it probably won't
  1703. * ever clear. This assumes the UART isn't doing flow
  1704. * control, which is currently the case. Hence, if it ever
  1705. * takes longer than info->timeout, this is probably due to a
  1706. * UART bug of some kind. So, we clamp the timeout parameter at
  1707. * 2*info->timeout.
  1708. */
  1709. if (!timeout || timeout > 2 * info->timeout)
  1710. timeout = 2 * info->timeout;
  1711. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1712. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1713. timeout, char_time);
  1714. printk("jiff=%lu...", jiffies);
  1715. #endif
  1716. lock_kernel();
  1717. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1718. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1719. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1720. #endif
  1721. schedule_timeout_interruptible(char_time);
  1722. if (signal_pending(current))
  1723. break;
  1724. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1725. break;
  1726. }
  1727. set_current_state(TASK_RUNNING);
  1728. unlock_kernel();
  1729. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1730. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1731. #endif
  1732. }
  1733. /*
  1734. * This routine is called by tty_hangup() when a hangup is signaled.
  1735. */
  1736. static void mxser_hangup(struct tty_struct *tty)
  1737. {
  1738. struct mxser_port *info = tty->driver_data;
  1739. mxser_flush_buffer(tty);
  1740. tty_port_hangup(&info->port);
  1741. }
  1742. /*
  1743. * mxser_rs_break() --- routine which turns the break handling on or off
  1744. */
  1745. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1746. {
  1747. struct mxser_port *info = tty->driver_data;
  1748. unsigned long flags;
  1749. spin_lock_irqsave(&info->slock, flags);
  1750. if (break_state == -1)
  1751. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1752. info->ioaddr + UART_LCR);
  1753. else
  1754. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1755. info->ioaddr + UART_LCR);
  1756. spin_unlock_irqrestore(&info->slock, flags);
  1757. return 0;
  1758. }
  1759. static void mxser_receive_chars(struct tty_struct *tty,
  1760. struct mxser_port *port, int *status)
  1761. {
  1762. unsigned char ch, gdl;
  1763. int ignored = 0;
  1764. int cnt = 0;
  1765. int recv_room;
  1766. int max = 256;
  1767. recv_room = tty->receive_room;
  1768. if (recv_room == 0 && !port->ldisc_stop_rx)
  1769. mxser_stoprx(tty);
  1770. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1771. if (*status & UART_LSR_SPECIAL)
  1772. goto intr_old;
  1773. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1774. (*status & MOXA_MUST_LSR_RERR))
  1775. goto intr_old;
  1776. if (*status & MOXA_MUST_LSR_RERR)
  1777. goto intr_old;
  1778. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1779. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1780. gdl &= MOXA_MUST_GDL_MASK;
  1781. if (gdl >= recv_room) {
  1782. if (!port->ldisc_stop_rx)
  1783. mxser_stoprx(tty);
  1784. }
  1785. while (gdl--) {
  1786. ch = inb(port->ioaddr + UART_RX);
  1787. tty_insert_flip_char(tty, ch, 0);
  1788. cnt++;
  1789. }
  1790. goto end_intr;
  1791. }
  1792. intr_old:
  1793. do {
  1794. if (max-- < 0)
  1795. break;
  1796. ch = inb(port->ioaddr + UART_RX);
  1797. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1798. outb(0x23, port->ioaddr + UART_FCR);
  1799. *status &= port->read_status_mask;
  1800. if (*status & port->ignore_status_mask) {
  1801. if (++ignored > 100)
  1802. break;
  1803. } else {
  1804. char flag = 0;
  1805. if (*status & UART_LSR_SPECIAL) {
  1806. if (*status & UART_LSR_BI) {
  1807. flag = TTY_BREAK;
  1808. port->icount.brk++;
  1809. if (port->port.flags & ASYNC_SAK)
  1810. do_SAK(tty);
  1811. } else if (*status & UART_LSR_PE) {
  1812. flag = TTY_PARITY;
  1813. port->icount.parity++;
  1814. } else if (*status & UART_LSR_FE) {
  1815. flag = TTY_FRAME;
  1816. port->icount.frame++;
  1817. } else if (*status & UART_LSR_OE) {
  1818. flag = TTY_OVERRUN;
  1819. port->icount.overrun++;
  1820. } else
  1821. flag = TTY_BREAK;
  1822. }
  1823. tty_insert_flip_char(tty, ch, flag);
  1824. cnt++;
  1825. if (cnt >= recv_room) {
  1826. if (!port->ldisc_stop_rx)
  1827. mxser_stoprx(tty);
  1828. break;
  1829. }
  1830. }
  1831. if (port->board->chip_flag)
  1832. break;
  1833. *status = inb(port->ioaddr + UART_LSR);
  1834. } while (*status & UART_LSR_DR);
  1835. end_intr:
  1836. mxvar_log.rxcnt[tty->index] += cnt;
  1837. port->mon_data.rxcnt += cnt;
  1838. port->mon_data.up_rxcnt += cnt;
  1839. /*
  1840. * We are called from an interrupt context with &port->slock
  1841. * being held. Drop it temporarily in order to prevent
  1842. * recursive locking.
  1843. */
  1844. spin_unlock(&port->slock);
  1845. tty_flip_buffer_push(tty);
  1846. spin_lock(&port->slock);
  1847. }
  1848. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1849. {
  1850. int count, cnt;
  1851. if (port->x_char) {
  1852. outb(port->x_char, port->ioaddr + UART_TX);
  1853. port->x_char = 0;
  1854. mxvar_log.txcnt[tty->index]++;
  1855. port->mon_data.txcnt++;
  1856. port->mon_data.up_txcnt++;
  1857. port->icount.tx++;
  1858. return;
  1859. }
  1860. if (port->port.xmit_buf == NULL)
  1861. return;
  1862. if (port->xmit_cnt <= 0 || tty->stopped ||
  1863. (tty->hw_stopped &&
  1864. (port->type != PORT_16550A) &&
  1865. (!port->board->chip_flag))) {
  1866. port->IER &= ~UART_IER_THRI;
  1867. outb(port->IER, port->ioaddr + UART_IER);
  1868. return;
  1869. }
  1870. cnt = port->xmit_cnt;
  1871. count = port->xmit_fifo_size;
  1872. do {
  1873. outb(port->port.xmit_buf[port->xmit_tail++],
  1874. port->ioaddr + UART_TX);
  1875. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1876. if (--port->xmit_cnt <= 0)
  1877. break;
  1878. } while (--count > 0);
  1879. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1880. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1881. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1882. port->icount.tx += (cnt - port->xmit_cnt);
  1883. if (port->xmit_cnt < WAKEUP_CHARS && tty)
  1884. tty_wakeup(tty);
  1885. if (port->xmit_cnt <= 0) {
  1886. port->IER &= ~UART_IER_THRI;
  1887. outb(port->IER, port->ioaddr + UART_IER);
  1888. }
  1889. }
  1890. /*
  1891. * This is the serial driver's generic interrupt routine
  1892. */
  1893. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1894. {
  1895. int status, iir, i;
  1896. struct mxser_board *brd = NULL;
  1897. struct mxser_port *port;
  1898. int max, irqbits, bits, msr;
  1899. unsigned int int_cnt, pass_counter = 0;
  1900. int handled = IRQ_NONE;
  1901. struct tty_struct *tty;
  1902. for (i = 0; i < MXSER_BOARDS; i++)
  1903. if (dev_id == &mxser_boards[i]) {
  1904. brd = dev_id;
  1905. break;
  1906. }
  1907. if (i == MXSER_BOARDS)
  1908. goto irq_stop;
  1909. if (brd == NULL)
  1910. goto irq_stop;
  1911. max = brd->info->nports;
  1912. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1913. irqbits = inb(brd->vector) & brd->vector_mask;
  1914. if (irqbits == brd->vector_mask)
  1915. break;
  1916. handled = IRQ_HANDLED;
  1917. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1918. if (irqbits == brd->vector_mask)
  1919. break;
  1920. if (bits & irqbits)
  1921. continue;
  1922. port = &brd->ports[i];
  1923. int_cnt = 0;
  1924. spin_lock(&port->slock);
  1925. do {
  1926. iir = inb(port->ioaddr + UART_IIR);
  1927. if (iir & UART_IIR_NO_INT)
  1928. break;
  1929. iir &= MOXA_MUST_IIR_MASK;
  1930. tty = tty_port_tty_get(&port->port);
  1931. if (!tty ||
  1932. (port->port.flags & ASYNC_CLOSING) ||
  1933. !(port->port.flags &
  1934. ASYNC_INITIALIZED)) {
  1935. status = inb(port->ioaddr + UART_LSR);
  1936. outb(0x27, port->ioaddr + UART_FCR);
  1937. inb(port->ioaddr + UART_MSR);
  1938. tty_kref_put(tty);
  1939. break;
  1940. }
  1941. status = inb(port->ioaddr + UART_LSR);
  1942. if (status & UART_LSR_PE)
  1943. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1944. if (status & UART_LSR_FE)
  1945. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1946. if (status & UART_LSR_OE)
  1947. port->err_shadow |=
  1948. NPPI_NOTIFY_HW_OVERRUN;
  1949. if (status & UART_LSR_BI)
  1950. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1951. if (port->board->chip_flag) {
  1952. if (iir == MOXA_MUST_IIR_GDA ||
  1953. iir == MOXA_MUST_IIR_RDA ||
  1954. iir == MOXA_MUST_IIR_RTO ||
  1955. iir == MOXA_MUST_IIR_LSR)
  1956. mxser_receive_chars(tty, port,
  1957. &status);
  1958. } else {
  1959. status &= port->read_status_mask;
  1960. if (status & UART_LSR_DR)
  1961. mxser_receive_chars(tty, port,
  1962. &status);
  1963. }
  1964. msr = inb(port->ioaddr + UART_MSR);
  1965. if (msr & UART_MSR_ANY_DELTA)
  1966. mxser_check_modem_status(tty, port, msr);
  1967. if (port->board->chip_flag) {
  1968. if (iir == 0x02 && (status &
  1969. UART_LSR_THRE))
  1970. mxser_transmit_chars(tty, port);
  1971. } else {
  1972. if (status & UART_LSR_THRE)
  1973. mxser_transmit_chars(tty, port);
  1974. }
  1975. tty_kref_put(tty);
  1976. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  1977. spin_unlock(&port->slock);
  1978. }
  1979. }
  1980. irq_stop:
  1981. return handled;
  1982. }
  1983. static const struct tty_operations mxser_ops = {
  1984. .open = mxser_open,
  1985. .close = mxser_close,
  1986. .write = mxser_write,
  1987. .put_char = mxser_put_char,
  1988. .flush_chars = mxser_flush_chars,
  1989. .write_room = mxser_write_room,
  1990. .chars_in_buffer = mxser_chars_in_buffer,
  1991. .flush_buffer = mxser_flush_buffer,
  1992. .ioctl = mxser_ioctl,
  1993. .throttle = mxser_throttle,
  1994. .unthrottle = mxser_unthrottle,
  1995. .set_termios = mxser_set_termios,
  1996. .stop = mxser_stop,
  1997. .start = mxser_start,
  1998. .hangup = mxser_hangup,
  1999. .break_ctl = mxser_rs_break,
  2000. .wait_until_sent = mxser_wait_until_sent,
  2001. .tiocmget = mxser_tiocmget,
  2002. .tiocmset = mxser_tiocmset,
  2003. };
  2004. struct tty_port_operations mxser_port_ops = {
  2005. .carrier_raised = mxser_carrier_raised,
  2006. .dtr_rts = mxser_dtr_rts,
  2007. .activate = mxser_activate,
  2008. .shutdown = mxser_shutdown_port,
  2009. };
  2010. /*
  2011. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2012. */
  2013. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2014. unsigned int irq)
  2015. {
  2016. if (irq)
  2017. free_irq(brd->irq, brd);
  2018. if (pdev != NULL) { /* PCI */
  2019. #ifdef CONFIG_PCI
  2020. pci_release_region(pdev, 2);
  2021. pci_release_region(pdev, 3);
  2022. #endif
  2023. } else {
  2024. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2025. release_region(brd->vector, 1);
  2026. }
  2027. }
  2028. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2029. struct pci_dev *pdev)
  2030. {
  2031. struct mxser_port *info;
  2032. unsigned int i;
  2033. int retval;
  2034. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2035. brd->ports[0].max_baud);
  2036. for (i = 0; i < brd->info->nports; i++) {
  2037. info = &brd->ports[i];
  2038. tty_port_init(&info->port);
  2039. info->port.ops = &mxser_port_ops;
  2040. info->board = brd;
  2041. info->stop_rx = 0;
  2042. info->ldisc_stop_rx = 0;
  2043. /* Enhance mode enabled here */
  2044. if (brd->chip_flag != MOXA_OTHER_UART)
  2045. mxser_enable_must_enchance_mode(info->ioaddr);
  2046. info->port.flags = ASYNC_SHARE_IRQ;
  2047. info->type = brd->uart_type;
  2048. process_txrx_fifo(info);
  2049. info->custom_divisor = info->baud_base * 16;
  2050. info->port.close_delay = 5 * HZ / 10;
  2051. info->port.closing_wait = 30 * HZ;
  2052. info->normal_termios = mxvar_sdriver->init_termios;
  2053. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2054. info->err_shadow = 0;
  2055. spin_lock_init(&info->slock);
  2056. /* before set INT ISR, disable all int */
  2057. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2058. info->ioaddr + UART_IER);
  2059. }
  2060. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2061. brd);
  2062. if (retval) {
  2063. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2064. "conflict with another device.\n",
  2065. brd->info->name, brd->irq);
  2066. /* We hold resources, we need to release them. */
  2067. mxser_release_res(brd, pdev, 0);
  2068. }
  2069. return retval;
  2070. }
  2071. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2072. {
  2073. int id, i, bits;
  2074. unsigned short regs[16], irq;
  2075. unsigned char scratch, scratch2;
  2076. brd->chip_flag = MOXA_OTHER_UART;
  2077. id = mxser_read_register(cap, regs);
  2078. switch (id) {
  2079. case C168_ASIC_ID:
  2080. brd->info = &mxser_cards[0];
  2081. break;
  2082. case C104_ASIC_ID:
  2083. brd->info = &mxser_cards[1];
  2084. break;
  2085. case CI104J_ASIC_ID:
  2086. brd->info = &mxser_cards[2];
  2087. break;
  2088. case C102_ASIC_ID:
  2089. brd->info = &mxser_cards[5];
  2090. break;
  2091. case CI132_ASIC_ID:
  2092. brd->info = &mxser_cards[6];
  2093. break;
  2094. case CI134_ASIC_ID:
  2095. brd->info = &mxser_cards[7];
  2096. break;
  2097. default:
  2098. return 0;
  2099. }
  2100. irq = 0;
  2101. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2102. Flag-hack checks if configuration should be read as 2-port here. */
  2103. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2104. irq = regs[9] & 0xF000;
  2105. irq = irq | (irq >> 4);
  2106. if (irq != (regs[9] & 0xFF00))
  2107. goto err_irqconflict;
  2108. } else if (brd->info->nports == 4) {
  2109. irq = regs[9] & 0xF000;
  2110. irq = irq | (irq >> 4);
  2111. irq = irq | (irq >> 8);
  2112. if (irq != regs[9])
  2113. goto err_irqconflict;
  2114. } else if (brd->info->nports == 8) {
  2115. irq = regs[9] & 0xF000;
  2116. irq = irq | (irq >> 4);
  2117. irq = irq | (irq >> 8);
  2118. if ((irq != regs[9]) || (irq != regs[10]))
  2119. goto err_irqconflict;
  2120. }
  2121. if (!irq) {
  2122. printk(KERN_ERR "mxser: interrupt number unset\n");
  2123. return -EIO;
  2124. }
  2125. brd->irq = ((int)(irq & 0xF000) >> 12);
  2126. for (i = 0; i < 8; i++)
  2127. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2128. if ((regs[12] & 0x80) == 0) {
  2129. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2130. return -EIO;
  2131. }
  2132. brd->vector = (int)regs[11]; /* interrupt vector */
  2133. if (id == 1)
  2134. brd->vector_mask = 0x00FF;
  2135. else
  2136. brd->vector_mask = 0x000F;
  2137. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2138. if (regs[12] & bits) {
  2139. brd->ports[i].baud_base = 921600;
  2140. brd->ports[i].max_baud = 921600;
  2141. } else {
  2142. brd->ports[i].baud_base = 115200;
  2143. brd->ports[i].max_baud = 115200;
  2144. }
  2145. }
  2146. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2147. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2148. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2149. outb(scratch2, cap + UART_LCR);
  2150. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2151. scratch = inb(cap + UART_IIR);
  2152. if (scratch & 0xC0)
  2153. brd->uart_type = PORT_16550A;
  2154. else
  2155. brd->uart_type = PORT_16450;
  2156. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2157. "mxser(IO)")) {
  2158. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2159. "0x%.8lx-0x%.8lx\n",
  2160. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2161. 8 * brd->info->nports - 1);
  2162. return -EIO;
  2163. }
  2164. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2165. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2166. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2167. "0x%.8lx-0x%.8lx\n",
  2168. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2169. 8 * brd->info->nports - 1);
  2170. return -EIO;
  2171. }
  2172. return brd->info->nports;
  2173. err_irqconflict:
  2174. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2175. return -EIO;
  2176. }
  2177. static int __devinit mxser_probe(struct pci_dev *pdev,
  2178. const struct pci_device_id *ent)
  2179. {
  2180. #ifdef CONFIG_PCI
  2181. struct mxser_board *brd;
  2182. unsigned int i, j;
  2183. unsigned long ioaddress;
  2184. int retval = -EINVAL;
  2185. for (i = 0; i < MXSER_BOARDS; i++)
  2186. if (mxser_boards[i].info == NULL)
  2187. break;
  2188. if (i >= MXSER_BOARDS) {
  2189. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2190. "not configured\n", MXSER_BOARDS);
  2191. goto err;
  2192. }
  2193. brd = &mxser_boards[i];
  2194. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2195. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2196. mxser_cards[ent->driver_data].name,
  2197. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2198. retval = pci_enable_device(pdev);
  2199. if (retval) {
  2200. dev_err(&pdev->dev, "PCI enable failed\n");
  2201. goto err;
  2202. }
  2203. /* io address */
  2204. ioaddress = pci_resource_start(pdev, 2);
  2205. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2206. if (retval)
  2207. goto err;
  2208. brd->info = &mxser_cards[ent->driver_data];
  2209. for (i = 0; i < brd->info->nports; i++)
  2210. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2211. /* vector */
  2212. ioaddress = pci_resource_start(pdev, 3);
  2213. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2214. if (retval)
  2215. goto err_relio;
  2216. brd->vector = ioaddress;
  2217. /* irq */
  2218. brd->irq = pdev->irq;
  2219. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2220. brd->uart_type = PORT_16550A;
  2221. brd->vector_mask = 0;
  2222. for (i = 0; i < brd->info->nports; i++) {
  2223. for (j = 0; j < UART_INFO_NUM; j++) {
  2224. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2225. brd->ports[i].max_baud =
  2226. Gpci_uart_info[j].max_baud;
  2227. /* exception....CP-102 */
  2228. if (brd->info->flags & MXSER_HIGHBAUD)
  2229. brd->ports[i].max_baud = 921600;
  2230. break;
  2231. }
  2232. }
  2233. }
  2234. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2235. for (i = 0; i < brd->info->nports; i++) {
  2236. if (i < 4)
  2237. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2238. else
  2239. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2240. }
  2241. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2242. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2243. }
  2244. for (i = 0; i < brd->info->nports; i++) {
  2245. brd->vector_mask |= (1 << i);
  2246. brd->ports[i].baud_base = 921600;
  2247. }
  2248. /* mxser_initbrd will hook ISR. */
  2249. retval = mxser_initbrd(brd, pdev);
  2250. if (retval)
  2251. goto err_null;
  2252. for (i = 0; i < brd->info->nports; i++)
  2253. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2254. pci_set_drvdata(pdev, brd);
  2255. return 0;
  2256. err_relio:
  2257. pci_release_region(pdev, 2);
  2258. err_null:
  2259. brd->info = NULL;
  2260. err:
  2261. return retval;
  2262. #else
  2263. return -ENODEV;
  2264. #endif
  2265. }
  2266. static void __devexit mxser_remove(struct pci_dev *pdev)
  2267. {
  2268. struct mxser_board *brd = pci_get_drvdata(pdev);
  2269. unsigned int i;
  2270. for (i = 0; i < brd->info->nports; i++)
  2271. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2272. mxser_release_res(brd, pdev, 1);
  2273. brd->info = NULL;
  2274. }
  2275. static struct pci_driver mxser_driver = {
  2276. .name = "mxser",
  2277. .id_table = mxser_pcibrds,
  2278. .probe = mxser_probe,
  2279. .remove = __devexit_p(mxser_remove)
  2280. };
  2281. static int __init mxser_module_init(void)
  2282. {
  2283. struct mxser_board *brd;
  2284. unsigned int b, i, m;
  2285. int retval;
  2286. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2287. if (!mxvar_sdriver)
  2288. return -ENOMEM;
  2289. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2290. MXSER_VERSION);
  2291. /* Initialize the tty_driver structure */
  2292. mxvar_sdriver->owner = THIS_MODULE;
  2293. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2294. mxvar_sdriver->name = "ttyMI";
  2295. mxvar_sdriver->major = ttymajor;
  2296. mxvar_sdriver->minor_start = 0;
  2297. mxvar_sdriver->num = MXSER_PORTS + 1;
  2298. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2299. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2300. mxvar_sdriver->init_termios = tty_std_termios;
  2301. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2302. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2303. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2304. retval = tty_register_driver(mxvar_sdriver);
  2305. if (retval) {
  2306. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2307. "tty driver !\n");
  2308. goto err_put;
  2309. }
  2310. /* Start finding ISA boards here */
  2311. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2312. if (!ioaddr[b])
  2313. continue;
  2314. brd = &mxser_boards[m];
  2315. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2316. if (retval <= 0) {
  2317. brd->info = NULL;
  2318. continue;
  2319. }
  2320. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2321. brd->info->name, ioaddr[b]);
  2322. /* mxser_initbrd will hook ISR. */
  2323. if (mxser_initbrd(brd, NULL) < 0) {
  2324. brd->info = NULL;
  2325. continue;
  2326. }
  2327. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2328. for (i = 0; i < brd->info->nports; i++)
  2329. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2330. m++;
  2331. }
  2332. retval = pci_register_driver(&mxser_driver);
  2333. if (retval) {
  2334. printk(KERN_ERR "mxser: can't register pci driver\n");
  2335. if (!m) {
  2336. retval = -ENODEV;
  2337. goto err_unr;
  2338. } /* else: we have some ISA cards under control */
  2339. }
  2340. return 0;
  2341. err_unr:
  2342. tty_unregister_driver(mxvar_sdriver);
  2343. err_put:
  2344. put_tty_driver(mxvar_sdriver);
  2345. return retval;
  2346. }
  2347. static void __exit mxser_module_exit(void)
  2348. {
  2349. unsigned int i, j;
  2350. pci_unregister_driver(&mxser_driver);
  2351. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2352. if (mxser_boards[i].info != NULL)
  2353. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2354. tty_unregister_device(mxvar_sdriver,
  2355. mxser_boards[i].idx + j);
  2356. tty_unregister_driver(mxvar_sdriver);
  2357. put_tty_driver(mxvar_sdriver);
  2358. for (i = 0; i < MXSER_BOARDS; i++)
  2359. if (mxser_boards[i].info != NULL)
  2360. mxser_release_res(&mxser_boards[i], NULL, 1);
  2361. }
  2362. module_init(mxser_module_init);
  2363. module_exit(mxser_module_exit);