x86.c 105 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. *
  10. * Authors:
  11. * Avi Kivity <avi@qumranet.com>
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Amit Shah <amit.shah@qumranet.com>
  14. * Ben-Ami Yassour <benami@il.ibm.com>
  15. *
  16. * This work is licensed under the terms of the GNU GPL, version 2. See
  17. * the COPYING file in the top-level directory.
  18. *
  19. */
  20. #include <linux/kvm_host.h>
  21. #include "irq.h"
  22. #include "mmu.h"
  23. #include "i8254.h"
  24. #include "tss.h"
  25. #include "kvm_cache_regs.h"
  26. #include "x86.h"
  27. #include <linux/clocksource.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/kvm.h>
  30. #include <linux/fs.h>
  31. #include <linux/pci.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/module.h>
  34. #include <linux/mman.h>
  35. #include <linux/highmem.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/msr.h>
  38. #include <asm/desc.h>
  39. #define MAX_IO_MSRS 256
  40. #define CR0_RESERVED_BITS \
  41. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  42. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  43. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  44. #define CR4_RESERVED_BITS \
  45. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  46. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  47. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  48. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  49. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  50. /* EFER defaults:
  51. * - enable syscall per default because its emulated by KVM
  52. * - enable LME and LMA per default on 64 bit KVM
  53. */
  54. #ifdef CONFIG_X86_64
  55. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  56. #else
  57. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  58. #endif
  59. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  60. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  61. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  62. struct kvm_cpuid_entry2 __user *entries);
  63. struct kvm_x86_ops *kvm_x86_ops;
  64. EXPORT_SYMBOL_GPL(kvm_x86_ops);
  65. struct kvm_stats_debugfs_item debugfs_entries[] = {
  66. { "pf_fixed", VCPU_STAT(pf_fixed) },
  67. { "pf_guest", VCPU_STAT(pf_guest) },
  68. { "tlb_flush", VCPU_STAT(tlb_flush) },
  69. { "invlpg", VCPU_STAT(invlpg) },
  70. { "exits", VCPU_STAT(exits) },
  71. { "io_exits", VCPU_STAT(io_exits) },
  72. { "mmio_exits", VCPU_STAT(mmio_exits) },
  73. { "signal_exits", VCPU_STAT(signal_exits) },
  74. { "irq_window", VCPU_STAT(irq_window_exits) },
  75. { "nmi_window", VCPU_STAT(nmi_window_exits) },
  76. { "halt_exits", VCPU_STAT(halt_exits) },
  77. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  78. { "hypercalls", VCPU_STAT(hypercalls) },
  79. { "request_irq", VCPU_STAT(request_irq_exits) },
  80. { "irq_exits", VCPU_STAT(irq_exits) },
  81. { "host_state_reload", VCPU_STAT(host_state_reload) },
  82. { "efer_reload", VCPU_STAT(efer_reload) },
  83. { "fpu_reload", VCPU_STAT(fpu_reload) },
  84. { "insn_emulation", VCPU_STAT(insn_emulation) },
  85. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  86. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  87. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  88. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  89. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  90. { "mmu_flooded", VM_STAT(mmu_flooded) },
  91. { "mmu_recycled", VM_STAT(mmu_recycled) },
  92. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  93. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  94. { "largepages", VM_STAT(lpages) },
  95. { NULL }
  96. };
  97. struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
  98. int assigned_dev_id)
  99. {
  100. struct list_head *ptr;
  101. struct kvm_assigned_dev_kernel *match;
  102. list_for_each(ptr, head) {
  103. match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
  104. if (match->assigned_dev_id == assigned_dev_id)
  105. return match;
  106. }
  107. return NULL;
  108. }
  109. static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
  110. {
  111. struct kvm_assigned_dev_kernel *assigned_dev;
  112. assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
  113. interrupt_work);
  114. /* This is taken to safely inject irq inside the guest. When
  115. * the interrupt injection (or the ioapic code) uses a
  116. * finer-grained lock, update this
  117. */
  118. mutex_lock(&assigned_dev->kvm->lock);
  119. kvm_set_irq(assigned_dev->kvm,
  120. assigned_dev->guest_irq, 1);
  121. mutex_unlock(&assigned_dev->kvm->lock);
  122. kvm_put_kvm(assigned_dev->kvm);
  123. }
  124. /* FIXME: Implement the OR logic needed to make shared interrupts on
  125. * this line behave properly
  126. */
  127. static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
  128. {
  129. struct kvm_assigned_dev_kernel *assigned_dev =
  130. (struct kvm_assigned_dev_kernel *) dev_id;
  131. kvm_get_kvm(assigned_dev->kvm);
  132. schedule_work(&assigned_dev->interrupt_work);
  133. disable_irq_nosync(irq);
  134. return IRQ_HANDLED;
  135. }
  136. /* Ack the irq line for an assigned device */
  137. static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
  138. {
  139. struct kvm_assigned_dev_kernel *dev;
  140. if (kian->gsi == -1)
  141. return;
  142. dev = container_of(kian, struct kvm_assigned_dev_kernel,
  143. ack_notifier);
  144. kvm_set_irq(dev->kvm, dev->guest_irq, 0);
  145. enable_irq(dev->host_irq);
  146. }
  147. static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
  148. struct kvm_assigned_irq
  149. *assigned_irq)
  150. {
  151. int r = 0;
  152. struct kvm_assigned_dev_kernel *match;
  153. mutex_lock(&kvm->lock);
  154. match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
  155. assigned_irq->assigned_dev_id);
  156. if (!match) {
  157. mutex_unlock(&kvm->lock);
  158. return -EINVAL;
  159. }
  160. if (match->irq_requested) {
  161. match->guest_irq = assigned_irq->guest_irq;
  162. match->ack_notifier.gsi = assigned_irq->guest_irq;
  163. mutex_unlock(&kvm->lock);
  164. return 0;
  165. }
  166. INIT_WORK(&match->interrupt_work,
  167. kvm_assigned_dev_interrupt_work_handler);
  168. if (irqchip_in_kernel(kvm)) {
  169. if (!capable(CAP_SYS_RAWIO)) {
  170. return -EPERM;
  171. goto out;
  172. }
  173. if (assigned_irq->host_irq)
  174. match->host_irq = assigned_irq->host_irq;
  175. else
  176. match->host_irq = match->dev->irq;
  177. match->guest_irq = assigned_irq->guest_irq;
  178. match->ack_notifier.gsi = assigned_irq->guest_irq;
  179. match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
  180. kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
  181. /* Even though this is PCI, we don't want to use shared
  182. * interrupts. Sharing host devices with guest-assigned devices
  183. * on the same interrupt line is not a happy situation: there
  184. * are going to be long delays in accepting, acking, etc.
  185. */
  186. if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
  187. "kvm_assigned_device", (void *)match)) {
  188. printk(KERN_INFO "%s: couldn't allocate irq for pv "
  189. "device\n", __func__);
  190. r = -EIO;
  191. goto out;
  192. }
  193. }
  194. match->irq_requested = true;
  195. out:
  196. mutex_unlock(&kvm->lock);
  197. return r;
  198. }
  199. static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
  200. struct kvm_assigned_pci_dev *assigned_dev)
  201. {
  202. int r = 0;
  203. struct kvm_assigned_dev_kernel *match;
  204. struct pci_dev *dev;
  205. mutex_lock(&kvm->lock);
  206. match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
  207. assigned_dev->assigned_dev_id);
  208. if (match) {
  209. /* device already assigned */
  210. r = -EINVAL;
  211. goto out;
  212. }
  213. match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
  214. if (match == NULL) {
  215. printk(KERN_INFO "%s: Couldn't allocate memory\n",
  216. __func__);
  217. r = -ENOMEM;
  218. goto out;
  219. }
  220. dev = pci_get_bus_and_slot(assigned_dev->busnr,
  221. assigned_dev->devfn);
  222. if (!dev) {
  223. printk(KERN_INFO "%s: host device not found\n", __func__);
  224. r = -EINVAL;
  225. goto out_free;
  226. }
  227. if (pci_enable_device(dev)) {
  228. printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
  229. r = -EBUSY;
  230. goto out_put;
  231. }
  232. r = pci_request_regions(dev, "kvm_assigned_device");
  233. if (r) {
  234. printk(KERN_INFO "%s: Could not get access to device regions\n",
  235. __func__);
  236. goto out_disable;
  237. }
  238. match->assigned_dev_id = assigned_dev->assigned_dev_id;
  239. match->host_busnr = assigned_dev->busnr;
  240. match->host_devfn = assigned_dev->devfn;
  241. match->dev = dev;
  242. match->kvm = kvm;
  243. list_add(&match->list, &kvm->arch.assigned_dev_head);
  244. out:
  245. mutex_unlock(&kvm->lock);
  246. return r;
  247. out_disable:
  248. pci_disable_device(dev);
  249. out_put:
  250. pci_dev_put(dev);
  251. out_free:
  252. kfree(match);
  253. mutex_unlock(&kvm->lock);
  254. return r;
  255. }
  256. static void kvm_free_assigned_devices(struct kvm *kvm)
  257. {
  258. struct list_head *ptr, *ptr2;
  259. struct kvm_assigned_dev_kernel *assigned_dev;
  260. list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
  261. assigned_dev = list_entry(ptr,
  262. struct kvm_assigned_dev_kernel,
  263. list);
  264. if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
  265. free_irq(assigned_dev->host_irq,
  266. (void *)assigned_dev);
  267. kvm_unregister_irq_ack_notifier(kvm,
  268. &assigned_dev->
  269. ack_notifier);
  270. }
  271. if (cancel_work_sync(&assigned_dev->interrupt_work))
  272. /* We had pending work. That means we will have to take
  273. * care of kvm_put_kvm.
  274. */
  275. kvm_put_kvm(kvm);
  276. pci_release_regions(assigned_dev->dev);
  277. pci_disable_device(assigned_dev->dev);
  278. pci_dev_put(assigned_dev->dev);
  279. list_del(&assigned_dev->list);
  280. kfree(assigned_dev);
  281. }
  282. }
  283. unsigned long segment_base(u16 selector)
  284. {
  285. struct descriptor_table gdt;
  286. struct desc_struct *d;
  287. unsigned long table_base;
  288. unsigned long v;
  289. if (selector == 0)
  290. return 0;
  291. asm("sgdt %0" : "=m"(gdt));
  292. table_base = gdt.base;
  293. if (selector & 4) { /* from ldt */
  294. u16 ldt_selector;
  295. asm("sldt %0" : "=g"(ldt_selector));
  296. table_base = segment_base(ldt_selector);
  297. }
  298. d = (struct desc_struct *)(table_base + (selector & ~7));
  299. v = d->base0 | ((unsigned long)d->base1 << 16) |
  300. ((unsigned long)d->base2 << 24);
  301. #ifdef CONFIG_X86_64
  302. if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  303. v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
  304. #endif
  305. return v;
  306. }
  307. EXPORT_SYMBOL_GPL(segment_base);
  308. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  309. {
  310. if (irqchip_in_kernel(vcpu->kvm))
  311. return vcpu->arch.apic_base;
  312. else
  313. return vcpu->arch.apic_base;
  314. }
  315. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  316. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  317. {
  318. /* TODO: reserve bits check */
  319. if (irqchip_in_kernel(vcpu->kvm))
  320. kvm_lapic_set_base(vcpu, data);
  321. else
  322. vcpu->arch.apic_base = data;
  323. }
  324. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  325. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  326. {
  327. WARN_ON(vcpu->arch.exception.pending);
  328. vcpu->arch.exception.pending = true;
  329. vcpu->arch.exception.has_error_code = false;
  330. vcpu->arch.exception.nr = nr;
  331. }
  332. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  333. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  334. u32 error_code)
  335. {
  336. ++vcpu->stat.pf_guest;
  337. if (vcpu->arch.exception.pending) {
  338. if (vcpu->arch.exception.nr == PF_VECTOR) {
  339. printk(KERN_DEBUG "kvm: inject_page_fault:"
  340. " double fault 0x%lx\n", addr);
  341. vcpu->arch.exception.nr = DF_VECTOR;
  342. vcpu->arch.exception.error_code = 0;
  343. } else if (vcpu->arch.exception.nr == DF_VECTOR) {
  344. /* triple fault -> shutdown */
  345. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  346. }
  347. return;
  348. }
  349. vcpu->arch.cr2 = addr;
  350. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  351. }
  352. void kvm_inject_nmi(struct kvm_vcpu *vcpu)
  353. {
  354. vcpu->arch.nmi_pending = 1;
  355. }
  356. EXPORT_SYMBOL_GPL(kvm_inject_nmi);
  357. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  358. {
  359. WARN_ON(vcpu->arch.exception.pending);
  360. vcpu->arch.exception.pending = true;
  361. vcpu->arch.exception.has_error_code = true;
  362. vcpu->arch.exception.nr = nr;
  363. vcpu->arch.exception.error_code = error_code;
  364. }
  365. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  366. static void __queue_exception(struct kvm_vcpu *vcpu)
  367. {
  368. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  369. vcpu->arch.exception.has_error_code,
  370. vcpu->arch.exception.error_code);
  371. }
  372. /*
  373. * Load the pae pdptrs. Return true is they are all valid.
  374. */
  375. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  376. {
  377. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  378. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  379. int i;
  380. int ret;
  381. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  382. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  383. offset * sizeof(u64), sizeof(pdpte));
  384. if (ret < 0) {
  385. ret = 0;
  386. goto out;
  387. }
  388. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  389. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  390. ret = 0;
  391. goto out;
  392. }
  393. }
  394. ret = 1;
  395. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  396. out:
  397. return ret;
  398. }
  399. EXPORT_SYMBOL_GPL(load_pdptrs);
  400. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  401. {
  402. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  403. bool changed = true;
  404. int r;
  405. if (is_long_mode(vcpu) || !is_pae(vcpu))
  406. return false;
  407. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  408. if (r < 0)
  409. goto out;
  410. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  411. out:
  412. return changed;
  413. }
  414. void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  415. {
  416. if (cr0 & CR0_RESERVED_BITS) {
  417. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  418. cr0, vcpu->arch.cr0);
  419. kvm_inject_gp(vcpu, 0);
  420. return;
  421. }
  422. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  423. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  424. kvm_inject_gp(vcpu, 0);
  425. return;
  426. }
  427. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  428. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  429. "and a clear PE flag\n");
  430. kvm_inject_gp(vcpu, 0);
  431. return;
  432. }
  433. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  434. #ifdef CONFIG_X86_64
  435. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  436. int cs_db, cs_l;
  437. if (!is_pae(vcpu)) {
  438. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  439. "in long mode while PAE is disabled\n");
  440. kvm_inject_gp(vcpu, 0);
  441. return;
  442. }
  443. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  444. if (cs_l) {
  445. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  446. "in long mode while CS.L == 1\n");
  447. kvm_inject_gp(vcpu, 0);
  448. return;
  449. }
  450. } else
  451. #endif
  452. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  453. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  454. "reserved bits\n");
  455. kvm_inject_gp(vcpu, 0);
  456. return;
  457. }
  458. }
  459. kvm_x86_ops->set_cr0(vcpu, cr0);
  460. vcpu->arch.cr0 = cr0;
  461. kvm_mmu_reset_context(vcpu);
  462. return;
  463. }
  464. EXPORT_SYMBOL_GPL(kvm_set_cr0);
  465. void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  466. {
  467. kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  468. KVMTRACE_1D(LMSW, vcpu,
  469. (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
  470. handler);
  471. }
  472. EXPORT_SYMBOL_GPL(kvm_lmsw);
  473. void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  474. {
  475. if (cr4 & CR4_RESERVED_BITS) {
  476. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  477. kvm_inject_gp(vcpu, 0);
  478. return;
  479. }
  480. if (is_long_mode(vcpu)) {
  481. if (!(cr4 & X86_CR4_PAE)) {
  482. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  483. "in long mode\n");
  484. kvm_inject_gp(vcpu, 0);
  485. return;
  486. }
  487. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  488. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  489. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  490. kvm_inject_gp(vcpu, 0);
  491. return;
  492. }
  493. if (cr4 & X86_CR4_VMXE) {
  494. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  495. kvm_inject_gp(vcpu, 0);
  496. return;
  497. }
  498. kvm_x86_ops->set_cr4(vcpu, cr4);
  499. vcpu->arch.cr4 = cr4;
  500. kvm_mmu_reset_context(vcpu);
  501. }
  502. EXPORT_SYMBOL_GPL(kvm_set_cr4);
  503. void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  504. {
  505. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  506. kvm_mmu_flush_tlb(vcpu);
  507. return;
  508. }
  509. if (is_long_mode(vcpu)) {
  510. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  511. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  512. kvm_inject_gp(vcpu, 0);
  513. return;
  514. }
  515. } else {
  516. if (is_pae(vcpu)) {
  517. if (cr3 & CR3_PAE_RESERVED_BITS) {
  518. printk(KERN_DEBUG
  519. "set_cr3: #GP, reserved bits\n");
  520. kvm_inject_gp(vcpu, 0);
  521. return;
  522. }
  523. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  524. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  525. "reserved bits\n");
  526. kvm_inject_gp(vcpu, 0);
  527. return;
  528. }
  529. }
  530. /*
  531. * We don't check reserved bits in nonpae mode, because
  532. * this isn't enforced, and VMware depends on this.
  533. */
  534. }
  535. /*
  536. * Does the new cr3 value map to physical memory? (Note, we
  537. * catch an invalid cr3 even in real-mode, because it would
  538. * cause trouble later on when we turn on paging anyway.)
  539. *
  540. * A real CPU would silently accept an invalid cr3 and would
  541. * attempt to use it - with largely undefined (and often hard
  542. * to debug) behavior on the guest side.
  543. */
  544. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  545. kvm_inject_gp(vcpu, 0);
  546. else {
  547. vcpu->arch.cr3 = cr3;
  548. vcpu->arch.mmu.new_cr3(vcpu);
  549. }
  550. }
  551. EXPORT_SYMBOL_GPL(kvm_set_cr3);
  552. void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  553. {
  554. if (cr8 & CR8_RESERVED_BITS) {
  555. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  556. kvm_inject_gp(vcpu, 0);
  557. return;
  558. }
  559. if (irqchip_in_kernel(vcpu->kvm))
  560. kvm_lapic_set_tpr(vcpu, cr8);
  561. else
  562. vcpu->arch.cr8 = cr8;
  563. }
  564. EXPORT_SYMBOL_GPL(kvm_set_cr8);
  565. unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
  566. {
  567. if (irqchip_in_kernel(vcpu->kvm))
  568. return kvm_lapic_get_cr8(vcpu);
  569. else
  570. return vcpu->arch.cr8;
  571. }
  572. EXPORT_SYMBOL_GPL(kvm_get_cr8);
  573. /*
  574. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  575. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  576. *
  577. * This list is modified at module load time to reflect the
  578. * capabilities of the host cpu.
  579. */
  580. static u32 msrs_to_save[] = {
  581. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  582. MSR_K6_STAR,
  583. #ifdef CONFIG_X86_64
  584. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  585. #endif
  586. MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
  587. MSR_IA32_PERF_STATUS,
  588. };
  589. static unsigned num_msrs_to_save;
  590. static u32 emulated_msrs[] = {
  591. MSR_IA32_MISC_ENABLE,
  592. };
  593. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  594. {
  595. if (efer & efer_reserved_bits) {
  596. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  597. efer);
  598. kvm_inject_gp(vcpu, 0);
  599. return;
  600. }
  601. if (is_paging(vcpu)
  602. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  603. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  604. kvm_inject_gp(vcpu, 0);
  605. return;
  606. }
  607. kvm_x86_ops->set_efer(vcpu, efer);
  608. efer &= ~EFER_LMA;
  609. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  610. vcpu->arch.shadow_efer = efer;
  611. }
  612. void kvm_enable_efer_bits(u64 mask)
  613. {
  614. efer_reserved_bits &= ~mask;
  615. }
  616. EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
  617. /*
  618. * Writes msr value into into the appropriate "register".
  619. * Returns 0 on success, non-0 otherwise.
  620. * Assumes vcpu_load() was already called.
  621. */
  622. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  623. {
  624. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  625. }
  626. /*
  627. * Adapt set_msr() to msr_io()'s calling convention
  628. */
  629. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  630. {
  631. return kvm_set_msr(vcpu, index, *data);
  632. }
  633. static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
  634. {
  635. static int version;
  636. struct pvclock_wall_clock wc;
  637. struct timespec now, sys, boot;
  638. if (!wall_clock)
  639. return;
  640. version++;
  641. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  642. /*
  643. * The guest calculates current wall clock time by adding
  644. * system time (updated by kvm_write_guest_time below) to the
  645. * wall clock specified here. guest system time equals host
  646. * system time for us, thus we must fill in host boot time here.
  647. */
  648. now = current_kernel_time();
  649. ktime_get_ts(&sys);
  650. boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
  651. wc.sec = boot.tv_sec;
  652. wc.nsec = boot.tv_nsec;
  653. wc.version = version;
  654. kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
  655. version++;
  656. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  657. }
  658. static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
  659. {
  660. uint32_t quotient, remainder;
  661. /* Don't try to replace with do_div(), this one calculates
  662. * "(dividend << 32) / divisor" */
  663. __asm__ ( "divl %4"
  664. : "=a" (quotient), "=d" (remainder)
  665. : "0" (0), "1" (dividend), "r" (divisor) );
  666. return quotient;
  667. }
  668. static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
  669. {
  670. uint64_t nsecs = 1000000000LL;
  671. int32_t shift = 0;
  672. uint64_t tps64;
  673. uint32_t tps32;
  674. tps64 = tsc_khz * 1000LL;
  675. while (tps64 > nsecs*2) {
  676. tps64 >>= 1;
  677. shift--;
  678. }
  679. tps32 = (uint32_t)tps64;
  680. while (tps32 <= (uint32_t)nsecs) {
  681. tps32 <<= 1;
  682. shift++;
  683. }
  684. hv_clock->tsc_shift = shift;
  685. hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
  686. pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
  687. __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
  688. hv_clock->tsc_to_system_mul);
  689. }
  690. static void kvm_write_guest_time(struct kvm_vcpu *v)
  691. {
  692. struct timespec ts;
  693. unsigned long flags;
  694. struct kvm_vcpu_arch *vcpu = &v->arch;
  695. void *shared_kaddr;
  696. if ((!vcpu->time_page))
  697. return;
  698. if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
  699. kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
  700. vcpu->hv_clock_tsc_khz = tsc_khz;
  701. }
  702. /* Keep irq disabled to prevent changes to the clock */
  703. local_irq_save(flags);
  704. kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
  705. &vcpu->hv_clock.tsc_timestamp);
  706. ktime_get_ts(&ts);
  707. local_irq_restore(flags);
  708. /* With all the info we got, fill in the values */
  709. vcpu->hv_clock.system_time = ts.tv_nsec +
  710. (NSEC_PER_SEC * (u64)ts.tv_sec);
  711. /*
  712. * The interface expects us to write an even number signaling that the
  713. * update is finished. Since the guest won't see the intermediate
  714. * state, we just increase by 2 at the end.
  715. */
  716. vcpu->hv_clock.version += 2;
  717. shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
  718. memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
  719. sizeof(vcpu->hv_clock));
  720. kunmap_atomic(shared_kaddr, KM_USER0);
  721. mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
  722. }
  723. static bool msr_mtrr_valid(unsigned msr)
  724. {
  725. switch (msr) {
  726. case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
  727. case MSR_MTRRfix64K_00000:
  728. case MSR_MTRRfix16K_80000:
  729. case MSR_MTRRfix16K_A0000:
  730. case MSR_MTRRfix4K_C0000:
  731. case MSR_MTRRfix4K_C8000:
  732. case MSR_MTRRfix4K_D0000:
  733. case MSR_MTRRfix4K_D8000:
  734. case MSR_MTRRfix4K_E0000:
  735. case MSR_MTRRfix4K_E8000:
  736. case MSR_MTRRfix4K_F0000:
  737. case MSR_MTRRfix4K_F8000:
  738. case MSR_MTRRdefType:
  739. case MSR_IA32_CR_PAT:
  740. return true;
  741. case 0x2f8:
  742. return true;
  743. }
  744. return false;
  745. }
  746. static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  747. {
  748. if (!msr_mtrr_valid(msr))
  749. return 1;
  750. vcpu->arch.mtrr[msr - 0x200] = data;
  751. return 0;
  752. }
  753. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  754. {
  755. switch (msr) {
  756. case MSR_EFER:
  757. set_efer(vcpu, data);
  758. break;
  759. case MSR_IA32_MC0_STATUS:
  760. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  761. __func__, data);
  762. break;
  763. case MSR_IA32_MCG_STATUS:
  764. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  765. __func__, data);
  766. break;
  767. case MSR_IA32_MCG_CTL:
  768. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
  769. __func__, data);
  770. break;
  771. case MSR_IA32_DEBUGCTLMSR:
  772. if (!data) {
  773. /* We support the non-activated case already */
  774. break;
  775. } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
  776. /* Values other than LBR and BTF are vendor-specific,
  777. thus reserved and should throw a #GP */
  778. return 1;
  779. }
  780. pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
  781. __func__, data);
  782. break;
  783. case MSR_IA32_UCODE_REV:
  784. case MSR_IA32_UCODE_WRITE:
  785. break;
  786. case 0x200 ... 0x2ff:
  787. return set_msr_mtrr(vcpu, msr, data);
  788. case MSR_IA32_APICBASE:
  789. kvm_set_apic_base(vcpu, data);
  790. break;
  791. case MSR_IA32_MISC_ENABLE:
  792. vcpu->arch.ia32_misc_enable_msr = data;
  793. break;
  794. case MSR_KVM_WALL_CLOCK:
  795. vcpu->kvm->arch.wall_clock = data;
  796. kvm_write_wall_clock(vcpu->kvm, data);
  797. break;
  798. case MSR_KVM_SYSTEM_TIME: {
  799. if (vcpu->arch.time_page) {
  800. kvm_release_page_dirty(vcpu->arch.time_page);
  801. vcpu->arch.time_page = NULL;
  802. }
  803. vcpu->arch.time = data;
  804. /* we verify if the enable bit is set... */
  805. if (!(data & 1))
  806. break;
  807. /* ...but clean it before doing the actual write */
  808. vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
  809. down_read(&current->mm->mmap_sem);
  810. vcpu->arch.time_page =
  811. gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
  812. up_read(&current->mm->mmap_sem);
  813. if (is_error_page(vcpu->arch.time_page)) {
  814. kvm_release_page_clean(vcpu->arch.time_page);
  815. vcpu->arch.time_page = NULL;
  816. }
  817. kvm_write_guest_time(vcpu);
  818. break;
  819. }
  820. default:
  821. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  822. return 1;
  823. }
  824. return 0;
  825. }
  826. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  827. /*
  828. * Reads an msr value (of 'msr_index') into 'pdata'.
  829. * Returns 0 on success, non-0 otherwise.
  830. * Assumes vcpu_load() was already called.
  831. */
  832. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  833. {
  834. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  835. }
  836. static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  837. {
  838. if (!msr_mtrr_valid(msr))
  839. return 1;
  840. *pdata = vcpu->arch.mtrr[msr - 0x200];
  841. return 0;
  842. }
  843. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  844. {
  845. u64 data;
  846. switch (msr) {
  847. case 0xc0010010: /* SYSCFG */
  848. case 0xc0010015: /* HWCR */
  849. case MSR_IA32_PLATFORM_ID:
  850. case MSR_IA32_P5_MC_ADDR:
  851. case MSR_IA32_P5_MC_TYPE:
  852. case MSR_IA32_MC0_CTL:
  853. case MSR_IA32_MCG_STATUS:
  854. case MSR_IA32_MCG_CAP:
  855. case MSR_IA32_MCG_CTL:
  856. case MSR_IA32_MC0_MISC:
  857. case MSR_IA32_MC0_MISC+4:
  858. case MSR_IA32_MC0_MISC+8:
  859. case MSR_IA32_MC0_MISC+12:
  860. case MSR_IA32_MC0_MISC+16:
  861. case MSR_IA32_UCODE_REV:
  862. case MSR_IA32_EBL_CR_POWERON:
  863. case MSR_IA32_DEBUGCTLMSR:
  864. case MSR_IA32_LASTBRANCHFROMIP:
  865. case MSR_IA32_LASTBRANCHTOIP:
  866. case MSR_IA32_LASTINTFROMIP:
  867. case MSR_IA32_LASTINTTOIP:
  868. data = 0;
  869. break;
  870. case MSR_MTRRcap:
  871. data = 0x500 | KVM_NR_VAR_MTRR;
  872. break;
  873. case 0x200 ... 0x2ff:
  874. return get_msr_mtrr(vcpu, msr, pdata);
  875. case 0xcd: /* fsb frequency */
  876. data = 3;
  877. break;
  878. case MSR_IA32_APICBASE:
  879. data = kvm_get_apic_base(vcpu);
  880. break;
  881. case MSR_IA32_MISC_ENABLE:
  882. data = vcpu->arch.ia32_misc_enable_msr;
  883. break;
  884. case MSR_IA32_PERF_STATUS:
  885. /* TSC increment by tick */
  886. data = 1000ULL;
  887. /* CPU multiplier */
  888. data |= (((uint64_t)4ULL) << 40);
  889. break;
  890. case MSR_EFER:
  891. data = vcpu->arch.shadow_efer;
  892. break;
  893. case MSR_KVM_WALL_CLOCK:
  894. data = vcpu->kvm->arch.wall_clock;
  895. break;
  896. case MSR_KVM_SYSTEM_TIME:
  897. data = vcpu->arch.time;
  898. break;
  899. default:
  900. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  901. return 1;
  902. }
  903. *pdata = data;
  904. return 0;
  905. }
  906. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  907. /*
  908. * Read or write a bunch of msrs. All parameters are kernel addresses.
  909. *
  910. * @return number of msrs set successfully.
  911. */
  912. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  913. struct kvm_msr_entry *entries,
  914. int (*do_msr)(struct kvm_vcpu *vcpu,
  915. unsigned index, u64 *data))
  916. {
  917. int i;
  918. vcpu_load(vcpu);
  919. down_read(&vcpu->kvm->slots_lock);
  920. for (i = 0; i < msrs->nmsrs; ++i)
  921. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  922. break;
  923. up_read(&vcpu->kvm->slots_lock);
  924. vcpu_put(vcpu);
  925. return i;
  926. }
  927. /*
  928. * Read or write a bunch of msrs. Parameters are user addresses.
  929. *
  930. * @return number of msrs set successfully.
  931. */
  932. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  933. int (*do_msr)(struct kvm_vcpu *vcpu,
  934. unsigned index, u64 *data),
  935. int writeback)
  936. {
  937. struct kvm_msrs msrs;
  938. struct kvm_msr_entry *entries;
  939. int r, n;
  940. unsigned size;
  941. r = -EFAULT;
  942. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  943. goto out;
  944. r = -E2BIG;
  945. if (msrs.nmsrs >= MAX_IO_MSRS)
  946. goto out;
  947. r = -ENOMEM;
  948. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  949. entries = vmalloc(size);
  950. if (!entries)
  951. goto out;
  952. r = -EFAULT;
  953. if (copy_from_user(entries, user_msrs->entries, size))
  954. goto out_free;
  955. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  956. if (r < 0)
  957. goto out_free;
  958. r = -EFAULT;
  959. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  960. goto out_free;
  961. r = n;
  962. out_free:
  963. vfree(entries);
  964. out:
  965. return r;
  966. }
  967. int kvm_dev_ioctl_check_extension(long ext)
  968. {
  969. int r;
  970. switch (ext) {
  971. case KVM_CAP_IRQCHIP:
  972. case KVM_CAP_HLT:
  973. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  974. case KVM_CAP_USER_MEMORY:
  975. case KVM_CAP_SET_TSS_ADDR:
  976. case KVM_CAP_EXT_CPUID:
  977. case KVM_CAP_CLOCKSOURCE:
  978. case KVM_CAP_PIT:
  979. case KVM_CAP_NOP_IO_DELAY:
  980. case KVM_CAP_MP_STATE:
  981. case KVM_CAP_SYNC_MMU:
  982. r = 1;
  983. break;
  984. case KVM_CAP_COALESCED_MMIO:
  985. r = KVM_COALESCED_MMIO_PAGE_OFFSET;
  986. break;
  987. case KVM_CAP_VAPIC:
  988. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  989. break;
  990. case KVM_CAP_NR_VCPUS:
  991. r = KVM_MAX_VCPUS;
  992. break;
  993. case KVM_CAP_NR_MEMSLOTS:
  994. r = KVM_MEMORY_SLOTS;
  995. break;
  996. case KVM_CAP_PV_MMU:
  997. r = !tdp_enabled;
  998. break;
  999. default:
  1000. r = 0;
  1001. break;
  1002. }
  1003. return r;
  1004. }
  1005. long kvm_arch_dev_ioctl(struct file *filp,
  1006. unsigned int ioctl, unsigned long arg)
  1007. {
  1008. void __user *argp = (void __user *)arg;
  1009. long r;
  1010. switch (ioctl) {
  1011. case KVM_GET_MSR_INDEX_LIST: {
  1012. struct kvm_msr_list __user *user_msr_list = argp;
  1013. struct kvm_msr_list msr_list;
  1014. unsigned n;
  1015. r = -EFAULT;
  1016. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  1017. goto out;
  1018. n = msr_list.nmsrs;
  1019. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  1020. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  1021. goto out;
  1022. r = -E2BIG;
  1023. if (n < num_msrs_to_save)
  1024. goto out;
  1025. r = -EFAULT;
  1026. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  1027. num_msrs_to_save * sizeof(u32)))
  1028. goto out;
  1029. if (copy_to_user(user_msr_list->indices
  1030. + num_msrs_to_save * sizeof(u32),
  1031. &emulated_msrs,
  1032. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  1033. goto out;
  1034. r = 0;
  1035. break;
  1036. }
  1037. case KVM_GET_SUPPORTED_CPUID: {
  1038. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1039. struct kvm_cpuid2 cpuid;
  1040. r = -EFAULT;
  1041. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1042. goto out;
  1043. r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
  1044. cpuid_arg->entries);
  1045. if (r)
  1046. goto out;
  1047. r = -EFAULT;
  1048. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1049. goto out;
  1050. r = 0;
  1051. break;
  1052. }
  1053. default:
  1054. r = -EINVAL;
  1055. }
  1056. out:
  1057. return r;
  1058. }
  1059. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  1060. {
  1061. kvm_x86_ops->vcpu_load(vcpu, cpu);
  1062. kvm_write_guest_time(vcpu);
  1063. }
  1064. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  1065. {
  1066. kvm_x86_ops->vcpu_put(vcpu);
  1067. kvm_put_guest_fpu(vcpu);
  1068. }
  1069. static int is_efer_nx(void)
  1070. {
  1071. u64 efer;
  1072. rdmsrl(MSR_EFER, efer);
  1073. return efer & EFER_NX;
  1074. }
  1075. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  1076. {
  1077. int i;
  1078. struct kvm_cpuid_entry2 *e, *entry;
  1079. entry = NULL;
  1080. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  1081. e = &vcpu->arch.cpuid_entries[i];
  1082. if (e->function == 0x80000001) {
  1083. entry = e;
  1084. break;
  1085. }
  1086. }
  1087. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  1088. entry->edx &= ~(1 << 20);
  1089. printk(KERN_INFO "kvm: guest NX capability removed\n");
  1090. }
  1091. }
  1092. /* when an old userspace process fills a new kernel module */
  1093. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  1094. struct kvm_cpuid *cpuid,
  1095. struct kvm_cpuid_entry __user *entries)
  1096. {
  1097. int r, i;
  1098. struct kvm_cpuid_entry *cpuid_entries;
  1099. r = -E2BIG;
  1100. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  1101. goto out;
  1102. r = -ENOMEM;
  1103. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  1104. if (!cpuid_entries)
  1105. goto out;
  1106. r = -EFAULT;
  1107. if (copy_from_user(cpuid_entries, entries,
  1108. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  1109. goto out_free;
  1110. for (i = 0; i < cpuid->nent; i++) {
  1111. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  1112. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  1113. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  1114. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  1115. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  1116. vcpu->arch.cpuid_entries[i].index = 0;
  1117. vcpu->arch.cpuid_entries[i].flags = 0;
  1118. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  1119. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  1120. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  1121. }
  1122. vcpu->arch.cpuid_nent = cpuid->nent;
  1123. cpuid_fix_nx_cap(vcpu);
  1124. r = 0;
  1125. out_free:
  1126. vfree(cpuid_entries);
  1127. out:
  1128. return r;
  1129. }
  1130. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  1131. struct kvm_cpuid2 *cpuid,
  1132. struct kvm_cpuid_entry2 __user *entries)
  1133. {
  1134. int r;
  1135. r = -E2BIG;
  1136. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  1137. goto out;
  1138. r = -EFAULT;
  1139. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  1140. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  1141. goto out;
  1142. vcpu->arch.cpuid_nent = cpuid->nent;
  1143. return 0;
  1144. out:
  1145. return r;
  1146. }
  1147. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  1148. struct kvm_cpuid2 *cpuid,
  1149. struct kvm_cpuid_entry2 __user *entries)
  1150. {
  1151. int r;
  1152. r = -E2BIG;
  1153. if (cpuid->nent < vcpu->arch.cpuid_nent)
  1154. goto out;
  1155. r = -EFAULT;
  1156. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  1157. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  1158. goto out;
  1159. return 0;
  1160. out:
  1161. cpuid->nent = vcpu->arch.cpuid_nent;
  1162. return r;
  1163. }
  1164. static inline u32 bit(int bitno)
  1165. {
  1166. return 1 << (bitno & 31);
  1167. }
  1168. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  1169. u32 index)
  1170. {
  1171. entry->function = function;
  1172. entry->index = index;
  1173. cpuid_count(entry->function, entry->index,
  1174. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  1175. entry->flags = 0;
  1176. }
  1177. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  1178. u32 index, int *nent, int maxnent)
  1179. {
  1180. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  1181. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  1182. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  1183. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  1184. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  1185. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  1186. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  1187. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  1188. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  1189. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  1190. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  1191. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  1192. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  1193. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  1194. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  1195. bit(X86_FEATURE_PGE) |
  1196. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  1197. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  1198. bit(X86_FEATURE_SYSCALL) |
  1199. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  1200. #ifdef CONFIG_X86_64
  1201. bit(X86_FEATURE_LM) |
  1202. #endif
  1203. bit(X86_FEATURE_MMXEXT) |
  1204. bit(X86_FEATURE_3DNOWEXT) |
  1205. bit(X86_FEATURE_3DNOW);
  1206. const u32 kvm_supported_word3_x86_features =
  1207. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  1208. const u32 kvm_supported_word6_x86_features =
  1209. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  1210. /* all func 2 cpuid_count() should be called on the same cpu */
  1211. get_cpu();
  1212. do_cpuid_1_ent(entry, function, index);
  1213. ++*nent;
  1214. switch (function) {
  1215. case 0:
  1216. entry->eax = min(entry->eax, (u32)0xb);
  1217. break;
  1218. case 1:
  1219. entry->edx &= kvm_supported_word0_x86_features;
  1220. entry->ecx &= kvm_supported_word3_x86_features;
  1221. break;
  1222. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  1223. * may return different values. This forces us to get_cpu() before
  1224. * issuing the first command, and also to emulate this annoying behavior
  1225. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  1226. case 2: {
  1227. int t, times = entry->eax & 0xff;
  1228. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  1229. for (t = 1; t < times && *nent < maxnent; ++t) {
  1230. do_cpuid_1_ent(&entry[t], function, 0);
  1231. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  1232. ++*nent;
  1233. }
  1234. break;
  1235. }
  1236. /* function 4 and 0xb have additional index. */
  1237. case 4: {
  1238. int i, cache_type;
  1239. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1240. /* read more entries until cache_type is zero */
  1241. for (i = 1; *nent < maxnent; ++i) {
  1242. cache_type = entry[i - 1].eax & 0x1f;
  1243. if (!cache_type)
  1244. break;
  1245. do_cpuid_1_ent(&entry[i], function, i);
  1246. entry[i].flags |=
  1247. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1248. ++*nent;
  1249. }
  1250. break;
  1251. }
  1252. case 0xb: {
  1253. int i, level_type;
  1254. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1255. /* read more entries until level_type is zero */
  1256. for (i = 1; *nent < maxnent; ++i) {
  1257. level_type = entry[i - 1].ecx & 0xff;
  1258. if (!level_type)
  1259. break;
  1260. do_cpuid_1_ent(&entry[i], function, i);
  1261. entry[i].flags |=
  1262. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1263. ++*nent;
  1264. }
  1265. break;
  1266. }
  1267. case 0x80000000:
  1268. entry->eax = min(entry->eax, 0x8000001a);
  1269. break;
  1270. case 0x80000001:
  1271. entry->edx &= kvm_supported_word1_x86_features;
  1272. entry->ecx &= kvm_supported_word6_x86_features;
  1273. break;
  1274. }
  1275. put_cpu();
  1276. }
  1277. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  1278. struct kvm_cpuid_entry2 __user *entries)
  1279. {
  1280. struct kvm_cpuid_entry2 *cpuid_entries;
  1281. int limit, nent = 0, r = -E2BIG;
  1282. u32 func;
  1283. if (cpuid->nent < 1)
  1284. goto out;
  1285. r = -ENOMEM;
  1286. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  1287. if (!cpuid_entries)
  1288. goto out;
  1289. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  1290. limit = cpuid_entries[0].eax;
  1291. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  1292. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1293. &nent, cpuid->nent);
  1294. r = -E2BIG;
  1295. if (nent >= cpuid->nent)
  1296. goto out_free;
  1297. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  1298. limit = cpuid_entries[nent - 1].eax;
  1299. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  1300. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1301. &nent, cpuid->nent);
  1302. r = -EFAULT;
  1303. if (copy_to_user(entries, cpuid_entries,
  1304. nent * sizeof(struct kvm_cpuid_entry2)))
  1305. goto out_free;
  1306. cpuid->nent = nent;
  1307. r = 0;
  1308. out_free:
  1309. vfree(cpuid_entries);
  1310. out:
  1311. return r;
  1312. }
  1313. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  1314. struct kvm_lapic_state *s)
  1315. {
  1316. vcpu_load(vcpu);
  1317. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  1318. vcpu_put(vcpu);
  1319. return 0;
  1320. }
  1321. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  1322. struct kvm_lapic_state *s)
  1323. {
  1324. vcpu_load(vcpu);
  1325. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  1326. kvm_apic_post_state_restore(vcpu);
  1327. vcpu_put(vcpu);
  1328. return 0;
  1329. }
  1330. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  1331. struct kvm_interrupt *irq)
  1332. {
  1333. if (irq->irq < 0 || irq->irq >= 256)
  1334. return -EINVAL;
  1335. if (irqchip_in_kernel(vcpu->kvm))
  1336. return -ENXIO;
  1337. vcpu_load(vcpu);
  1338. set_bit(irq->irq, vcpu->arch.irq_pending);
  1339. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  1340. vcpu_put(vcpu);
  1341. return 0;
  1342. }
  1343. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  1344. struct kvm_tpr_access_ctl *tac)
  1345. {
  1346. if (tac->flags)
  1347. return -EINVAL;
  1348. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  1349. return 0;
  1350. }
  1351. long kvm_arch_vcpu_ioctl(struct file *filp,
  1352. unsigned int ioctl, unsigned long arg)
  1353. {
  1354. struct kvm_vcpu *vcpu = filp->private_data;
  1355. void __user *argp = (void __user *)arg;
  1356. int r;
  1357. struct kvm_lapic_state *lapic = NULL;
  1358. switch (ioctl) {
  1359. case KVM_GET_LAPIC: {
  1360. lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
  1361. r = -ENOMEM;
  1362. if (!lapic)
  1363. goto out;
  1364. r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
  1365. if (r)
  1366. goto out;
  1367. r = -EFAULT;
  1368. if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
  1369. goto out;
  1370. r = 0;
  1371. break;
  1372. }
  1373. case KVM_SET_LAPIC: {
  1374. lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
  1375. r = -ENOMEM;
  1376. if (!lapic)
  1377. goto out;
  1378. r = -EFAULT;
  1379. if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
  1380. goto out;
  1381. r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
  1382. if (r)
  1383. goto out;
  1384. r = 0;
  1385. break;
  1386. }
  1387. case KVM_INTERRUPT: {
  1388. struct kvm_interrupt irq;
  1389. r = -EFAULT;
  1390. if (copy_from_user(&irq, argp, sizeof irq))
  1391. goto out;
  1392. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  1393. if (r)
  1394. goto out;
  1395. r = 0;
  1396. break;
  1397. }
  1398. case KVM_SET_CPUID: {
  1399. struct kvm_cpuid __user *cpuid_arg = argp;
  1400. struct kvm_cpuid cpuid;
  1401. r = -EFAULT;
  1402. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1403. goto out;
  1404. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  1405. if (r)
  1406. goto out;
  1407. break;
  1408. }
  1409. case KVM_SET_CPUID2: {
  1410. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1411. struct kvm_cpuid2 cpuid;
  1412. r = -EFAULT;
  1413. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1414. goto out;
  1415. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1416. cpuid_arg->entries);
  1417. if (r)
  1418. goto out;
  1419. break;
  1420. }
  1421. case KVM_GET_CPUID2: {
  1422. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1423. struct kvm_cpuid2 cpuid;
  1424. r = -EFAULT;
  1425. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1426. goto out;
  1427. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1428. cpuid_arg->entries);
  1429. if (r)
  1430. goto out;
  1431. r = -EFAULT;
  1432. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1433. goto out;
  1434. r = 0;
  1435. break;
  1436. }
  1437. case KVM_GET_MSRS:
  1438. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1439. break;
  1440. case KVM_SET_MSRS:
  1441. r = msr_io(vcpu, argp, do_set_msr, 0);
  1442. break;
  1443. case KVM_TPR_ACCESS_REPORTING: {
  1444. struct kvm_tpr_access_ctl tac;
  1445. r = -EFAULT;
  1446. if (copy_from_user(&tac, argp, sizeof tac))
  1447. goto out;
  1448. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1449. if (r)
  1450. goto out;
  1451. r = -EFAULT;
  1452. if (copy_to_user(argp, &tac, sizeof tac))
  1453. goto out;
  1454. r = 0;
  1455. break;
  1456. };
  1457. case KVM_SET_VAPIC_ADDR: {
  1458. struct kvm_vapic_addr va;
  1459. r = -EINVAL;
  1460. if (!irqchip_in_kernel(vcpu->kvm))
  1461. goto out;
  1462. r = -EFAULT;
  1463. if (copy_from_user(&va, argp, sizeof va))
  1464. goto out;
  1465. r = 0;
  1466. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1467. break;
  1468. }
  1469. default:
  1470. r = -EINVAL;
  1471. }
  1472. out:
  1473. if (lapic)
  1474. kfree(lapic);
  1475. return r;
  1476. }
  1477. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1478. {
  1479. int ret;
  1480. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1481. return -1;
  1482. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1483. return ret;
  1484. }
  1485. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1486. u32 kvm_nr_mmu_pages)
  1487. {
  1488. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1489. return -EINVAL;
  1490. down_write(&kvm->slots_lock);
  1491. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1492. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1493. up_write(&kvm->slots_lock);
  1494. return 0;
  1495. }
  1496. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1497. {
  1498. return kvm->arch.n_alloc_mmu_pages;
  1499. }
  1500. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1501. {
  1502. int i;
  1503. struct kvm_mem_alias *alias;
  1504. for (i = 0; i < kvm->arch.naliases; ++i) {
  1505. alias = &kvm->arch.aliases[i];
  1506. if (gfn >= alias->base_gfn
  1507. && gfn < alias->base_gfn + alias->npages)
  1508. return alias->target_gfn + gfn - alias->base_gfn;
  1509. }
  1510. return gfn;
  1511. }
  1512. /*
  1513. * Set a new alias region. Aliases map a portion of physical memory into
  1514. * another portion. This is useful for memory windows, for example the PC
  1515. * VGA region.
  1516. */
  1517. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1518. struct kvm_memory_alias *alias)
  1519. {
  1520. int r, n;
  1521. struct kvm_mem_alias *p;
  1522. r = -EINVAL;
  1523. /* General sanity checks */
  1524. if (alias->memory_size & (PAGE_SIZE - 1))
  1525. goto out;
  1526. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1527. goto out;
  1528. if (alias->slot >= KVM_ALIAS_SLOTS)
  1529. goto out;
  1530. if (alias->guest_phys_addr + alias->memory_size
  1531. < alias->guest_phys_addr)
  1532. goto out;
  1533. if (alias->target_phys_addr + alias->memory_size
  1534. < alias->target_phys_addr)
  1535. goto out;
  1536. down_write(&kvm->slots_lock);
  1537. spin_lock(&kvm->mmu_lock);
  1538. p = &kvm->arch.aliases[alias->slot];
  1539. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1540. p->npages = alias->memory_size >> PAGE_SHIFT;
  1541. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1542. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1543. if (kvm->arch.aliases[n - 1].npages)
  1544. break;
  1545. kvm->arch.naliases = n;
  1546. spin_unlock(&kvm->mmu_lock);
  1547. kvm_mmu_zap_all(kvm);
  1548. up_write(&kvm->slots_lock);
  1549. return 0;
  1550. out:
  1551. return r;
  1552. }
  1553. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1554. {
  1555. int r;
  1556. r = 0;
  1557. switch (chip->chip_id) {
  1558. case KVM_IRQCHIP_PIC_MASTER:
  1559. memcpy(&chip->chip.pic,
  1560. &pic_irqchip(kvm)->pics[0],
  1561. sizeof(struct kvm_pic_state));
  1562. break;
  1563. case KVM_IRQCHIP_PIC_SLAVE:
  1564. memcpy(&chip->chip.pic,
  1565. &pic_irqchip(kvm)->pics[1],
  1566. sizeof(struct kvm_pic_state));
  1567. break;
  1568. case KVM_IRQCHIP_IOAPIC:
  1569. memcpy(&chip->chip.ioapic,
  1570. ioapic_irqchip(kvm),
  1571. sizeof(struct kvm_ioapic_state));
  1572. break;
  1573. default:
  1574. r = -EINVAL;
  1575. break;
  1576. }
  1577. return r;
  1578. }
  1579. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1580. {
  1581. int r;
  1582. r = 0;
  1583. switch (chip->chip_id) {
  1584. case KVM_IRQCHIP_PIC_MASTER:
  1585. memcpy(&pic_irqchip(kvm)->pics[0],
  1586. &chip->chip.pic,
  1587. sizeof(struct kvm_pic_state));
  1588. break;
  1589. case KVM_IRQCHIP_PIC_SLAVE:
  1590. memcpy(&pic_irqchip(kvm)->pics[1],
  1591. &chip->chip.pic,
  1592. sizeof(struct kvm_pic_state));
  1593. break;
  1594. case KVM_IRQCHIP_IOAPIC:
  1595. memcpy(ioapic_irqchip(kvm),
  1596. &chip->chip.ioapic,
  1597. sizeof(struct kvm_ioapic_state));
  1598. break;
  1599. default:
  1600. r = -EINVAL;
  1601. break;
  1602. }
  1603. kvm_pic_update_irq(pic_irqchip(kvm));
  1604. return r;
  1605. }
  1606. static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
  1607. {
  1608. int r = 0;
  1609. memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
  1610. return r;
  1611. }
  1612. static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
  1613. {
  1614. int r = 0;
  1615. memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
  1616. kvm_pit_load_count(kvm, 0, ps->channels[0].count);
  1617. return r;
  1618. }
  1619. /*
  1620. * Get (and clear) the dirty memory log for a memory slot.
  1621. */
  1622. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1623. struct kvm_dirty_log *log)
  1624. {
  1625. int r;
  1626. int n;
  1627. struct kvm_memory_slot *memslot;
  1628. int is_dirty = 0;
  1629. down_write(&kvm->slots_lock);
  1630. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1631. if (r)
  1632. goto out;
  1633. /* If nothing is dirty, don't bother messing with page tables. */
  1634. if (is_dirty) {
  1635. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1636. kvm_flush_remote_tlbs(kvm);
  1637. memslot = &kvm->memslots[log->slot];
  1638. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1639. memset(memslot->dirty_bitmap, 0, n);
  1640. }
  1641. r = 0;
  1642. out:
  1643. up_write(&kvm->slots_lock);
  1644. return r;
  1645. }
  1646. long kvm_arch_vm_ioctl(struct file *filp,
  1647. unsigned int ioctl, unsigned long arg)
  1648. {
  1649. struct kvm *kvm = filp->private_data;
  1650. void __user *argp = (void __user *)arg;
  1651. int r = -EINVAL;
  1652. /*
  1653. * This union makes it completely explicit to gcc-3.x
  1654. * that these two variables' stack usage should be
  1655. * combined, not added together.
  1656. */
  1657. union {
  1658. struct kvm_pit_state ps;
  1659. struct kvm_memory_alias alias;
  1660. } u;
  1661. switch (ioctl) {
  1662. case KVM_SET_TSS_ADDR:
  1663. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1664. if (r < 0)
  1665. goto out;
  1666. break;
  1667. case KVM_SET_MEMORY_REGION: {
  1668. struct kvm_memory_region kvm_mem;
  1669. struct kvm_userspace_memory_region kvm_userspace_mem;
  1670. r = -EFAULT;
  1671. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1672. goto out;
  1673. kvm_userspace_mem.slot = kvm_mem.slot;
  1674. kvm_userspace_mem.flags = kvm_mem.flags;
  1675. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1676. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1677. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1678. if (r)
  1679. goto out;
  1680. break;
  1681. }
  1682. case KVM_SET_NR_MMU_PAGES:
  1683. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1684. if (r)
  1685. goto out;
  1686. break;
  1687. case KVM_GET_NR_MMU_PAGES:
  1688. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1689. break;
  1690. case KVM_SET_MEMORY_ALIAS:
  1691. r = -EFAULT;
  1692. if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
  1693. goto out;
  1694. r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
  1695. if (r)
  1696. goto out;
  1697. break;
  1698. case KVM_CREATE_IRQCHIP:
  1699. r = -ENOMEM;
  1700. kvm->arch.vpic = kvm_create_pic(kvm);
  1701. if (kvm->arch.vpic) {
  1702. r = kvm_ioapic_init(kvm);
  1703. if (r) {
  1704. kfree(kvm->arch.vpic);
  1705. kvm->arch.vpic = NULL;
  1706. goto out;
  1707. }
  1708. } else
  1709. goto out;
  1710. break;
  1711. case KVM_CREATE_PIT:
  1712. r = -ENOMEM;
  1713. kvm->arch.vpit = kvm_create_pit(kvm);
  1714. if (kvm->arch.vpit)
  1715. r = 0;
  1716. break;
  1717. case KVM_IRQ_LINE: {
  1718. struct kvm_irq_level irq_event;
  1719. r = -EFAULT;
  1720. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1721. goto out;
  1722. if (irqchip_in_kernel(kvm)) {
  1723. mutex_lock(&kvm->lock);
  1724. if (irq_event.irq < 16)
  1725. kvm_pic_set_irq(pic_irqchip(kvm),
  1726. irq_event.irq,
  1727. irq_event.level);
  1728. kvm_ioapic_set_irq(kvm->arch.vioapic,
  1729. irq_event.irq,
  1730. irq_event.level);
  1731. mutex_unlock(&kvm->lock);
  1732. r = 0;
  1733. }
  1734. break;
  1735. }
  1736. case KVM_GET_IRQCHIP: {
  1737. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1738. struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
  1739. r = -ENOMEM;
  1740. if (!chip)
  1741. goto out;
  1742. r = -EFAULT;
  1743. if (copy_from_user(chip, argp, sizeof *chip))
  1744. goto get_irqchip_out;
  1745. r = -ENXIO;
  1746. if (!irqchip_in_kernel(kvm))
  1747. goto get_irqchip_out;
  1748. r = kvm_vm_ioctl_get_irqchip(kvm, chip);
  1749. if (r)
  1750. goto get_irqchip_out;
  1751. r = -EFAULT;
  1752. if (copy_to_user(argp, chip, sizeof *chip))
  1753. goto get_irqchip_out;
  1754. r = 0;
  1755. get_irqchip_out:
  1756. kfree(chip);
  1757. if (r)
  1758. goto out;
  1759. break;
  1760. }
  1761. case KVM_SET_IRQCHIP: {
  1762. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1763. struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
  1764. r = -ENOMEM;
  1765. if (!chip)
  1766. goto out;
  1767. r = -EFAULT;
  1768. if (copy_from_user(chip, argp, sizeof *chip))
  1769. goto set_irqchip_out;
  1770. r = -ENXIO;
  1771. if (!irqchip_in_kernel(kvm))
  1772. goto set_irqchip_out;
  1773. r = kvm_vm_ioctl_set_irqchip(kvm, chip);
  1774. if (r)
  1775. goto set_irqchip_out;
  1776. r = 0;
  1777. set_irqchip_out:
  1778. kfree(chip);
  1779. if (r)
  1780. goto out;
  1781. break;
  1782. }
  1783. case KVM_ASSIGN_PCI_DEVICE: {
  1784. struct kvm_assigned_pci_dev assigned_dev;
  1785. r = -EFAULT;
  1786. if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
  1787. goto out;
  1788. r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
  1789. if (r)
  1790. goto out;
  1791. break;
  1792. }
  1793. case KVM_ASSIGN_IRQ: {
  1794. struct kvm_assigned_irq assigned_irq;
  1795. r = -EFAULT;
  1796. if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
  1797. goto out;
  1798. r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
  1799. if (r)
  1800. goto out;
  1801. break;
  1802. }
  1803. case KVM_GET_PIT: {
  1804. r = -EFAULT;
  1805. if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
  1806. goto out;
  1807. r = -ENXIO;
  1808. if (!kvm->arch.vpit)
  1809. goto out;
  1810. r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
  1811. if (r)
  1812. goto out;
  1813. r = -EFAULT;
  1814. if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
  1815. goto out;
  1816. r = 0;
  1817. break;
  1818. }
  1819. case KVM_SET_PIT: {
  1820. r = -EFAULT;
  1821. if (copy_from_user(&u.ps, argp, sizeof u.ps))
  1822. goto out;
  1823. r = -ENXIO;
  1824. if (!kvm->arch.vpit)
  1825. goto out;
  1826. r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
  1827. if (r)
  1828. goto out;
  1829. r = 0;
  1830. break;
  1831. }
  1832. default:
  1833. ;
  1834. }
  1835. out:
  1836. return r;
  1837. }
  1838. static void kvm_init_msr_list(void)
  1839. {
  1840. u32 dummy[2];
  1841. unsigned i, j;
  1842. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1843. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1844. continue;
  1845. if (j < i)
  1846. msrs_to_save[j] = msrs_to_save[i];
  1847. j++;
  1848. }
  1849. num_msrs_to_save = j;
  1850. }
  1851. /*
  1852. * Only apic need an MMIO device hook, so shortcut now..
  1853. */
  1854. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1855. gpa_t addr, int len,
  1856. int is_write)
  1857. {
  1858. struct kvm_io_device *dev;
  1859. if (vcpu->arch.apic) {
  1860. dev = &vcpu->arch.apic->dev;
  1861. if (dev->in_range(dev, addr, len, is_write))
  1862. return dev;
  1863. }
  1864. return NULL;
  1865. }
  1866. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1867. gpa_t addr, int len,
  1868. int is_write)
  1869. {
  1870. struct kvm_io_device *dev;
  1871. dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
  1872. if (dev == NULL)
  1873. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
  1874. is_write);
  1875. return dev;
  1876. }
  1877. int emulator_read_std(unsigned long addr,
  1878. void *val,
  1879. unsigned int bytes,
  1880. struct kvm_vcpu *vcpu)
  1881. {
  1882. void *data = val;
  1883. int r = X86EMUL_CONTINUE;
  1884. while (bytes) {
  1885. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1886. unsigned offset = addr & (PAGE_SIZE-1);
  1887. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1888. int ret;
  1889. if (gpa == UNMAPPED_GVA) {
  1890. r = X86EMUL_PROPAGATE_FAULT;
  1891. goto out;
  1892. }
  1893. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1894. if (ret < 0) {
  1895. r = X86EMUL_UNHANDLEABLE;
  1896. goto out;
  1897. }
  1898. bytes -= tocopy;
  1899. data += tocopy;
  1900. addr += tocopy;
  1901. }
  1902. out:
  1903. return r;
  1904. }
  1905. EXPORT_SYMBOL_GPL(emulator_read_std);
  1906. static int emulator_read_emulated(unsigned long addr,
  1907. void *val,
  1908. unsigned int bytes,
  1909. struct kvm_vcpu *vcpu)
  1910. {
  1911. struct kvm_io_device *mmio_dev;
  1912. gpa_t gpa;
  1913. if (vcpu->mmio_read_completed) {
  1914. memcpy(val, vcpu->mmio_data, bytes);
  1915. vcpu->mmio_read_completed = 0;
  1916. return X86EMUL_CONTINUE;
  1917. }
  1918. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1919. /* For APIC access vmexit */
  1920. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1921. goto mmio;
  1922. if (emulator_read_std(addr, val, bytes, vcpu)
  1923. == X86EMUL_CONTINUE)
  1924. return X86EMUL_CONTINUE;
  1925. if (gpa == UNMAPPED_GVA)
  1926. return X86EMUL_PROPAGATE_FAULT;
  1927. mmio:
  1928. /*
  1929. * Is this MMIO handled locally?
  1930. */
  1931. mutex_lock(&vcpu->kvm->lock);
  1932. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
  1933. if (mmio_dev) {
  1934. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1935. mutex_unlock(&vcpu->kvm->lock);
  1936. return X86EMUL_CONTINUE;
  1937. }
  1938. mutex_unlock(&vcpu->kvm->lock);
  1939. vcpu->mmio_needed = 1;
  1940. vcpu->mmio_phys_addr = gpa;
  1941. vcpu->mmio_size = bytes;
  1942. vcpu->mmio_is_write = 0;
  1943. return X86EMUL_UNHANDLEABLE;
  1944. }
  1945. int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1946. const void *val, int bytes)
  1947. {
  1948. int ret;
  1949. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1950. if (ret < 0)
  1951. return 0;
  1952. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1953. return 1;
  1954. }
  1955. static int emulator_write_emulated_onepage(unsigned long addr,
  1956. const void *val,
  1957. unsigned int bytes,
  1958. struct kvm_vcpu *vcpu)
  1959. {
  1960. struct kvm_io_device *mmio_dev;
  1961. gpa_t gpa;
  1962. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1963. if (gpa == UNMAPPED_GVA) {
  1964. kvm_inject_page_fault(vcpu, addr, 2);
  1965. return X86EMUL_PROPAGATE_FAULT;
  1966. }
  1967. /* For APIC access vmexit */
  1968. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1969. goto mmio;
  1970. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1971. return X86EMUL_CONTINUE;
  1972. mmio:
  1973. /*
  1974. * Is this MMIO handled locally?
  1975. */
  1976. mutex_lock(&vcpu->kvm->lock);
  1977. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
  1978. if (mmio_dev) {
  1979. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1980. mutex_unlock(&vcpu->kvm->lock);
  1981. return X86EMUL_CONTINUE;
  1982. }
  1983. mutex_unlock(&vcpu->kvm->lock);
  1984. vcpu->mmio_needed = 1;
  1985. vcpu->mmio_phys_addr = gpa;
  1986. vcpu->mmio_size = bytes;
  1987. vcpu->mmio_is_write = 1;
  1988. memcpy(vcpu->mmio_data, val, bytes);
  1989. return X86EMUL_CONTINUE;
  1990. }
  1991. int emulator_write_emulated(unsigned long addr,
  1992. const void *val,
  1993. unsigned int bytes,
  1994. struct kvm_vcpu *vcpu)
  1995. {
  1996. /* Crossing a page boundary? */
  1997. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1998. int rc, now;
  1999. now = -addr & ~PAGE_MASK;
  2000. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  2001. if (rc != X86EMUL_CONTINUE)
  2002. return rc;
  2003. addr += now;
  2004. val += now;
  2005. bytes -= now;
  2006. }
  2007. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  2008. }
  2009. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  2010. static int emulator_cmpxchg_emulated(unsigned long addr,
  2011. const void *old,
  2012. const void *new,
  2013. unsigned int bytes,
  2014. struct kvm_vcpu *vcpu)
  2015. {
  2016. static int reported;
  2017. if (!reported) {
  2018. reported = 1;
  2019. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  2020. }
  2021. #ifndef CONFIG_X86_64
  2022. /* guests cmpxchg8b have to be emulated atomically */
  2023. if (bytes == 8) {
  2024. gpa_t gpa;
  2025. struct page *page;
  2026. char *kaddr;
  2027. u64 val;
  2028. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  2029. if (gpa == UNMAPPED_GVA ||
  2030. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  2031. goto emul_write;
  2032. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  2033. goto emul_write;
  2034. val = *(u64 *)new;
  2035. down_read(&current->mm->mmap_sem);
  2036. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2037. up_read(&current->mm->mmap_sem);
  2038. kaddr = kmap_atomic(page, KM_USER0);
  2039. set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
  2040. kunmap_atomic(kaddr, KM_USER0);
  2041. kvm_release_page_dirty(page);
  2042. }
  2043. emul_write:
  2044. #endif
  2045. return emulator_write_emulated(addr, new, bytes, vcpu);
  2046. }
  2047. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  2048. {
  2049. return kvm_x86_ops->get_segment_base(vcpu, seg);
  2050. }
  2051. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  2052. {
  2053. return X86EMUL_CONTINUE;
  2054. }
  2055. int emulate_clts(struct kvm_vcpu *vcpu)
  2056. {
  2057. KVMTRACE_0D(CLTS, vcpu, handler);
  2058. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  2059. return X86EMUL_CONTINUE;
  2060. }
  2061. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  2062. {
  2063. struct kvm_vcpu *vcpu = ctxt->vcpu;
  2064. switch (dr) {
  2065. case 0 ... 3:
  2066. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  2067. return X86EMUL_CONTINUE;
  2068. default:
  2069. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
  2070. return X86EMUL_UNHANDLEABLE;
  2071. }
  2072. }
  2073. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  2074. {
  2075. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  2076. int exception;
  2077. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  2078. if (exception) {
  2079. /* FIXME: better handling */
  2080. return X86EMUL_UNHANDLEABLE;
  2081. }
  2082. return X86EMUL_CONTINUE;
  2083. }
  2084. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  2085. {
  2086. u8 opcodes[4];
  2087. unsigned long rip = kvm_rip_read(vcpu);
  2088. unsigned long rip_linear;
  2089. if (!printk_ratelimit())
  2090. return;
  2091. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  2092. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  2093. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  2094. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  2095. }
  2096. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  2097. static struct x86_emulate_ops emulate_ops = {
  2098. .read_std = emulator_read_std,
  2099. .read_emulated = emulator_read_emulated,
  2100. .write_emulated = emulator_write_emulated,
  2101. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  2102. };
  2103. static void cache_all_regs(struct kvm_vcpu *vcpu)
  2104. {
  2105. kvm_register_read(vcpu, VCPU_REGS_RAX);
  2106. kvm_register_read(vcpu, VCPU_REGS_RSP);
  2107. kvm_register_read(vcpu, VCPU_REGS_RIP);
  2108. vcpu->arch.regs_dirty = ~0;
  2109. }
  2110. int emulate_instruction(struct kvm_vcpu *vcpu,
  2111. struct kvm_run *run,
  2112. unsigned long cr2,
  2113. u16 error_code,
  2114. int emulation_type)
  2115. {
  2116. int r;
  2117. struct decode_cache *c;
  2118. kvm_clear_exception_queue(vcpu);
  2119. vcpu->arch.mmio_fault_cr2 = cr2;
  2120. /*
  2121. * TODO: fix x86_emulate.c to use guest_read/write_register
  2122. * instead of direct ->regs accesses, can save hundred cycles
  2123. * on Intel for instructions that don't read/change RSP, for
  2124. * for example.
  2125. */
  2126. cache_all_regs(vcpu);
  2127. vcpu->mmio_is_write = 0;
  2128. vcpu->arch.pio.string = 0;
  2129. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  2130. int cs_db, cs_l;
  2131. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  2132. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  2133. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  2134. vcpu->arch.emulate_ctxt.mode =
  2135. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  2136. ? X86EMUL_MODE_REAL : cs_l
  2137. ? X86EMUL_MODE_PROT64 : cs_db
  2138. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  2139. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  2140. /* Reject the instructions other than VMCALL/VMMCALL when
  2141. * try to emulate invalid opcode */
  2142. c = &vcpu->arch.emulate_ctxt.decode;
  2143. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  2144. (!(c->twobyte && c->b == 0x01 &&
  2145. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  2146. c->modrm_mod == 3 && c->modrm_rm == 1)))
  2147. return EMULATE_FAIL;
  2148. ++vcpu->stat.insn_emulation;
  2149. if (r) {
  2150. ++vcpu->stat.insn_emulation_fail;
  2151. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  2152. return EMULATE_DONE;
  2153. return EMULATE_FAIL;
  2154. }
  2155. }
  2156. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  2157. if (vcpu->arch.pio.string)
  2158. return EMULATE_DO_MMIO;
  2159. if ((r || vcpu->mmio_is_write) && run) {
  2160. run->exit_reason = KVM_EXIT_MMIO;
  2161. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  2162. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  2163. run->mmio.len = vcpu->mmio_size;
  2164. run->mmio.is_write = vcpu->mmio_is_write;
  2165. }
  2166. if (r) {
  2167. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  2168. return EMULATE_DONE;
  2169. if (!vcpu->mmio_needed) {
  2170. kvm_report_emulation_failure(vcpu, "mmio");
  2171. return EMULATE_FAIL;
  2172. }
  2173. return EMULATE_DO_MMIO;
  2174. }
  2175. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  2176. if (vcpu->mmio_is_write) {
  2177. vcpu->mmio_needed = 0;
  2178. return EMULATE_DO_MMIO;
  2179. }
  2180. return EMULATE_DONE;
  2181. }
  2182. EXPORT_SYMBOL_GPL(emulate_instruction);
  2183. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  2184. {
  2185. int i;
  2186. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  2187. if (vcpu->arch.pio.guest_pages[i]) {
  2188. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  2189. vcpu->arch.pio.guest_pages[i] = NULL;
  2190. }
  2191. }
  2192. static int pio_copy_data(struct kvm_vcpu *vcpu)
  2193. {
  2194. void *p = vcpu->arch.pio_data;
  2195. void *q;
  2196. unsigned bytes;
  2197. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  2198. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  2199. PAGE_KERNEL);
  2200. if (!q) {
  2201. free_pio_guest_pages(vcpu);
  2202. return -ENOMEM;
  2203. }
  2204. q += vcpu->arch.pio.guest_page_offset;
  2205. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  2206. if (vcpu->arch.pio.in)
  2207. memcpy(q, p, bytes);
  2208. else
  2209. memcpy(p, q, bytes);
  2210. q -= vcpu->arch.pio.guest_page_offset;
  2211. vunmap(q);
  2212. free_pio_guest_pages(vcpu);
  2213. return 0;
  2214. }
  2215. int complete_pio(struct kvm_vcpu *vcpu)
  2216. {
  2217. struct kvm_pio_request *io = &vcpu->arch.pio;
  2218. long delta;
  2219. int r;
  2220. unsigned long val;
  2221. if (!io->string) {
  2222. if (io->in) {
  2223. val = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2224. memcpy(&val, vcpu->arch.pio_data, io->size);
  2225. kvm_register_write(vcpu, VCPU_REGS_RAX, val);
  2226. }
  2227. } else {
  2228. if (io->in) {
  2229. r = pio_copy_data(vcpu);
  2230. if (r)
  2231. return r;
  2232. }
  2233. delta = 1;
  2234. if (io->rep) {
  2235. delta *= io->cur_count;
  2236. /*
  2237. * The size of the register should really depend on
  2238. * current address size.
  2239. */
  2240. val = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2241. val -= delta;
  2242. kvm_register_write(vcpu, VCPU_REGS_RCX, val);
  2243. }
  2244. if (io->down)
  2245. delta = -delta;
  2246. delta *= io->size;
  2247. if (io->in) {
  2248. val = kvm_register_read(vcpu, VCPU_REGS_RDI);
  2249. val += delta;
  2250. kvm_register_write(vcpu, VCPU_REGS_RDI, val);
  2251. } else {
  2252. val = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2253. val += delta;
  2254. kvm_register_write(vcpu, VCPU_REGS_RSI, val);
  2255. }
  2256. }
  2257. io->count -= io->cur_count;
  2258. io->cur_count = 0;
  2259. return 0;
  2260. }
  2261. static void kernel_pio(struct kvm_io_device *pio_dev,
  2262. struct kvm_vcpu *vcpu,
  2263. void *pd)
  2264. {
  2265. /* TODO: String I/O for in kernel device */
  2266. mutex_lock(&vcpu->kvm->lock);
  2267. if (vcpu->arch.pio.in)
  2268. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  2269. vcpu->arch.pio.size,
  2270. pd);
  2271. else
  2272. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  2273. vcpu->arch.pio.size,
  2274. pd);
  2275. mutex_unlock(&vcpu->kvm->lock);
  2276. }
  2277. static void pio_string_write(struct kvm_io_device *pio_dev,
  2278. struct kvm_vcpu *vcpu)
  2279. {
  2280. struct kvm_pio_request *io = &vcpu->arch.pio;
  2281. void *pd = vcpu->arch.pio_data;
  2282. int i;
  2283. mutex_lock(&vcpu->kvm->lock);
  2284. for (i = 0; i < io->cur_count; i++) {
  2285. kvm_iodevice_write(pio_dev, io->port,
  2286. io->size,
  2287. pd);
  2288. pd += io->size;
  2289. }
  2290. mutex_unlock(&vcpu->kvm->lock);
  2291. }
  2292. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  2293. gpa_t addr, int len,
  2294. int is_write)
  2295. {
  2296. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
  2297. }
  2298. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  2299. int size, unsigned port)
  2300. {
  2301. struct kvm_io_device *pio_dev;
  2302. unsigned long val;
  2303. vcpu->run->exit_reason = KVM_EXIT_IO;
  2304. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  2305. vcpu->run->io.size = vcpu->arch.pio.size = size;
  2306. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  2307. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  2308. vcpu->run->io.port = vcpu->arch.pio.port = port;
  2309. vcpu->arch.pio.in = in;
  2310. vcpu->arch.pio.string = 0;
  2311. vcpu->arch.pio.down = 0;
  2312. vcpu->arch.pio.guest_page_offset = 0;
  2313. vcpu->arch.pio.rep = 0;
  2314. if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
  2315. KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
  2316. handler);
  2317. else
  2318. KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
  2319. handler);
  2320. val = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2321. memcpy(vcpu->arch.pio_data, &val, 4);
  2322. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2323. pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
  2324. if (pio_dev) {
  2325. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  2326. complete_pio(vcpu);
  2327. return 1;
  2328. }
  2329. return 0;
  2330. }
  2331. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  2332. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  2333. int size, unsigned long count, int down,
  2334. gva_t address, int rep, unsigned port)
  2335. {
  2336. unsigned now, in_page;
  2337. int i, ret = 0;
  2338. int nr_pages = 1;
  2339. struct page *page;
  2340. struct kvm_io_device *pio_dev;
  2341. vcpu->run->exit_reason = KVM_EXIT_IO;
  2342. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  2343. vcpu->run->io.size = vcpu->arch.pio.size = size;
  2344. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  2345. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  2346. vcpu->run->io.port = vcpu->arch.pio.port = port;
  2347. vcpu->arch.pio.in = in;
  2348. vcpu->arch.pio.string = 1;
  2349. vcpu->arch.pio.down = down;
  2350. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  2351. vcpu->arch.pio.rep = rep;
  2352. if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
  2353. KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
  2354. handler);
  2355. else
  2356. KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
  2357. handler);
  2358. if (!count) {
  2359. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2360. return 1;
  2361. }
  2362. if (!down)
  2363. in_page = PAGE_SIZE - offset_in_page(address);
  2364. else
  2365. in_page = offset_in_page(address) + size;
  2366. now = min(count, (unsigned long)in_page / size);
  2367. if (!now) {
  2368. /*
  2369. * String I/O straddles page boundary. Pin two guest pages
  2370. * so that we satisfy atomicity constraints. Do just one
  2371. * transaction to avoid complexity.
  2372. */
  2373. nr_pages = 2;
  2374. now = 1;
  2375. }
  2376. if (down) {
  2377. /*
  2378. * String I/O in reverse. Yuck. Kill the guest, fix later.
  2379. */
  2380. pr_unimpl(vcpu, "guest string pio down\n");
  2381. kvm_inject_gp(vcpu, 0);
  2382. return 1;
  2383. }
  2384. vcpu->run->io.count = now;
  2385. vcpu->arch.pio.cur_count = now;
  2386. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  2387. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2388. for (i = 0; i < nr_pages; ++i) {
  2389. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  2390. vcpu->arch.pio.guest_pages[i] = page;
  2391. if (!page) {
  2392. kvm_inject_gp(vcpu, 0);
  2393. free_pio_guest_pages(vcpu);
  2394. return 1;
  2395. }
  2396. }
  2397. pio_dev = vcpu_find_pio_dev(vcpu, port,
  2398. vcpu->arch.pio.cur_count,
  2399. !vcpu->arch.pio.in);
  2400. if (!vcpu->arch.pio.in) {
  2401. /* string PIO write */
  2402. ret = pio_copy_data(vcpu);
  2403. if (ret >= 0 && pio_dev) {
  2404. pio_string_write(pio_dev, vcpu);
  2405. complete_pio(vcpu);
  2406. if (vcpu->arch.pio.count == 0)
  2407. ret = 1;
  2408. }
  2409. } else if (pio_dev)
  2410. pr_unimpl(vcpu, "no string pio read support yet, "
  2411. "port %x size %d count %ld\n",
  2412. port, size, count);
  2413. return ret;
  2414. }
  2415. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  2416. int kvm_arch_init(void *opaque)
  2417. {
  2418. int r;
  2419. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  2420. if (kvm_x86_ops) {
  2421. printk(KERN_ERR "kvm: already loaded the other module\n");
  2422. r = -EEXIST;
  2423. goto out;
  2424. }
  2425. if (!ops->cpu_has_kvm_support()) {
  2426. printk(KERN_ERR "kvm: no hardware support\n");
  2427. r = -EOPNOTSUPP;
  2428. goto out;
  2429. }
  2430. if (ops->disabled_by_bios()) {
  2431. printk(KERN_ERR "kvm: disabled by bios\n");
  2432. r = -EOPNOTSUPP;
  2433. goto out;
  2434. }
  2435. r = kvm_mmu_module_init();
  2436. if (r)
  2437. goto out;
  2438. kvm_init_msr_list();
  2439. kvm_x86_ops = ops;
  2440. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  2441. kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
  2442. kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
  2443. PT_DIRTY_MASK, PT64_NX_MASK, 0);
  2444. return 0;
  2445. out:
  2446. return r;
  2447. }
  2448. void kvm_arch_exit(void)
  2449. {
  2450. kvm_x86_ops = NULL;
  2451. kvm_mmu_module_exit();
  2452. }
  2453. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  2454. {
  2455. ++vcpu->stat.halt_exits;
  2456. KVMTRACE_0D(HLT, vcpu, handler);
  2457. if (irqchip_in_kernel(vcpu->kvm)) {
  2458. vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
  2459. up_read(&vcpu->kvm->slots_lock);
  2460. kvm_vcpu_block(vcpu);
  2461. down_read(&vcpu->kvm->slots_lock);
  2462. if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
  2463. return -EINTR;
  2464. return 1;
  2465. } else {
  2466. vcpu->run->exit_reason = KVM_EXIT_HLT;
  2467. return 0;
  2468. }
  2469. }
  2470. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  2471. static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
  2472. unsigned long a1)
  2473. {
  2474. if (is_long_mode(vcpu))
  2475. return a0;
  2476. else
  2477. return a0 | ((gpa_t)a1 << 32);
  2478. }
  2479. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  2480. {
  2481. unsigned long nr, a0, a1, a2, a3, ret;
  2482. int r = 1;
  2483. nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2484. a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
  2485. a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2486. a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
  2487. a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2488. KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
  2489. if (!is_long_mode(vcpu)) {
  2490. nr &= 0xFFFFFFFF;
  2491. a0 &= 0xFFFFFFFF;
  2492. a1 &= 0xFFFFFFFF;
  2493. a2 &= 0xFFFFFFFF;
  2494. a3 &= 0xFFFFFFFF;
  2495. }
  2496. switch (nr) {
  2497. case KVM_HC_VAPIC_POLL_IRQ:
  2498. ret = 0;
  2499. break;
  2500. case KVM_HC_MMU_OP:
  2501. r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
  2502. break;
  2503. default:
  2504. ret = -KVM_ENOSYS;
  2505. break;
  2506. }
  2507. kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
  2508. ++vcpu->stat.hypercalls;
  2509. return r;
  2510. }
  2511. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  2512. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2513. {
  2514. char instruction[3];
  2515. int ret = 0;
  2516. unsigned long rip = kvm_rip_read(vcpu);
  2517. /*
  2518. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2519. * to ensure that the updated hypercall appears atomically across all
  2520. * VCPUs.
  2521. */
  2522. kvm_mmu_zap_all(vcpu->kvm);
  2523. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2524. if (emulator_write_emulated(rip, instruction, 3, vcpu)
  2525. != X86EMUL_CONTINUE)
  2526. ret = -EFAULT;
  2527. return ret;
  2528. }
  2529. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2530. {
  2531. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2532. }
  2533. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2534. {
  2535. struct descriptor_table dt = { limit, base };
  2536. kvm_x86_ops->set_gdt(vcpu, &dt);
  2537. }
  2538. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2539. {
  2540. struct descriptor_table dt = { limit, base };
  2541. kvm_x86_ops->set_idt(vcpu, &dt);
  2542. }
  2543. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2544. unsigned long *rflags)
  2545. {
  2546. kvm_lmsw(vcpu, msw);
  2547. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2548. }
  2549. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2550. {
  2551. unsigned long value;
  2552. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2553. switch (cr) {
  2554. case 0:
  2555. value = vcpu->arch.cr0;
  2556. break;
  2557. case 2:
  2558. value = vcpu->arch.cr2;
  2559. break;
  2560. case 3:
  2561. value = vcpu->arch.cr3;
  2562. break;
  2563. case 4:
  2564. value = vcpu->arch.cr4;
  2565. break;
  2566. case 8:
  2567. value = kvm_get_cr8(vcpu);
  2568. break;
  2569. default:
  2570. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
  2571. return 0;
  2572. }
  2573. KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
  2574. (u32)((u64)value >> 32), handler);
  2575. return value;
  2576. }
  2577. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2578. unsigned long *rflags)
  2579. {
  2580. KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
  2581. (u32)((u64)val >> 32), handler);
  2582. switch (cr) {
  2583. case 0:
  2584. kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2585. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2586. break;
  2587. case 2:
  2588. vcpu->arch.cr2 = val;
  2589. break;
  2590. case 3:
  2591. kvm_set_cr3(vcpu, val);
  2592. break;
  2593. case 4:
  2594. kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2595. break;
  2596. case 8:
  2597. kvm_set_cr8(vcpu, val & 0xfUL);
  2598. break;
  2599. default:
  2600. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
  2601. }
  2602. }
  2603. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2604. {
  2605. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2606. int j, nent = vcpu->arch.cpuid_nent;
  2607. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2608. /* when no next entry is found, the current entry[i] is reselected */
  2609. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2610. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2611. if (ej->function == e->function) {
  2612. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2613. return j;
  2614. }
  2615. }
  2616. return 0; /* silence gcc, even though control never reaches here */
  2617. }
  2618. /* find an entry with matching function, matching index (if needed), and that
  2619. * should be read next (if it's stateful) */
  2620. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2621. u32 function, u32 index)
  2622. {
  2623. if (e->function != function)
  2624. return 0;
  2625. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2626. return 0;
  2627. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2628. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2629. return 0;
  2630. return 1;
  2631. }
  2632. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2633. {
  2634. int i;
  2635. u32 function, index;
  2636. struct kvm_cpuid_entry2 *e, *best;
  2637. function = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2638. index = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2639. kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
  2640. kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
  2641. kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
  2642. kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
  2643. best = NULL;
  2644. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2645. e = &vcpu->arch.cpuid_entries[i];
  2646. if (is_matching_cpuid_entry(e, function, index)) {
  2647. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2648. move_to_next_stateful_cpuid_entry(vcpu, i);
  2649. best = e;
  2650. break;
  2651. }
  2652. /*
  2653. * Both basic or both extended?
  2654. */
  2655. if (((e->function ^ function) & 0x80000000) == 0)
  2656. if (!best || e->function > best->function)
  2657. best = e;
  2658. }
  2659. if (best) {
  2660. kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
  2661. kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
  2662. kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
  2663. kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
  2664. }
  2665. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2666. KVMTRACE_5D(CPUID, vcpu, function,
  2667. (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
  2668. (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
  2669. (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
  2670. (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
  2671. }
  2672. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2673. /*
  2674. * Check if userspace requested an interrupt window, and that the
  2675. * interrupt window is open.
  2676. *
  2677. * No need to exit to userspace if we already have an interrupt queued.
  2678. */
  2679. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2680. struct kvm_run *kvm_run)
  2681. {
  2682. return (!vcpu->arch.irq_summary &&
  2683. kvm_run->request_interrupt_window &&
  2684. vcpu->arch.interrupt_window_open &&
  2685. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2686. }
  2687. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2688. struct kvm_run *kvm_run)
  2689. {
  2690. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2691. kvm_run->cr8 = kvm_get_cr8(vcpu);
  2692. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2693. if (irqchip_in_kernel(vcpu->kvm))
  2694. kvm_run->ready_for_interrupt_injection = 1;
  2695. else
  2696. kvm_run->ready_for_interrupt_injection =
  2697. (vcpu->arch.interrupt_window_open &&
  2698. vcpu->arch.irq_summary == 0);
  2699. }
  2700. static void vapic_enter(struct kvm_vcpu *vcpu)
  2701. {
  2702. struct kvm_lapic *apic = vcpu->arch.apic;
  2703. struct page *page;
  2704. if (!apic || !apic->vapic_addr)
  2705. return;
  2706. down_read(&current->mm->mmap_sem);
  2707. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2708. up_read(&current->mm->mmap_sem);
  2709. vcpu->arch.apic->vapic_page = page;
  2710. }
  2711. static void vapic_exit(struct kvm_vcpu *vcpu)
  2712. {
  2713. struct kvm_lapic *apic = vcpu->arch.apic;
  2714. if (!apic || !apic->vapic_addr)
  2715. return;
  2716. down_read(&vcpu->kvm->slots_lock);
  2717. kvm_release_page_dirty(apic->vapic_page);
  2718. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2719. up_read(&vcpu->kvm->slots_lock);
  2720. }
  2721. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2722. {
  2723. int r;
  2724. if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
  2725. pr_debug("vcpu %d received sipi with vector # %x\n",
  2726. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2727. kvm_lapic_reset(vcpu);
  2728. r = kvm_x86_ops->vcpu_reset(vcpu);
  2729. if (r)
  2730. return r;
  2731. vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
  2732. }
  2733. down_read(&vcpu->kvm->slots_lock);
  2734. vapic_enter(vcpu);
  2735. again:
  2736. if (vcpu->requests)
  2737. if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
  2738. kvm_mmu_unload(vcpu);
  2739. r = kvm_mmu_reload(vcpu);
  2740. if (unlikely(r))
  2741. goto out;
  2742. if (vcpu->requests) {
  2743. if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
  2744. __kvm_migrate_timers(vcpu);
  2745. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2746. kvm_x86_ops->tlb_flush(vcpu);
  2747. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2748. &vcpu->requests)) {
  2749. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2750. r = 0;
  2751. goto out;
  2752. }
  2753. if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
  2754. kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
  2755. r = 0;
  2756. goto out;
  2757. }
  2758. }
  2759. clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
  2760. kvm_inject_pending_timer_irqs(vcpu);
  2761. preempt_disable();
  2762. kvm_x86_ops->prepare_guest_switch(vcpu);
  2763. kvm_load_guest_fpu(vcpu);
  2764. local_irq_disable();
  2765. if (vcpu->requests || need_resched()) {
  2766. local_irq_enable();
  2767. preempt_enable();
  2768. r = 1;
  2769. goto out;
  2770. }
  2771. if (signal_pending(current)) {
  2772. local_irq_enable();
  2773. preempt_enable();
  2774. r = -EINTR;
  2775. kvm_run->exit_reason = KVM_EXIT_INTR;
  2776. ++vcpu->stat.signal_exits;
  2777. goto out;
  2778. }
  2779. if (vcpu->guest_debug.enabled)
  2780. kvm_x86_ops->guest_debug_pre(vcpu);
  2781. vcpu->guest_mode = 1;
  2782. /*
  2783. * Make sure that guest_mode assignment won't happen after
  2784. * testing the pending IRQ vector bitmap.
  2785. */
  2786. smp_wmb();
  2787. if (vcpu->arch.exception.pending)
  2788. __queue_exception(vcpu);
  2789. else if (irqchip_in_kernel(vcpu->kvm))
  2790. kvm_x86_ops->inject_pending_irq(vcpu);
  2791. else
  2792. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2793. kvm_lapic_sync_to_vapic(vcpu);
  2794. up_read(&vcpu->kvm->slots_lock);
  2795. kvm_guest_enter();
  2796. KVMTRACE_0D(VMENTRY, vcpu, entryexit);
  2797. kvm_x86_ops->run(vcpu, kvm_run);
  2798. vcpu->guest_mode = 0;
  2799. local_irq_enable();
  2800. ++vcpu->stat.exits;
  2801. /*
  2802. * We must have an instruction between local_irq_enable() and
  2803. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2804. * the interrupt shadow. The stat.exits increment will do nicely.
  2805. * But we need to prevent reordering, hence this barrier():
  2806. */
  2807. barrier();
  2808. kvm_guest_exit();
  2809. preempt_enable();
  2810. down_read(&vcpu->kvm->slots_lock);
  2811. /*
  2812. * Profile KVM exit RIPs:
  2813. */
  2814. if (unlikely(prof_on == KVM_PROFILING)) {
  2815. unsigned long rip = kvm_rip_read(vcpu);
  2816. profile_hit(KVM_PROFILING, (void *)rip);
  2817. }
  2818. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2819. vcpu->arch.exception.pending = false;
  2820. kvm_lapic_sync_from_vapic(vcpu);
  2821. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2822. if (r > 0) {
  2823. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2824. r = -EINTR;
  2825. kvm_run->exit_reason = KVM_EXIT_INTR;
  2826. ++vcpu->stat.request_irq_exits;
  2827. goto out;
  2828. }
  2829. if (!need_resched())
  2830. goto again;
  2831. }
  2832. out:
  2833. up_read(&vcpu->kvm->slots_lock);
  2834. if (r > 0) {
  2835. kvm_resched(vcpu);
  2836. down_read(&vcpu->kvm->slots_lock);
  2837. goto again;
  2838. }
  2839. post_kvm_run_save(vcpu, kvm_run);
  2840. vapic_exit(vcpu);
  2841. return r;
  2842. }
  2843. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2844. {
  2845. int r;
  2846. sigset_t sigsaved;
  2847. vcpu_load(vcpu);
  2848. if (vcpu->sigset_active)
  2849. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2850. if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
  2851. kvm_vcpu_block(vcpu);
  2852. r = -EAGAIN;
  2853. goto out;
  2854. }
  2855. /* re-sync apic's tpr */
  2856. if (!irqchip_in_kernel(vcpu->kvm))
  2857. kvm_set_cr8(vcpu, kvm_run->cr8);
  2858. if (vcpu->arch.pio.cur_count) {
  2859. r = complete_pio(vcpu);
  2860. if (r)
  2861. goto out;
  2862. }
  2863. #if CONFIG_HAS_IOMEM
  2864. if (vcpu->mmio_needed) {
  2865. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2866. vcpu->mmio_read_completed = 1;
  2867. vcpu->mmio_needed = 0;
  2868. down_read(&vcpu->kvm->slots_lock);
  2869. r = emulate_instruction(vcpu, kvm_run,
  2870. vcpu->arch.mmio_fault_cr2, 0,
  2871. EMULTYPE_NO_DECODE);
  2872. up_read(&vcpu->kvm->slots_lock);
  2873. if (r == EMULATE_DO_MMIO) {
  2874. /*
  2875. * Read-modify-write. Back to userspace.
  2876. */
  2877. r = 0;
  2878. goto out;
  2879. }
  2880. }
  2881. #endif
  2882. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
  2883. kvm_register_write(vcpu, VCPU_REGS_RAX,
  2884. kvm_run->hypercall.ret);
  2885. r = __vcpu_run(vcpu, kvm_run);
  2886. out:
  2887. if (vcpu->sigset_active)
  2888. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2889. vcpu_put(vcpu);
  2890. return r;
  2891. }
  2892. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2893. {
  2894. vcpu_load(vcpu);
  2895. regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2896. regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  2897. regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2898. regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  2899. regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2900. regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
  2901. regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  2902. regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  2903. #ifdef CONFIG_X86_64
  2904. regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
  2905. regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
  2906. regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
  2907. regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
  2908. regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
  2909. regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
  2910. regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
  2911. regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
  2912. #endif
  2913. regs->rip = kvm_rip_read(vcpu);
  2914. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2915. /*
  2916. * Don't leak debug flags in case they were set for guest debugging
  2917. */
  2918. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2919. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2920. vcpu_put(vcpu);
  2921. return 0;
  2922. }
  2923. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2924. {
  2925. vcpu_load(vcpu);
  2926. kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
  2927. kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
  2928. kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
  2929. kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
  2930. kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
  2931. kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
  2932. kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
  2933. kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
  2934. #ifdef CONFIG_X86_64
  2935. kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
  2936. kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
  2937. kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
  2938. kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
  2939. kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
  2940. kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
  2941. kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
  2942. kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
  2943. #endif
  2944. kvm_rip_write(vcpu, regs->rip);
  2945. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2946. vcpu->arch.exception.pending = false;
  2947. vcpu_put(vcpu);
  2948. return 0;
  2949. }
  2950. void kvm_get_segment(struct kvm_vcpu *vcpu,
  2951. struct kvm_segment *var, int seg)
  2952. {
  2953. kvm_x86_ops->get_segment(vcpu, var, seg);
  2954. }
  2955. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2956. {
  2957. struct kvm_segment cs;
  2958. kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
  2959. *db = cs.db;
  2960. *l = cs.l;
  2961. }
  2962. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2963. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2964. struct kvm_sregs *sregs)
  2965. {
  2966. struct descriptor_table dt;
  2967. int pending_vec;
  2968. vcpu_load(vcpu);
  2969. kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2970. kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2971. kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2972. kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2973. kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2974. kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2975. kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2976. kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2977. kvm_x86_ops->get_idt(vcpu, &dt);
  2978. sregs->idt.limit = dt.limit;
  2979. sregs->idt.base = dt.base;
  2980. kvm_x86_ops->get_gdt(vcpu, &dt);
  2981. sregs->gdt.limit = dt.limit;
  2982. sregs->gdt.base = dt.base;
  2983. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2984. sregs->cr0 = vcpu->arch.cr0;
  2985. sregs->cr2 = vcpu->arch.cr2;
  2986. sregs->cr3 = vcpu->arch.cr3;
  2987. sregs->cr4 = vcpu->arch.cr4;
  2988. sregs->cr8 = kvm_get_cr8(vcpu);
  2989. sregs->efer = vcpu->arch.shadow_efer;
  2990. sregs->apic_base = kvm_get_apic_base(vcpu);
  2991. if (irqchip_in_kernel(vcpu->kvm)) {
  2992. memset(sregs->interrupt_bitmap, 0,
  2993. sizeof sregs->interrupt_bitmap);
  2994. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2995. if (pending_vec >= 0)
  2996. set_bit(pending_vec,
  2997. (unsigned long *)sregs->interrupt_bitmap);
  2998. } else
  2999. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  3000. sizeof sregs->interrupt_bitmap);
  3001. vcpu_put(vcpu);
  3002. return 0;
  3003. }
  3004. int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
  3005. struct kvm_mp_state *mp_state)
  3006. {
  3007. vcpu_load(vcpu);
  3008. mp_state->mp_state = vcpu->arch.mp_state;
  3009. vcpu_put(vcpu);
  3010. return 0;
  3011. }
  3012. int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
  3013. struct kvm_mp_state *mp_state)
  3014. {
  3015. vcpu_load(vcpu);
  3016. vcpu->arch.mp_state = mp_state->mp_state;
  3017. vcpu_put(vcpu);
  3018. return 0;
  3019. }
  3020. static void kvm_set_segment(struct kvm_vcpu *vcpu,
  3021. struct kvm_segment *var, int seg)
  3022. {
  3023. kvm_x86_ops->set_segment(vcpu, var, seg);
  3024. }
  3025. static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
  3026. struct kvm_segment *kvm_desct)
  3027. {
  3028. kvm_desct->base = seg_desc->base0;
  3029. kvm_desct->base |= seg_desc->base1 << 16;
  3030. kvm_desct->base |= seg_desc->base2 << 24;
  3031. kvm_desct->limit = seg_desc->limit0;
  3032. kvm_desct->limit |= seg_desc->limit << 16;
  3033. if (seg_desc->g) {
  3034. kvm_desct->limit <<= 12;
  3035. kvm_desct->limit |= 0xfff;
  3036. }
  3037. kvm_desct->selector = selector;
  3038. kvm_desct->type = seg_desc->type;
  3039. kvm_desct->present = seg_desc->p;
  3040. kvm_desct->dpl = seg_desc->dpl;
  3041. kvm_desct->db = seg_desc->d;
  3042. kvm_desct->s = seg_desc->s;
  3043. kvm_desct->l = seg_desc->l;
  3044. kvm_desct->g = seg_desc->g;
  3045. kvm_desct->avl = seg_desc->avl;
  3046. if (!selector)
  3047. kvm_desct->unusable = 1;
  3048. else
  3049. kvm_desct->unusable = 0;
  3050. kvm_desct->padding = 0;
  3051. }
  3052. static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
  3053. u16 selector,
  3054. struct descriptor_table *dtable)
  3055. {
  3056. if (selector & 1 << 2) {
  3057. struct kvm_segment kvm_seg;
  3058. kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
  3059. if (kvm_seg.unusable)
  3060. dtable->limit = 0;
  3061. else
  3062. dtable->limit = kvm_seg.limit;
  3063. dtable->base = kvm_seg.base;
  3064. }
  3065. else
  3066. kvm_x86_ops->get_gdt(vcpu, dtable);
  3067. }
  3068. /* allowed just for 8 bytes segments */
  3069. static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3070. struct desc_struct *seg_desc)
  3071. {
  3072. gpa_t gpa;
  3073. struct descriptor_table dtable;
  3074. u16 index = selector >> 3;
  3075. get_segment_descritptor_dtable(vcpu, selector, &dtable);
  3076. if (dtable.limit < index * 8 + 7) {
  3077. kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
  3078. return 1;
  3079. }
  3080. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
  3081. gpa += index * 8;
  3082. return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
  3083. }
  3084. /* allowed just for 8 bytes segments */
  3085. static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3086. struct desc_struct *seg_desc)
  3087. {
  3088. gpa_t gpa;
  3089. struct descriptor_table dtable;
  3090. u16 index = selector >> 3;
  3091. get_segment_descritptor_dtable(vcpu, selector, &dtable);
  3092. if (dtable.limit < index * 8 + 7)
  3093. return 1;
  3094. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
  3095. gpa += index * 8;
  3096. return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
  3097. }
  3098. static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
  3099. struct desc_struct *seg_desc)
  3100. {
  3101. u32 base_addr;
  3102. base_addr = seg_desc->base0;
  3103. base_addr |= (seg_desc->base1 << 16);
  3104. base_addr |= (seg_desc->base2 << 24);
  3105. return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
  3106. }
  3107. static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
  3108. {
  3109. struct kvm_segment kvm_seg;
  3110. kvm_get_segment(vcpu, &kvm_seg, seg);
  3111. return kvm_seg.selector;
  3112. }
  3113. static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
  3114. u16 selector,
  3115. struct kvm_segment *kvm_seg)
  3116. {
  3117. struct desc_struct seg_desc;
  3118. if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
  3119. return 1;
  3120. seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
  3121. return 0;
  3122. }
  3123. int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3124. int type_bits, int seg)
  3125. {
  3126. struct kvm_segment kvm_seg;
  3127. if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
  3128. return 1;
  3129. kvm_seg.type |= type_bits;
  3130. if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
  3131. seg != VCPU_SREG_LDTR)
  3132. if (!kvm_seg.s)
  3133. kvm_seg.unusable = 1;
  3134. kvm_set_segment(vcpu, &kvm_seg, seg);
  3135. return 0;
  3136. }
  3137. static void save_state_to_tss32(struct kvm_vcpu *vcpu,
  3138. struct tss_segment_32 *tss)
  3139. {
  3140. tss->cr3 = vcpu->arch.cr3;
  3141. tss->eip = kvm_rip_read(vcpu);
  3142. tss->eflags = kvm_x86_ops->get_rflags(vcpu);
  3143. tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  3144. tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  3145. tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  3146. tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  3147. tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  3148. tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  3149. tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
  3150. tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
  3151. tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
  3152. tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
  3153. tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
  3154. tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
  3155. tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
  3156. tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
  3157. tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
  3158. tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
  3159. }
  3160. static int load_state_from_tss32(struct kvm_vcpu *vcpu,
  3161. struct tss_segment_32 *tss)
  3162. {
  3163. kvm_set_cr3(vcpu, tss->cr3);
  3164. kvm_rip_write(vcpu, tss->eip);
  3165. kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
  3166. kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
  3167. kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
  3168. kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
  3169. kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
  3170. kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
  3171. kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
  3172. kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
  3173. kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
  3174. if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
  3175. return 1;
  3176. if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
  3177. return 1;
  3178. if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
  3179. return 1;
  3180. if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
  3181. return 1;
  3182. if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
  3183. return 1;
  3184. if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
  3185. return 1;
  3186. if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
  3187. return 1;
  3188. return 0;
  3189. }
  3190. static void save_state_to_tss16(struct kvm_vcpu *vcpu,
  3191. struct tss_segment_16 *tss)
  3192. {
  3193. tss->ip = kvm_rip_read(vcpu);
  3194. tss->flag = kvm_x86_ops->get_rflags(vcpu);
  3195. tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  3196. tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  3197. tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  3198. tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  3199. tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  3200. tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  3201. tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
  3202. tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
  3203. tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
  3204. tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
  3205. tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
  3206. tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
  3207. tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
  3208. tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
  3209. }
  3210. static int load_state_from_tss16(struct kvm_vcpu *vcpu,
  3211. struct tss_segment_16 *tss)
  3212. {
  3213. kvm_rip_write(vcpu, tss->ip);
  3214. kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
  3215. kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
  3216. kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
  3217. kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
  3218. kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
  3219. kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
  3220. kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
  3221. kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
  3222. kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
  3223. if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
  3224. return 1;
  3225. if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
  3226. return 1;
  3227. if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
  3228. return 1;
  3229. if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
  3230. return 1;
  3231. if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
  3232. return 1;
  3233. return 0;
  3234. }
  3235. static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
  3236. u32 old_tss_base,
  3237. struct desc_struct *nseg_desc)
  3238. {
  3239. struct tss_segment_16 tss_segment_16;
  3240. int ret = 0;
  3241. if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
  3242. sizeof tss_segment_16))
  3243. goto out;
  3244. save_state_to_tss16(vcpu, &tss_segment_16);
  3245. if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
  3246. sizeof tss_segment_16))
  3247. goto out;
  3248. if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
  3249. &tss_segment_16, sizeof tss_segment_16))
  3250. goto out;
  3251. if (load_state_from_tss16(vcpu, &tss_segment_16))
  3252. goto out;
  3253. ret = 1;
  3254. out:
  3255. return ret;
  3256. }
  3257. static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
  3258. u32 old_tss_base,
  3259. struct desc_struct *nseg_desc)
  3260. {
  3261. struct tss_segment_32 tss_segment_32;
  3262. int ret = 0;
  3263. if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
  3264. sizeof tss_segment_32))
  3265. goto out;
  3266. save_state_to_tss32(vcpu, &tss_segment_32);
  3267. if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
  3268. sizeof tss_segment_32))
  3269. goto out;
  3270. if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
  3271. &tss_segment_32, sizeof tss_segment_32))
  3272. goto out;
  3273. if (load_state_from_tss32(vcpu, &tss_segment_32))
  3274. goto out;
  3275. ret = 1;
  3276. out:
  3277. return ret;
  3278. }
  3279. int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
  3280. {
  3281. struct kvm_segment tr_seg;
  3282. struct desc_struct cseg_desc;
  3283. struct desc_struct nseg_desc;
  3284. int ret = 0;
  3285. u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
  3286. u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
  3287. old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
  3288. /* FIXME: Handle errors. Failure to read either TSS or their
  3289. * descriptors should generate a pagefault.
  3290. */
  3291. if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
  3292. goto out;
  3293. if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
  3294. goto out;
  3295. if (reason != TASK_SWITCH_IRET) {
  3296. int cpl;
  3297. cpl = kvm_x86_ops->get_cpl(vcpu);
  3298. if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
  3299. kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
  3300. return 1;
  3301. }
  3302. }
  3303. if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
  3304. kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
  3305. return 1;
  3306. }
  3307. if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
  3308. cseg_desc.type &= ~(1 << 1); //clear the B flag
  3309. save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
  3310. }
  3311. if (reason == TASK_SWITCH_IRET) {
  3312. u32 eflags = kvm_x86_ops->get_rflags(vcpu);
  3313. kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
  3314. }
  3315. kvm_x86_ops->skip_emulated_instruction(vcpu);
  3316. if (nseg_desc.type & 8)
  3317. ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
  3318. &nseg_desc);
  3319. else
  3320. ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
  3321. &nseg_desc);
  3322. if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
  3323. u32 eflags = kvm_x86_ops->get_rflags(vcpu);
  3324. kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
  3325. }
  3326. if (reason != TASK_SWITCH_IRET) {
  3327. nseg_desc.type |= (1 << 1);
  3328. save_guest_segment_descriptor(vcpu, tss_selector,
  3329. &nseg_desc);
  3330. }
  3331. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
  3332. seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
  3333. tr_seg.type = 11;
  3334. kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
  3335. out:
  3336. return ret;
  3337. }
  3338. EXPORT_SYMBOL_GPL(kvm_task_switch);
  3339. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  3340. struct kvm_sregs *sregs)
  3341. {
  3342. int mmu_reset_needed = 0;
  3343. int i, pending_vec, max_bits;
  3344. struct descriptor_table dt;
  3345. vcpu_load(vcpu);
  3346. dt.limit = sregs->idt.limit;
  3347. dt.base = sregs->idt.base;
  3348. kvm_x86_ops->set_idt(vcpu, &dt);
  3349. dt.limit = sregs->gdt.limit;
  3350. dt.base = sregs->gdt.base;
  3351. kvm_x86_ops->set_gdt(vcpu, &dt);
  3352. vcpu->arch.cr2 = sregs->cr2;
  3353. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  3354. vcpu->arch.cr3 = sregs->cr3;
  3355. kvm_set_cr8(vcpu, sregs->cr8);
  3356. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  3357. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  3358. kvm_set_apic_base(vcpu, sregs->apic_base);
  3359. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  3360. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  3361. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  3362. vcpu->arch.cr0 = sregs->cr0;
  3363. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  3364. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  3365. if (!is_long_mode(vcpu) && is_pae(vcpu))
  3366. load_pdptrs(vcpu, vcpu->arch.cr3);
  3367. if (mmu_reset_needed)
  3368. kvm_mmu_reset_context(vcpu);
  3369. if (!irqchip_in_kernel(vcpu->kvm)) {
  3370. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  3371. sizeof vcpu->arch.irq_pending);
  3372. vcpu->arch.irq_summary = 0;
  3373. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  3374. if (vcpu->arch.irq_pending[i])
  3375. __set_bit(i, &vcpu->arch.irq_summary);
  3376. } else {
  3377. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  3378. pending_vec = find_first_bit(
  3379. (const unsigned long *)sregs->interrupt_bitmap,
  3380. max_bits);
  3381. /* Only pending external irq is handled here */
  3382. if (pending_vec < max_bits) {
  3383. kvm_x86_ops->set_irq(vcpu, pending_vec);
  3384. pr_debug("Set back pending irq %d\n",
  3385. pending_vec);
  3386. }
  3387. }
  3388. kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  3389. kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  3390. kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  3391. kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  3392. kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  3393. kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  3394. kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  3395. kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  3396. vcpu_put(vcpu);
  3397. return 0;
  3398. }
  3399. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  3400. struct kvm_debug_guest *dbg)
  3401. {
  3402. int r;
  3403. vcpu_load(vcpu);
  3404. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  3405. vcpu_put(vcpu);
  3406. return r;
  3407. }
  3408. /*
  3409. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  3410. * we have asm/x86/processor.h
  3411. */
  3412. struct fxsave {
  3413. u16 cwd;
  3414. u16 swd;
  3415. u16 twd;
  3416. u16 fop;
  3417. u64 rip;
  3418. u64 rdp;
  3419. u32 mxcsr;
  3420. u32 mxcsr_mask;
  3421. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  3422. #ifdef CONFIG_X86_64
  3423. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  3424. #else
  3425. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  3426. #endif
  3427. };
  3428. /*
  3429. * Translate a guest virtual address to a guest physical address.
  3430. */
  3431. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  3432. struct kvm_translation *tr)
  3433. {
  3434. unsigned long vaddr = tr->linear_address;
  3435. gpa_t gpa;
  3436. vcpu_load(vcpu);
  3437. down_read(&vcpu->kvm->slots_lock);
  3438. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  3439. up_read(&vcpu->kvm->slots_lock);
  3440. tr->physical_address = gpa;
  3441. tr->valid = gpa != UNMAPPED_GVA;
  3442. tr->writeable = 1;
  3443. tr->usermode = 0;
  3444. vcpu_put(vcpu);
  3445. return 0;
  3446. }
  3447. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  3448. {
  3449. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  3450. vcpu_load(vcpu);
  3451. memcpy(fpu->fpr, fxsave->st_space, 128);
  3452. fpu->fcw = fxsave->cwd;
  3453. fpu->fsw = fxsave->swd;
  3454. fpu->ftwx = fxsave->twd;
  3455. fpu->last_opcode = fxsave->fop;
  3456. fpu->last_ip = fxsave->rip;
  3457. fpu->last_dp = fxsave->rdp;
  3458. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  3459. vcpu_put(vcpu);
  3460. return 0;
  3461. }
  3462. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  3463. {
  3464. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  3465. vcpu_load(vcpu);
  3466. memcpy(fxsave->st_space, fpu->fpr, 128);
  3467. fxsave->cwd = fpu->fcw;
  3468. fxsave->swd = fpu->fsw;
  3469. fxsave->twd = fpu->ftwx;
  3470. fxsave->fop = fpu->last_opcode;
  3471. fxsave->rip = fpu->last_ip;
  3472. fxsave->rdp = fpu->last_dp;
  3473. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  3474. vcpu_put(vcpu);
  3475. return 0;
  3476. }
  3477. void fx_init(struct kvm_vcpu *vcpu)
  3478. {
  3479. unsigned after_mxcsr_mask;
  3480. /*
  3481. * Touch the fpu the first time in non atomic context as if
  3482. * this is the first fpu instruction the exception handler
  3483. * will fire before the instruction returns and it'll have to
  3484. * allocate ram with GFP_KERNEL.
  3485. */
  3486. if (!used_math())
  3487. kvm_fx_save(&vcpu->arch.host_fx_image);
  3488. /* Initialize guest FPU by resetting ours and saving into guest's */
  3489. preempt_disable();
  3490. kvm_fx_save(&vcpu->arch.host_fx_image);
  3491. kvm_fx_finit();
  3492. kvm_fx_save(&vcpu->arch.guest_fx_image);
  3493. kvm_fx_restore(&vcpu->arch.host_fx_image);
  3494. preempt_enable();
  3495. vcpu->arch.cr0 |= X86_CR0_ET;
  3496. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  3497. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  3498. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  3499. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  3500. }
  3501. EXPORT_SYMBOL_GPL(fx_init);
  3502. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  3503. {
  3504. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  3505. return;
  3506. vcpu->guest_fpu_loaded = 1;
  3507. kvm_fx_save(&vcpu->arch.host_fx_image);
  3508. kvm_fx_restore(&vcpu->arch.guest_fx_image);
  3509. }
  3510. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  3511. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  3512. {
  3513. if (!vcpu->guest_fpu_loaded)
  3514. return;
  3515. vcpu->guest_fpu_loaded = 0;
  3516. kvm_fx_save(&vcpu->arch.guest_fx_image);
  3517. kvm_fx_restore(&vcpu->arch.host_fx_image);
  3518. ++vcpu->stat.fpu_reload;
  3519. }
  3520. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  3521. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  3522. {
  3523. kvm_x86_ops->vcpu_free(vcpu);
  3524. }
  3525. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  3526. unsigned int id)
  3527. {
  3528. return kvm_x86_ops->vcpu_create(kvm, id);
  3529. }
  3530. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  3531. {
  3532. int r;
  3533. /* We do fxsave: this must be aligned. */
  3534. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  3535. vcpu_load(vcpu);
  3536. r = kvm_arch_vcpu_reset(vcpu);
  3537. if (r == 0)
  3538. r = kvm_mmu_setup(vcpu);
  3539. vcpu_put(vcpu);
  3540. if (r < 0)
  3541. goto free_vcpu;
  3542. return 0;
  3543. free_vcpu:
  3544. kvm_x86_ops->vcpu_free(vcpu);
  3545. return r;
  3546. }
  3547. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  3548. {
  3549. vcpu_load(vcpu);
  3550. kvm_mmu_unload(vcpu);
  3551. vcpu_put(vcpu);
  3552. kvm_x86_ops->vcpu_free(vcpu);
  3553. }
  3554. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  3555. {
  3556. return kvm_x86_ops->vcpu_reset(vcpu);
  3557. }
  3558. void kvm_arch_hardware_enable(void *garbage)
  3559. {
  3560. kvm_x86_ops->hardware_enable(garbage);
  3561. }
  3562. void kvm_arch_hardware_disable(void *garbage)
  3563. {
  3564. kvm_x86_ops->hardware_disable(garbage);
  3565. }
  3566. int kvm_arch_hardware_setup(void)
  3567. {
  3568. return kvm_x86_ops->hardware_setup();
  3569. }
  3570. void kvm_arch_hardware_unsetup(void)
  3571. {
  3572. kvm_x86_ops->hardware_unsetup();
  3573. }
  3574. void kvm_arch_check_processor_compat(void *rtn)
  3575. {
  3576. kvm_x86_ops->check_processor_compatibility(rtn);
  3577. }
  3578. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  3579. {
  3580. struct page *page;
  3581. struct kvm *kvm;
  3582. int r;
  3583. BUG_ON(vcpu->kvm == NULL);
  3584. kvm = vcpu->kvm;
  3585. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  3586. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  3587. vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
  3588. else
  3589. vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
  3590. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  3591. if (!page) {
  3592. r = -ENOMEM;
  3593. goto fail;
  3594. }
  3595. vcpu->arch.pio_data = page_address(page);
  3596. r = kvm_mmu_create(vcpu);
  3597. if (r < 0)
  3598. goto fail_free_pio_data;
  3599. if (irqchip_in_kernel(kvm)) {
  3600. r = kvm_create_lapic(vcpu);
  3601. if (r < 0)
  3602. goto fail_mmu_destroy;
  3603. }
  3604. return 0;
  3605. fail_mmu_destroy:
  3606. kvm_mmu_destroy(vcpu);
  3607. fail_free_pio_data:
  3608. free_page((unsigned long)vcpu->arch.pio_data);
  3609. fail:
  3610. return r;
  3611. }
  3612. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  3613. {
  3614. kvm_free_lapic(vcpu);
  3615. down_read(&vcpu->kvm->slots_lock);
  3616. kvm_mmu_destroy(vcpu);
  3617. up_read(&vcpu->kvm->slots_lock);
  3618. free_page((unsigned long)vcpu->arch.pio_data);
  3619. }
  3620. struct kvm *kvm_arch_create_vm(void)
  3621. {
  3622. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  3623. if (!kvm)
  3624. return ERR_PTR(-ENOMEM);
  3625. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  3626. INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
  3627. return kvm;
  3628. }
  3629. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  3630. {
  3631. vcpu_load(vcpu);
  3632. kvm_mmu_unload(vcpu);
  3633. vcpu_put(vcpu);
  3634. }
  3635. static void kvm_free_vcpus(struct kvm *kvm)
  3636. {
  3637. unsigned int i;
  3638. /*
  3639. * Unpin any mmu pages first.
  3640. */
  3641. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  3642. if (kvm->vcpus[i])
  3643. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  3644. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  3645. if (kvm->vcpus[i]) {
  3646. kvm_arch_vcpu_free(kvm->vcpus[i]);
  3647. kvm->vcpus[i] = NULL;
  3648. }
  3649. }
  3650. }
  3651. void kvm_arch_destroy_vm(struct kvm *kvm)
  3652. {
  3653. kvm_free_assigned_devices(kvm);
  3654. kvm_free_pit(kvm);
  3655. kfree(kvm->arch.vpic);
  3656. kfree(kvm->arch.vioapic);
  3657. kvm_free_vcpus(kvm);
  3658. kvm_free_physmem(kvm);
  3659. if (kvm->arch.apic_access_page)
  3660. put_page(kvm->arch.apic_access_page);
  3661. if (kvm->arch.ept_identity_pagetable)
  3662. put_page(kvm->arch.ept_identity_pagetable);
  3663. kfree(kvm);
  3664. }
  3665. int kvm_arch_set_memory_region(struct kvm *kvm,
  3666. struct kvm_userspace_memory_region *mem,
  3667. struct kvm_memory_slot old,
  3668. int user_alloc)
  3669. {
  3670. int npages = mem->memory_size >> PAGE_SHIFT;
  3671. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  3672. /*To keep backward compatibility with older userspace,
  3673. *x86 needs to hanlde !user_alloc case.
  3674. */
  3675. if (!user_alloc) {
  3676. if (npages && !old.rmap) {
  3677. unsigned long userspace_addr;
  3678. down_write(&current->mm->mmap_sem);
  3679. userspace_addr = do_mmap(NULL, 0,
  3680. npages * PAGE_SIZE,
  3681. PROT_READ | PROT_WRITE,
  3682. MAP_SHARED | MAP_ANONYMOUS,
  3683. 0);
  3684. up_write(&current->mm->mmap_sem);
  3685. if (IS_ERR((void *)userspace_addr))
  3686. return PTR_ERR((void *)userspace_addr);
  3687. /* set userspace_addr atomically for kvm_hva_to_rmapp */
  3688. spin_lock(&kvm->mmu_lock);
  3689. memslot->userspace_addr = userspace_addr;
  3690. spin_unlock(&kvm->mmu_lock);
  3691. } else {
  3692. if (!old.user_alloc && old.rmap) {
  3693. int ret;
  3694. down_write(&current->mm->mmap_sem);
  3695. ret = do_munmap(current->mm, old.userspace_addr,
  3696. old.npages * PAGE_SIZE);
  3697. up_write(&current->mm->mmap_sem);
  3698. if (ret < 0)
  3699. printk(KERN_WARNING
  3700. "kvm_vm_ioctl_set_memory_region: "
  3701. "failed to munmap memory\n");
  3702. }
  3703. }
  3704. }
  3705. if (!kvm->arch.n_requested_mmu_pages) {
  3706. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  3707. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  3708. }
  3709. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  3710. kvm_flush_remote_tlbs(kvm);
  3711. return 0;
  3712. }
  3713. void kvm_arch_flush_shadow(struct kvm *kvm)
  3714. {
  3715. kvm_mmu_zap_all(kvm);
  3716. }
  3717. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  3718. {
  3719. return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
  3720. || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
  3721. }
  3722. static void vcpu_kick_intr(void *info)
  3723. {
  3724. #ifdef DEBUG
  3725. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  3726. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  3727. #endif
  3728. }
  3729. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  3730. {
  3731. int ipi_pcpu = vcpu->cpu;
  3732. int cpu = get_cpu();
  3733. if (waitqueue_active(&vcpu->wq)) {
  3734. wake_up_interruptible(&vcpu->wq);
  3735. ++vcpu->stat.halt_wakeup;
  3736. }
  3737. /*
  3738. * We may be called synchronously with irqs disabled in guest mode,
  3739. * So need not to call smp_call_function_single() in that case.
  3740. */
  3741. if (vcpu->guest_mode && vcpu->cpu != cpu)
  3742. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
  3743. put_cpu();
  3744. }