psb_drv.c 19 KB

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  1. /**************************************************************************
  2. * Copyright (c) 2007-2011, Intel Corporation.
  3. * All Rights Reserved.
  4. * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
  5. * All Rights Reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. **************************************************************************/
  21. #include <drm/drmP.h>
  22. #include <drm/drm.h>
  23. #include "gma_drm.h"
  24. #include "psb_drv.h"
  25. #include "framebuffer.h"
  26. #include "psb_reg.h"
  27. #include "psb_intel_reg.h"
  28. #include "intel_bios.h"
  29. #include "mid_bios.h"
  30. #include <drm/drm_pciids.h>
  31. #include "power.h"
  32. #include <linux/cpu.h>
  33. #include <linux/notifier.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/pm_runtime.h>
  36. #include <acpi/video.h>
  37. #include <linux/module.h>
  38. static int drm_psb_trap_pagefaults;
  39. static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  40. MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
  41. module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
  42. static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
  43. { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  44. { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  45. #if defined(CONFIG_DRM_GMA600)
  46. { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  47. { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  48. { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  49. { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  50. { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  51. { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  52. { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  53. { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  54. /* Atom E620 */
  55. { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  56. #endif
  57. #if defined(CONFIG_DRM_MEDFIELD)
  58. {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  59. {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  60. {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  61. {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  62. {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  63. {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  64. {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  65. {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  66. #endif
  67. #if defined(CONFIG_DRM_GMA3600)
  68. { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  69. { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  70. { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  71. { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  72. { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  73. { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  74. { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  75. { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  76. #endif
  77. { 0, 0, 0}
  78. };
  79. MODULE_DEVICE_TABLE(pci, pciidlist);
  80. /*
  81. * Standard IOCTLs.
  82. */
  83. #define DRM_IOCTL_GMA_ADB \
  84. DRM_IOWR(DRM_GMA_ADB + DRM_COMMAND_BASE, uint32_t)
  85. #define DRM_IOCTL_GMA_MODE_OPERATION \
  86. DRM_IOWR(DRM_GMA_MODE_OPERATION + DRM_COMMAND_BASE, \
  87. struct drm_psb_mode_operation_arg)
  88. #define DRM_IOCTL_GMA_STOLEN_MEMORY \
  89. DRM_IOWR(DRM_GMA_STOLEN_MEMORY + DRM_COMMAND_BASE, \
  90. struct drm_psb_stolen_memory_arg)
  91. #define DRM_IOCTL_GMA_GAMMA \
  92. DRM_IOWR(DRM_GMA_GAMMA + DRM_COMMAND_BASE, \
  93. struct drm_psb_dpst_lut_arg)
  94. #define DRM_IOCTL_GMA_DPST_BL \
  95. DRM_IOWR(DRM_GMA_DPST_BL + DRM_COMMAND_BASE, \
  96. uint32_t)
  97. #define DRM_IOCTL_GMA_GET_PIPE_FROM_CRTC_ID \
  98. DRM_IOWR(DRM_GMA_GET_PIPE_FROM_CRTC_ID + DRM_COMMAND_BASE, \
  99. struct drm_psb_get_pipe_from_crtc_id_arg)
  100. #define DRM_IOCTL_GMA_GEM_CREATE \
  101. DRM_IOWR(DRM_GMA_GEM_CREATE + DRM_COMMAND_BASE, \
  102. struct drm_psb_gem_create)
  103. #define DRM_IOCTL_GMA_GEM_MMAP \
  104. DRM_IOWR(DRM_GMA_GEM_MMAP + DRM_COMMAND_BASE, \
  105. struct drm_psb_gem_mmap)
  106. static int psb_adb_ioctl(struct drm_device *dev, void *data,
  107. struct drm_file *file_priv);
  108. static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
  109. struct drm_file *file_priv);
  110. static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
  111. struct drm_file *file_priv);
  112. static int psb_gamma_ioctl(struct drm_device *dev, void *data,
  113. struct drm_file *file_priv);
  114. static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
  115. struct drm_file *file_priv);
  116. static struct drm_ioctl_desc psb_ioctls[] = {
  117. DRM_IOCTL_DEF_DRV(GMA_ADB, psb_adb_ioctl, DRM_AUTH),
  118. DRM_IOCTL_DEF_DRV(GMA_MODE_OPERATION, psb_mode_operation_ioctl,
  119. DRM_AUTH),
  120. DRM_IOCTL_DEF_DRV(GMA_STOLEN_MEMORY, psb_stolen_memory_ioctl,
  121. DRM_AUTH),
  122. DRM_IOCTL_DEF_DRV(GMA_GAMMA, psb_gamma_ioctl, DRM_AUTH),
  123. DRM_IOCTL_DEF_DRV(GMA_DPST_BL, psb_dpst_bl_ioctl, DRM_AUTH),
  124. DRM_IOCTL_DEF_DRV(GMA_GET_PIPE_FROM_CRTC_ID,
  125. psb_intel_get_pipe_from_crtc_id, 0),
  126. DRM_IOCTL_DEF_DRV(GMA_GEM_CREATE, psb_gem_create_ioctl,
  127. DRM_UNLOCKED | DRM_AUTH),
  128. DRM_IOCTL_DEF_DRV(GMA_GEM_MMAP, psb_gem_mmap_ioctl,
  129. DRM_UNLOCKED | DRM_AUTH),
  130. };
  131. static void psb_lastclose(struct drm_device *dev)
  132. {
  133. return;
  134. }
  135. static void psb_do_takedown(struct drm_device *dev)
  136. {
  137. }
  138. static int psb_do_init(struct drm_device *dev)
  139. {
  140. struct drm_psb_private *dev_priv = dev->dev_private;
  141. struct psb_gtt *pg = &dev_priv->gtt;
  142. uint32_t stolen_gtt;
  143. int ret = -ENOMEM;
  144. if (pg->mmu_gatt_start & 0x0FFFFFFF) {
  145. dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
  146. ret = -EINVAL;
  147. goto out_err;
  148. }
  149. stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
  150. stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
  151. stolen_gtt =
  152. (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
  153. dev_priv->gatt_free_offset = pg->mmu_gatt_start +
  154. (stolen_gtt << PAGE_SHIFT) * 1024;
  155. if (1 || drm_debug) {
  156. uint32_t core_id = PSB_RSGX32(PSB_CR_CORE_ID);
  157. uint32_t core_rev = PSB_RSGX32(PSB_CR_CORE_REVISION);
  158. DRM_INFO("SGX core id = 0x%08x\n", core_id);
  159. DRM_INFO("SGX core rev major = 0x%02x, minor = 0x%02x\n",
  160. (core_rev & _PSB_CC_REVISION_MAJOR_MASK) >>
  161. _PSB_CC_REVISION_MAJOR_SHIFT,
  162. (core_rev & _PSB_CC_REVISION_MINOR_MASK) >>
  163. _PSB_CC_REVISION_MINOR_SHIFT);
  164. DRM_INFO
  165. ("SGX core rev maintenance = 0x%02x, designer = 0x%02x\n",
  166. (core_rev & _PSB_CC_REVISION_MAINTENANCE_MASK) >>
  167. _PSB_CC_REVISION_MAINTENANCE_SHIFT,
  168. (core_rev & _PSB_CC_REVISION_DESIGNER_MASK) >>
  169. _PSB_CC_REVISION_DESIGNER_SHIFT);
  170. }
  171. spin_lock_init(&dev_priv->irqmask_lock);
  172. spin_lock_init(&dev_priv->lock_2d);
  173. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
  174. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
  175. PSB_RSGX32(PSB_CR_BIF_BANK1);
  176. PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
  177. PSB_CR_BIF_CTRL);
  178. psb_spank(dev_priv);
  179. /* mmu_gatt ?? */
  180. PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
  181. return 0;
  182. out_err:
  183. psb_do_takedown(dev);
  184. return ret;
  185. }
  186. static int psb_driver_unload(struct drm_device *dev)
  187. {
  188. struct drm_psb_private *dev_priv = dev->dev_private;
  189. /* Kill vblank etc here */
  190. gma_backlight_exit(dev);
  191. psb_modeset_cleanup(dev);
  192. if (dev_priv) {
  193. psb_lid_timer_takedown(dev_priv);
  194. gma_intel_opregion_exit(dev);
  195. if (dev_priv->ops->chip_teardown)
  196. dev_priv->ops->chip_teardown(dev);
  197. psb_do_takedown(dev);
  198. if (dev_priv->pf_pd) {
  199. psb_mmu_free_pagedir(dev_priv->pf_pd);
  200. dev_priv->pf_pd = NULL;
  201. }
  202. if (dev_priv->mmu) {
  203. struct psb_gtt *pg = &dev_priv->gtt;
  204. down_read(&pg->sem);
  205. psb_mmu_remove_pfn_sequence(
  206. psb_mmu_get_default_pd
  207. (dev_priv->mmu),
  208. pg->mmu_gatt_start,
  209. dev_priv->vram_stolen_size >> PAGE_SHIFT);
  210. up_read(&pg->sem);
  211. psb_mmu_driver_takedown(dev_priv->mmu);
  212. dev_priv->mmu = NULL;
  213. }
  214. psb_gtt_takedown(dev);
  215. if (dev_priv->scratch_page) {
  216. __free_page(dev_priv->scratch_page);
  217. dev_priv->scratch_page = NULL;
  218. }
  219. if (dev_priv->vdc_reg) {
  220. iounmap(dev_priv->vdc_reg);
  221. dev_priv->vdc_reg = NULL;
  222. }
  223. if (dev_priv->sgx_reg) {
  224. iounmap(dev_priv->sgx_reg);
  225. dev_priv->sgx_reg = NULL;
  226. }
  227. kfree(dev_priv);
  228. dev->dev_private = NULL;
  229. /*destroy VBT data*/
  230. psb_intel_destroy_bios(dev);
  231. }
  232. gma_power_uninit(dev);
  233. return 0;
  234. }
  235. static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
  236. {
  237. struct drm_psb_private *dev_priv;
  238. unsigned long resource_start;
  239. struct psb_gtt *pg;
  240. unsigned long irqflags;
  241. int ret = -ENOMEM;
  242. uint32_t tt_pages;
  243. struct drm_connector *connector;
  244. struct psb_intel_encoder *psb_intel_encoder;
  245. dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
  246. if (dev_priv == NULL)
  247. return -ENOMEM;
  248. dev_priv->ops = (struct psb_ops *)chipset;
  249. dev_priv->dev = dev;
  250. dev->dev_private = (void *) dev_priv;
  251. pci_set_master(dev->pdev);
  252. if (!IS_PSB(dev)) {
  253. if (pci_enable_msi(dev->pdev))
  254. dev_warn(dev->dev, "Enabling MSI failed!\n");
  255. }
  256. dev_priv->num_pipe = dev_priv->ops->pipes;
  257. resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
  258. dev_priv->vdc_reg =
  259. ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
  260. if (!dev_priv->vdc_reg)
  261. goto out_err;
  262. dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
  263. PSB_SGX_SIZE);
  264. if (!dev_priv->sgx_reg)
  265. goto out_err;
  266. ret = dev_priv->ops->chip_setup(dev);
  267. if (ret)
  268. goto out_err;
  269. /* Init OSPM support */
  270. gma_power_init(dev);
  271. ret = -ENOMEM;
  272. dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
  273. if (!dev_priv->scratch_page)
  274. goto out_err;
  275. set_pages_uc(dev_priv->scratch_page, 1);
  276. ret = psb_gtt_init(dev, 0);
  277. if (ret)
  278. goto out_err;
  279. dev_priv->mmu = psb_mmu_driver_init((void *)0,
  280. drm_psb_trap_pagefaults, 0,
  281. dev_priv);
  282. if (!dev_priv->mmu)
  283. goto out_err;
  284. pg = &dev_priv->gtt;
  285. tt_pages = (pg->gatt_pages < PSB_TT_PRIV0_PLIMIT) ?
  286. (pg->gatt_pages) : PSB_TT_PRIV0_PLIMIT;
  287. dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
  288. if (!dev_priv->pf_pd)
  289. goto out_err;
  290. psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
  291. psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
  292. ret = psb_do_init(dev);
  293. if (ret)
  294. return ret;
  295. PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
  296. PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
  297. /* igd_opregion_init(&dev_priv->opregion_dev); */
  298. acpi_video_register();
  299. if (dev_priv->lid_state)
  300. psb_lid_timer_init(dev_priv);
  301. ret = drm_vblank_init(dev, dev_priv->num_pipe);
  302. if (ret)
  303. goto out_err;
  304. /*
  305. * Install interrupt handlers prior to powering off SGX or else we will
  306. * crash.
  307. */
  308. dev_priv->vdc_irq_mask = 0;
  309. dev_priv->pipestat[0] = 0;
  310. dev_priv->pipestat[1] = 0;
  311. dev_priv->pipestat[2] = 0;
  312. spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
  313. PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
  314. PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
  315. PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
  316. spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
  317. if (IS_PSB(dev) && drm_core_check_feature(dev, DRIVER_MODESET))
  318. drm_irq_install(dev);
  319. dev->vblank_disable_allowed = 1;
  320. dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
  321. dev->driver->get_vblank_counter = psb_get_vblank_counter;
  322. psb_modeset_init(dev);
  323. psb_fbdev_init(dev);
  324. drm_kms_helper_poll_init(dev);
  325. /* Only add backlight support if we have LVDS output */
  326. list_for_each_entry(connector, &dev->mode_config.connector_list,
  327. head) {
  328. psb_intel_encoder = psb_intel_attached_encoder(connector);
  329. switch (psb_intel_encoder->type) {
  330. case INTEL_OUTPUT_LVDS:
  331. case INTEL_OUTPUT_MIPI:
  332. ret = gma_backlight_init(dev);
  333. break;
  334. }
  335. }
  336. if (ret)
  337. return ret;
  338. #if 0
  339. /*enable runtime pm at last*/
  340. pm_runtime_enable(&dev->pdev->dev);
  341. pm_runtime_set_active(&dev->pdev->dev);
  342. #endif
  343. /*Intel drm driver load is done, continue doing pvr load*/
  344. return 0;
  345. out_err:
  346. psb_driver_unload(dev);
  347. return ret;
  348. }
  349. int psb_driver_device_is_agp(struct drm_device *dev)
  350. {
  351. return 0;
  352. }
  353. static inline void get_brightness(struct backlight_device *bd)
  354. {
  355. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  356. if (bd) {
  357. bd->props.brightness = bd->ops->get_brightness(bd);
  358. backlight_update_status(bd);
  359. }
  360. #endif
  361. }
  362. static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
  363. struct drm_file *file_priv)
  364. {
  365. struct drm_psb_private *dev_priv = psb_priv(dev);
  366. uint32_t *arg = data;
  367. dev_priv->blc_adj2 = *arg;
  368. get_brightness(dev_priv->backlight_device);
  369. return 0;
  370. }
  371. static int psb_adb_ioctl(struct drm_device *dev, void *data,
  372. struct drm_file *file_priv)
  373. {
  374. struct drm_psb_private *dev_priv = psb_priv(dev);
  375. uint32_t *arg = data;
  376. dev_priv->blc_adj1 = *arg;
  377. get_brightness(dev_priv->backlight_device);
  378. return 0;
  379. }
  380. static int psb_gamma_ioctl(struct drm_device *dev, void *data,
  381. struct drm_file *file_priv)
  382. {
  383. struct drm_psb_dpst_lut_arg *lut_arg = data;
  384. struct drm_mode_object *obj;
  385. struct drm_crtc *crtc;
  386. struct drm_connector *connector;
  387. struct psb_intel_crtc *psb_intel_crtc;
  388. int i = 0;
  389. int32_t obj_id;
  390. obj_id = lut_arg->output_id;
  391. obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_CONNECTOR);
  392. if (!obj) {
  393. dev_dbg(dev->dev, "Invalid Connector object.\n");
  394. return -EINVAL;
  395. }
  396. connector = obj_to_connector(obj);
  397. crtc = connector->encoder->crtc;
  398. psb_intel_crtc = to_psb_intel_crtc(crtc);
  399. for (i = 0; i < 256; i++)
  400. psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
  401. psb_intel_crtc_load_lut(crtc);
  402. return 0;
  403. }
  404. static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
  405. struct drm_file *file_priv)
  406. {
  407. uint32_t obj_id;
  408. uint16_t op;
  409. struct drm_mode_modeinfo *umode;
  410. struct drm_display_mode *mode = NULL;
  411. struct drm_psb_mode_operation_arg *arg;
  412. struct drm_mode_object *obj;
  413. struct drm_connector *connector;
  414. struct drm_connector_helper_funcs *connector_funcs;
  415. int ret = 0;
  416. int resp = MODE_OK;
  417. arg = (struct drm_psb_mode_operation_arg *)data;
  418. obj_id = arg->obj_id;
  419. op = arg->operation;
  420. switch (op) {
  421. case PSB_MODE_OPERATION_MODE_VALID:
  422. umode = &arg->mode;
  423. mutex_lock(&dev->mode_config.mutex);
  424. obj = drm_mode_object_find(dev, obj_id,
  425. DRM_MODE_OBJECT_CONNECTOR);
  426. if (!obj) {
  427. ret = -EINVAL;
  428. goto mode_op_out;
  429. }
  430. connector = obj_to_connector(obj);
  431. mode = drm_mode_create(dev);
  432. if (!mode) {
  433. ret = -ENOMEM;
  434. goto mode_op_out;
  435. }
  436. /* drm_crtc_convert_umode(mode, umode); */
  437. {
  438. mode->clock = umode->clock;
  439. mode->hdisplay = umode->hdisplay;
  440. mode->hsync_start = umode->hsync_start;
  441. mode->hsync_end = umode->hsync_end;
  442. mode->htotal = umode->htotal;
  443. mode->hskew = umode->hskew;
  444. mode->vdisplay = umode->vdisplay;
  445. mode->vsync_start = umode->vsync_start;
  446. mode->vsync_end = umode->vsync_end;
  447. mode->vtotal = umode->vtotal;
  448. mode->vscan = umode->vscan;
  449. mode->vrefresh = umode->vrefresh;
  450. mode->flags = umode->flags;
  451. mode->type = umode->type;
  452. strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN);
  453. mode->name[DRM_DISPLAY_MODE_LEN-1] = 0;
  454. }
  455. connector_funcs = (struct drm_connector_helper_funcs *)
  456. connector->helper_private;
  457. if (connector_funcs->mode_valid) {
  458. resp = connector_funcs->mode_valid(connector, mode);
  459. arg->data = resp;
  460. }
  461. /*do some clean up work*/
  462. if (mode)
  463. drm_mode_destroy(dev, mode);
  464. mode_op_out:
  465. mutex_unlock(&dev->mode_config.mutex);
  466. return ret;
  467. default:
  468. dev_dbg(dev->dev, "Unsupported psb mode operation\n");
  469. return -EOPNOTSUPP;
  470. }
  471. return 0;
  472. }
  473. static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
  474. struct drm_file *file_priv)
  475. {
  476. struct drm_psb_private *dev_priv = psb_priv(dev);
  477. struct drm_psb_stolen_memory_arg *arg = data;
  478. arg->base = dev_priv->stolen_base;
  479. arg->size = dev_priv->vram_stolen_size;
  480. return 0;
  481. }
  482. static int psb_driver_open(struct drm_device *dev, struct drm_file *priv)
  483. {
  484. return 0;
  485. }
  486. static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
  487. {
  488. }
  489. static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
  490. unsigned long arg)
  491. {
  492. struct drm_file *file_priv = filp->private_data;
  493. struct drm_device *dev = file_priv->minor->dev;
  494. struct drm_psb_private *dev_priv = dev->dev_private;
  495. static unsigned int runtime_allowed;
  496. if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
  497. runtime_allowed++;
  498. pm_runtime_allow(&dev->pdev->dev);
  499. dev_priv->rpm_enabled = 1;
  500. }
  501. return drm_ioctl(filp, cmd, arg);
  502. /* FIXME: do we need to wrap the other side of this */
  503. }
  504. /* When a client dies:
  505. * - Check for and clean up flipped page state
  506. */
  507. void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
  508. {
  509. }
  510. static void psb_remove(struct pci_dev *pdev)
  511. {
  512. struct drm_device *dev = pci_get_drvdata(pdev);
  513. drm_put_dev(dev);
  514. }
  515. static const struct dev_pm_ops psb_pm_ops = {
  516. .resume = gma_power_resume,
  517. .suspend = gma_power_suspend,
  518. .runtime_suspend = psb_runtime_suspend,
  519. .runtime_resume = psb_runtime_resume,
  520. .runtime_idle = psb_runtime_idle,
  521. };
  522. static struct vm_operations_struct psb_gem_vm_ops = {
  523. .fault = psb_gem_fault,
  524. .open = drm_gem_vm_open,
  525. .close = drm_gem_vm_close,
  526. };
  527. static const struct file_operations psb_gem_fops = {
  528. .owner = THIS_MODULE,
  529. .open = drm_open,
  530. .release = drm_release,
  531. .unlocked_ioctl = psb_unlocked_ioctl,
  532. .mmap = drm_gem_mmap,
  533. .poll = drm_poll,
  534. .fasync = drm_fasync,
  535. .read = drm_read,
  536. };
  537. static struct drm_driver driver = {
  538. .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
  539. DRIVER_IRQ_VBL | DRIVER_MODESET | DRIVER_GEM ,
  540. .load = psb_driver_load,
  541. .unload = psb_driver_unload,
  542. .ioctls = psb_ioctls,
  543. .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
  544. .device_is_agp = psb_driver_device_is_agp,
  545. .irq_preinstall = psb_irq_preinstall,
  546. .irq_postinstall = psb_irq_postinstall,
  547. .irq_uninstall = psb_irq_uninstall,
  548. .irq_handler = psb_irq_handler,
  549. .enable_vblank = psb_enable_vblank,
  550. .disable_vblank = psb_disable_vblank,
  551. .get_vblank_counter = psb_get_vblank_counter,
  552. .lastclose = psb_lastclose,
  553. .open = psb_driver_open,
  554. .preclose = psb_driver_preclose,
  555. .postclose = psb_driver_close,
  556. .reclaim_buffers = drm_core_reclaim_buffers,
  557. .gem_init_object = psb_gem_init_object,
  558. .gem_free_object = psb_gem_free_object,
  559. .gem_vm_ops = &psb_gem_vm_ops,
  560. .dumb_create = psb_gem_dumb_create,
  561. .dumb_map_offset = psb_gem_dumb_map_gtt,
  562. .dumb_destroy = psb_gem_dumb_destroy,
  563. .fops = &psb_gem_fops,
  564. .name = DRIVER_NAME,
  565. .desc = DRIVER_DESC,
  566. .date = PSB_DRM_DRIVER_DATE,
  567. .major = PSB_DRM_DRIVER_MAJOR,
  568. .minor = PSB_DRM_DRIVER_MINOR,
  569. .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
  570. };
  571. static struct pci_driver psb_pci_driver = {
  572. .name = DRIVER_NAME,
  573. .id_table = pciidlist,
  574. .probe = psb_probe,
  575. .remove = psb_remove,
  576. .driver.pm = &psb_pm_ops,
  577. };
  578. static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  579. {
  580. return drm_get_pci_dev(pdev, ent, &driver);
  581. }
  582. static int __init psb_init(void)
  583. {
  584. return drm_pci_init(&driver, &psb_pci_driver);
  585. }
  586. static void __exit psb_exit(void)
  587. {
  588. drm_pci_exit(&driver, &psb_pci_driver);
  589. }
  590. late_initcall(psb_init);
  591. module_exit(psb_exit);
  592. MODULE_AUTHOR("Alan Cox <alan@linux.intel.com> and others");
  593. MODULE_DESCRIPTION(DRIVER_DESC);
  594. MODULE_LICENSE("GPL");