rx.c 8.0 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2009 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/gfp.h>
  24. #include <linux/sched.h>
  25. #include "wl12xx.h"
  26. #include "acx.h"
  27. #include "reg.h"
  28. #include "rx.h"
  29. #include "io.h"
  30. static u8 wl12xx_rx_get_mem_block(struct wl12xx_fw_status *status,
  31. u32 drv_rx_counter)
  32. {
  33. return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
  34. RX_MEM_BLOCK_MASK;
  35. }
  36. static u32 wl12xx_rx_get_buf_size(struct wl12xx_fw_status *status,
  37. u32 drv_rx_counter)
  38. {
  39. return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
  40. RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
  41. }
  42. static bool wl12xx_rx_get_unaligned(struct wl12xx_fw_status *status,
  43. u32 drv_rx_counter)
  44. {
  45. /* Convert the value to bool */
  46. return !!(le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
  47. RX_BUF_UNALIGNED_PAYLOAD);
  48. }
  49. static void wl1271_rx_status(struct wl1271 *wl,
  50. struct wl1271_rx_descriptor *desc,
  51. struct ieee80211_rx_status *status,
  52. u8 beacon)
  53. {
  54. memset(status, 0, sizeof(struct ieee80211_rx_status));
  55. if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
  56. status->band = IEEE80211_BAND_2GHZ;
  57. else
  58. status->band = IEEE80211_BAND_5GHZ;
  59. status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band);
  60. /* 11n support */
  61. if (desc->rate <= CONF_HW_RXTX_RATE_MCS0)
  62. status->flag |= RX_FLAG_HT;
  63. status->signal = desc->rssi;
  64. /*
  65. * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
  66. * need to divide by two for now, but TI has been discussing about
  67. * changing it. This needs to be rechecked.
  68. */
  69. wl->noise = desc->rssi - (desc->snr >> 1);
  70. status->freq = ieee80211_channel_to_frequency(desc->channel,
  71. status->band);
  72. if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
  73. u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;
  74. status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED |
  75. RX_FLAG_DECRYPTED;
  76. if (unlikely(desc_err_code == WL1271_RX_DESC_MIC_FAIL)) {
  77. status->flag |= RX_FLAG_MMIC_ERROR;
  78. wl1271_warning("Michael MIC error");
  79. }
  80. }
  81. }
  82. static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
  83. bool unaligned)
  84. {
  85. struct wl1271_rx_descriptor *desc;
  86. struct sk_buff *skb;
  87. struct ieee80211_hdr *hdr;
  88. u8 *buf;
  89. u8 beacon = 0;
  90. u8 is_data = 0;
  91. u8 reserved = unaligned ? NET_IP_ALIGN : 0;
  92. u16 seq_num;
  93. /*
  94. * In PLT mode we seem to get frames and mac80211 warns about them,
  95. * workaround this by not retrieving them at all.
  96. */
  97. if (unlikely(wl->state == WL1271_STATE_PLT))
  98. return -EINVAL;
  99. /* the data read starts with the descriptor */
  100. desc = (struct wl1271_rx_descriptor *) data;
  101. if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
  102. size_t len = length - sizeof(*desc);
  103. wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
  104. wake_up_interruptible(&wl->fwlog_waitq);
  105. return 0;
  106. }
  107. switch (desc->status & WL1271_RX_DESC_STATUS_MASK) {
  108. /* discard corrupted packets */
  109. case WL1271_RX_DESC_DRIVER_RX_Q_FAIL:
  110. case WL1271_RX_DESC_DECRYPT_FAIL:
  111. wl1271_warning("corrupted packet in RX with status: 0x%x",
  112. desc->status & WL1271_RX_DESC_STATUS_MASK);
  113. return -EINVAL;
  114. case WL1271_RX_DESC_SUCCESS:
  115. case WL1271_RX_DESC_MIC_FAIL:
  116. break;
  117. default:
  118. wl1271_error("invalid RX descriptor status: 0x%x",
  119. desc->status & WL1271_RX_DESC_STATUS_MASK);
  120. return -EINVAL;
  121. }
  122. /* skb length not included rx descriptor */
  123. skb = __dev_alloc_skb(length + reserved - sizeof(*desc), GFP_KERNEL);
  124. if (!skb) {
  125. wl1271_error("Couldn't allocate RX frame");
  126. return -ENOMEM;
  127. }
  128. /* reserve the unaligned payload(if any) */
  129. skb_reserve(skb, reserved);
  130. buf = skb_put(skb, length - sizeof(*desc));
  131. /*
  132. * Copy packets from aggregation buffer to the skbs without rx
  133. * descriptor and with packet payload aligned care. In case of unaligned
  134. * packets copy the packets in offset of 2 bytes guarantee IP header
  135. * payload aligned to 4 bytes.
  136. */
  137. memcpy(buf, data + sizeof(*desc), length - sizeof(*desc));
  138. hdr = (struct ieee80211_hdr *)skb->data;
  139. if (ieee80211_is_beacon(hdr->frame_control))
  140. beacon = 1;
  141. if (ieee80211_is_data_present(hdr->frame_control))
  142. is_data = 1;
  143. wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
  144. seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  145. wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d", skb,
  146. skb->len - desc->pad_len,
  147. beacon ? "beacon" : "",
  148. seq_num);
  149. skb_trim(skb, skb->len - desc->pad_len);
  150. skb_queue_tail(&wl->deferred_rx_queue, skb);
  151. queue_work(wl->freezable_wq, &wl->netstack_work);
  152. return is_data;
  153. }
  154. void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)
  155. {
  156. struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
  157. u32 buf_size;
  158. u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
  159. u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
  160. u32 rx_counter;
  161. u32 mem_block;
  162. u32 pkt_length;
  163. u32 pkt_offset;
  164. bool is_ap = (wl->bss_type == BSS_TYPE_AP_BSS);
  165. bool had_data = false;
  166. bool unaligned = false;
  167. while (drv_rx_counter != fw_rx_counter) {
  168. buf_size = 0;
  169. rx_counter = drv_rx_counter;
  170. while (rx_counter != fw_rx_counter) {
  171. pkt_length = wl12xx_rx_get_buf_size(status, rx_counter);
  172. if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
  173. break;
  174. buf_size += pkt_length;
  175. rx_counter++;
  176. rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
  177. }
  178. if (buf_size == 0) {
  179. wl1271_warning("received empty data");
  180. break;
  181. }
  182. if (wl->chip.id != CHIP_ID_1283_PG20) {
  183. /*
  184. * Choose the block we want to read
  185. * For aggregated packets, only the first memory block
  186. * should be retrieved. The FW takes care of the rest.
  187. */
  188. mem_block = wl12xx_rx_get_mem_block(status,
  189. drv_rx_counter);
  190. wl->rx_mem_pool_addr.addr = (mem_block << 8) +
  191. le32_to_cpu(wl_mem_map->packet_memory_pool_start);
  192. wl->rx_mem_pool_addr.addr_extra =
  193. wl->rx_mem_pool_addr.addr + 4;
  194. wl1271_write(wl, WL1271_SLV_REG_DATA,
  195. &wl->rx_mem_pool_addr,
  196. sizeof(wl->rx_mem_pool_addr), false);
  197. }
  198. /* Read all available packets at once */
  199. wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
  200. buf_size, true);
  201. /* Split data into separate packets */
  202. pkt_offset = 0;
  203. while (pkt_offset < buf_size) {
  204. pkt_length = wl12xx_rx_get_buf_size(status,
  205. drv_rx_counter);
  206. unaligned = wl12xx_rx_get_unaligned(status,
  207. drv_rx_counter);
  208. /*
  209. * the handle data call can only fail in memory-outage
  210. * conditions, in that case the received frame will just
  211. * be dropped.
  212. */
  213. if (wl1271_rx_handle_data(wl,
  214. wl->aggr_buf + pkt_offset,
  215. pkt_length, unaligned) == 1)
  216. had_data = true;
  217. wl->rx_counter++;
  218. drv_rx_counter++;
  219. drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
  220. pkt_offset += pkt_length;
  221. }
  222. }
  223. /*
  224. * Write the driver's packet counter to the FW. This is only required
  225. * for older hardware revisions
  226. */
  227. if (wl->quirks & WL12XX_QUIRK_END_OF_TRANSACTION)
  228. wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
  229. if (!is_ap && wl->conf.rx_streaming.interval && had_data &&
  230. (wl->conf.rx_streaming.always ||
  231. test_bit(WL1271_FLAG_SOFT_GEMINI, &wl->flags))) {
  232. u32 timeout = wl->conf.rx_streaming.duration;
  233. /* restart rx streaming */
  234. if (!test_bit(WL1271_FLAG_RX_STREAMING_STARTED, &wl->flags))
  235. ieee80211_queue_work(wl->hw,
  236. &wl->rx_streaming_enable_work);
  237. mod_timer(&wl->rx_streaming_timer,
  238. jiffies + msecs_to_jiffies(timeout));
  239. }
  240. }