fw_common.c 23 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/firmware.h>
  31. #include <linux/export.h>
  32. #include "../wifi.h"
  33. #include "../pci.h"
  34. #include "../base.h"
  35. #include "../rtl8192ce/reg.h"
  36. #include "../rtl8192ce/def.h"
  37. #include "fw_common.h"
  38. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  39. {
  40. struct rtl_priv *rtlpriv = rtl_priv(hw);
  41. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  42. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  43. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  44. if (enable)
  45. value32 |= MCUFWDL_EN;
  46. else
  47. value32 &= ~MCUFWDL_EN;
  48. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  49. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  50. u8 tmp;
  51. if (enable) {
  52. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  53. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  54. tmp | 0x04);
  55. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  56. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  57. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  58. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  59. } else {
  60. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  62. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  63. }
  64. }
  65. }
  66. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  67. const u8 *buffer, u32 size)
  68. {
  69. struct rtl_priv *rtlpriv = rtl_priv(hw);
  70. u32 blockSize = sizeof(u32);
  71. u8 *bufferPtr = (u8 *) buffer;
  72. u32 *pu4BytePtr = (u32 *) buffer;
  73. u32 i, offset, blockCount, remainSize;
  74. blockCount = size / blockSize;
  75. remainSize = size % blockSize;
  76. for (i = 0; i < blockCount; i++) {
  77. offset = i * blockSize;
  78. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  79. *(pu4BytePtr + i));
  80. }
  81. if (remainSize) {
  82. offset = blockCount * blockSize;
  83. bufferPtr += offset;
  84. for (i = 0; i < remainSize; i++) {
  85. rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
  86. offset + i), *(bufferPtr + i));
  87. }
  88. }
  89. }
  90. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  91. u32 page, const u8 *buffer, u32 size)
  92. {
  93. struct rtl_priv *rtlpriv = rtl_priv(hw);
  94. u8 value8;
  95. u8 u8page = (u8) (page & 0x07);
  96. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  97. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  98. _rtl92c_fw_block_write(hw, buffer, size);
  99. }
  100. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  101. {
  102. u32 fwlen = *pfwlen;
  103. u8 remain = (u8) (fwlen % 4);
  104. remain = (remain == 0) ? 0 : (4 - remain);
  105. while (remain > 0) {
  106. pfwbuf[fwlen] = 0;
  107. fwlen++;
  108. remain--;
  109. }
  110. *pfwlen = fwlen;
  111. }
  112. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  113. enum version_8192c version, u8 *buffer, u32 size)
  114. {
  115. struct rtl_priv *rtlpriv = rtl_priv(hw);
  116. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  117. u8 *bufferPtr = (u8 *) buffer;
  118. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  119. if (IS_CHIP_VER_B(version)) {
  120. u32 pageNums, remainSize;
  121. u32 page, offset;
  122. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  123. _rtl92c_fill_dummy(bufferPtr, &size);
  124. pageNums = size / FW_8192C_PAGE_SIZE;
  125. remainSize = size % FW_8192C_PAGE_SIZE;
  126. if (pageNums > 4) {
  127. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  128. ("Page numbers should not greater then 4\n"));
  129. }
  130. for (page = 0; page < pageNums; page++) {
  131. offset = page * FW_8192C_PAGE_SIZE;
  132. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  133. FW_8192C_PAGE_SIZE);
  134. }
  135. if (remainSize) {
  136. offset = pageNums * FW_8192C_PAGE_SIZE;
  137. page = pageNums;
  138. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  139. remainSize);
  140. }
  141. } else {
  142. _rtl92c_fw_block_write(hw, buffer, size);
  143. }
  144. }
  145. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  146. {
  147. struct rtl_priv *rtlpriv = rtl_priv(hw);
  148. u32 counter = 0;
  149. u32 value32;
  150. do {
  151. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  152. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  153. (!(value32 & FWDL_ChkSum_rpt)));
  154. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  155. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  156. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  157. value32));
  158. return -EIO;
  159. }
  160. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  161. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  162. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  163. value32 |= MCUFWDL_RDY;
  164. value32 &= ~WINTINI_RDY;
  165. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  166. counter = 0;
  167. do {
  168. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  169. if (value32 & WINTINI_RDY) {
  170. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  171. ("Polling FW ready success!!"
  172. " REG_MCUFWDL:0x%08x .\n",
  173. value32));
  174. return 0;
  175. }
  176. mdelay(FW_8192C_POLLING_DELAY);
  177. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  178. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  179. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  180. return -EIO;
  181. }
  182. int rtl92c_download_fw(struct ieee80211_hw *hw)
  183. {
  184. struct rtl_priv *rtlpriv = rtl_priv(hw);
  185. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  186. struct rtl92c_firmware_header *pfwheader;
  187. u8 *pfwdata;
  188. u32 fwsize;
  189. enum version_8192c version = rtlhal->version;
  190. pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
  191. if (!rtlhal->pfirmware)
  192. return 1;
  193. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  194. pfwdata = (u8 *) rtlhal->pfirmware;
  195. fwsize = rtlhal->fwsize;
  196. if (IS_FW_HEADER_EXIST(pfwheader)) {
  197. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  198. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  199. pfwheader->version, pfwheader->signature,
  200. (uint)sizeof(struct rtl92c_firmware_header)));
  201. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  202. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  203. }
  204. _rtl92c_enable_fw_download(hw, true);
  205. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  206. _rtl92c_enable_fw_download(hw, false);
  207. if (_rtl92c_fw_free_to_go(hw)) {
  208. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  209. ("Firmware is not ready to run!\n"));
  210. } else {
  211. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  212. ("Firmware is ready to run!\n"));
  213. }
  214. return 0;
  215. }
  216. EXPORT_SYMBOL(rtl92c_download_fw);
  217. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  218. {
  219. struct rtl_priv *rtlpriv = rtl_priv(hw);
  220. u8 val_hmetfr, val_mcutst_1;
  221. bool result = false;
  222. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  223. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  224. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  225. result = true;
  226. return result;
  227. }
  228. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  229. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  230. {
  231. struct rtl_priv *rtlpriv = rtl_priv(hw);
  232. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  233. u8 boxnum;
  234. u16 box_reg = 0, box_extreg = 0;
  235. u8 u1b_tmp;
  236. bool isfw_read = false;
  237. bool bwrite_sucess = false;
  238. u8 wait_h2c_limmit = 100;
  239. u8 wait_writeh2c_limmit = 100;
  240. u8 boxcontent[4], boxextcontent[2];
  241. u32 h2c_waitcounter = 0;
  242. unsigned long flag;
  243. u8 idx;
  244. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  245. while (true) {
  246. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  247. if (rtlhal->h2c_setinprogress) {
  248. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  249. ("H2C set in progress! Wait to set.."
  250. "element_id(%d).\n", element_id));
  251. while (rtlhal->h2c_setinprogress) {
  252. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  253. flag);
  254. h2c_waitcounter++;
  255. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  256. ("Wait 100 us (%d times)...\n",
  257. h2c_waitcounter));
  258. udelay(100);
  259. if (h2c_waitcounter > 1000)
  260. return;
  261. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  262. flag);
  263. }
  264. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  265. } else {
  266. rtlhal->h2c_setinprogress = true;
  267. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  268. break;
  269. }
  270. }
  271. while (!bwrite_sucess) {
  272. wait_writeh2c_limmit--;
  273. if (wait_writeh2c_limmit == 0) {
  274. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  275. ("Write H2C fail because no trigger "
  276. "for FW INT!\n"));
  277. break;
  278. }
  279. boxnum = rtlhal->last_hmeboxnum;
  280. switch (boxnum) {
  281. case 0:
  282. box_reg = REG_HMEBOX_0;
  283. box_extreg = REG_HMEBOX_EXT_0;
  284. break;
  285. case 1:
  286. box_reg = REG_HMEBOX_1;
  287. box_extreg = REG_HMEBOX_EXT_1;
  288. break;
  289. case 2:
  290. box_reg = REG_HMEBOX_2;
  291. box_extreg = REG_HMEBOX_EXT_2;
  292. break;
  293. case 3:
  294. box_reg = REG_HMEBOX_3;
  295. box_extreg = REG_HMEBOX_EXT_3;
  296. break;
  297. default:
  298. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  299. ("switch case not process\n"));
  300. break;
  301. }
  302. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  303. while (!isfw_read) {
  304. wait_h2c_limmit--;
  305. if (wait_h2c_limmit == 0) {
  306. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  307. ("Wating too long for FW read "
  308. "clear HMEBox(%d)!\n", boxnum));
  309. break;
  310. }
  311. udelay(10);
  312. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  313. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  314. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  315. ("Wating for FW read clear HMEBox(%d)!!! "
  316. "0x1BF = %2x\n", boxnum, u1b_tmp));
  317. }
  318. if (!isfw_read) {
  319. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  320. ("Write H2C register BOX[%d] fail!!!!! "
  321. "Fw do not read.\n", boxnum));
  322. break;
  323. }
  324. memset(boxcontent, 0, sizeof(boxcontent));
  325. memset(boxextcontent, 0, sizeof(boxextcontent));
  326. boxcontent[0] = element_id;
  327. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  328. ("Write element_id box_reg(%4x) = %2x\n",
  329. box_reg, element_id));
  330. switch (cmd_len) {
  331. case 1:
  332. boxcontent[0] &= ~(BIT(7));
  333. memcpy((u8 *) (boxcontent) + 1,
  334. p_cmdbuffer, 1);
  335. for (idx = 0; idx < 4; idx++) {
  336. rtl_write_byte(rtlpriv, box_reg + idx,
  337. boxcontent[idx]);
  338. }
  339. break;
  340. case 2:
  341. boxcontent[0] &= ~(BIT(7));
  342. memcpy((u8 *) (boxcontent) + 1,
  343. p_cmdbuffer, 2);
  344. for (idx = 0; idx < 4; idx++) {
  345. rtl_write_byte(rtlpriv, box_reg + idx,
  346. boxcontent[idx]);
  347. }
  348. break;
  349. case 3:
  350. boxcontent[0] &= ~(BIT(7));
  351. memcpy((u8 *) (boxcontent) + 1,
  352. p_cmdbuffer, 3);
  353. for (idx = 0; idx < 4; idx++) {
  354. rtl_write_byte(rtlpriv, box_reg + idx,
  355. boxcontent[idx]);
  356. }
  357. break;
  358. case 4:
  359. boxcontent[0] |= (BIT(7));
  360. memcpy((u8 *) (boxextcontent),
  361. p_cmdbuffer, 2);
  362. memcpy((u8 *) (boxcontent) + 1,
  363. p_cmdbuffer + 2, 2);
  364. for (idx = 0; idx < 2; idx++) {
  365. rtl_write_byte(rtlpriv, box_extreg + idx,
  366. boxextcontent[idx]);
  367. }
  368. for (idx = 0; idx < 4; idx++) {
  369. rtl_write_byte(rtlpriv, box_reg + idx,
  370. boxcontent[idx]);
  371. }
  372. break;
  373. case 5:
  374. boxcontent[0] |= (BIT(7));
  375. memcpy((u8 *) (boxextcontent),
  376. p_cmdbuffer, 2);
  377. memcpy((u8 *) (boxcontent) + 1,
  378. p_cmdbuffer + 2, 3);
  379. for (idx = 0; idx < 2; idx++) {
  380. rtl_write_byte(rtlpriv, box_extreg + idx,
  381. boxextcontent[idx]);
  382. }
  383. for (idx = 0; idx < 4; idx++) {
  384. rtl_write_byte(rtlpriv, box_reg + idx,
  385. boxcontent[idx]);
  386. }
  387. break;
  388. default:
  389. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  390. ("switch case not process\n"));
  391. break;
  392. }
  393. bwrite_sucess = true;
  394. rtlhal->last_hmeboxnum = boxnum + 1;
  395. if (rtlhal->last_hmeboxnum == 4)
  396. rtlhal->last_hmeboxnum = 0;
  397. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  398. ("pHalData->last_hmeboxnum = %d\n",
  399. rtlhal->last_hmeboxnum));
  400. }
  401. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  402. rtlhal->h2c_setinprogress = false;
  403. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  404. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  405. }
  406. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  407. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  408. {
  409. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  410. u32 tmp_cmdbuf[2];
  411. if (rtlhal->fw_ready == false) {
  412. RT_ASSERT(false, ("return H2C cmd because of Fw "
  413. "download fail!!!\n"));
  414. return;
  415. }
  416. memset(tmp_cmdbuf, 0, 8);
  417. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  418. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  419. return;
  420. }
  421. EXPORT_SYMBOL(rtl92c_fill_h2c_cmd);
  422. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  423. {
  424. u8 u1b_tmp;
  425. u8 delay = 100;
  426. struct rtl_priv *rtlpriv = rtl_priv(hw);
  427. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  428. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  429. while (u1b_tmp & BIT(2)) {
  430. delay--;
  431. if (delay == 0) {
  432. RT_ASSERT(false, ("8051 reset fail.\n"));
  433. break;
  434. }
  435. udelay(50);
  436. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  437. }
  438. }
  439. EXPORT_SYMBOL(rtl92c_firmware_selfreset);
  440. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  441. {
  442. struct rtl_priv *rtlpriv = rtl_priv(hw);
  443. u8 u1_h2c_set_pwrmode[3] = {0};
  444. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  445. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  446. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  447. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  448. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  449. ppsc->reg_max_lps_awakeintvl);
  450. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  451. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  452. u1_h2c_set_pwrmode, 3);
  453. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  454. }
  455. EXPORT_SYMBOL(rtl92c_set_fw_pwrmode_cmd);
  456. static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  457. struct sk_buff *skb)
  458. {
  459. struct rtl_priv *rtlpriv = rtl_priv(hw);
  460. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  461. struct rtl8192_tx_ring *ring;
  462. struct rtl_tx_desc *pdesc;
  463. unsigned long flags;
  464. struct sk_buff *pskb = NULL;
  465. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  466. pskb = __skb_dequeue(&ring->queue);
  467. if (pskb)
  468. kfree_skb(pskb);
  469. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  470. pdesc = &ring->desc[0];
  471. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  472. __skb_queue_tail(&ring->queue, skb);
  473. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  474. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  475. return true;
  476. }
  477. #define BEACON_PG 0 /*->1*/
  478. #define PSPOLL_PG 2
  479. #define NULL_PG 3
  480. #define PROBERSP_PG 4 /*->5*/
  481. #define TOTAL_RESERVED_PKT_LEN 768
  482. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  483. /* page 0 beacon */
  484. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  485. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  486. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  487. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  488. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  489. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  490. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  491. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  492. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  493. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  494. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  495. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  496. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  497. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  498. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  499. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  500. /* page 1 beacon */
  501. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  502. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  503. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  504. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  505. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  506. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  507. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  508. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  509. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  510. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  511. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  512. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  513. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  514. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  515. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  516. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  517. /* page 2 ps-poll */
  518. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  519. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  520. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  521. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  522. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  523. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  524. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  525. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  526. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  530. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  531. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  532. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  534. /* page 3 null */
  535. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  536. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  537. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  541. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  542. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  543. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  545. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  546. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  547. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  548. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  549. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  550. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  551. /* page 4 probe_resp */
  552. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  553. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  554. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  555. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  556. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  557. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  558. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  559. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  560. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  561. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  562. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  563. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  564. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  565. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  566. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  567. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  568. /* page 5 probe_resp */
  569. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  570. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  571. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  572. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  573. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  574. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  575. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  576. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  577. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  578. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  579. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  580. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  581. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  582. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  583. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  584. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  585. };
  586. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)
  587. {
  588. struct rtl_priv *rtlpriv = rtl_priv(hw);
  589. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  590. struct sk_buff *skb = NULL;
  591. u32 totalpacketlen;
  592. bool rtstatus;
  593. u8 u1RsvdPageLoc[3] = {0};
  594. bool dlok = false;
  595. u8 *beacon;
  596. u8 *pspoll;
  597. u8 *nullfunc;
  598. u8 *probersp;
  599. /*---------------------------------------------------------
  600. (1) beacon
  601. ---------------------------------------------------------*/
  602. beacon = &reserved_page_packet[BEACON_PG * 128];
  603. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  604. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  605. /*-------------------------------------------------------
  606. (2) ps-poll
  607. --------------------------------------------------------*/
  608. pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  609. SET_80211_PS_POLL_AID(pspoll, (mac->assoc_id | 0xc000));
  610. SET_80211_PS_POLL_BSSID(pspoll, mac->bssid);
  611. SET_80211_PS_POLL_TA(pspoll, mac->mac_addr);
  612. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  613. /*--------------------------------------------------------
  614. (3) null data
  615. ---------------------------------------------------------*/
  616. nullfunc = &reserved_page_packet[NULL_PG * 128];
  617. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  618. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  619. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  620. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  621. /*---------------------------------------------------------
  622. (4) probe response
  623. ----------------------------------------------------------*/
  624. probersp = &reserved_page_packet[PROBERSP_PG * 128];
  625. SET_80211_HDR_ADDRESS1(probersp, mac->bssid);
  626. SET_80211_HDR_ADDRESS2(probersp, mac->mac_addr);
  627. SET_80211_HDR_ADDRESS3(probersp, mac->bssid);
  628. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  629. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  630. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  631. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  632. &reserved_page_packet[0], totalpacketlen);
  633. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  634. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  635. u1RsvdPageLoc, 3);
  636. skb = dev_alloc_skb(totalpacketlen);
  637. memcpy((u8 *) skb_put(skb, totalpacketlen),
  638. &reserved_page_packet, totalpacketlen);
  639. rtstatus = _rtl92c_cmd_send_packet(hw, skb);
  640. if (rtstatus)
  641. dlok = true;
  642. if (dlok) {
  643. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  644. ("Set RSVD page location to Fw.\n"));
  645. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  646. "H2C_RSVDPAGE:\n",
  647. u1RsvdPageLoc, 3);
  648. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  649. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  650. } else
  651. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  652. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  653. }
  654. EXPORT_SYMBOL(rtl92c_set_fw_rsvdpagepkt);
  655. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  656. {
  657. u8 u1_joinbssrpt_parm[1] = {0};
  658. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  659. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  660. }
  661. EXPORT_SYMBOL(rtl92c_set_fw_joinbss_report_cmd);