omap-usb-tll.c 13 KB

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  1. /**
  2. * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
  5. * Author: Keshava Munegowda <keshava_mgowda@ti.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 of
  9. * the License as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/types.h>
  22. #include <linux/slab.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/clk.h>
  26. #include <linux/io.h>
  27. #include <linux/err.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/platform_data/usb-omap.h>
  30. #define USBTLL_DRIVER_NAME "usbhs_tll"
  31. /* TLL Register Set */
  32. #define OMAP_USBTLL_REVISION (0x00)
  33. #define OMAP_USBTLL_SYSCONFIG (0x10)
  34. #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
  35. #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
  36. #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
  37. #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
  38. #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
  39. #define OMAP_USBTLL_SYSSTATUS (0x14)
  40. #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
  41. #define OMAP_USBTLL_IRQSTATUS (0x18)
  42. #define OMAP_USBTLL_IRQENABLE (0x1C)
  43. #define OMAP_TLL_SHARED_CONF (0x30)
  44. #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
  45. #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
  46. #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
  47. #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
  48. #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
  49. #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
  50. #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
  51. #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
  52. #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
  53. #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
  54. #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
  55. #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
  56. #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
  57. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
  58. #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
  59. #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
  60. #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
  61. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
  62. #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
  63. #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
  64. #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
  65. #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
  66. #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
  67. #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
  68. #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
  69. #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
  70. #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
  71. #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
  72. #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
  73. #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
  74. #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
  75. #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
  76. #define OMAP_REV2_TLL_CHANNEL_COUNT 2
  77. #define OMAP_TLL_CHANNEL_COUNT 3
  78. #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
  79. #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
  80. #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
  81. /* Values of USBTLL_REVISION - Note: these are not given in the TRM */
  82. #define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
  83. #define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
  84. #define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
  85. #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
  86. /* only PHY and UNUSED modes don't need TLL */
  87. #define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
  88. (x) != OMAP_EHCI_PORT_MODE_PHY)
  89. struct usbtll_omap {
  90. int nch; /* num. of channels */
  91. struct usbhs_omap_platform_data *pdata;
  92. struct clk **ch_clk;
  93. };
  94. /*-------------------------------------------------------------------------*/
  95. static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
  96. static struct device *tll_dev;
  97. static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */
  98. /*-------------------------------------------------------------------------*/
  99. static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
  100. {
  101. __raw_writel(val, base + reg);
  102. }
  103. static inline u32 usbtll_read(void __iomem *base, u32 reg)
  104. {
  105. return __raw_readl(base + reg);
  106. }
  107. static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
  108. {
  109. __raw_writeb(val, base + reg);
  110. }
  111. static inline u8 usbtll_readb(void __iomem *base, u8 reg)
  112. {
  113. return __raw_readb(base + reg);
  114. }
  115. /*-------------------------------------------------------------------------*/
  116. static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
  117. {
  118. switch (pmode) {
  119. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  120. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  121. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  122. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  123. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  124. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  125. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  126. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  127. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  128. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  129. return true;
  130. default:
  131. return false;
  132. }
  133. }
  134. /*
  135. * convert the port-mode enum to a value we can use in the FSLSMODE
  136. * field of USBTLL_CHANNEL_CONF
  137. */
  138. static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
  139. {
  140. switch (mode) {
  141. case OMAP_USBHS_PORT_MODE_UNUSED:
  142. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  143. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  144. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  145. return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
  146. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  147. return OMAP_TLL_FSLSMODE_3PIN_PHY;
  148. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  149. return OMAP_TLL_FSLSMODE_4PIN_PHY;
  150. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  151. return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
  152. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  153. return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
  154. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  155. return OMAP_TLL_FSLSMODE_3PIN_TLL;
  156. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  157. return OMAP_TLL_FSLSMODE_4PIN_TLL;
  158. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  159. return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
  160. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  161. return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
  162. default:
  163. pr_warn("Invalid port mode, using default\n");
  164. return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
  165. }
  166. }
  167. /**
  168. * usbtll_omap_probe - initialize TI-based HCDs
  169. *
  170. * Allocates basic resources for this USB host controller.
  171. */
  172. static int usbtll_omap_probe(struct platform_device *pdev)
  173. {
  174. struct device *dev = &pdev->dev;
  175. struct usbhs_omap_platform_data *pdata = dev->platform_data;
  176. void __iomem *base;
  177. struct resource *res;
  178. struct usbtll_omap *tll;
  179. unsigned reg;
  180. int ret = 0;
  181. int i, ver;
  182. bool needs_tll;
  183. dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
  184. tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
  185. if (!tll) {
  186. dev_err(dev, "Memory allocation failed\n");
  187. return -ENOMEM;
  188. }
  189. if (!pdata) {
  190. dev_err(dev, "Platform data missing\n");
  191. return -ENODEV;
  192. }
  193. tll->pdata = pdata;
  194. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  195. base = devm_request_and_ioremap(dev, res);
  196. if (!base) {
  197. ret = -EADDRNOTAVAIL;
  198. dev_err(dev, "Resource request/ioremap failed:%d\n", ret);
  199. return ret;
  200. }
  201. platform_set_drvdata(pdev, tll);
  202. pm_runtime_enable(dev);
  203. pm_runtime_get_sync(dev);
  204. ver = usbtll_read(base, OMAP_USBTLL_REVISION);
  205. switch (ver) {
  206. case OMAP_USBTLL_REV1:
  207. tll->nch = OMAP_TLL_CHANNEL_COUNT;
  208. break;
  209. case OMAP_USBTLL_REV2:
  210. case OMAP_USBTLL_REV3:
  211. tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
  212. break;
  213. default:
  214. tll->nch = OMAP_TLL_CHANNEL_COUNT;
  215. dev_dbg(dev,
  216. "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
  217. ver, tll->nch);
  218. break;
  219. }
  220. tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]),
  221. GFP_KERNEL);
  222. if (!tll->ch_clk) {
  223. ret = -ENOMEM;
  224. dev_err(dev, "Couldn't allocate memory for channel clocks\n");
  225. goto err_clk_alloc;
  226. }
  227. for (i = 0; i < tll->nch; i++) {
  228. char clkname[] = "usb_tll_hs_usb_chx_clk";
  229. snprintf(clkname, sizeof(clkname),
  230. "usb_tll_hs_usb_ch%d_clk", i);
  231. tll->ch_clk[i] = clk_get(dev, clkname);
  232. if (IS_ERR(tll->ch_clk[i]))
  233. dev_dbg(dev, "can't get clock : %s\n", clkname);
  234. }
  235. needs_tll = false;
  236. for (i = 0; i < tll->nch; i++)
  237. needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
  238. if (needs_tll) {
  239. /* Program Common TLL register */
  240. reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
  241. reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
  242. | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
  243. reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
  244. reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
  245. usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
  246. /* Enable channels now */
  247. for (i = 0; i < tll->nch; i++) {
  248. reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
  249. if (is_ohci_port(pdata->port_mode[i])) {
  250. reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
  251. << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
  252. reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
  253. } else if (pdata->port_mode[i] ==
  254. OMAP_EHCI_PORT_MODE_TLL) {
  255. /*
  256. * Disable AutoIdle, BitStuffing
  257. * and use SDR Mode
  258. */
  259. reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
  260. | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
  261. | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
  262. } else {
  263. continue;
  264. }
  265. reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
  266. usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
  267. usbtll_writeb(base,
  268. OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
  269. 0xbe);
  270. }
  271. }
  272. pm_runtime_put_sync(dev);
  273. /* only after this can omap_tll_enable/disable work */
  274. spin_lock(&tll_lock);
  275. tll_dev = dev;
  276. spin_unlock(&tll_lock);
  277. return 0;
  278. err_clk_alloc:
  279. pm_runtime_put_sync(dev);
  280. pm_runtime_disable(dev);
  281. return ret;
  282. }
  283. /**
  284. * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
  285. * @pdev: USB Host Controller being removed
  286. *
  287. * Reverses the effect of usbtll_omap_probe().
  288. */
  289. static int usbtll_omap_remove(struct platform_device *pdev)
  290. {
  291. struct usbtll_omap *tll = platform_get_drvdata(pdev);
  292. int i;
  293. spin_lock(&tll_lock);
  294. tll_dev = NULL;
  295. spin_unlock(&tll_lock);
  296. for (i = 0; i < tll->nch; i++)
  297. if (!IS_ERR(tll->ch_clk[i]))
  298. clk_put(tll->ch_clk[i]);
  299. pm_runtime_disable(&pdev->dev);
  300. return 0;
  301. }
  302. static int usbtll_runtime_resume(struct device *dev)
  303. {
  304. struct usbtll_omap *tll = dev_get_drvdata(dev);
  305. struct usbhs_omap_platform_data *pdata = tll->pdata;
  306. int i;
  307. dev_dbg(dev, "usbtll_runtime_resume\n");
  308. for (i = 0; i < tll->nch; i++) {
  309. if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
  310. int r;
  311. if (IS_ERR(tll->ch_clk[i]))
  312. continue;
  313. r = clk_enable(tll->ch_clk[i]);
  314. if (r) {
  315. dev_err(dev,
  316. "Error enabling ch %d clock: %d\n", i, r);
  317. }
  318. }
  319. }
  320. return 0;
  321. }
  322. static int usbtll_runtime_suspend(struct device *dev)
  323. {
  324. struct usbtll_omap *tll = dev_get_drvdata(dev);
  325. struct usbhs_omap_platform_data *pdata = tll->pdata;
  326. int i;
  327. dev_dbg(dev, "usbtll_runtime_suspend\n");
  328. for (i = 0; i < tll->nch; i++) {
  329. if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
  330. if (!IS_ERR(tll->ch_clk[i]))
  331. clk_disable(tll->ch_clk[i]);
  332. }
  333. }
  334. return 0;
  335. }
  336. static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
  337. SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
  338. usbtll_runtime_resume,
  339. NULL)
  340. };
  341. static struct platform_driver usbtll_omap_driver = {
  342. .driver = {
  343. .name = (char *)usbtll_driver_name,
  344. .owner = THIS_MODULE,
  345. .pm = &usbtllomap_dev_pm_ops,
  346. },
  347. .probe = usbtll_omap_probe,
  348. .remove = usbtll_omap_remove,
  349. };
  350. int omap_tll_enable(void)
  351. {
  352. int ret;
  353. spin_lock(&tll_lock);
  354. if (!tll_dev) {
  355. pr_err("%s: OMAP USB TLL not initialized\n", __func__);
  356. ret = -ENODEV;
  357. } else {
  358. ret = pm_runtime_get_sync(tll_dev);
  359. }
  360. spin_unlock(&tll_lock);
  361. return ret;
  362. }
  363. EXPORT_SYMBOL_GPL(omap_tll_enable);
  364. int omap_tll_disable(void)
  365. {
  366. int ret;
  367. spin_lock(&tll_lock);
  368. if (!tll_dev) {
  369. pr_err("%s: OMAP USB TLL not initialized\n", __func__);
  370. ret = -ENODEV;
  371. } else {
  372. ret = pm_runtime_put_sync(tll_dev);
  373. }
  374. spin_unlock(&tll_lock);
  375. return ret;
  376. }
  377. EXPORT_SYMBOL_GPL(omap_tll_disable);
  378. MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
  379. MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
  380. MODULE_LICENSE("GPL v2");
  381. MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
  382. static int __init omap_usbtll_drvinit(void)
  383. {
  384. return platform_driver_register(&usbtll_omap_driver);
  385. }
  386. /*
  387. * init before usbhs core driver;
  388. * The usbtll driver should be initialized before
  389. * the usbhs core driver probe function is called.
  390. */
  391. fs_initcall(omap_usbtll_drvinit);
  392. static void __exit omap_usbtll_drvexit(void)
  393. {
  394. platform_driver_unregister(&usbtll_omap_driver);
  395. }
  396. module_exit(omap_usbtll_drvexit);