omap_hwmod.c 64 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - handle IO mapping
  120. * - bus throughput & module latency measurement code
  121. *
  122. * XXX add tests at the beginning of each function to ensure the hwmod is
  123. * in the appropriate state
  124. * XXX error return values should be checked to ensure that they are
  125. * appropriate
  126. */
  127. #undef DEBUG
  128. #include <linux/kernel.h>
  129. #include <linux/errno.h>
  130. #include <linux/io.h>
  131. #include <linux/clk.h>
  132. #include <linux/delay.h>
  133. #include <linux/err.h>
  134. #include <linux/list.h>
  135. #include <linux/mutex.h>
  136. #include <linux/spinlock.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include "clockdomain.h"
  140. #include "powerdomain.h"
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm2xxx_3xxx.h"
  145. #include "cm44xx.h"
  146. #include "prm2xxx_3xxx.h"
  147. #include "prm44xx.h"
  148. #include "mux.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* Private functions */
  158. /**
  159. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  160. * @oh: struct omap_hwmod *
  161. *
  162. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  163. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  164. * OCP_SYSCONFIG register or 0 upon success.
  165. */
  166. static int _update_sysc_cache(struct omap_hwmod *oh)
  167. {
  168. if (!oh->class->sysc) {
  169. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  170. return -EINVAL;
  171. }
  172. /* XXX ensure module interface clock is up */
  173. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  174. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  175. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  176. return 0;
  177. }
  178. /**
  179. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  180. * @v: OCP_SYSCONFIG value to write
  181. * @oh: struct omap_hwmod *
  182. *
  183. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  184. * one. No return value.
  185. */
  186. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  187. {
  188. if (!oh->class->sysc) {
  189. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  190. return;
  191. }
  192. /* XXX ensure module interface clock is up */
  193. /* Module might have lost context, always update cache and register */
  194. oh->_sysc_cache = v;
  195. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  196. }
  197. /**
  198. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  199. * @oh: struct omap_hwmod *
  200. * @standbymode: MIDLEMODE field bits
  201. * @v: pointer to register contents to modify
  202. *
  203. * Update the master standby mode bits in @v to be @standbymode for
  204. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  205. * upon error or 0 upon success.
  206. */
  207. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  208. u32 *v)
  209. {
  210. u32 mstandby_mask;
  211. u8 mstandby_shift;
  212. if (!oh->class->sysc ||
  213. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  214. return -EINVAL;
  215. if (!oh->class->sysc->sysc_fields) {
  216. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  217. return -EINVAL;
  218. }
  219. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  220. mstandby_mask = (0x3 << mstandby_shift);
  221. *v &= ~mstandby_mask;
  222. *v |= __ffs(standbymode) << mstandby_shift;
  223. return 0;
  224. }
  225. /**
  226. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  227. * @oh: struct omap_hwmod *
  228. * @idlemode: SIDLEMODE field bits
  229. * @v: pointer to register contents to modify
  230. *
  231. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  232. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  233. * or 0 upon success.
  234. */
  235. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  236. {
  237. u32 sidle_mask;
  238. u8 sidle_shift;
  239. if (!oh->class->sysc ||
  240. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  241. return -EINVAL;
  242. if (!oh->class->sysc->sysc_fields) {
  243. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  244. return -EINVAL;
  245. }
  246. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  247. sidle_mask = (0x3 << sidle_shift);
  248. *v &= ~sidle_mask;
  249. *v |= __ffs(idlemode) << sidle_shift;
  250. return 0;
  251. }
  252. /**
  253. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  254. * @oh: struct omap_hwmod *
  255. * @clockact: CLOCKACTIVITY field bits
  256. * @v: pointer to register contents to modify
  257. *
  258. * Update the clockactivity mode bits in @v to be @clockact for the
  259. * @oh hwmod. Used for additional powersaving on some modules. Does
  260. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  261. * success.
  262. */
  263. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  264. {
  265. u32 clkact_mask;
  266. u8 clkact_shift;
  267. if (!oh->class->sysc ||
  268. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  269. return -EINVAL;
  270. if (!oh->class->sysc->sysc_fields) {
  271. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  272. return -EINVAL;
  273. }
  274. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  275. clkact_mask = (0x3 << clkact_shift);
  276. *v &= ~clkact_mask;
  277. *v |= clockact << clkact_shift;
  278. return 0;
  279. }
  280. /**
  281. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  282. * @oh: struct omap_hwmod *
  283. * @v: pointer to register contents to modify
  284. *
  285. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  286. * error or 0 upon success.
  287. */
  288. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  289. {
  290. u32 softrst_mask;
  291. if (!oh->class->sysc ||
  292. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  293. return -EINVAL;
  294. if (!oh->class->sysc->sysc_fields) {
  295. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  296. return -EINVAL;
  297. }
  298. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  299. *v |= softrst_mask;
  300. return 0;
  301. }
  302. /**
  303. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  304. * @oh: struct omap_hwmod *
  305. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  306. * @v: pointer to register contents to modify
  307. *
  308. * Update the module autoidle bit in @v to be @autoidle for the @oh
  309. * hwmod. The autoidle bit controls whether the module can gate
  310. * internal clocks automatically when it isn't doing anything; the
  311. * exact function of this bit varies on a per-module basis. This
  312. * function does not write to the hardware. Returns -EINVAL upon
  313. * error or 0 upon success.
  314. */
  315. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  316. u32 *v)
  317. {
  318. u32 autoidle_mask;
  319. u8 autoidle_shift;
  320. if (!oh->class->sysc ||
  321. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  322. return -EINVAL;
  323. if (!oh->class->sysc->sysc_fields) {
  324. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  325. return -EINVAL;
  326. }
  327. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  328. autoidle_mask = (0x1 << autoidle_shift);
  329. *v &= ~autoidle_mask;
  330. *v |= autoidle << autoidle_shift;
  331. return 0;
  332. }
  333. /**
  334. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  335. * @oh: struct omap_hwmod *
  336. *
  337. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  338. * upon error or 0 upon success.
  339. */
  340. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  341. {
  342. if (!oh->class->sysc ||
  343. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  344. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  345. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  346. return -EINVAL;
  347. if (!oh->class->sysc->sysc_fields) {
  348. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  349. return -EINVAL;
  350. }
  351. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  352. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  353. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  354. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  355. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  356. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  357. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  358. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  359. return 0;
  360. }
  361. /**
  362. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  363. * @oh: struct omap_hwmod *
  364. *
  365. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  366. * upon error or 0 upon success.
  367. */
  368. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  369. {
  370. if (!oh->class->sysc ||
  371. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  372. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  373. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  374. return -EINVAL;
  375. if (!oh->class->sysc->sysc_fields) {
  376. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  377. return -EINVAL;
  378. }
  379. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  380. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  381. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  382. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  383. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  384. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  385. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  386. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  387. return 0;
  388. }
  389. /**
  390. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  391. * @oh: struct omap_hwmod *
  392. *
  393. * Prevent the hardware module @oh from entering idle while the
  394. * hardare module initiator @init_oh is active. Useful when a module
  395. * will be accessed by a particular initiator (e.g., if a module will
  396. * be accessed by the IVA, there should be a sleepdep between the IVA
  397. * initiator and the module). Only applies to modules in smart-idle
  398. * mode. If the clockdomain is marked as not needing autodeps, return
  399. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  400. * passes along clkdm_add_sleepdep() value upon success.
  401. */
  402. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  403. {
  404. if (!oh->_clk)
  405. return -EINVAL;
  406. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  407. return 0;
  408. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  409. }
  410. /**
  411. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  412. * @oh: struct omap_hwmod *
  413. *
  414. * Allow the hardware module @oh to enter idle while the hardare
  415. * module initiator @init_oh is active. Useful when a module will not
  416. * be accessed by a particular initiator (e.g., if a module will not
  417. * be accessed by the IVA, there should be no sleepdep between the IVA
  418. * initiator and the module). Only applies to modules in smart-idle
  419. * mode. If the clockdomain is marked as not needing autodeps, return
  420. * 0 without doing anything. Returns -EINVAL upon error or passes
  421. * along clkdm_del_sleepdep() value upon success.
  422. */
  423. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  424. {
  425. if (!oh->_clk)
  426. return -EINVAL;
  427. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  428. return 0;
  429. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  430. }
  431. /**
  432. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  433. * @oh: struct omap_hwmod *
  434. *
  435. * Called from _init_clocks(). Populates the @oh _clk (main
  436. * functional clock pointer) if a main_clk is present. Returns 0 on
  437. * success or -EINVAL on error.
  438. */
  439. static int _init_main_clk(struct omap_hwmod *oh)
  440. {
  441. int ret = 0;
  442. if (!oh->main_clk)
  443. return 0;
  444. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  445. if (!oh->_clk) {
  446. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  447. oh->name, oh->main_clk);
  448. return -EINVAL;
  449. }
  450. if (!oh->_clk->clkdm)
  451. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  452. oh->main_clk, oh->_clk->name);
  453. return ret;
  454. }
  455. /**
  456. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  457. * @oh: struct omap_hwmod *
  458. *
  459. * Called from _init_clocks(). Populates the @oh OCP slave interface
  460. * clock pointers. Returns 0 on success or -EINVAL on error.
  461. */
  462. static int _init_interface_clks(struct omap_hwmod *oh)
  463. {
  464. struct clk *c;
  465. int i;
  466. int ret = 0;
  467. if (oh->slaves_cnt == 0)
  468. return 0;
  469. for (i = 0; i < oh->slaves_cnt; i++) {
  470. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  471. if (!os->clk)
  472. continue;
  473. c = omap_clk_get_by_name(os->clk);
  474. if (!c) {
  475. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  476. oh->name, os->clk);
  477. ret = -EINVAL;
  478. }
  479. os->_clk = c;
  480. }
  481. return ret;
  482. }
  483. /**
  484. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  485. * @oh: struct omap_hwmod *
  486. *
  487. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  488. * clock pointers. Returns 0 on success or -EINVAL on error.
  489. */
  490. static int _init_opt_clks(struct omap_hwmod *oh)
  491. {
  492. struct omap_hwmod_opt_clk *oc;
  493. struct clk *c;
  494. int i;
  495. int ret = 0;
  496. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  497. c = omap_clk_get_by_name(oc->clk);
  498. if (!c) {
  499. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  500. oh->name, oc->clk);
  501. ret = -EINVAL;
  502. }
  503. oc->_clk = c;
  504. }
  505. return ret;
  506. }
  507. /**
  508. * _enable_clocks - enable hwmod main clock and interface clocks
  509. * @oh: struct omap_hwmod *
  510. *
  511. * Enables all clocks necessary for register reads and writes to succeed
  512. * on the hwmod @oh. Returns 0.
  513. */
  514. static int _enable_clocks(struct omap_hwmod *oh)
  515. {
  516. int i;
  517. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  518. if (oh->_clk)
  519. clk_enable(oh->_clk);
  520. if (oh->slaves_cnt > 0) {
  521. for (i = 0; i < oh->slaves_cnt; i++) {
  522. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  523. struct clk *c = os->_clk;
  524. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  525. clk_enable(c);
  526. }
  527. }
  528. /* The opt clocks are controlled by the device driver. */
  529. return 0;
  530. }
  531. /**
  532. * _disable_clocks - disable hwmod main clock and interface clocks
  533. * @oh: struct omap_hwmod *
  534. *
  535. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  536. */
  537. static int _disable_clocks(struct omap_hwmod *oh)
  538. {
  539. int i;
  540. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  541. if (oh->_clk)
  542. clk_disable(oh->_clk);
  543. if (oh->slaves_cnt > 0) {
  544. for (i = 0; i < oh->slaves_cnt; i++) {
  545. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  546. struct clk *c = os->_clk;
  547. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  548. clk_disable(c);
  549. }
  550. }
  551. /* The opt clocks are controlled by the device driver. */
  552. return 0;
  553. }
  554. static void _enable_optional_clocks(struct omap_hwmod *oh)
  555. {
  556. struct omap_hwmod_opt_clk *oc;
  557. int i;
  558. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  559. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  560. if (oc->_clk) {
  561. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  562. oc->_clk->name);
  563. clk_enable(oc->_clk);
  564. }
  565. }
  566. static void _disable_optional_clocks(struct omap_hwmod *oh)
  567. {
  568. struct omap_hwmod_opt_clk *oc;
  569. int i;
  570. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  571. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  572. if (oc->_clk) {
  573. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  574. oc->_clk->name);
  575. clk_disable(oc->_clk);
  576. }
  577. }
  578. /**
  579. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  580. * @oh: struct omap_hwmod *
  581. *
  582. * Returns the array index of the OCP slave port that the MPU
  583. * addresses the device on, or -EINVAL upon error or not found.
  584. */
  585. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  586. {
  587. int i;
  588. int found = 0;
  589. if (!oh || oh->slaves_cnt == 0)
  590. return -EINVAL;
  591. for (i = 0; i < oh->slaves_cnt; i++) {
  592. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  593. if (os->user & OCP_USER_MPU) {
  594. found = 1;
  595. break;
  596. }
  597. }
  598. if (found)
  599. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  600. oh->name, i);
  601. else
  602. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  603. oh->name);
  604. return (found) ? i : -EINVAL;
  605. }
  606. /**
  607. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  608. * @oh: struct omap_hwmod *
  609. *
  610. * Return the virtual address of the base of the register target of
  611. * device @oh, or NULL on error.
  612. */
  613. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  614. {
  615. struct omap_hwmod_ocp_if *os;
  616. struct omap_hwmod_addr_space *mem;
  617. int i;
  618. int found = 0;
  619. void __iomem *va_start;
  620. if (!oh || oh->slaves_cnt == 0)
  621. return NULL;
  622. os = oh->slaves[index];
  623. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  624. if (mem->flags & ADDR_TYPE_RT) {
  625. found = 1;
  626. break;
  627. }
  628. }
  629. if (found) {
  630. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  631. if (!va_start) {
  632. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  633. return NULL;
  634. }
  635. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  636. oh->name, va_start);
  637. } else {
  638. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  639. oh->name);
  640. }
  641. return (found) ? va_start : NULL;
  642. }
  643. /**
  644. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  645. * @oh: struct omap_hwmod *
  646. *
  647. * If module is marked as SWSUP_SIDLE, force the module out of slave
  648. * idle; otherwise, configure it for smart-idle. If module is marked
  649. * as SWSUP_MSUSPEND, force the module out of master standby;
  650. * otherwise, configure it for smart-standby. No return value.
  651. */
  652. static void _enable_sysc(struct omap_hwmod *oh)
  653. {
  654. u8 idlemode, sf;
  655. u32 v;
  656. if (!oh->class->sysc)
  657. return;
  658. v = oh->_sysc_cache;
  659. sf = oh->class->sysc->sysc_flags;
  660. if (sf & SYSC_HAS_SIDLEMODE) {
  661. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  662. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  663. _set_slave_idlemode(oh, idlemode, &v);
  664. }
  665. if (sf & SYSC_HAS_MIDLEMODE) {
  666. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  667. idlemode = HWMOD_IDLEMODE_NO;
  668. } else {
  669. if (sf & SYSC_HAS_ENAWAKEUP)
  670. _enable_wakeup(oh, &v);
  671. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  672. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  673. else
  674. idlemode = HWMOD_IDLEMODE_SMART;
  675. }
  676. _set_master_standbymode(oh, idlemode, &v);
  677. }
  678. /*
  679. * XXX The clock framework should handle this, by
  680. * calling into this code. But this must wait until the
  681. * clock structures are tagged with omap_hwmod entries
  682. */
  683. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  684. (sf & SYSC_HAS_CLOCKACTIVITY))
  685. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  686. /* If slave is in SMARTIDLE, also enable wakeup */
  687. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  688. _enable_wakeup(oh, &v);
  689. _write_sysconfig(v, oh);
  690. /*
  691. * Set the autoidle bit only after setting the smartidle bit
  692. * Setting this will not have any impact on the other modules.
  693. */
  694. if (sf & SYSC_HAS_AUTOIDLE) {
  695. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  696. 0 : 1;
  697. _set_module_autoidle(oh, idlemode, &v);
  698. _write_sysconfig(v, oh);
  699. }
  700. }
  701. /**
  702. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  703. * @oh: struct omap_hwmod *
  704. *
  705. * If module is marked as SWSUP_SIDLE, force the module into slave
  706. * idle; otherwise, configure it for smart-idle. If module is marked
  707. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  708. * configure it for smart-standby. No return value.
  709. */
  710. static void _idle_sysc(struct omap_hwmod *oh)
  711. {
  712. u8 idlemode, sf;
  713. u32 v;
  714. if (!oh->class->sysc)
  715. return;
  716. v = oh->_sysc_cache;
  717. sf = oh->class->sysc->sysc_flags;
  718. if (sf & SYSC_HAS_SIDLEMODE) {
  719. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  720. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  721. _set_slave_idlemode(oh, idlemode, &v);
  722. }
  723. if (sf & SYSC_HAS_MIDLEMODE) {
  724. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  725. idlemode = HWMOD_IDLEMODE_FORCE;
  726. } else {
  727. if (sf & SYSC_HAS_ENAWAKEUP)
  728. _enable_wakeup(oh, &v);
  729. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  730. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  731. else
  732. idlemode = HWMOD_IDLEMODE_SMART;
  733. }
  734. _set_master_standbymode(oh, idlemode, &v);
  735. }
  736. /* If slave is in SMARTIDLE, also enable wakeup */
  737. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  738. _enable_wakeup(oh, &v);
  739. _write_sysconfig(v, oh);
  740. }
  741. /**
  742. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  743. * @oh: struct omap_hwmod *
  744. *
  745. * Force the module into slave idle and master suspend. No return
  746. * value.
  747. */
  748. static void _shutdown_sysc(struct omap_hwmod *oh)
  749. {
  750. u32 v;
  751. u8 sf;
  752. if (!oh->class->sysc)
  753. return;
  754. v = oh->_sysc_cache;
  755. sf = oh->class->sysc->sysc_flags;
  756. if (sf & SYSC_HAS_SIDLEMODE)
  757. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  758. if (sf & SYSC_HAS_MIDLEMODE)
  759. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  760. if (sf & SYSC_HAS_AUTOIDLE)
  761. _set_module_autoidle(oh, 1, &v);
  762. _write_sysconfig(v, oh);
  763. }
  764. /**
  765. * _lookup - find an omap_hwmod by name
  766. * @name: find an omap_hwmod by name
  767. *
  768. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  769. */
  770. static struct omap_hwmod *_lookup(const char *name)
  771. {
  772. struct omap_hwmod *oh, *temp_oh;
  773. oh = NULL;
  774. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  775. if (!strcmp(name, temp_oh->name)) {
  776. oh = temp_oh;
  777. break;
  778. }
  779. }
  780. return oh;
  781. }
  782. /**
  783. * _init_clocks - clk_get() all clocks associated with this hwmod
  784. * @oh: struct omap_hwmod *
  785. * @data: not used; pass NULL
  786. *
  787. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  788. * Resolves all clock names embedded in the hwmod. Returns 0 on
  789. * success, or a negative error code on failure.
  790. */
  791. static int _init_clocks(struct omap_hwmod *oh, void *data)
  792. {
  793. int ret = 0;
  794. if (oh->_state != _HWMOD_STATE_REGISTERED)
  795. return 0;
  796. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  797. ret |= _init_main_clk(oh);
  798. ret |= _init_interface_clks(oh);
  799. ret |= _init_opt_clks(oh);
  800. if (!ret)
  801. oh->_state = _HWMOD_STATE_CLKS_INITED;
  802. else
  803. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  804. return ret;
  805. }
  806. /**
  807. * _wait_target_ready - wait for a module to leave slave idle
  808. * @oh: struct omap_hwmod *
  809. *
  810. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  811. * does not have an IDLEST bit or if the module successfully leaves
  812. * slave idle; otherwise, pass along the return value of the
  813. * appropriate *_cm_wait_module_ready() function.
  814. */
  815. static int _wait_target_ready(struct omap_hwmod *oh)
  816. {
  817. struct omap_hwmod_ocp_if *os;
  818. int ret;
  819. if (!oh)
  820. return -EINVAL;
  821. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  822. return 0;
  823. os = oh->slaves[oh->_mpu_port_index];
  824. if (oh->flags & HWMOD_NO_IDLEST)
  825. return 0;
  826. /* XXX check module SIDLEMODE */
  827. /* XXX check clock enable states */
  828. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  829. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  830. oh->prcm.omap2.idlest_reg_id,
  831. oh->prcm.omap2.idlest_idle_bit);
  832. } else if (cpu_is_omap44xx()) {
  833. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  834. } else {
  835. BUG();
  836. };
  837. return ret;
  838. }
  839. /**
  840. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  841. * @oh: struct omap_hwmod *
  842. * @name: name of the reset line in the context of this hwmod
  843. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  844. *
  845. * Return the bit position of the reset line that match the
  846. * input name. Return -ENOENT if not found.
  847. */
  848. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  849. struct omap_hwmod_rst_info *ohri)
  850. {
  851. int i;
  852. for (i = 0; i < oh->rst_lines_cnt; i++) {
  853. const char *rst_line = oh->rst_lines[i].name;
  854. if (!strcmp(rst_line, name)) {
  855. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  856. ohri->st_shift = oh->rst_lines[i].st_shift;
  857. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  858. oh->name, __func__, rst_line, ohri->rst_shift,
  859. ohri->st_shift);
  860. return 0;
  861. }
  862. }
  863. return -ENOENT;
  864. }
  865. /**
  866. * _assert_hardreset - assert the HW reset line of submodules
  867. * contained in the hwmod module.
  868. * @oh: struct omap_hwmod *
  869. * @name: name of the reset line to lookup and assert
  870. *
  871. * Some IP like dsp, ipu or iva contain processor that require
  872. * an HW reset line to be assert / deassert in order to enable fully
  873. * the IP.
  874. */
  875. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  876. {
  877. struct omap_hwmod_rst_info ohri;
  878. u8 ret;
  879. if (!oh)
  880. return -EINVAL;
  881. ret = _lookup_hardreset(oh, name, &ohri);
  882. if (IS_ERR_VALUE(ret))
  883. return ret;
  884. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  885. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  886. ohri.rst_shift);
  887. else if (cpu_is_omap44xx())
  888. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  889. ohri.rst_shift);
  890. else
  891. return -EINVAL;
  892. }
  893. /**
  894. * _deassert_hardreset - deassert the HW reset line of submodules contained
  895. * in the hwmod module.
  896. * @oh: struct omap_hwmod *
  897. * @name: name of the reset line to look up and deassert
  898. *
  899. * Some IP like dsp, ipu or iva contain processor that require
  900. * an HW reset line to be assert / deassert in order to enable fully
  901. * the IP.
  902. */
  903. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  904. {
  905. struct omap_hwmod_rst_info ohri;
  906. int ret;
  907. if (!oh)
  908. return -EINVAL;
  909. ret = _lookup_hardreset(oh, name, &ohri);
  910. if (IS_ERR_VALUE(ret))
  911. return ret;
  912. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  913. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  914. ohri.rst_shift,
  915. ohri.st_shift);
  916. } else if (cpu_is_omap44xx()) {
  917. if (ohri.st_shift)
  918. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  919. oh->name, name);
  920. ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  921. ohri.rst_shift);
  922. } else {
  923. return -EINVAL;
  924. }
  925. if (ret == -EBUSY)
  926. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  927. return ret;
  928. }
  929. /**
  930. * _read_hardreset - read the HW reset line state of submodules
  931. * contained in the hwmod module
  932. * @oh: struct omap_hwmod *
  933. * @name: name of the reset line to look up and read
  934. *
  935. * Return the state of the reset line.
  936. */
  937. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  938. {
  939. struct omap_hwmod_rst_info ohri;
  940. u8 ret;
  941. if (!oh)
  942. return -EINVAL;
  943. ret = _lookup_hardreset(oh, name, &ohri);
  944. if (IS_ERR_VALUE(ret))
  945. return ret;
  946. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  947. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  948. ohri.st_shift);
  949. } else if (cpu_is_omap44xx()) {
  950. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  951. ohri.rst_shift);
  952. } else {
  953. return -EINVAL;
  954. }
  955. }
  956. /**
  957. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  958. * @oh: struct omap_hwmod *
  959. *
  960. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  961. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  962. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  963. * the module did not reset in time, or 0 upon success.
  964. *
  965. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  966. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  967. * use the SYSCONFIG softreset bit to provide the status.
  968. *
  969. * Note that some IP like McBSP do have reset control but don't have
  970. * reset status.
  971. */
  972. static int _ocp_softreset(struct omap_hwmod *oh)
  973. {
  974. u32 v;
  975. int c = 0;
  976. int ret = 0;
  977. if (!oh->class->sysc ||
  978. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  979. return -EINVAL;
  980. /* clocks must be on for this operation */
  981. if (oh->_state != _HWMOD_STATE_ENABLED) {
  982. pr_warning("omap_hwmod: %s: reset can only be entered from "
  983. "enabled state\n", oh->name);
  984. return -EINVAL;
  985. }
  986. /* For some modules, all optionnal clocks need to be enabled as well */
  987. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  988. _enable_optional_clocks(oh);
  989. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  990. v = oh->_sysc_cache;
  991. ret = _set_softreset(oh, &v);
  992. if (ret)
  993. goto dis_opt_clks;
  994. _write_sysconfig(v, oh);
  995. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  996. omap_test_timeout((omap_hwmod_read(oh,
  997. oh->class->sysc->syss_offs)
  998. & SYSS_RESETDONE_MASK),
  999. MAX_MODULE_SOFTRESET_WAIT, c);
  1000. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1001. omap_test_timeout(!(omap_hwmod_read(oh,
  1002. oh->class->sysc->sysc_offs)
  1003. & SYSC_TYPE2_SOFTRESET_MASK),
  1004. MAX_MODULE_SOFTRESET_WAIT, c);
  1005. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1006. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1007. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1008. else
  1009. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1010. /*
  1011. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1012. * _wait_target_ready() or _reset()
  1013. */
  1014. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1015. dis_opt_clks:
  1016. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1017. _disable_optional_clocks(oh);
  1018. return ret;
  1019. }
  1020. /**
  1021. * _reset - reset an omap_hwmod
  1022. * @oh: struct omap_hwmod *
  1023. *
  1024. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1025. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1026. * bit. However, some hwmods cannot be reset via this method: some
  1027. * are not targets and therefore have no OCP header registers to
  1028. * access; others (like the IVA) have idiosyncratic reset sequences.
  1029. * So for these relatively rare cases, custom reset code can be
  1030. * supplied in the struct omap_hwmod_class .reset function pointer.
  1031. * Passes along the return value from either _reset() or the custom
  1032. * reset function - these must return -EINVAL if the hwmod cannot be
  1033. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1034. * the module did not reset in time, or 0 upon success.
  1035. */
  1036. static int _reset(struct omap_hwmod *oh)
  1037. {
  1038. int ret;
  1039. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1040. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1041. return ret;
  1042. }
  1043. /**
  1044. * _enable - enable an omap_hwmod
  1045. * @oh: struct omap_hwmod *
  1046. *
  1047. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1048. * register target. Returns -EINVAL if the hwmod is in the wrong
  1049. * state or passes along the return value of _wait_target_ready().
  1050. */
  1051. static int _enable(struct omap_hwmod *oh)
  1052. {
  1053. int r;
  1054. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1055. oh->_state != _HWMOD_STATE_IDLE &&
  1056. oh->_state != _HWMOD_STATE_DISABLED) {
  1057. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1058. "from initialized, idle, or disabled state\n", oh->name);
  1059. return -EINVAL;
  1060. }
  1061. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1062. /* Mux pins for device runtime if populated */
  1063. if (oh->mux && (!oh->mux->enabled ||
  1064. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1065. oh->mux->pads_dynamic)))
  1066. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1067. _add_initiator_dep(oh, mpu_oh);
  1068. _enable_clocks(oh);
  1069. /*
  1070. * If an IP contains only one HW reset line, then de-assert it in order
  1071. * to allow the module state transition. Otherwise the PRCM will return
  1072. * Intransition status, and the init will failed.
  1073. */
  1074. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1075. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1076. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1077. r = _wait_target_ready(oh);
  1078. if (!r) {
  1079. oh->_state = _HWMOD_STATE_ENABLED;
  1080. /* Access the sysconfig only if the target is ready */
  1081. if (oh->class->sysc) {
  1082. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1083. _update_sysc_cache(oh);
  1084. _enable_sysc(oh);
  1085. }
  1086. } else {
  1087. _disable_clocks(oh);
  1088. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1089. oh->name, r);
  1090. }
  1091. return r;
  1092. }
  1093. /**
  1094. * _idle - idle an omap_hwmod
  1095. * @oh: struct omap_hwmod *
  1096. *
  1097. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1098. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1099. * state or returns 0.
  1100. */
  1101. static int _idle(struct omap_hwmod *oh)
  1102. {
  1103. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1104. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1105. "enabled state\n", oh->name);
  1106. return -EINVAL;
  1107. }
  1108. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1109. if (oh->class->sysc)
  1110. _idle_sysc(oh);
  1111. _del_initiator_dep(oh, mpu_oh);
  1112. _disable_clocks(oh);
  1113. /* Mux pins for device idle if populated */
  1114. if (oh->mux && oh->mux->pads_dynamic)
  1115. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1116. oh->_state = _HWMOD_STATE_IDLE;
  1117. return 0;
  1118. }
  1119. /**
  1120. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1121. * @oh: struct omap_hwmod *
  1122. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1123. *
  1124. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1125. * local copy. Intended to be used by drivers that require
  1126. * direct manipulation of the AUTOIDLE bits.
  1127. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1128. * along the return value from _set_module_autoidle().
  1129. *
  1130. * Any users of this function should be scrutinized carefully.
  1131. */
  1132. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1133. {
  1134. u32 v;
  1135. int retval = 0;
  1136. unsigned long flags;
  1137. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1138. return -EINVAL;
  1139. spin_lock_irqsave(&oh->_lock, flags);
  1140. v = oh->_sysc_cache;
  1141. retval = _set_module_autoidle(oh, autoidle, &v);
  1142. if (!retval)
  1143. _write_sysconfig(v, oh);
  1144. spin_unlock_irqrestore(&oh->_lock, flags);
  1145. return retval;
  1146. }
  1147. /**
  1148. * _shutdown - shutdown an omap_hwmod
  1149. * @oh: struct omap_hwmod *
  1150. *
  1151. * Shut down an omap_hwmod @oh. This should be called when the driver
  1152. * used for the hwmod is removed or unloaded or if the driver is not
  1153. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1154. * state or returns 0.
  1155. */
  1156. static int _shutdown(struct omap_hwmod *oh)
  1157. {
  1158. int ret;
  1159. u8 prev_state;
  1160. if (oh->_state != _HWMOD_STATE_IDLE &&
  1161. oh->_state != _HWMOD_STATE_ENABLED) {
  1162. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1163. "from idle, or enabled state\n", oh->name);
  1164. return -EINVAL;
  1165. }
  1166. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1167. if (oh->class->pre_shutdown) {
  1168. prev_state = oh->_state;
  1169. if (oh->_state == _HWMOD_STATE_IDLE)
  1170. _enable(oh);
  1171. ret = oh->class->pre_shutdown(oh);
  1172. if (ret) {
  1173. if (prev_state == _HWMOD_STATE_IDLE)
  1174. _idle(oh);
  1175. return ret;
  1176. }
  1177. }
  1178. if (oh->class->sysc) {
  1179. if (oh->_state == _HWMOD_STATE_IDLE)
  1180. _enable(oh);
  1181. _shutdown_sysc(oh);
  1182. }
  1183. /* clocks and deps are already disabled in idle */
  1184. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1185. _del_initiator_dep(oh, mpu_oh);
  1186. /* XXX what about the other system initiators here? dma, dsp */
  1187. _disable_clocks(oh);
  1188. }
  1189. /* XXX Should this code also force-disable the optional clocks? */
  1190. /*
  1191. * If an IP contains only one HW reset line, then assert it
  1192. * after disabling the clocks and before shutting down the IP.
  1193. */
  1194. if (oh->rst_lines_cnt == 1)
  1195. _assert_hardreset(oh, oh->rst_lines[0].name);
  1196. /* Mux pins to safe mode or use populated off mode values */
  1197. if (oh->mux)
  1198. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1199. oh->_state = _HWMOD_STATE_DISABLED;
  1200. return 0;
  1201. }
  1202. /**
  1203. * _setup - do initial configuration of omap_hwmod
  1204. * @oh: struct omap_hwmod *
  1205. *
  1206. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1207. * OCP_SYSCONFIG register. Returns 0.
  1208. */
  1209. static int _setup(struct omap_hwmod *oh, void *data)
  1210. {
  1211. int i, r;
  1212. u8 postsetup_state;
  1213. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1214. return 0;
  1215. /* Set iclk autoidle mode */
  1216. if (oh->slaves_cnt > 0) {
  1217. for (i = 0; i < oh->slaves_cnt; i++) {
  1218. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1219. struct clk *c = os->_clk;
  1220. if (!c)
  1221. continue;
  1222. if (os->flags & OCPIF_SWSUP_IDLE) {
  1223. /* XXX omap_iclk_deny_idle(c); */
  1224. } else {
  1225. /* XXX omap_iclk_allow_idle(c); */
  1226. clk_enable(c);
  1227. }
  1228. }
  1229. }
  1230. oh->_state = _HWMOD_STATE_INITIALIZED;
  1231. /*
  1232. * In the case of hwmod with hardreset that should not be
  1233. * de-assert at boot time, we have to keep the module
  1234. * initialized, because we cannot enable it properly with the
  1235. * reset asserted. Exit without warning because that behavior is
  1236. * expected.
  1237. */
  1238. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1239. return 0;
  1240. r = _enable(oh);
  1241. if (r) {
  1242. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1243. oh->name, oh->_state);
  1244. return 0;
  1245. }
  1246. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1247. _reset(oh);
  1248. /*
  1249. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1250. * The _enable() function should be split to
  1251. * avoid the rewrite of the OCP_SYSCONFIG register.
  1252. */
  1253. if (oh->class->sysc) {
  1254. _update_sysc_cache(oh);
  1255. _enable_sysc(oh);
  1256. }
  1257. }
  1258. postsetup_state = oh->_postsetup_state;
  1259. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1260. postsetup_state = _HWMOD_STATE_ENABLED;
  1261. /*
  1262. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1263. * it should be set by the core code as a runtime flag during startup
  1264. */
  1265. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1266. (postsetup_state == _HWMOD_STATE_IDLE))
  1267. postsetup_state = _HWMOD_STATE_ENABLED;
  1268. if (postsetup_state == _HWMOD_STATE_IDLE)
  1269. _idle(oh);
  1270. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1271. _shutdown(oh);
  1272. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1273. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1274. oh->name, postsetup_state);
  1275. return 0;
  1276. }
  1277. /**
  1278. * _register - register a struct omap_hwmod
  1279. * @oh: struct omap_hwmod *
  1280. *
  1281. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1282. * already has been registered by the same name; -EINVAL if the
  1283. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1284. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1285. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1286. * success.
  1287. *
  1288. * XXX The data should be copied into bootmem, so the original data
  1289. * should be marked __initdata and freed after init. This would allow
  1290. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1291. * that the copy process would be relatively complex due to the large number
  1292. * of substructures.
  1293. */
  1294. static int __init _register(struct omap_hwmod *oh)
  1295. {
  1296. int ms_id;
  1297. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1298. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1299. return -EINVAL;
  1300. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1301. if (_lookup(oh->name))
  1302. return -EEXIST;
  1303. ms_id = _find_mpu_port_index(oh);
  1304. if (!IS_ERR_VALUE(ms_id))
  1305. oh->_mpu_port_index = ms_id;
  1306. else
  1307. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1308. list_add_tail(&oh->node, &omap_hwmod_list);
  1309. spin_lock_init(&oh->_lock);
  1310. oh->_state = _HWMOD_STATE_REGISTERED;
  1311. /*
  1312. * XXX Rather than doing a strcmp(), this should test a flag
  1313. * set in the hwmod data, inserted by the autogenerator code.
  1314. */
  1315. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1316. mpu_oh = oh;
  1317. return 0;
  1318. }
  1319. /* Public functions */
  1320. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1321. {
  1322. if (oh->flags & HWMOD_16BIT_REG)
  1323. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1324. else
  1325. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1326. }
  1327. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1328. {
  1329. if (oh->flags & HWMOD_16BIT_REG)
  1330. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1331. else
  1332. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1333. }
  1334. /**
  1335. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1336. * @oh: struct omap_hwmod *
  1337. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1338. *
  1339. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1340. * local copy. Intended to be used by drivers that have some erratum
  1341. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1342. * -EINVAL if @oh is null, or passes along the return value from
  1343. * _set_slave_idlemode().
  1344. *
  1345. * XXX Does this function have any current users? If not, we should
  1346. * remove it; it is better to let the rest of the hwmod code handle this.
  1347. * Any users of this function should be scrutinized carefully.
  1348. */
  1349. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1350. {
  1351. u32 v;
  1352. int retval = 0;
  1353. if (!oh)
  1354. return -EINVAL;
  1355. v = oh->_sysc_cache;
  1356. retval = _set_slave_idlemode(oh, idlemode, &v);
  1357. if (!retval)
  1358. _write_sysconfig(v, oh);
  1359. return retval;
  1360. }
  1361. /**
  1362. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1363. * @name: name of the omap_hwmod to look up
  1364. *
  1365. * Given a @name of an omap_hwmod, return a pointer to the registered
  1366. * struct omap_hwmod *, or NULL upon error.
  1367. */
  1368. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1369. {
  1370. struct omap_hwmod *oh;
  1371. if (!name)
  1372. return NULL;
  1373. oh = _lookup(name);
  1374. return oh;
  1375. }
  1376. /**
  1377. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1378. * @fn: pointer to a callback function
  1379. * @data: void * data to pass to callback function
  1380. *
  1381. * Call @fn for each registered omap_hwmod, passing @data to each
  1382. * function. @fn must return 0 for success or any other value for
  1383. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1384. * will stop and the non-zero return value will be passed to the
  1385. * caller of omap_hwmod_for_each(). @fn is called with
  1386. * omap_hwmod_for_each() held.
  1387. */
  1388. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1389. void *data)
  1390. {
  1391. struct omap_hwmod *temp_oh;
  1392. int ret = 0;
  1393. if (!fn)
  1394. return -EINVAL;
  1395. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1396. ret = (*fn)(temp_oh, data);
  1397. if (ret)
  1398. break;
  1399. }
  1400. return ret;
  1401. }
  1402. /**
  1403. * omap_hwmod_register - register an array of hwmods
  1404. * @ohs: pointer to an array of omap_hwmods to register
  1405. *
  1406. * Intended to be called early in boot before the clock framework is
  1407. * initialized. If @ohs is not null, will register all omap_hwmods
  1408. * listed in @ohs that are valid for this chip. Returns 0.
  1409. */
  1410. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1411. {
  1412. int r, i;
  1413. if (!ohs)
  1414. return 0;
  1415. i = 0;
  1416. do {
  1417. if (!omap_chip_is(ohs[i]->omap_chip))
  1418. continue;
  1419. r = _register(ohs[i]);
  1420. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1421. r);
  1422. } while (ohs[++i]);
  1423. return 0;
  1424. }
  1425. /*
  1426. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1427. *
  1428. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1429. * Assumes the caller takes care of locking if needed.
  1430. */
  1431. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1432. {
  1433. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1434. return 0;
  1435. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1436. return 0;
  1437. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1438. return 0;
  1439. }
  1440. /**
  1441. * omap_hwmod_setup_one - set up a single hwmod
  1442. * @oh_name: const char * name of the already-registered hwmod to set up
  1443. *
  1444. * Must be called after omap2_clk_init(). Resolves the struct clk
  1445. * names to struct clk pointers for each registered omap_hwmod. Also
  1446. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1447. * success.
  1448. */
  1449. int __init omap_hwmod_setup_one(const char *oh_name)
  1450. {
  1451. struct omap_hwmod *oh;
  1452. int r;
  1453. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1454. if (!mpu_oh) {
  1455. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1456. oh_name, MPU_INITIATOR_NAME);
  1457. return -EINVAL;
  1458. }
  1459. oh = _lookup(oh_name);
  1460. if (!oh) {
  1461. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1462. return -EINVAL;
  1463. }
  1464. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1465. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1466. r = _populate_mpu_rt_base(oh, NULL);
  1467. if (IS_ERR_VALUE(r)) {
  1468. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1469. return -EINVAL;
  1470. }
  1471. r = _init_clocks(oh, NULL);
  1472. if (IS_ERR_VALUE(r)) {
  1473. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1474. return -EINVAL;
  1475. }
  1476. _setup(oh, NULL);
  1477. return 0;
  1478. }
  1479. /**
  1480. * omap_hwmod_setup - do some post-clock framework initialization
  1481. *
  1482. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1483. * to struct clk pointers for each registered omap_hwmod. Also calls
  1484. * _setup() on each hwmod. Returns 0 upon success.
  1485. */
  1486. static int __init omap_hwmod_setup_all(void)
  1487. {
  1488. int r;
  1489. if (!mpu_oh) {
  1490. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1491. __func__, MPU_INITIATOR_NAME);
  1492. return -EINVAL;
  1493. }
  1494. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1495. r = omap_hwmod_for_each(_init_clocks, NULL);
  1496. WARN(IS_ERR_VALUE(r),
  1497. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1498. omap_hwmod_for_each(_setup, NULL);
  1499. return 0;
  1500. }
  1501. core_initcall(omap_hwmod_setup_all);
  1502. /**
  1503. * omap_hwmod_enable - enable an omap_hwmod
  1504. * @oh: struct omap_hwmod *
  1505. *
  1506. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1507. * Returns -EINVAL on error or passes along the return value from _enable().
  1508. */
  1509. int omap_hwmod_enable(struct omap_hwmod *oh)
  1510. {
  1511. int r;
  1512. unsigned long flags;
  1513. if (!oh)
  1514. return -EINVAL;
  1515. spin_lock_irqsave(&oh->_lock, flags);
  1516. r = _enable(oh);
  1517. spin_unlock_irqrestore(&oh->_lock, flags);
  1518. return r;
  1519. }
  1520. /**
  1521. * omap_hwmod_idle - idle an omap_hwmod
  1522. * @oh: struct omap_hwmod *
  1523. *
  1524. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1525. * Returns -EINVAL on error or passes along the return value from _idle().
  1526. */
  1527. int omap_hwmod_idle(struct omap_hwmod *oh)
  1528. {
  1529. unsigned long flags;
  1530. if (!oh)
  1531. return -EINVAL;
  1532. spin_lock_irqsave(&oh->_lock, flags);
  1533. _idle(oh);
  1534. spin_unlock_irqrestore(&oh->_lock, flags);
  1535. return 0;
  1536. }
  1537. /**
  1538. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1539. * @oh: struct omap_hwmod *
  1540. *
  1541. * Shutdown an omap_hwmod @oh. Intended to be called by
  1542. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1543. * the return value from _shutdown().
  1544. */
  1545. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1546. {
  1547. unsigned long flags;
  1548. if (!oh)
  1549. return -EINVAL;
  1550. spin_lock_irqsave(&oh->_lock, flags);
  1551. _shutdown(oh);
  1552. spin_unlock_irqrestore(&oh->_lock, flags);
  1553. return 0;
  1554. }
  1555. /**
  1556. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1557. * @oh: struct omap_hwmod *oh
  1558. *
  1559. * Intended to be called by the omap_device code.
  1560. */
  1561. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1562. {
  1563. unsigned long flags;
  1564. spin_lock_irqsave(&oh->_lock, flags);
  1565. _enable_clocks(oh);
  1566. spin_unlock_irqrestore(&oh->_lock, flags);
  1567. return 0;
  1568. }
  1569. /**
  1570. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1571. * @oh: struct omap_hwmod *oh
  1572. *
  1573. * Intended to be called by the omap_device code.
  1574. */
  1575. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1576. {
  1577. unsigned long flags;
  1578. spin_lock_irqsave(&oh->_lock, flags);
  1579. _disable_clocks(oh);
  1580. spin_unlock_irqrestore(&oh->_lock, flags);
  1581. return 0;
  1582. }
  1583. /**
  1584. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1585. * @oh: struct omap_hwmod *oh
  1586. *
  1587. * Intended to be called by drivers and core code when all posted
  1588. * writes to a device must complete before continuing further
  1589. * execution (for example, after clearing some device IRQSTATUS
  1590. * register bits)
  1591. *
  1592. * XXX what about targets with multiple OCP threads?
  1593. */
  1594. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1595. {
  1596. BUG_ON(!oh);
  1597. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1598. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1599. "device configuration\n", oh->name);
  1600. return;
  1601. }
  1602. /*
  1603. * Forces posted writes to complete on the OCP thread handling
  1604. * register writes
  1605. */
  1606. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1607. }
  1608. /**
  1609. * omap_hwmod_reset - reset the hwmod
  1610. * @oh: struct omap_hwmod *
  1611. *
  1612. * Under some conditions, a driver may wish to reset the entire device.
  1613. * Called from omap_device code. Returns -EINVAL on error or passes along
  1614. * the return value from _reset().
  1615. */
  1616. int omap_hwmod_reset(struct omap_hwmod *oh)
  1617. {
  1618. int r;
  1619. unsigned long flags;
  1620. if (!oh)
  1621. return -EINVAL;
  1622. spin_lock_irqsave(&oh->_lock, flags);
  1623. r = _reset(oh);
  1624. spin_unlock_irqrestore(&oh->_lock, flags);
  1625. return r;
  1626. }
  1627. /**
  1628. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1629. * @oh: struct omap_hwmod *
  1630. * @res: pointer to the first element of an array of struct resource to fill
  1631. *
  1632. * Count the number of struct resource array elements necessary to
  1633. * contain omap_hwmod @oh resources. Intended to be called by code
  1634. * that registers omap_devices. Intended to be used to determine the
  1635. * size of a dynamically-allocated struct resource array, before
  1636. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1637. * resource array elements needed.
  1638. *
  1639. * XXX This code is not optimized. It could attempt to merge adjacent
  1640. * resource IDs.
  1641. *
  1642. */
  1643. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1644. {
  1645. int ret, i;
  1646. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1647. for (i = 0; i < oh->slaves_cnt; i++)
  1648. ret += oh->slaves[i]->addr_cnt;
  1649. return ret;
  1650. }
  1651. /**
  1652. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1653. * @oh: struct omap_hwmod *
  1654. * @res: pointer to the first element of an array of struct resource to fill
  1655. *
  1656. * Fill the struct resource array @res with resource data from the
  1657. * omap_hwmod @oh. Intended to be called by code that registers
  1658. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1659. * number of array elements filled.
  1660. */
  1661. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1662. {
  1663. int i, j;
  1664. int r = 0;
  1665. /* For each IRQ, DMA, memory area, fill in array.*/
  1666. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1667. (res + r)->name = (oh->mpu_irqs + i)->name;
  1668. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1669. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1670. (res + r)->flags = IORESOURCE_IRQ;
  1671. r++;
  1672. }
  1673. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1674. (res + r)->name = (oh->sdma_reqs + i)->name;
  1675. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1676. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1677. (res + r)->flags = IORESOURCE_DMA;
  1678. r++;
  1679. }
  1680. for (i = 0; i < oh->slaves_cnt; i++) {
  1681. struct omap_hwmod_ocp_if *os;
  1682. os = oh->slaves[i];
  1683. for (j = 0; j < os->addr_cnt; j++) {
  1684. (res + r)->name = (os->addr + j)->name;
  1685. (res + r)->start = (os->addr + j)->pa_start;
  1686. (res + r)->end = (os->addr + j)->pa_end;
  1687. (res + r)->flags = IORESOURCE_MEM;
  1688. r++;
  1689. }
  1690. }
  1691. return r;
  1692. }
  1693. /**
  1694. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1695. * @oh: struct omap_hwmod *
  1696. *
  1697. * Return the powerdomain pointer associated with the OMAP module
  1698. * @oh's main clock. If @oh does not have a main clk, return the
  1699. * powerdomain associated with the interface clock associated with the
  1700. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1701. * instead?) Returns NULL on error, or a struct powerdomain * on
  1702. * success.
  1703. */
  1704. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1705. {
  1706. struct clk *c;
  1707. if (!oh)
  1708. return NULL;
  1709. if (oh->_clk) {
  1710. c = oh->_clk;
  1711. } else {
  1712. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1713. return NULL;
  1714. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1715. }
  1716. if (!c->clkdm)
  1717. return NULL;
  1718. return c->clkdm->pwrdm.ptr;
  1719. }
  1720. /**
  1721. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1722. * @oh: struct omap_hwmod *
  1723. *
  1724. * Returns the virtual address corresponding to the beginning of the
  1725. * module's register target, in the address range that is intended to
  1726. * be used by the MPU. Returns the virtual address upon success or NULL
  1727. * upon error.
  1728. */
  1729. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1730. {
  1731. if (!oh)
  1732. return NULL;
  1733. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1734. return NULL;
  1735. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1736. return NULL;
  1737. return oh->_mpu_rt_va;
  1738. }
  1739. /**
  1740. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1741. * @oh: struct omap_hwmod *
  1742. * @init_oh: struct omap_hwmod * (initiator)
  1743. *
  1744. * Add a sleep dependency between the initiator @init_oh and @oh.
  1745. * Intended to be called by DSP/Bridge code via platform_data for the
  1746. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1747. * code needs to add/del initiator dependencies dynamically
  1748. * before/after accessing a device. Returns the return value from
  1749. * _add_initiator_dep().
  1750. *
  1751. * XXX Keep a usecount in the clockdomain code
  1752. */
  1753. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1754. struct omap_hwmod *init_oh)
  1755. {
  1756. return _add_initiator_dep(oh, init_oh);
  1757. }
  1758. /*
  1759. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1760. * for context save/restore operations?
  1761. */
  1762. /**
  1763. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1764. * @oh: struct omap_hwmod *
  1765. * @init_oh: struct omap_hwmod * (initiator)
  1766. *
  1767. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1768. * Intended to be called by DSP/Bridge code via platform_data for the
  1769. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1770. * code needs to add/del initiator dependencies dynamically
  1771. * before/after accessing a device. Returns the return value from
  1772. * _del_initiator_dep().
  1773. *
  1774. * XXX Keep a usecount in the clockdomain code
  1775. */
  1776. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1777. struct omap_hwmod *init_oh)
  1778. {
  1779. return _del_initiator_dep(oh, init_oh);
  1780. }
  1781. /**
  1782. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1783. * @oh: struct omap_hwmod *
  1784. *
  1785. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1786. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1787. * registers to cause the PRCM to receive wakeup events from the
  1788. * module. Does not set any wakeup routing registers beyond this
  1789. * point - if the module is to wake up any other module or subsystem,
  1790. * that must be set separately. Called by omap_device code. Returns
  1791. * -EINVAL on error or 0 upon success.
  1792. */
  1793. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1794. {
  1795. unsigned long flags;
  1796. u32 v;
  1797. if (!oh->class->sysc ||
  1798. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1799. return -EINVAL;
  1800. spin_lock_irqsave(&oh->_lock, flags);
  1801. v = oh->_sysc_cache;
  1802. _enable_wakeup(oh, &v);
  1803. _write_sysconfig(v, oh);
  1804. spin_unlock_irqrestore(&oh->_lock, flags);
  1805. return 0;
  1806. }
  1807. /**
  1808. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1809. * @oh: struct omap_hwmod *
  1810. *
  1811. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1812. * from sending wakeups to the PRCM. Eventually this should clear
  1813. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1814. * from the module. Does not set any wakeup routing registers beyond
  1815. * this point - if the module is to wake up any other module or
  1816. * subsystem, that must be set separately. Called by omap_device
  1817. * code. Returns -EINVAL on error or 0 upon success.
  1818. */
  1819. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1820. {
  1821. unsigned long flags;
  1822. u32 v;
  1823. if (!oh->class->sysc ||
  1824. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1825. return -EINVAL;
  1826. spin_lock_irqsave(&oh->_lock, flags);
  1827. v = oh->_sysc_cache;
  1828. _disable_wakeup(oh, &v);
  1829. _write_sysconfig(v, oh);
  1830. spin_unlock_irqrestore(&oh->_lock, flags);
  1831. return 0;
  1832. }
  1833. /**
  1834. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1835. * contained in the hwmod module.
  1836. * @oh: struct omap_hwmod *
  1837. * @name: name of the reset line to lookup and assert
  1838. *
  1839. * Some IP like dsp, ipu or iva contain processor that require
  1840. * an HW reset line to be assert / deassert in order to enable fully
  1841. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1842. * yet supported on this OMAP; otherwise, passes along the return value
  1843. * from _assert_hardreset().
  1844. */
  1845. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1846. {
  1847. int ret;
  1848. unsigned long flags;
  1849. if (!oh)
  1850. return -EINVAL;
  1851. spin_lock_irqsave(&oh->_lock, flags);
  1852. ret = _assert_hardreset(oh, name);
  1853. spin_unlock_irqrestore(&oh->_lock, flags);
  1854. return ret;
  1855. }
  1856. /**
  1857. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1858. * contained in the hwmod module.
  1859. * @oh: struct omap_hwmod *
  1860. * @name: name of the reset line to look up and deassert
  1861. *
  1862. * Some IP like dsp, ipu or iva contain processor that require
  1863. * an HW reset line to be assert / deassert in order to enable fully
  1864. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1865. * yet supported on this OMAP; otherwise, passes along the return value
  1866. * from _deassert_hardreset().
  1867. */
  1868. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1869. {
  1870. int ret;
  1871. unsigned long flags;
  1872. if (!oh)
  1873. return -EINVAL;
  1874. spin_lock_irqsave(&oh->_lock, flags);
  1875. ret = _deassert_hardreset(oh, name);
  1876. spin_unlock_irqrestore(&oh->_lock, flags);
  1877. return ret;
  1878. }
  1879. /**
  1880. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1881. * contained in the hwmod module
  1882. * @oh: struct omap_hwmod *
  1883. * @name: name of the reset line to look up and read
  1884. *
  1885. * Return the current state of the hwmod @oh's reset line named @name:
  1886. * returns -EINVAL upon parameter error or if this operation
  1887. * is unsupported on the current OMAP; otherwise, passes along the return
  1888. * value from _read_hardreset().
  1889. */
  1890. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1891. {
  1892. int ret;
  1893. unsigned long flags;
  1894. if (!oh)
  1895. return -EINVAL;
  1896. spin_lock_irqsave(&oh->_lock, flags);
  1897. ret = _read_hardreset(oh, name);
  1898. spin_unlock_irqrestore(&oh->_lock, flags);
  1899. return ret;
  1900. }
  1901. /**
  1902. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1903. * @classname: struct omap_hwmod_class name to search for
  1904. * @fn: callback function pointer to call for each hwmod in class @classname
  1905. * @user: arbitrary context data to pass to the callback function
  1906. *
  1907. * For each omap_hwmod of class @classname, call @fn.
  1908. * If the callback function returns something other than
  1909. * zero, the iterator is terminated, and the callback function's return
  1910. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1911. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1912. */
  1913. int omap_hwmod_for_each_by_class(const char *classname,
  1914. int (*fn)(struct omap_hwmod *oh,
  1915. void *user),
  1916. void *user)
  1917. {
  1918. struct omap_hwmod *temp_oh;
  1919. int ret = 0;
  1920. if (!classname || !fn)
  1921. return -EINVAL;
  1922. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1923. __func__, classname);
  1924. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1925. if (!strcmp(temp_oh->class->name, classname)) {
  1926. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1927. __func__, temp_oh->name);
  1928. ret = (*fn)(temp_oh, user);
  1929. if (ret)
  1930. break;
  1931. }
  1932. }
  1933. if (ret)
  1934. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1935. __func__, ret);
  1936. return ret;
  1937. }
  1938. /**
  1939. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1940. * @oh: struct omap_hwmod *
  1941. * @state: state that _setup() should leave the hwmod in
  1942. *
  1943. * Sets the hwmod state that @oh will enter at the end of _setup()
  1944. * (called by omap_hwmod_setup_*()). Only valid to call between
  1945. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  1946. * 0 upon success or -EINVAL if there is a problem with the arguments
  1947. * or if the hwmod is in the wrong state.
  1948. */
  1949. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1950. {
  1951. int ret;
  1952. unsigned long flags;
  1953. if (!oh)
  1954. return -EINVAL;
  1955. if (state != _HWMOD_STATE_DISABLED &&
  1956. state != _HWMOD_STATE_ENABLED &&
  1957. state != _HWMOD_STATE_IDLE)
  1958. return -EINVAL;
  1959. spin_lock_irqsave(&oh->_lock, flags);
  1960. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1961. ret = -EINVAL;
  1962. goto ohsps_unlock;
  1963. }
  1964. oh->_postsetup_state = state;
  1965. ret = 0;
  1966. ohsps_unlock:
  1967. spin_unlock_irqrestore(&oh->_lock, flags);
  1968. return ret;
  1969. }
  1970. /**
  1971. * omap_hwmod_get_context_loss_count - get lost context count
  1972. * @oh: struct omap_hwmod *
  1973. *
  1974. * Query the powerdomain of of @oh to get the context loss
  1975. * count for this device.
  1976. *
  1977. * Returns the context loss count of the powerdomain assocated with @oh
  1978. * upon success, or zero if no powerdomain exists for @oh.
  1979. */
  1980. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1981. {
  1982. struct powerdomain *pwrdm;
  1983. int ret = 0;
  1984. pwrdm = omap_hwmod_get_pwrdm(oh);
  1985. if (pwrdm)
  1986. ret = pwrdm_get_context_loss_count(pwrdm);
  1987. return ret;
  1988. }
  1989. /**
  1990. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  1991. * @oh: struct omap_hwmod *
  1992. *
  1993. * Prevent the hwmod @oh from being reset during the setup process.
  1994. * Intended for use by board-*.c files on boards with devices that
  1995. * cannot tolerate being reset. Must be called before the hwmod has
  1996. * been set up. Returns 0 upon success or negative error code upon
  1997. * failure.
  1998. */
  1999. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2000. {
  2001. if (!oh)
  2002. return -EINVAL;
  2003. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2004. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2005. oh->name);
  2006. return -EINVAL;
  2007. }
  2008. oh->flags |= HWMOD_INIT_NO_RESET;
  2009. return 0;
  2010. }