fimc-capture.c 46 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "fimc-mdevice.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  33. struct fimc_pipeline *p = &fimc->pipeline;
  34. struct fimc_sensor_info *sensor;
  35. unsigned long flags;
  36. int ret = 0;
  37. if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL)
  38. return -ENXIO;
  39. if (ctx->s_frame.fmt == NULL)
  40. return -EINVAL;
  41. sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]);
  42. spin_lock_irqsave(&fimc->slock, flags);
  43. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  44. fimc_set_yuv_order(ctx);
  45. fimc_hw_set_camera_polarity(fimc, &sensor->pdata);
  46. fimc_hw_set_camera_type(fimc, &sensor->pdata);
  47. fimc_hw_set_camera_source(fimc, &sensor->pdata);
  48. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  49. ret = fimc_set_scaler_info(ctx);
  50. if (!ret) {
  51. fimc_hw_set_input_path(ctx);
  52. fimc_hw_set_prescaler(ctx);
  53. fimc_hw_set_mainscaler(ctx);
  54. fimc_hw_set_target_format(ctx);
  55. fimc_hw_set_rotation(ctx);
  56. fimc_hw_set_effect(ctx);
  57. fimc_hw_set_output_path(ctx);
  58. fimc_hw_set_out_dma(ctx);
  59. if (fimc->variant->has_alpha)
  60. fimc_hw_set_rgb_alpha(ctx);
  61. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  62. }
  63. spin_unlock_irqrestore(&fimc->slock, flags);
  64. return ret;
  65. }
  66. /*
  67. * Reinitialize the driver so it is ready to start the streaming again.
  68. * Set fimc->state to indicate stream off and the hardware shut down state.
  69. * If not suspending (@suspend is false), return any buffers to videobuf2.
  70. * Otherwise put any owned buffers onto the pending buffers queue, so they
  71. * can be re-spun when the device is being resumed. Also perform FIMC
  72. * software reset and disable streaming on the whole pipeline if required.
  73. */
  74. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  75. {
  76. struct fimc_vid_cap *cap = &fimc->vid_cap;
  77. struct fimc_vid_buffer *buf;
  78. unsigned long flags;
  79. bool streaming;
  80. spin_lock_irqsave(&fimc->slock, flags);
  81. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  82. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  83. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  84. if (suspend)
  85. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  86. else
  87. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  88. /* Release unused buffers */
  89. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  90. buf = fimc_pending_queue_pop(cap);
  91. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  92. }
  93. /* If suspending put unused buffers onto pending queue */
  94. while (!list_empty(&cap->active_buf_q)) {
  95. buf = fimc_active_queue_pop(cap);
  96. if (suspend)
  97. fimc_pending_queue_add(cap, buf);
  98. else
  99. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  100. }
  101. fimc_hw_reset(fimc);
  102. cap->buf_index = 0;
  103. spin_unlock_irqrestore(&fimc->slock, flags);
  104. if (streaming)
  105. return fimc_pipeline_call(fimc, set_stream,
  106. &fimc->pipeline, 0);
  107. else
  108. return 0;
  109. }
  110. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  111. {
  112. unsigned long flags;
  113. if (!fimc_capture_active(fimc))
  114. return 0;
  115. spin_lock_irqsave(&fimc->slock, flags);
  116. set_bit(ST_CAPT_SHUT, &fimc->state);
  117. fimc_deactivate_capture(fimc);
  118. spin_unlock_irqrestore(&fimc->slock, flags);
  119. wait_event_timeout(fimc->irq_queue,
  120. !test_bit(ST_CAPT_SHUT, &fimc->state),
  121. (2*HZ/10)); /* 200 ms */
  122. return fimc_capture_state_cleanup(fimc, suspend);
  123. }
  124. /**
  125. * fimc_capture_config_update - apply the camera interface configuration
  126. *
  127. * To be called from within the interrupt handler with fimc.slock
  128. * spinlock held. It updates the camera pixel crop, rotation and
  129. * image flip in H/W.
  130. */
  131. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  132. {
  133. struct fimc_dev *fimc = ctx->fimc_dev;
  134. int ret;
  135. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  136. ret = fimc_set_scaler_info(ctx);
  137. if (ret)
  138. return ret;
  139. fimc_hw_set_prescaler(ctx);
  140. fimc_hw_set_mainscaler(ctx);
  141. fimc_hw_set_target_format(ctx);
  142. fimc_hw_set_rotation(ctx);
  143. fimc_hw_set_effect(ctx);
  144. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  145. fimc_hw_set_out_dma(ctx);
  146. if (fimc->variant->has_alpha)
  147. fimc_hw_set_rgb_alpha(ctx);
  148. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  149. return ret;
  150. }
  151. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  152. {
  153. struct fimc_vid_cap *cap = &fimc->vid_cap;
  154. struct fimc_vid_buffer *v_buf;
  155. struct timeval *tv;
  156. struct timespec ts;
  157. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  158. wake_up(&fimc->irq_queue);
  159. goto done;
  160. }
  161. if (!list_empty(&cap->active_buf_q) &&
  162. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  163. ktime_get_real_ts(&ts);
  164. v_buf = fimc_active_queue_pop(cap);
  165. tv = &v_buf->vb.v4l2_buf.timestamp;
  166. tv->tv_sec = ts.tv_sec;
  167. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  168. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  169. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  170. }
  171. if (!list_empty(&cap->pending_buf_q)) {
  172. v_buf = fimc_pending_queue_pop(cap);
  173. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  174. v_buf->index = cap->buf_index;
  175. /* Move the buffer to the capture active queue */
  176. fimc_active_queue_add(cap, v_buf);
  177. dbg("next frame: %d, done frame: %d",
  178. fimc_hw_get_frame_index(fimc), v_buf->index);
  179. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  180. cap->buf_index = 0;
  181. }
  182. if (cap->active_buf_cnt == 0) {
  183. if (deq_buf)
  184. clear_bit(ST_CAPT_RUN, &fimc->state);
  185. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  186. cap->buf_index = 0;
  187. } else {
  188. set_bit(ST_CAPT_RUN, &fimc->state);
  189. }
  190. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  191. fimc_capture_config_update(cap->ctx);
  192. done:
  193. if (cap->active_buf_cnt == 1) {
  194. fimc_deactivate_capture(fimc);
  195. clear_bit(ST_CAPT_STREAM, &fimc->state);
  196. }
  197. dbg("frame: %d, active_buf_cnt: %d",
  198. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  199. }
  200. static int start_streaming(struct vb2_queue *q, unsigned int count)
  201. {
  202. struct fimc_ctx *ctx = q->drv_priv;
  203. struct fimc_dev *fimc = ctx->fimc_dev;
  204. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  205. int min_bufs;
  206. int ret;
  207. vid_cap->frame_count = 0;
  208. ret = fimc_capture_hw_init(fimc);
  209. if (ret) {
  210. fimc_capture_state_cleanup(fimc, false);
  211. return ret;
  212. }
  213. set_bit(ST_CAPT_PEND, &fimc->state);
  214. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  215. if (vid_cap->active_buf_cnt >= min_bufs &&
  216. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  217. fimc_activate_capture(ctx);
  218. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  219. fimc_pipeline_call(fimc, set_stream,
  220. &fimc->pipeline, 1);
  221. }
  222. return 0;
  223. }
  224. static int stop_streaming(struct vb2_queue *q)
  225. {
  226. struct fimc_ctx *ctx = q->drv_priv;
  227. struct fimc_dev *fimc = ctx->fimc_dev;
  228. if (!fimc_capture_active(fimc))
  229. return -EINVAL;
  230. return fimc_stop_capture(fimc, false);
  231. }
  232. int fimc_capture_suspend(struct fimc_dev *fimc)
  233. {
  234. bool suspend = fimc_capture_busy(fimc);
  235. int ret = fimc_stop_capture(fimc, suspend);
  236. if (ret)
  237. return ret;
  238. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  239. }
  240. static void buffer_queue(struct vb2_buffer *vb);
  241. int fimc_capture_resume(struct fimc_dev *fimc)
  242. {
  243. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  244. struct fimc_vid_buffer *buf;
  245. int i;
  246. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  247. return 0;
  248. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  249. vid_cap->buf_index = 0;
  250. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  251. &vid_cap->vfd.entity, false);
  252. fimc_capture_hw_init(fimc);
  253. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  254. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  255. if (list_empty(&vid_cap->pending_buf_q))
  256. break;
  257. buf = fimc_pending_queue_pop(vid_cap);
  258. buffer_queue(&buf->vb);
  259. }
  260. return 0;
  261. }
  262. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  263. unsigned int *num_buffers, unsigned int *num_planes,
  264. unsigned int sizes[], void *allocators[])
  265. {
  266. const struct v4l2_pix_format_mplane *pixm = NULL;
  267. struct fimc_ctx *ctx = vq->drv_priv;
  268. struct fimc_frame *frame = &ctx->d_frame;
  269. struct fimc_fmt *fmt = frame->fmt;
  270. unsigned long wh;
  271. int i;
  272. if (pfmt) {
  273. pixm = &pfmt->fmt.pix_mp;
  274. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  275. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  276. wh = pixm->width * pixm->height;
  277. } else {
  278. wh = frame->f_width * frame->f_height;
  279. }
  280. if (fmt == NULL)
  281. return -EINVAL;
  282. *num_planes = fmt->memplanes;
  283. for (i = 0; i < fmt->memplanes; i++) {
  284. unsigned int size = (wh * fmt->depth[i]) / 8;
  285. if (pixm)
  286. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  287. else
  288. sizes[i] = max_t(u32, size, frame->payload[i]);
  289. allocators[i] = ctx->fimc_dev->alloc_ctx;
  290. }
  291. return 0;
  292. }
  293. static int buffer_prepare(struct vb2_buffer *vb)
  294. {
  295. struct vb2_queue *vq = vb->vb2_queue;
  296. struct fimc_ctx *ctx = vq->drv_priv;
  297. int i;
  298. if (ctx->d_frame.fmt == NULL)
  299. return -EINVAL;
  300. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  301. unsigned long size = ctx->d_frame.payload[i];
  302. if (vb2_plane_size(vb, i) < size) {
  303. v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
  304. "User buffer too small (%ld < %ld)\n",
  305. vb2_plane_size(vb, i), size);
  306. return -EINVAL;
  307. }
  308. vb2_set_plane_payload(vb, i, size);
  309. }
  310. return 0;
  311. }
  312. static void buffer_queue(struct vb2_buffer *vb)
  313. {
  314. struct fimc_vid_buffer *buf
  315. = container_of(vb, struct fimc_vid_buffer, vb);
  316. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  317. struct fimc_dev *fimc = ctx->fimc_dev;
  318. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  319. unsigned long flags;
  320. int min_bufs;
  321. spin_lock_irqsave(&fimc->slock, flags);
  322. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  323. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  324. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  325. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  326. /* Setup the buffer directly for processing. */
  327. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  328. vid_cap->buf_index;
  329. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  330. buf->index = vid_cap->buf_index;
  331. fimc_active_queue_add(vid_cap, buf);
  332. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  333. vid_cap->buf_index = 0;
  334. } else {
  335. fimc_pending_queue_add(vid_cap, buf);
  336. }
  337. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  338. if (vb2_is_streaming(&vid_cap->vbq) &&
  339. vid_cap->active_buf_cnt >= min_bufs &&
  340. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  341. fimc_activate_capture(ctx);
  342. spin_unlock_irqrestore(&fimc->slock, flags);
  343. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  344. fimc_pipeline_call(fimc, set_stream,
  345. &fimc->pipeline, 1);
  346. return;
  347. }
  348. spin_unlock_irqrestore(&fimc->slock, flags);
  349. }
  350. static void fimc_lock(struct vb2_queue *vq)
  351. {
  352. struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
  353. mutex_lock(&ctx->fimc_dev->lock);
  354. }
  355. static void fimc_unlock(struct vb2_queue *vq)
  356. {
  357. struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
  358. mutex_unlock(&ctx->fimc_dev->lock);
  359. }
  360. static struct vb2_ops fimc_capture_qops = {
  361. .queue_setup = queue_setup,
  362. .buf_prepare = buffer_prepare,
  363. .buf_queue = buffer_queue,
  364. .wait_prepare = fimc_unlock,
  365. .wait_finish = fimc_lock,
  366. .start_streaming = start_streaming,
  367. .stop_streaming = stop_streaming,
  368. };
  369. /**
  370. * fimc_capture_ctrls_create - initialize the control handler
  371. * Initialize the capture video node control handler and fill it
  372. * with the FIMC controls. Inherit any sensor's controls if the
  373. * 'user_subdev_api' flag is false (default behaviour).
  374. * This function need to be called with the graph mutex held.
  375. */
  376. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  377. {
  378. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  379. int ret;
  380. if (WARN_ON(vid_cap->ctx == NULL))
  381. return -ENXIO;
  382. if (vid_cap->ctx->ctrls.ready)
  383. return 0;
  384. ret = fimc_ctrls_create(vid_cap->ctx);
  385. if (ret || vid_cap->user_subdev_api || !vid_cap->ctx->ctrls.ready)
  386. return ret;
  387. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  388. fimc->pipeline.subdevs[IDX_SENSOR]->ctrl_handler, NULL);
  389. }
  390. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  391. static int fimc_capture_open(struct file *file)
  392. {
  393. struct fimc_dev *fimc = video_drvdata(file);
  394. int ret = -EBUSY;
  395. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  396. if (mutex_lock_interruptible(&fimc->lock))
  397. return -ERESTARTSYS;
  398. if (fimc_m2m_active(fimc))
  399. goto unlock;
  400. set_bit(ST_CAPT_BUSY, &fimc->state);
  401. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  402. if (ret < 0)
  403. goto unlock;
  404. ret = v4l2_fh_open(file);
  405. if (ret) {
  406. pm_runtime_put(&fimc->pdev->dev);
  407. goto unlock;
  408. }
  409. if (++fimc->vid_cap.refcnt == 1) {
  410. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  411. &fimc->vid_cap.vfd.entity, true);
  412. if (!ret && !fimc->vid_cap.user_subdev_api)
  413. ret = fimc_capture_set_default_format(fimc);
  414. if (!ret)
  415. ret = fimc_capture_ctrls_create(fimc);
  416. if (ret < 0) {
  417. clear_bit(ST_CAPT_BUSY, &fimc->state);
  418. pm_runtime_put_sync(&fimc->pdev->dev);
  419. fimc->vid_cap.refcnt--;
  420. v4l2_fh_release(file);
  421. }
  422. }
  423. unlock:
  424. mutex_unlock(&fimc->lock);
  425. return ret;
  426. }
  427. static int fimc_capture_close(struct file *file)
  428. {
  429. struct fimc_dev *fimc = video_drvdata(file);
  430. int ret;
  431. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  432. if (mutex_lock_interruptible(&fimc->lock))
  433. return -ERESTARTSYS;
  434. if (--fimc->vid_cap.refcnt == 0) {
  435. clear_bit(ST_CAPT_BUSY, &fimc->state);
  436. fimc_stop_capture(fimc, false);
  437. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  438. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  439. }
  440. pm_runtime_put(&fimc->pdev->dev);
  441. if (fimc->vid_cap.refcnt == 0) {
  442. vb2_queue_release(&fimc->vid_cap.vbq);
  443. fimc_ctrls_delete(fimc->vid_cap.ctx);
  444. }
  445. ret = v4l2_fh_release(file);
  446. mutex_unlock(&fimc->lock);
  447. return ret;
  448. }
  449. static unsigned int fimc_capture_poll(struct file *file,
  450. struct poll_table_struct *wait)
  451. {
  452. struct fimc_dev *fimc = video_drvdata(file);
  453. int ret;
  454. if (mutex_lock_interruptible(&fimc->lock))
  455. return POLL_ERR;
  456. ret = vb2_poll(&fimc->vid_cap.vbq, file, wait);
  457. mutex_unlock(&fimc->lock);
  458. return ret;
  459. }
  460. static int fimc_capture_mmap(struct file *file, struct vm_area_struct *vma)
  461. {
  462. struct fimc_dev *fimc = video_drvdata(file);
  463. int ret;
  464. if (mutex_lock_interruptible(&fimc->lock))
  465. return -ERESTARTSYS;
  466. ret = vb2_mmap(&fimc->vid_cap.vbq, vma);
  467. mutex_unlock(&fimc->lock);
  468. return ret;
  469. }
  470. static const struct v4l2_file_operations fimc_capture_fops = {
  471. .owner = THIS_MODULE,
  472. .open = fimc_capture_open,
  473. .release = fimc_capture_close,
  474. .poll = fimc_capture_poll,
  475. .unlocked_ioctl = video_ioctl2,
  476. .mmap = fimc_capture_mmap,
  477. };
  478. /*
  479. * Format and crop negotiation helpers
  480. */
  481. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  482. u32 *width, u32 *height,
  483. u32 *code, u32 *fourcc, int pad)
  484. {
  485. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  486. struct fimc_dev *fimc = ctx->fimc_dev;
  487. struct fimc_variant *var = fimc->variant;
  488. struct fimc_pix_limit *pl = var->pix_limit;
  489. struct fimc_frame *dst = &ctx->d_frame;
  490. u32 depth, min_w, max_w, min_h, align_h = 3;
  491. u32 mask = FMT_FLAGS_CAM;
  492. struct fimc_fmt *ffmt;
  493. /* Color conversion from/to JPEG is not supported */
  494. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  495. fimc_fmt_is_jpeg(ctx->s_frame.fmt->color))
  496. *code = V4L2_MBUS_FMT_JPEG_1X8;
  497. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK)
  498. mask |= FMT_FLAGS_M2M;
  499. ffmt = fimc_find_format(fourcc, code, mask, 0);
  500. if (WARN_ON(!ffmt))
  501. return NULL;
  502. if (code)
  503. *code = ffmt->mbus_code;
  504. if (fourcc)
  505. *fourcc = ffmt->fourcc;
  506. if (pad == FIMC_SD_PAD_SINK) {
  507. max_w = fimc_fmt_is_jpeg(ffmt->color) ?
  508. pl->scaler_dis_w : pl->scaler_en_w;
  509. /* Apply the camera input interface pixel constraints */
  510. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  511. height, max_t(u32, *height, 32),
  512. FIMC_CAMIF_MAX_HEIGHT,
  513. fimc_fmt_is_jpeg(ffmt->color) ? 3 : 1,
  514. 0);
  515. return ffmt;
  516. }
  517. /* Can't scale or crop in transparent (JPEG) transfer mode */
  518. if (fimc_fmt_is_jpeg(ffmt->color)) {
  519. *width = ctx->s_frame.f_width;
  520. *height = ctx->s_frame.f_height;
  521. return ffmt;
  522. }
  523. /* Apply the scaler and the output DMA constraints */
  524. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  525. if (ctx->state & FIMC_COMPOSE) {
  526. min_w = dst->offs_h + dst->width;
  527. min_h = dst->offs_v + dst->height;
  528. } else {
  529. min_w = var->min_out_pixsize;
  530. min_h = var->min_out_pixsize;
  531. }
  532. if (var->min_vsize_align == 1 && !rotation)
  533. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  534. depth = fimc_get_format_depth(ffmt);
  535. v4l_bound_align_image(width, min_w, max_w,
  536. ffs(var->min_out_pixsize) - 1,
  537. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  538. align_h,
  539. 64/(ALIGN(depth, 8)));
  540. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  541. pad, code ? *code : 0, *width, *height,
  542. dst->f_width, dst->f_height);
  543. return ffmt;
  544. }
  545. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  546. struct v4l2_rect *r,
  547. int target)
  548. {
  549. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  550. struct fimc_dev *fimc = ctx->fimc_dev;
  551. struct fimc_variant *var = fimc->variant;
  552. struct fimc_pix_limit *pl = var->pix_limit;
  553. struct fimc_frame *sink = &ctx->s_frame;
  554. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  555. u32 align_sz = 0, align_h = 4;
  556. u32 max_sc_h, max_sc_v;
  557. /* In JPEG transparent transfer mode cropping is not supported */
  558. if (fimc_fmt_is_jpeg(ctx->d_frame.fmt->color)) {
  559. r->width = sink->f_width;
  560. r->height = sink->f_height;
  561. r->left = r->top = 0;
  562. return;
  563. }
  564. if (target == V4L2_SEL_TGT_COMPOSE) {
  565. if (ctx->rotation != 90 && ctx->rotation != 270)
  566. align_h = 1;
  567. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  568. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  569. min_sz = var->min_out_pixsize;
  570. } else {
  571. u32 depth = fimc_get_format_depth(sink->fmt);
  572. align_sz = 64/ALIGN(depth, 8);
  573. min_sz = var->min_inp_pixsize;
  574. min_w = min_h = min_sz;
  575. max_sc_h = max_sc_v = 1;
  576. }
  577. /*
  578. * For the compose rectangle the following constraints must be met:
  579. * - it must fit in the sink pad format rectangle (f_width/f_height);
  580. * - maximum downscaling ratio is 64;
  581. * - maximum crop size depends if the rotator is used or not;
  582. * - the sink pad format width/height must be 4 multiple of the
  583. * prescaler ratios determined by sink pad size and source pad crop,
  584. * the prescaler ratio is returned by fimc_get_scaler_factor().
  585. */
  586. max_w = min_t(u32,
  587. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  588. rotate ? sink->f_height : sink->f_width);
  589. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  590. if (target == V4L2_SEL_TGT_COMPOSE) {
  591. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  592. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  593. if (rotate) {
  594. swap(max_sc_h, max_sc_v);
  595. swap(min_w, min_h);
  596. }
  597. }
  598. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  599. &r->height, min_h, max_h, align_h,
  600. align_sz);
  601. /* Adjust left/top if crop/compose rectangle is out of bounds */
  602. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  603. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  604. r->left = round_down(r->left, var->hor_offs_align);
  605. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  606. target, r->left, r->top, r->width, r->height,
  607. sink->f_width, sink->f_height);
  608. }
  609. /*
  610. * The video node ioctl operations
  611. */
  612. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  613. struct v4l2_capability *cap)
  614. {
  615. struct fimc_dev *fimc = video_drvdata(file);
  616. strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
  617. strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
  618. cap->bus_info[0] = 0;
  619. cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
  620. return 0;
  621. }
  622. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  623. struct v4l2_fmtdesc *f)
  624. {
  625. struct fimc_fmt *fmt;
  626. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  627. f->index);
  628. if (!fmt)
  629. return -EINVAL;
  630. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  631. f->pixelformat = fmt->fourcc;
  632. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  633. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  634. return 0;
  635. }
  636. /**
  637. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  638. * elements
  639. * @ctx: FIMC capture context
  640. * @tfmt: media bus format to try/set on subdevs
  641. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  642. * @set: true to set format on subdevs, false to try only
  643. */
  644. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  645. struct v4l2_mbus_framefmt *tfmt,
  646. struct fimc_fmt **fmt_id,
  647. bool set)
  648. {
  649. struct fimc_dev *fimc = ctx->fimc_dev;
  650. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  651. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  652. struct v4l2_subdev_format sfmt;
  653. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  654. struct fimc_fmt *ffmt = NULL;
  655. int ret, i = 0;
  656. if (WARN_ON(!sd || !tfmt))
  657. return -EINVAL;
  658. memset(&sfmt, 0, sizeof(sfmt));
  659. sfmt.format = *tfmt;
  660. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  661. while (1) {
  662. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  663. FMT_FLAGS_CAM, i++);
  664. if (ffmt == NULL) {
  665. /*
  666. * Notify user-space if common pixel code for
  667. * host and sensor does not exist.
  668. */
  669. return -EINVAL;
  670. }
  671. mf->code = tfmt->code = ffmt->mbus_code;
  672. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  673. if (ret)
  674. return ret;
  675. if (mf->code != tfmt->code) {
  676. mf->code = 0;
  677. continue;
  678. }
  679. if (mf->width != tfmt->width || mf->height != tfmt->height) {
  680. u32 fcc = ffmt->fourcc;
  681. tfmt->width = mf->width;
  682. tfmt->height = mf->height;
  683. ffmt = fimc_capture_try_format(ctx,
  684. &tfmt->width, &tfmt->height,
  685. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  686. if (ffmt && ffmt->mbus_code)
  687. mf->code = ffmt->mbus_code;
  688. if (mf->width != tfmt->width ||
  689. mf->height != tfmt->height)
  690. continue;
  691. tfmt->code = mf->code;
  692. }
  693. if (csis)
  694. ret = v4l2_subdev_call(csis, pad, set_fmt, NULL, &sfmt);
  695. if (mf->code == tfmt->code &&
  696. mf->width == tfmt->width && mf->height == tfmt->height)
  697. break;
  698. }
  699. if (fmt_id && ffmt)
  700. *fmt_id = ffmt;
  701. *tfmt = *mf;
  702. dbg("code: 0x%x, %dx%d, %p", mf->code, mf->width, mf->height, ffmt);
  703. return 0;
  704. }
  705. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  706. struct v4l2_format *f)
  707. {
  708. struct fimc_dev *fimc = video_drvdata(file);
  709. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  710. return fimc_fill_format(&ctx->d_frame, f);
  711. }
  712. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  713. struct v4l2_format *f)
  714. {
  715. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  716. struct fimc_dev *fimc = video_drvdata(file);
  717. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  718. struct v4l2_mbus_framefmt mf;
  719. struct fimc_fmt *ffmt = NULL;
  720. if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
  721. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  722. NULL, &pix->pixelformat,
  723. FIMC_SD_PAD_SINK);
  724. ctx->s_frame.f_width = pix->width;
  725. ctx->s_frame.f_height = pix->height;
  726. }
  727. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  728. NULL, &pix->pixelformat,
  729. FIMC_SD_PAD_SOURCE);
  730. if (!ffmt)
  731. return -EINVAL;
  732. if (!fimc->vid_cap.user_subdev_api) {
  733. mf.width = pix->width;
  734. mf.height = pix->height;
  735. mf.code = ffmt->mbus_code;
  736. fimc_md_graph_lock(fimc);
  737. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  738. fimc_md_graph_unlock(fimc);
  739. pix->width = mf.width;
  740. pix->height = mf.height;
  741. if (ffmt)
  742. pix->pixelformat = ffmt->fourcc;
  743. }
  744. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  745. return 0;
  746. }
  747. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx, bool jpeg)
  748. {
  749. ctx->scaler.enabled = !jpeg;
  750. fimc_ctrls_activate(ctx, !jpeg);
  751. if (jpeg)
  752. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  753. else
  754. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  755. }
  756. static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f)
  757. {
  758. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  759. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  760. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf;
  761. struct fimc_frame *ff = &ctx->d_frame;
  762. struct fimc_fmt *s_fmt = NULL;
  763. int ret, i;
  764. if (vb2_is_busy(&fimc->vid_cap.vbq))
  765. return -EBUSY;
  766. /* Pre-configure format at camera interface input, for JPEG only */
  767. if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
  768. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  769. NULL, &pix->pixelformat,
  770. FIMC_SD_PAD_SINK);
  771. ctx->s_frame.f_width = pix->width;
  772. ctx->s_frame.f_height = pix->height;
  773. }
  774. /* Try the format at the scaler and the DMA output */
  775. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  776. NULL, &pix->pixelformat,
  777. FIMC_SD_PAD_SOURCE);
  778. if (!ff->fmt)
  779. return -EINVAL;
  780. /* Update RGB Alpha control state and value range */
  781. fimc_alpha_ctrl_update(ctx);
  782. /* Try to match format at the host and the sensor */
  783. if (!fimc->vid_cap.user_subdev_api) {
  784. mf->code = ff->fmt->mbus_code;
  785. mf->width = pix->width;
  786. mf->height = pix->height;
  787. fimc_md_graph_lock(fimc);
  788. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  789. fimc_md_graph_unlock(fimc);
  790. if (ret)
  791. return ret;
  792. pix->width = mf->width;
  793. pix->height = mf->height;
  794. }
  795. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  796. for (i = 0; i < ff->fmt->colplanes; i++)
  797. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  798. set_frame_bounds(ff, pix->width, pix->height);
  799. /* Reset the composition rectangle if not yet configured */
  800. if (!(ctx->state & FIMC_COMPOSE))
  801. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  802. fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ff->fmt->color));
  803. /* Reset cropping and set format at the camera interface input */
  804. if (!fimc->vid_cap.user_subdev_api) {
  805. ctx->s_frame.fmt = s_fmt;
  806. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  807. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  808. }
  809. return ret;
  810. }
  811. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  812. struct v4l2_format *f)
  813. {
  814. struct fimc_dev *fimc = video_drvdata(file);
  815. return fimc_capture_set_format(fimc, f);
  816. }
  817. static int fimc_cap_enum_input(struct file *file, void *priv,
  818. struct v4l2_input *i)
  819. {
  820. struct fimc_dev *fimc = video_drvdata(file);
  821. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  822. if (i->index != 0)
  823. return -EINVAL;
  824. i->type = V4L2_INPUT_TYPE_CAMERA;
  825. if (sd)
  826. strlcpy(i->name, sd->name, sizeof(i->name));
  827. return 0;
  828. }
  829. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  830. {
  831. return i == 0 ? i : -EINVAL;
  832. }
  833. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  834. {
  835. *i = 0;
  836. return 0;
  837. }
  838. /**
  839. * fimc_pipeline_validate - check for formats inconsistencies
  840. * between source and sink pad of each link
  841. *
  842. * Return 0 if all formats match or -EPIPE otherwise.
  843. */
  844. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  845. {
  846. struct v4l2_subdev_format sink_fmt, src_fmt;
  847. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  848. struct v4l2_subdev *sd;
  849. struct media_pad *pad;
  850. int ret;
  851. /* Start with the video capture node pad */
  852. pad = media_entity_remote_source(&vid_cap->vd_pad);
  853. if (pad == NULL)
  854. return -EPIPE;
  855. /* FIMC.{N} subdevice */
  856. sd = media_entity_to_v4l2_subdev(pad->entity);
  857. while (1) {
  858. /* Retrieve format at the sink pad */
  859. pad = &sd->entity.pads[0];
  860. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  861. break;
  862. /* Don't call FIMC subdev operation to avoid nested locking */
  863. if (sd == &fimc->vid_cap.subdev) {
  864. struct fimc_frame *ff = &vid_cap->ctx->s_frame;
  865. sink_fmt.format.width = ff->f_width;
  866. sink_fmt.format.height = ff->f_height;
  867. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  868. } else {
  869. sink_fmt.pad = pad->index;
  870. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  871. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  872. if (ret < 0 && ret != -ENOIOCTLCMD)
  873. return -EPIPE;
  874. }
  875. /* Retrieve format at the source pad */
  876. pad = media_entity_remote_source(pad);
  877. if (pad == NULL ||
  878. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  879. break;
  880. sd = media_entity_to_v4l2_subdev(pad->entity);
  881. src_fmt.pad = pad->index;
  882. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  883. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  884. if (ret < 0 && ret != -ENOIOCTLCMD)
  885. return -EPIPE;
  886. if (src_fmt.format.width != sink_fmt.format.width ||
  887. src_fmt.format.height != sink_fmt.format.height ||
  888. src_fmt.format.code != sink_fmt.format.code)
  889. return -EPIPE;
  890. }
  891. return 0;
  892. }
  893. static int fimc_cap_streamon(struct file *file, void *priv,
  894. enum v4l2_buf_type type)
  895. {
  896. struct fimc_dev *fimc = video_drvdata(file);
  897. struct fimc_pipeline *p = &fimc->pipeline;
  898. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  899. int ret;
  900. if (fimc_capture_active(fimc))
  901. return -EBUSY;
  902. ret = media_entity_pipeline_start(&sd->entity, p->m_pipeline);
  903. if (ret < 0)
  904. return ret;
  905. if (fimc->vid_cap.user_subdev_api) {
  906. ret = fimc_pipeline_validate(fimc);
  907. if (ret < 0) {
  908. media_entity_pipeline_stop(&sd->entity);
  909. return ret;
  910. }
  911. }
  912. return vb2_streamon(&fimc->vid_cap.vbq, type);
  913. }
  914. static int fimc_cap_streamoff(struct file *file, void *priv,
  915. enum v4l2_buf_type type)
  916. {
  917. struct fimc_dev *fimc = video_drvdata(file);
  918. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  919. int ret;
  920. ret = vb2_streamoff(&fimc->vid_cap.vbq, type);
  921. if (ret == 0)
  922. media_entity_pipeline_stop(&sd->entity);
  923. return ret;
  924. }
  925. static int fimc_cap_reqbufs(struct file *file, void *priv,
  926. struct v4l2_requestbuffers *reqbufs)
  927. {
  928. struct fimc_dev *fimc = video_drvdata(file);
  929. int ret = vb2_reqbufs(&fimc->vid_cap.vbq, reqbufs);
  930. if (!ret)
  931. fimc->vid_cap.reqbufs_count = reqbufs->count;
  932. return ret;
  933. }
  934. static int fimc_cap_querybuf(struct file *file, void *priv,
  935. struct v4l2_buffer *buf)
  936. {
  937. struct fimc_dev *fimc = video_drvdata(file);
  938. return vb2_querybuf(&fimc->vid_cap.vbq, buf);
  939. }
  940. static int fimc_cap_qbuf(struct file *file, void *priv,
  941. struct v4l2_buffer *buf)
  942. {
  943. struct fimc_dev *fimc = video_drvdata(file);
  944. return vb2_qbuf(&fimc->vid_cap.vbq, buf);
  945. }
  946. static int fimc_cap_dqbuf(struct file *file, void *priv,
  947. struct v4l2_buffer *buf)
  948. {
  949. struct fimc_dev *fimc = video_drvdata(file);
  950. return vb2_dqbuf(&fimc->vid_cap.vbq, buf, file->f_flags & O_NONBLOCK);
  951. }
  952. static int fimc_cap_create_bufs(struct file *file, void *priv,
  953. struct v4l2_create_buffers *create)
  954. {
  955. struct fimc_dev *fimc = video_drvdata(file);
  956. return vb2_create_bufs(&fimc->vid_cap.vbq, create);
  957. }
  958. static int fimc_cap_prepare_buf(struct file *file, void *priv,
  959. struct v4l2_buffer *b)
  960. {
  961. struct fimc_dev *fimc = video_drvdata(file);
  962. return vb2_prepare_buf(&fimc->vid_cap.vbq, b);
  963. }
  964. static int fimc_cap_g_selection(struct file *file, void *fh,
  965. struct v4l2_selection *s)
  966. {
  967. struct fimc_dev *fimc = video_drvdata(file);
  968. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  969. struct fimc_frame *f = &ctx->s_frame;
  970. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  971. return -EINVAL;
  972. switch (s->target) {
  973. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  974. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  975. f = &ctx->d_frame;
  976. case V4L2_SEL_TGT_CROP_BOUNDS:
  977. case V4L2_SEL_TGT_CROP_DEFAULT:
  978. s->r.left = 0;
  979. s->r.top = 0;
  980. s->r.width = f->o_width;
  981. s->r.height = f->o_height;
  982. return 0;
  983. case V4L2_SEL_TGT_COMPOSE:
  984. f = &ctx->d_frame;
  985. case V4L2_SEL_TGT_CROP:
  986. s->r.left = f->offs_h;
  987. s->r.top = f->offs_v;
  988. s->r.width = f->width;
  989. s->r.height = f->height;
  990. return 0;
  991. }
  992. return -EINVAL;
  993. }
  994. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  995. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  996. {
  997. if (a->left < b->left || a->top < b->top)
  998. return 0;
  999. if (a->left + a->width > b->left + b->width)
  1000. return 0;
  1001. if (a->top + a->height > b->top + b->height)
  1002. return 0;
  1003. return 1;
  1004. }
  1005. static int fimc_cap_s_selection(struct file *file, void *fh,
  1006. struct v4l2_selection *s)
  1007. {
  1008. struct fimc_dev *fimc = video_drvdata(file);
  1009. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1010. struct v4l2_rect rect = s->r;
  1011. struct fimc_frame *f;
  1012. unsigned long flags;
  1013. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1014. return -EINVAL;
  1015. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1016. f = &ctx->d_frame;
  1017. else if (s->target == V4L2_SEL_TGT_CROP)
  1018. f = &ctx->s_frame;
  1019. else
  1020. return -EINVAL;
  1021. fimc_capture_try_selection(ctx, &rect, s->target);
  1022. if (s->flags & V4L2_SEL_FLAG_LE &&
  1023. !enclosed_rectangle(&rect, &s->r))
  1024. return -ERANGE;
  1025. if (s->flags & V4L2_SEL_FLAG_GE &&
  1026. !enclosed_rectangle(&s->r, &rect))
  1027. return -ERANGE;
  1028. s->r = rect;
  1029. spin_lock_irqsave(&fimc->slock, flags);
  1030. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1031. s->r.height);
  1032. spin_unlock_irqrestore(&fimc->slock, flags);
  1033. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1034. return 0;
  1035. }
  1036. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1037. .vidioc_querycap = fimc_vidioc_querycap_capture,
  1038. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1039. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1040. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1041. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1042. .vidioc_reqbufs = fimc_cap_reqbufs,
  1043. .vidioc_querybuf = fimc_cap_querybuf,
  1044. .vidioc_qbuf = fimc_cap_qbuf,
  1045. .vidioc_dqbuf = fimc_cap_dqbuf,
  1046. .vidioc_prepare_buf = fimc_cap_prepare_buf,
  1047. .vidioc_create_bufs = fimc_cap_create_bufs,
  1048. .vidioc_streamon = fimc_cap_streamon,
  1049. .vidioc_streamoff = fimc_cap_streamoff,
  1050. .vidioc_g_selection = fimc_cap_g_selection,
  1051. .vidioc_s_selection = fimc_cap_s_selection,
  1052. .vidioc_enum_input = fimc_cap_enum_input,
  1053. .vidioc_s_input = fimc_cap_s_input,
  1054. .vidioc_g_input = fimc_cap_g_input,
  1055. };
  1056. /* Capture subdev media entity operations */
  1057. static int fimc_link_setup(struct media_entity *entity,
  1058. const struct media_pad *local,
  1059. const struct media_pad *remote, u32 flags)
  1060. {
  1061. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1062. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1063. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1064. return -EINVAL;
  1065. if (WARN_ON(fimc == NULL))
  1066. return 0;
  1067. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1068. local->entity->name, remote->entity->name, flags,
  1069. fimc->vid_cap.input);
  1070. if (flags & MEDIA_LNK_FL_ENABLED) {
  1071. if (fimc->vid_cap.input != 0)
  1072. return -EBUSY;
  1073. fimc->vid_cap.input = sd->grp_id;
  1074. return 0;
  1075. }
  1076. fimc->vid_cap.input = 0;
  1077. return 0;
  1078. }
  1079. static const struct media_entity_operations fimc_sd_media_ops = {
  1080. .link_setup = fimc_link_setup,
  1081. };
  1082. /**
  1083. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1084. * @sd: pointer to a subdev generating the notification
  1085. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1086. * @arg: pointer to an u32 type integer that stores the frame payload value
  1087. *
  1088. * The End Of Frame notification sent by sensor subdev in its still capture
  1089. * mode. If there is only a single VSYNC generated by the sensor at the
  1090. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1091. * (end of frame) interrupt. And this notification is used to complete the
  1092. * frame capture and returning a buffer to user-space. Subdev drivers should
  1093. * call this notification from their last 'End of frame capture' interrupt.
  1094. */
  1095. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1096. void *arg)
  1097. {
  1098. struct fimc_sensor_info *sensor;
  1099. struct fimc_vid_buffer *buf;
  1100. struct fimc_md *fmd;
  1101. struct fimc_dev *fimc;
  1102. unsigned long flags;
  1103. if (sd == NULL)
  1104. return;
  1105. sensor = v4l2_get_subdev_hostdata(sd);
  1106. fmd = entity_to_fimc_mdev(&sd->entity);
  1107. spin_lock_irqsave(&fmd->slock, flags);
  1108. fimc = sensor ? sensor->host : NULL;
  1109. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1110. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1111. unsigned long irq_flags;
  1112. spin_lock_irqsave(&fimc->slock, irq_flags);
  1113. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1114. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1115. struct fimc_vid_buffer, list);
  1116. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1117. }
  1118. fimc_capture_irq_handler(fimc, 1);
  1119. fimc_deactivate_capture(fimc);
  1120. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1121. }
  1122. spin_unlock_irqrestore(&fmd->slock, flags);
  1123. }
  1124. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1125. struct v4l2_subdev_fh *fh,
  1126. struct v4l2_subdev_mbus_code_enum *code)
  1127. {
  1128. struct fimc_fmt *fmt;
  1129. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1130. if (!fmt)
  1131. return -EINVAL;
  1132. code->code = fmt->mbus_code;
  1133. return 0;
  1134. }
  1135. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1136. struct v4l2_subdev_fh *fh,
  1137. struct v4l2_subdev_format *fmt)
  1138. {
  1139. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1140. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1141. struct v4l2_mbus_framefmt *mf;
  1142. struct fimc_frame *ff;
  1143. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1144. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1145. fmt->format = *mf;
  1146. return 0;
  1147. }
  1148. mf = &fmt->format;
  1149. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1150. ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame;
  1151. mutex_lock(&fimc->lock);
  1152. /* The pixel code is same on both input and output pad */
  1153. if (!WARN_ON(ctx->s_frame.fmt == NULL))
  1154. mf->code = ctx->s_frame.fmt->mbus_code;
  1155. mf->width = ff->f_width;
  1156. mf->height = ff->f_height;
  1157. mutex_unlock(&fimc->lock);
  1158. return 0;
  1159. }
  1160. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1161. struct v4l2_subdev_fh *fh,
  1162. struct v4l2_subdev_format *fmt)
  1163. {
  1164. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1165. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1166. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1167. struct fimc_frame *ff;
  1168. struct fimc_fmt *ffmt;
  1169. dbg("pad%d: code: 0x%x, %dx%d",
  1170. fmt->pad, mf->code, mf->width, mf->height);
  1171. if (fmt->pad == FIMC_SD_PAD_SOURCE &&
  1172. vb2_is_busy(&fimc->vid_cap.vbq))
  1173. return -EBUSY;
  1174. mutex_lock(&fimc->lock);
  1175. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1176. &mf->code, NULL, fmt->pad);
  1177. mutex_unlock(&fimc->lock);
  1178. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1179. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1180. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1181. *mf = fmt->format;
  1182. return 0;
  1183. }
  1184. /* Update RGB Alpha control state and value range */
  1185. fimc_alpha_ctrl_update(ctx);
  1186. fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ffmt->color));
  1187. ff = fmt->pad == FIMC_SD_PAD_SINK ?
  1188. &ctx->s_frame : &ctx->d_frame;
  1189. mutex_lock(&fimc->lock);
  1190. set_frame_bounds(ff, mf->width, mf->height);
  1191. fimc->vid_cap.mf = *mf;
  1192. ff->fmt = ffmt;
  1193. /* Reset the crop rectangle if required. */
  1194. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1195. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1196. if (fmt->pad == FIMC_SD_PAD_SINK)
  1197. ctx->state &= ~FIMC_COMPOSE;
  1198. mutex_unlock(&fimc->lock);
  1199. return 0;
  1200. }
  1201. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1202. struct v4l2_subdev_fh *fh,
  1203. struct v4l2_subdev_selection *sel)
  1204. {
  1205. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1206. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1207. struct fimc_frame *f = &ctx->s_frame;
  1208. struct v4l2_rect *r = &sel->r;
  1209. struct v4l2_rect *try_sel;
  1210. if (sel->pad != FIMC_SD_PAD_SINK)
  1211. return -EINVAL;
  1212. mutex_lock(&fimc->lock);
  1213. switch (sel->target) {
  1214. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1215. f = &ctx->d_frame;
  1216. case V4L2_SEL_TGT_CROP_BOUNDS:
  1217. r->width = f->o_width;
  1218. r->height = f->o_height;
  1219. r->left = 0;
  1220. r->top = 0;
  1221. mutex_unlock(&fimc->lock);
  1222. return 0;
  1223. case V4L2_SEL_TGT_CROP:
  1224. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1225. break;
  1226. case V4L2_SEL_TGT_COMPOSE:
  1227. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1228. f = &ctx->d_frame;
  1229. break;
  1230. default:
  1231. mutex_unlock(&fimc->lock);
  1232. return -EINVAL;
  1233. }
  1234. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1235. sel->r = *try_sel;
  1236. } else {
  1237. r->left = f->offs_h;
  1238. r->top = f->offs_v;
  1239. r->width = f->width;
  1240. r->height = f->height;
  1241. }
  1242. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1243. sel->pad, r->left, r->top, r->width, r->height,
  1244. f->f_width, f->f_height);
  1245. mutex_unlock(&fimc->lock);
  1246. return 0;
  1247. }
  1248. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1249. struct v4l2_subdev_fh *fh,
  1250. struct v4l2_subdev_selection *sel)
  1251. {
  1252. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1253. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1254. struct fimc_frame *f = &ctx->s_frame;
  1255. struct v4l2_rect *r = &sel->r;
  1256. struct v4l2_rect *try_sel;
  1257. unsigned long flags;
  1258. if (sel->pad != FIMC_SD_PAD_SINK)
  1259. return -EINVAL;
  1260. mutex_lock(&fimc->lock);
  1261. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1262. switch (sel->target) {
  1263. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1264. f = &ctx->d_frame;
  1265. case V4L2_SEL_TGT_CROP_BOUNDS:
  1266. r->width = f->o_width;
  1267. r->height = f->o_height;
  1268. r->left = 0;
  1269. r->top = 0;
  1270. mutex_unlock(&fimc->lock);
  1271. return 0;
  1272. case V4L2_SEL_TGT_CROP:
  1273. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1274. break;
  1275. case V4L2_SEL_TGT_COMPOSE:
  1276. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1277. f = &ctx->d_frame;
  1278. break;
  1279. default:
  1280. mutex_unlock(&fimc->lock);
  1281. return -EINVAL;
  1282. }
  1283. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1284. *try_sel = sel->r;
  1285. } else {
  1286. spin_lock_irqsave(&fimc->slock, flags);
  1287. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1288. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1289. spin_unlock_irqrestore(&fimc->slock, flags);
  1290. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1291. ctx->state |= FIMC_COMPOSE;
  1292. }
  1293. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1294. r->width, r->height);
  1295. mutex_unlock(&fimc->lock);
  1296. return 0;
  1297. }
  1298. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1299. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1300. .get_selection = fimc_subdev_get_selection,
  1301. .set_selection = fimc_subdev_set_selection,
  1302. .get_fmt = fimc_subdev_get_fmt,
  1303. .set_fmt = fimc_subdev_set_fmt,
  1304. };
  1305. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1306. .pad = &fimc_subdev_pad_ops,
  1307. };
  1308. /* Set default format at the sensor and host interface */
  1309. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1310. {
  1311. struct v4l2_format fmt = {
  1312. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1313. .fmt.pix_mp = {
  1314. .width = 640,
  1315. .height = 480,
  1316. .pixelformat = V4L2_PIX_FMT_YUYV,
  1317. .field = V4L2_FIELD_NONE,
  1318. .colorspace = V4L2_COLORSPACE_JPEG,
  1319. },
  1320. };
  1321. return fimc_capture_set_format(fimc, &fmt);
  1322. }
  1323. /* fimc->lock must be already initialized */
  1324. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1325. struct v4l2_device *v4l2_dev)
  1326. {
  1327. struct video_device *vfd = &fimc->vid_cap.vfd;
  1328. struct fimc_vid_cap *vid_cap;
  1329. struct fimc_ctx *ctx;
  1330. struct vb2_queue *q;
  1331. int ret = -ENOMEM;
  1332. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1333. if (!ctx)
  1334. return -ENOMEM;
  1335. ctx->fimc_dev = fimc;
  1336. ctx->in_path = FIMC_IO_CAMERA;
  1337. ctx->out_path = FIMC_IO_DMA;
  1338. ctx->state = FIMC_CTX_CAP;
  1339. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1340. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1341. memset(vfd, 0, sizeof(*vfd));
  1342. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1343. vfd->fops = &fimc_capture_fops;
  1344. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1345. vfd->v4l2_dev = v4l2_dev;
  1346. vfd->minor = -1;
  1347. vfd->release = video_device_release_empty;
  1348. vfd->lock = &fimc->lock;
  1349. video_set_drvdata(vfd, fimc);
  1350. vid_cap = &fimc->vid_cap;
  1351. vid_cap->active_buf_cnt = 0;
  1352. vid_cap->reqbufs_count = 0;
  1353. vid_cap->refcnt = 0;
  1354. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1355. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1356. vid_cap->ctx = ctx;
  1357. q = &fimc->vid_cap.vbq;
  1358. memset(q, 0, sizeof(*q));
  1359. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1360. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1361. q->drv_priv = fimc->vid_cap.ctx;
  1362. q->ops = &fimc_capture_qops;
  1363. q->mem_ops = &vb2_dma_contig_memops;
  1364. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1365. vb2_queue_init(q);
  1366. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1367. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1368. if (ret)
  1369. goto err_ent;
  1370. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1371. if (ret)
  1372. goto err_vd;
  1373. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1374. vfd->name, video_device_node_name(vfd));
  1375. vfd->ctrl_handler = &ctx->ctrls.handler;
  1376. return 0;
  1377. err_vd:
  1378. media_entity_cleanup(&vfd->entity);
  1379. err_ent:
  1380. kfree(ctx);
  1381. return ret;
  1382. }
  1383. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1384. {
  1385. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1386. int ret;
  1387. if (fimc == NULL)
  1388. return -ENXIO;
  1389. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1390. if (ret)
  1391. return ret;
  1392. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1393. if (ret)
  1394. fimc_unregister_m2m_device(fimc);
  1395. return ret;
  1396. }
  1397. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1398. {
  1399. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1400. if (fimc == NULL)
  1401. return;
  1402. fimc_unregister_m2m_device(fimc);
  1403. if (video_is_registered(&fimc->vid_cap.vfd)) {
  1404. video_unregister_device(&fimc->vid_cap.vfd);
  1405. media_entity_cleanup(&fimc->vid_cap.vfd.entity);
  1406. }
  1407. kfree(fimc->vid_cap.ctx);
  1408. fimc->vid_cap.ctx = NULL;
  1409. }
  1410. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1411. .registered = fimc_capture_subdev_registered,
  1412. .unregistered = fimc_capture_subdev_unregistered,
  1413. };
  1414. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1415. {
  1416. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1417. int ret;
  1418. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1419. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1420. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->pdev->id);
  1421. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1422. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1423. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1424. fimc->vid_cap.sd_pads, 0);
  1425. if (ret)
  1426. return ret;
  1427. sd->entity.ops = &fimc_sd_media_ops;
  1428. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1429. v4l2_set_subdevdata(sd, fimc);
  1430. return 0;
  1431. }
  1432. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1433. {
  1434. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1435. v4l2_device_unregister_subdev(sd);
  1436. media_entity_cleanup(&sd->entity);
  1437. v4l2_set_subdevdata(sd, NULL);
  1438. }