irq-pm.c 2.8 KB

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  1. /* linux/arch/arm/plat-s3c24xx/irq-om.c
  2. *
  3. * Copyright (c) 2003,2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * S3C24XX - IRQ PM code
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/sysdev.h>
  17. #include <plat/cpu.h>
  18. #include <plat/pm.h>
  19. #include <plat/irq.h>
  20. /* state for IRQs over sleep */
  21. /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
  22. *
  23. * set bit to 1 in allow bitfield to enable the wakeup settings on it
  24. */
  25. unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;
  26. unsigned long s3c_irqwake_intmask = 0xffffffffL;
  27. unsigned long s3c_irqwake_eintallow = 0x0000fff0L;
  28. unsigned long s3c_irqwake_eintmask = 0xffffffffL;
  29. int
  30. s3c_irq_wake(unsigned int irqno, unsigned int state)
  31. {
  32. unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
  33. if (!(s3c_irqwake_intallow & irqbit))
  34. return -ENOENT;
  35. printk(KERN_INFO "wake %s for irq %d\n",
  36. state ? "enabled" : "disabled", irqno);
  37. if (!state)
  38. s3c_irqwake_intmask |= irqbit;
  39. else
  40. s3c_irqwake_intmask &= ~irqbit;
  41. return 0;
  42. }
  43. int s3c_irqext_wake(unsigned int irqno, unsigned int state)
  44. {
  45. unsigned long bit = 1L << (irqno - EXTINT_OFF);
  46. if (!(s3c_irqwake_eintallow & bit))
  47. return -ENOENT;
  48. printk(KERN_INFO "wake %s for irq %d\n",
  49. state ? "enabled" : "disabled", irqno);
  50. if (!state)
  51. s3c_irqwake_eintmask |= bit;
  52. else
  53. s3c_irqwake_eintmask &= ~bit;
  54. return 0;
  55. }
  56. static struct sleep_save irq_save[] = {
  57. SAVE_ITEM(S3C2410_INTMSK),
  58. SAVE_ITEM(S3C2410_INTSUBMSK),
  59. };
  60. /* the extint values move between the s3c2410/s3c2440 and the s3c2412
  61. * so we use an array to hold them, and to calculate the address of
  62. * the register at run-time
  63. */
  64. static unsigned long save_extint[3];
  65. static unsigned long save_eintflt[4];
  66. static unsigned long save_eintmask;
  67. int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)
  68. {
  69. unsigned int i;
  70. for (i = 0; i < ARRAY_SIZE(save_extint); i++)
  71. save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4));
  72. for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
  73. save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4));
  74. s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
  75. save_eintmask = __raw_readl(S3C24XX_EINTMASK);
  76. return 0;
  77. }
  78. int s3c24xx_irq_resume(struct sys_device *dev)
  79. {
  80. unsigned int i;
  81. for (i = 0; i < ARRAY_SIZE(save_extint); i++)
  82. __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4));
  83. for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
  84. __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4));
  85. s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
  86. __raw_writel(save_eintmask, S3C24XX_EINTMASK);
  87. return 0;
  88. }