serial_core.h 15 KB

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  1. /*
  2. * linux/drivers/char/serial_core.h
  3. *
  4. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #ifndef LINUX_SERIAL_CORE_H
  21. #define LINUX_SERIAL_CORE_H
  22. #include <linux/serial.h>
  23. /*
  24. * The type definitions. These are from Ted Ts'o's serial.h
  25. */
  26. #define PORT_UNKNOWN 0
  27. #define PORT_8250 1
  28. #define PORT_16450 2
  29. #define PORT_16550 3
  30. #define PORT_16550A 4
  31. #define PORT_CIRRUS 5
  32. #define PORT_16650 6
  33. #define PORT_16650V2 7
  34. #define PORT_16750 8
  35. #define PORT_STARTECH 9
  36. #define PORT_16C950 10
  37. #define PORT_16654 11
  38. #define PORT_16850 12
  39. #define PORT_RSA 13
  40. #define PORT_NS16550A 14
  41. #define PORT_XSCALE 15
  42. #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
  43. #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
  44. #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
  45. #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
  46. #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
  47. #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
  48. #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
  49. #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
  50. #define PORT_MAX_8250 23 /* max port ID */
  51. /*
  52. * ARM specific type numbers. These are not currently guaranteed
  53. * to be implemented, and will change in the future. These are
  54. * separate so any additions to the old serial.c that occur before
  55. * we are merged can be easily merged here.
  56. */
  57. #define PORT_PXA 31
  58. #define PORT_AMBA 32
  59. #define PORT_CLPS711X 33
  60. #define PORT_SA1100 34
  61. #define PORT_UART00 35
  62. #define PORT_21285 37
  63. /* Sparc type numbers. */
  64. #define PORT_SUNZILOG 38
  65. #define PORT_SUNSAB 39
  66. /* DEC */
  67. #define PORT_DZ 46
  68. #define PORT_ZS 47
  69. /* Parisc type numbers. */
  70. #define PORT_MUX 48
  71. /* Atmel AT91 / AT32 SoC */
  72. #define PORT_ATMEL 49
  73. /* Macintosh Zilog type numbers */
  74. #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
  75. #define PORT_PMAC_ZILOG 51
  76. /* SH-SCI */
  77. #define PORT_SCI 52
  78. #define PORT_SCIF 53
  79. #define PORT_IRDA 54
  80. /* Samsung S3C2410 SoC and derivatives thereof */
  81. #define PORT_S3C2410 55
  82. /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
  83. #define PORT_IP22ZILOG 56
  84. /* Sharp LH7a40x -- an ARM9 SoC series */
  85. #define PORT_LH7A40X 57
  86. /* PPC CPM type number */
  87. #define PORT_CPM 58
  88. /* MPC52xx (and MPC512x) type numbers */
  89. #define PORT_MPC52xx 59
  90. /* IBM icom */
  91. #define PORT_ICOM 60
  92. /* Samsung S3C2440 SoC */
  93. #define PORT_S3C2440 61
  94. /* Motorola i.MX SoC */
  95. #define PORT_IMX 62
  96. /* Marvell MPSC */
  97. #define PORT_MPSC 63
  98. /* TXX9 type number */
  99. #define PORT_TXX9 64
  100. /* NEC VR4100 series SIU/DSIU */
  101. #define PORT_VR41XX_SIU 65
  102. #define PORT_VR41XX_DSIU 66
  103. /* Samsung S3C2400 SoC */
  104. #define PORT_S3C2400 67
  105. /* M32R SIO */
  106. #define PORT_M32R_SIO 68
  107. /*Digi jsm */
  108. #define PORT_JSM 69
  109. #define PORT_PNX8XXX 70
  110. /* Hilscher netx */
  111. #define PORT_NETX 71
  112. /* SUN4V Hypervisor Console */
  113. #define PORT_SUNHV 72
  114. #define PORT_S3C2412 73
  115. /* Xilinx uartlite */
  116. #define PORT_UARTLITE 74
  117. /* Blackfin bf5xx */
  118. #define PORT_BFIN 75
  119. /* Micrel KS8695 */
  120. #define PORT_KS8695 76
  121. /* Broadcom SB1250, etc. SOC */
  122. #define PORT_SB1250_DUART 77
  123. /* Freescale ColdFire */
  124. #define PORT_MCF 78
  125. /* Blackfin SPORT */
  126. #define PORT_BFIN_SPORT 79
  127. /* MN10300 on-chip UART numbers */
  128. #define PORT_MN10300 80
  129. #define PORT_MN10300_CTS 81
  130. #define PORT_SC26XX 82
  131. /* SH-SCI */
  132. #define PORT_SCIFA 83
  133. #define PORT_S3C6400 84
  134. /* NWPSERIAL */
  135. #define PORT_NWPSERIAL 85
  136. /* MAX3100 */
  137. #define PORT_MAX3100 86
  138. /* Timberdale UART */
  139. #define PORT_TIMBUART 87
  140. /* Qualcomm MSM SoCs */
  141. #define PORT_MSM 88
  142. /* BCM63xx family SoCs */
  143. #define PORT_BCM63XX 89
  144. /* Aeroflex Gaisler GRLIB APBUART */
  145. #define PORT_APBUART 90
  146. /* Altera UARTs */
  147. #define PORT_ALTERA_JTAGUART 91
  148. #define PORT_ALTERA_UART 92
  149. /* SH-SCI */
  150. #define PORT_SCIFB 93
  151. /* MAX310X */
  152. #define PORT_MAX310X 94
  153. /* High Speed UART for Medfield */
  154. #define PORT_MFD 95
  155. /* TI OMAP-UART */
  156. #define PORT_OMAP 96
  157. /* VIA VT8500 SoC */
  158. #define PORT_VT8500 97
  159. /* Xilinx PSS UART */
  160. #define PORT_XUARTPS 98
  161. /* Atheros AR933X SoC */
  162. #define PORT_AR933X 99
  163. /* Energy Micro efm32 SoC */
  164. #define PORT_EFMUART 100
  165. #ifdef __KERNEL__
  166. #include <linux/compiler.h>
  167. #include <linux/interrupt.h>
  168. #include <linux/circ_buf.h>
  169. #include <linux/spinlock.h>
  170. #include <linux/sched.h>
  171. #include <linux/tty.h>
  172. #include <linux/mutex.h>
  173. #include <linux/sysrq.h>
  174. #include <linux/pps_kernel.h>
  175. struct uart_port;
  176. struct serial_struct;
  177. struct device;
  178. /*
  179. * This structure describes all the operations that can be
  180. * done on the physical hardware.
  181. */
  182. struct uart_ops {
  183. unsigned int (*tx_empty)(struct uart_port *);
  184. void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
  185. unsigned int (*get_mctrl)(struct uart_port *);
  186. void (*stop_tx)(struct uart_port *);
  187. void (*start_tx)(struct uart_port *);
  188. void (*send_xchar)(struct uart_port *, char ch);
  189. void (*stop_rx)(struct uart_port *);
  190. void (*enable_ms)(struct uart_port *);
  191. void (*break_ctl)(struct uart_port *, int ctl);
  192. int (*startup)(struct uart_port *);
  193. void (*shutdown)(struct uart_port *);
  194. void (*flush_buffer)(struct uart_port *);
  195. void (*set_termios)(struct uart_port *, struct ktermios *new,
  196. struct ktermios *old);
  197. void (*set_ldisc)(struct uart_port *, int new);
  198. void (*pm)(struct uart_port *, unsigned int state,
  199. unsigned int oldstate);
  200. int (*set_wake)(struct uart_port *, unsigned int state);
  201. /*
  202. * Return a string describing the type of the port
  203. */
  204. const char *(*type)(struct uart_port *);
  205. /*
  206. * Release IO and memory resources used by the port.
  207. * This includes iounmap if necessary.
  208. */
  209. void (*release_port)(struct uart_port *);
  210. /*
  211. * Request IO and memory resources used by the port.
  212. * This includes iomapping the port if necessary.
  213. */
  214. int (*request_port)(struct uart_port *);
  215. void (*config_port)(struct uart_port *, int);
  216. int (*verify_port)(struct uart_port *, struct serial_struct *);
  217. int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
  218. #ifdef CONFIG_CONSOLE_POLL
  219. void (*poll_put_char)(struct uart_port *, unsigned char);
  220. int (*poll_get_char)(struct uart_port *);
  221. #endif
  222. };
  223. #define NO_POLL_CHAR 0x00ff0000
  224. #define UART_CONFIG_TYPE (1 << 0)
  225. #define UART_CONFIG_IRQ (1 << 1)
  226. struct uart_icount {
  227. __u32 cts;
  228. __u32 dsr;
  229. __u32 rng;
  230. __u32 dcd;
  231. __u32 rx;
  232. __u32 tx;
  233. __u32 frame;
  234. __u32 overrun;
  235. __u32 parity;
  236. __u32 brk;
  237. __u32 buf_overrun;
  238. };
  239. typedef unsigned int __bitwise__ upf_t;
  240. struct uart_port {
  241. spinlock_t lock; /* port lock */
  242. unsigned long iobase; /* in/out[bwl] */
  243. unsigned char __iomem *membase; /* read/write[bwl] */
  244. unsigned int (*serial_in)(struct uart_port *, int);
  245. void (*serial_out)(struct uart_port *, int, int);
  246. void (*set_termios)(struct uart_port *,
  247. struct ktermios *new,
  248. struct ktermios *old);
  249. int (*handle_irq)(struct uart_port *);
  250. void (*pm)(struct uart_port *, unsigned int state,
  251. unsigned int old);
  252. void (*handle_break)(struct uart_port *);
  253. unsigned int irq; /* irq number */
  254. unsigned long irqflags; /* irq flags */
  255. unsigned int uartclk; /* base uart clock */
  256. unsigned int fifosize; /* tx fifo size */
  257. unsigned char x_char; /* xon/xoff char */
  258. unsigned char regshift; /* reg offset shift */
  259. unsigned char iotype; /* io access style */
  260. unsigned char unused1;
  261. #define UPIO_PORT (0)
  262. #define UPIO_HUB6 (1)
  263. #define UPIO_MEM (2)
  264. #define UPIO_MEM32 (3)
  265. #define UPIO_AU (4) /* Au1x00 type IO */
  266. #define UPIO_TSI (5) /* Tsi108/109 type IO */
  267. #define UPIO_RM9000 (6) /* RM9000 type IO */
  268. unsigned int read_status_mask; /* driver specific */
  269. unsigned int ignore_status_mask; /* driver specific */
  270. struct uart_state *state; /* pointer to parent state */
  271. struct uart_icount icount; /* statistics */
  272. struct console *cons; /* struct console, if any */
  273. #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
  274. unsigned long sysrq; /* sysrq timeout */
  275. #endif
  276. upf_t flags;
  277. #define UPF_FOURPORT ((__force upf_t) (1 << 1))
  278. #define UPF_SAK ((__force upf_t) (1 << 2))
  279. #define UPF_SPD_MASK ((__force upf_t) (0x1030))
  280. #define UPF_SPD_HI ((__force upf_t) (0x0010))
  281. #define UPF_SPD_VHI ((__force upf_t) (0x0020))
  282. #define UPF_SPD_CUST ((__force upf_t) (0x0030))
  283. #define UPF_SPD_SHI ((__force upf_t) (0x1000))
  284. #define UPF_SPD_WARP ((__force upf_t) (0x1010))
  285. #define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
  286. #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
  287. #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
  288. #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
  289. #define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
  290. #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
  291. #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
  292. #define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
  293. #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
  294. #define UPF_EXAR_EFR ((__force upf_t) (1 << 25))
  295. #define UPF_BUG_THRE ((__force upf_t) (1 << 26))
  296. /* The exact UART type is known and should not be probed. */
  297. #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
  298. #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
  299. #define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
  300. #define UPF_DEAD ((__force upf_t) (1 << 30))
  301. #define UPF_IOREMAP ((__force upf_t) (1 << 31))
  302. #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
  303. #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
  304. unsigned int mctrl; /* current modem ctrl settings */
  305. unsigned int timeout; /* character-based timeout */
  306. unsigned int type; /* port type */
  307. const struct uart_ops *ops;
  308. unsigned int custom_divisor;
  309. unsigned int line; /* port index */
  310. resource_size_t mapbase; /* for ioremap */
  311. struct device *dev; /* parent device */
  312. unsigned char hub6; /* this should be in the 8250 driver */
  313. unsigned char suspended;
  314. unsigned char irq_wake;
  315. unsigned char unused[2];
  316. void *private_data; /* generic platform data pointer */
  317. };
  318. static inline int serial_port_in(struct uart_port *up, int offset)
  319. {
  320. return up->serial_in(up, offset);
  321. }
  322. static inline void serial_port_out(struct uart_port *up, int offset, int value)
  323. {
  324. up->serial_out(up, offset, value);
  325. }
  326. /*
  327. * This is the state information which is persistent across opens.
  328. */
  329. struct uart_state {
  330. struct tty_port port;
  331. int pm_state;
  332. struct circ_buf xmit;
  333. struct uart_port *uart_port;
  334. };
  335. #define UART_XMIT_SIZE PAGE_SIZE
  336. /* number of characters left in xmit buffer before we ask for more */
  337. #define WAKEUP_CHARS 256
  338. struct module;
  339. struct tty_driver;
  340. struct uart_driver {
  341. struct module *owner;
  342. const char *driver_name;
  343. const char *dev_name;
  344. int major;
  345. int minor;
  346. int nr;
  347. struct console *cons;
  348. /*
  349. * these are private; the low level driver should not
  350. * touch these; they should be initialised to NULL
  351. */
  352. struct uart_state *state;
  353. struct tty_driver *tty_driver;
  354. };
  355. void uart_write_wakeup(struct uart_port *port);
  356. /*
  357. * Baud rate helpers.
  358. */
  359. void uart_update_timeout(struct uart_port *port, unsigned int cflag,
  360. unsigned int baud);
  361. unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
  362. struct ktermios *old, unsigned int min,
  363. unsigned int max);
  364. unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
  365. /* Base timer interval for polling */
  366. static inline int uart_poll_timeout(struct uart_port *port)
  367. {
  368. int timeout = port->timeout;
  369. return timeout > 6 ? (timeout / 2 - 2) : 1;
  370. }
  371. /*
  372. * Console helpers.
  373. */
  374. struct uart_port *uart_get_console(struct uart_port *ports, int nr,
  375. struct console *c);
  376. void uart_parse_options(char *options, int *baud, int *parity, int *bits,
  377. int *flow);
  378. int uart_set_options(struct uart_port *port, struct console *co, int baud,
  379. int parity, int bits, int flow);
  380. struct tty_driver *uart_console_device(struct console *co, int *index);
  381. void uart_console_write(struct uart_port *port, const char *s,
  382. unsigned int count,
  383. void (*putchar)(struct uart_port *, int));
  384. /*
  385. * Port/driver registration/removal
  386. */
  387. int uart_register_driver(struct uart_driver *uart);
  388. void uart_unregister_driver(struct uart_driver *uart);
  389. int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
  390. int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
  391. int uart_match_port(struct uart_port *port1, struct uart_port *port2);
  392. /*
  393. * Power Management
  394. */
  395. int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
  396. int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
  397. #define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
  398. #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
  399. #define uart_circ_chars_pending(circ) \
  400. (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
  401. #define uart_circ_chars_free(circ) \
  402. (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
  403. static inline int uart_tx_stopped(struct uart_port *port)
  404. {
  405. struct tty_struct *tty = port->state->port.tty;
  406. if(tty->stopped || tty->hw_stopped)
  407. return 1;
  408. return 0;
  409. }
  410. /*
  411. * The following are helper functions for the low level drivers.
  412. */
  413. extern void uart_handle_dcd_change(struct uart_port *uport,
  414. unsigned int status);
  415. extern void uart_handle_cts_change(struct uart_port *uport,
  416. unsigned int status);
  417. extern void uart_insert_char(struct uart_port *port, unsigned int status,
  418. unsigned int overrun, unsigned int ch, unsigned int flag);
  419. #ifdef SUPPORT_SYSRQ
  420. static inline int
  421. uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
  422. {
  423. if (port->sysrq) {
  424. if (ch && time_before(jiffies, port->sysrq)) {
  425. handle_sysrq(ch);
  426. port->sysrq = 0;
  427. return 1;
  428. }
  429. port->sysrq = 0;
  430. }
  431. return 0;
  432. }
  433. #else
  434. #define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
  435. #endif
  436. /*
  437. * We do the SysRQ and SAK checking like this...
  438. */
  439. static inline int uart_handle_break(struct uart_port *port)
  440. {
  441. struct uart_state *state = port->state;
  442. if (port->handle_break)
  443. port->handle_break(port);
  444. #ifdef SUPPORT_SYSRQ
  445. if (port->cons && port->cons->index == port->line) {
  446. if (!port->sysrq) {
  447. port->sysrq = jiffies + HZ*5;
  448. return 1;
  449. }
  450. port->sysrq = 0;
  451. }
  452. #endif
  453. if (port->flags & UPF_SAK)
  454. do_SAK(state->port.tty);
  455. return 0;
  456. }
  457. /*
  458. * UART_ENABLE_MS - determine if port should enable modem status irqs
  459. */
  460. #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
  461. (cflag) & CRTSCTS || \
  462. !((cflag) & CLOCAL))
  463. #endif
  464. #endif /* LINUX_SERIAL_CORE_H */