paging_tmpl.h 14 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. /*
  20. * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  21. * so the code in this file is compiled twice, once per pte size.
  22. */
  23. #if PTTYPE == 64
  24. #define pt_element_t u64
  25. #define guest_walker guest_walker64
  26. #define FNAME(name) paging##64_##name
  27. #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  28. #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  29. #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  30. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  31. #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  32. #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
  33. #ifdef CONFIG_X86_64
  34. #define PT_MAX_FULL_LEVELS 4
  35. #else
  36. #define PT_MAX_FULL_LEVELS 2
  37. #endif
  38. #elif PTTYPE == 32
  39. #define pt_element_t u32
  40. #define guest_walker guest_walker32
  41. #define FNAME(name) paging##32_##name
  42. #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  43. #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  44. #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  45. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  46. #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  47. #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
  48. #define PT_MAX_FULL_LEVELS 2
  49. #else
  50. #error Invalid PTTYPE value
  51. #endif
  52. /*
  53. * The guest_walker structure emulates the behavior of the hardware page
  54. * table walker.
  55. */
  56. struct guest_walker {
  57. int level;
  58. gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  59. pt_element_t *table;
  60. pt_element_t *ptep;
  61. pt_element_t inherited_ar;
  62. gfn_t gfn;
  63. u32 error_code;
  64. };
  65. /*
  66. * Fetch a guest pte for a guest virtual address
  67. */
  68. static int FNAME(walk_addr)(struct guest_walker *walker,
  69. struct kvm_vcpu *vcpu, gva_t addr,
  70. int write_fault, int user_fault, int fetch_fault)
  71. {
  72. hpa_t hpa;
  73. struct kvm_memory_slot *slot;
  74. pt_element_t *ptep;
  75. pt_element_t root;
  76. gfn_t table_gfn;
  77. pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  78. walker->level = vcpu->mmu.root_level;
  79. walker->table = NULL;
  80. root = vcpu->cr3;
  81. #if PTTYPE == 64
  82. if (!is_long_mode(vcpu)) {
  83. walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
  84. root = *walker->ptep;
  85. if (!(root & PT_PRESENT_MASK))
  86. goto not_present;
  87. --walker->level;
  88. }
  89. #endif
  90. table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  91. walker->table_gfn[walker->level - 1] = table_gfn;
  92. pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  93. walker->level - 1, table_gfn);
  94. slot = gfn_to_memslot(vcpu->kvm, table_gfn);
  95. hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
  96. walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
  97. ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
  98. (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
  99. walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
  100. for (;;) {
  101. int index = PT_INDEX(addr, walker->level);
  102. hpa_t paddr;
  103. ptep = &walker->table[index];
  104. ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
  105. ((unsigned long)ptep & PAGE_MASK));
  106. if (!is_present_pte(*ptep))
  107. goto not_present;
  108. if (write_fault && !is_writeble_pte(*ptep))
  109. if (user_fault || is_write_protection(vcpu))
  110. goto access_error;
  111. if (user_fault && !(*ptep & PT_USER_MASK))
  112. goto access_error;
  113. #if PTTYPE == 64
  114. if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
  115. goto access_error;
  116. #endif
  117. if (!(*ptep & PT_ACCESSED_MASK)) {
  118. mark_page_dirty(vcpu->kvm, table_gfn);
  119. *ptep |= PT_ACCESSED_MASK;
  120. }
  121. if (walker->level == PT_PAGE_TABLE_LEVEL) {
  122. walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
  123. >> PAGE_SHIFT;
  124. break;
  125. }
  126. if (walker->level == PT_DIRECTORY_LEVEL
  127. && (*ptep & PT_PAGE_SIZE_MASK)
  128. && (PTTYPE == 64 || is_pse(vcpu))) {
  129. walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
  130. >> PAGE_SHIFT;
  131. walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
  132. break;
  133. }
  134. walker->inherited_ar &= walker->table[index];
  135. table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
  136. paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
  137. kunmap_atomic(walker->table, KM_USER0);
  138. walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
  139. KM_USER0);
  140. --walker->level;
  141. walker->table_gfn[walker->level - 1 ] = table_gfn;
  142. pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  143. walker->level - 1, table_gfn);
  144. }
  145. walker->ptep = ptep;
  146. pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
  147. return 1;
  148. not_present:
  149. walker->error_code = 0;
  150. goto err;
  151. access_error:
  152. walker->error_code = PFERR_PRESENT_MASK;
  153. err:
  154. if (write_fault)
  155. walker->error_code |= PFERR_WRITE_MASK;
  156. if (user_fault)
  157. walker->error_code |= PFERR_USER_MASK;
  158. if (fetch_fault)
  159. walker->error_code |= PFERR_FETCH_MASK;
  160. return 0;
  161. }
  162. static void FNAME(release_walker)(struct guest_walker *walker)
  163. {
  164. if (walker->table)
  165. kunmap_atomic(walker->table, KM_USER0);
  166. }
  167. static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
  168. struct guest_walker *walker)
  169. {
  170. mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
  171. }
  172. static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
  173. u64 *shadow_pte,
  174. gpa_t gaddr,
  175. pt_element_t *gpte,
  176. u64 access_bits,
  177. gfn_t gfn)
  178. {
  179. hpa_t paddr;
  180. int dirty = *gpte & PT_DIRTY_MASK;
  181. *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
  182. if (!dirty)
  183. access_bits &= ~PT_WRITABLE_MASK;
  184. paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
  185. *shadow_pte |= access_bits;
  186. if (is_error_hpa(paddr)) {
  187. *shadow_pte |= gaddr;
  188. *shadow_pte |= PT_SHADOW_IO_MARK;
  189. *shadow_pte &= ~PT_PRESENT_MASK;
  190. return;
  191. }
  192. *shadow_pte |= paddr;
  193. if (access_bits & PT_WRITABLE_MASK) {
  194. struct kvm_mmu_page *shadow;
  195. shadow = kvm_mmu_lookup_page(vcpu, gfn);
  196. if (shadow) {
  197. pgprintk("%s: found shadow page for %lx, marking ro\n",
  198. __FUNCTION__, gfn);
  199. access_bits &= ~PT_WRITABLE_MASK;
  200. if (is_writeble_pte(*shadow_pte)) {
  201. *shadow_pte &= ~PT_WRITABLE_MASK;
  202. kvm_arch_ops->tlb_flush(vcpu);
  203. }
  204. }
  205. }
  206. if (access_bits & PT_WRITABLE_MASK)
  207. mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
  208. page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
  209. rmap_add(vcpu, shadow_pte);
  210. }
  211. static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t *gpte,
  212. u64 *shadow_pte, u64 access_bits, gfn_t gfn)
  213. {
  214. ASSERT(*shadow_pte == 0);
  215. access_bits &= *gpte;
  216. *shadow_pte = (*gpte & PT_PTE_COPY_MASK);
  217. FNAME(set_pte_common)(vcpu, shadow_pte, *gpte & PT_BASE_ADDR_MASK,
  218. gpte, access_bits, gfn);
  219. }
  220. static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
  221. u64 *spte, const void *pte, int bytes)
  222. {
  223. pt_element_t gpte;
  224. if (bytes < sizeof(pt_element_t))
  225. return;
  226. gpte = *(const pt_element_t *)pte;
  227. if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
  228. return;
  229. pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
  230. FNAME(set_pte)(vcpu, &gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK,
  231. (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
  232. }
  233. static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t *gpde,
  234. u64 *shadow_pte, u64 access_bits, gfn_t gfn)
  235. {
  236. gpa_t gaddr;
  237. ASSERT(*shadow_pte == 0);
  238. access_bits &= *gpde;
  239. gaddr = (gpa_t)gfn << PAGE_SHIFT;
  240. if (PTTYPE == 32 && is_cpuid_PSE36())
  241. gaddr |= (*gpde & PT32_DIR_PSE36_MASK) <<
  242. (32 - PT32_DIR_PSE36_SHIFT);
  243. *shadow_pte = *gpde & PT_PTE_COPY_MASK;
  244. FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
  245. gpde, access_bits, gfn);
  246. }
  247. /*
  248. * Fetch a shadow pte for a specific level in the paging hierarchy.
  249. */
  250. static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
  251. struct guest_walker *walker)
  252. {
  253. hpa_t shadow_addr;
  254. int level;
  255. u64 *shadow_ent;
  256. u64 *prev_shadow_ent = NULL;
  257. pt_element_t *guest_ent = walker->ptep;
  258. if (!is_present_pte(*guest_ent))
  259. return NULL;
  260. shadow_addr = vcpu->mmu.root_hpa;
  261. level = vcpu->mmu.shadow_root_level;
  262. if (level == PT32E_ROOT_LEVEL) {
  263. shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
  264. shadow_addr &= PT64_BASE_ADDR_MASK;
  265. --level;
  266. }
  267. for (; ; level--) {
  268. u32 index = SHADOW_PT_INDEX(addr, level);
  269. struct kvm_mmu_page *shadow_page;
  270. u64 shadow_pte;
  271. int metaphysical;
  272. gfn_t table_gfn;
  273. unsigned hugepage_access = 0;
  274. shadow_ent = ((u64 *)__va(shadow_addr)) + index;
  275. if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
  276. if (level == PT_PAGE_TABLE_LEVEL)
  277. return shadow_ent;
  278. shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
  279. prev_shadow_ent = shadow_ent;
  280. continue;
  281. }
  282. if (level == PT_PAGE_TABLE_LEVEL)
  283. break;
  284. if (level - 1 == PT_PAGE_TABLE_LEVEL
  285. && walker->level == PT_DIRECTORY_LEVEL) {
  286. metaphysical = 1;
  287. hugepage_access = *guest_ent;
  288. hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
  289. hugepage_access >>= PT_WRITABLE_SHIFT;
  290. table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
  291. >> PAGE_SHIFT;
  292. } else {
  293. metaphysical = 0;
  294. table_gfn = walker->table_gfn[level - 2];
  295. }
  296. shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
  297. metaphysical, hugepage_access,
  298. shadow_ent);
  299. shadow_addr = __pa(shadow_page->spt);
  300. shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
  301. | PT_WRITABLE_MASK | PT_USER_MASK;
  302. *shadow_ent = shadow_pte;
  303. prev_shadow_ent = shadow_ent;
  304. }
  305. if (walker->level == PT_DIRECTORY_LEVEL) {
  306. if (prev_shadow_ent)
  307. *prev_shadow_ent |= PT_SHADOW_PS_MARK;
  308. FNAME(set_pde)(vcpu, guest_ent, shadow_ent,
  309. walker->inherited_ar, walker->gfn);
  310. } else {
  311. ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
  312. FNAME(set_pte)(vcpu, guest_ent, shadow_ent,
  313. walker->inherited_ar,
  314. walker->gfn);
  315. }
  316. return shadow_ent;
  317. }
  318. /*
  319. * The guest faulted for write. We need to
  320. *
  321. * - check write permissions
  322. * - update the guest pte dirty bit
  323. * - update our own dirty page tracking structures
  324. */
  325. static int FNAME(fix_write_pf)(struct kvm_vcpu *vcpu,
  326. u64 *shadow_ent,
  327. struct guest_walker *walker,
  328. gva_t addr,
  329. int user,
  330. int *write_pt)
  331. {
  332. pt_element_t *guest_ent;
  333. int writable_shadow;
  334. gfn_t gfn;
  335. struct kvm_mmu_page *page;
  336. if (is_writeble_pte(*shadow_ent))
  337. return !user || (*shadow_ent & PT_USER_MASK);
  338. writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
  339. if (user) {
  340. /*
  341. * User mode access. Fail if it's a kernel page or a read-only
  342. * page.
  343. */
  344. if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
  345. return 0;
  346. ASSERT(*shadow_ent & PT_USER_MASK);
  347. } else
  348. /*
  349. * Kernel mode access. Fail if it's a read-only page and
  350. * supervisor write protection is enabled.
  351. */
  352. if (!writable_shadow) {
  353. if (is_write_protection(vcpu))
  354. return 0;
  355. *shadow_ent &= ~PT_USER_MASK;
  356. }
  357. guest_ent = walker->ptep;
  358. if (!is_present_pte(*guest_ent)) {
  359. *shadow_ent = 0;
  360. return 0;
  361. }
  362. gfn = walker->gfn;
  363. if (user) {
  364. /*
  365. * Usermode page faults won't be for page table updates.
  366. */
  367. while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
  368. pgprintk("%s: zap %lx %x\n",
  369. __FUNCTION__, gfn, page->role.word);
  370. kvm_mmu_zap_page(vcpu, page);
  371. }
  372. } else if (kvm_mmu_lookup_page(vcpu, gfn)) {
  373. pgprintk("%s: found shadow page for %lx, marking ro\n",
  374. __FUNCTION__, gfn);
  375. mark_page_dirty(vcpu->kvm, gfn);
  376. FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
  377. *guest_ent |= PT_DIRTY_MASK;
  378. *write_pt = 1;
  379. return 0;
  380. }
  381. mark_page_dirty(vcpu->kvm, gfn);
  382. *shadow_ent |= PT_WRITABLE_MASK;
  383. FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
  384. *guest_ent |= PT_DIRTY_MASK;
  385. rmap_add(vcpu, shadow_ent);
  386. return 1;
  387. }
  388. /*
  389. * Page fault handler. There are several causes for a page fault:
  390. * - there is no shadow pte for the guest pte
  391. * - write access through a shadow pte marked read only so that we can set
  392. * the dirty bit
  393. * - write access to a shadow pte marked read only so we can update the page
  394. * dirty bitmap, when userspace requests it
  395. * - mmio access; in this case we will never install a present shadow pte
  396. * - normal guest page fault due to the guest pte marked not present, not
  397. * writable, or not executable
  398. *
  399. * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
  400. * a negative value on error.
  401. */
  402. static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
  403. u32 error_code)
  404. {
  405. int write_fault = error_code & PFERR_WRITE_MASK;
  406. int user_fault = error_code & PFERR_USER_MASK;
  407. int fetch_fault = error_code & PFERR_FETCH_MASK;
  408. struct guest_walker walker;
  409. u64 *shadow_pte;
  410. int fixed;
  411. int write_pt = 0;
  412. int r;
  413. pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
  414. kvm_mmu_audit(vcpu, "pre page fault");
  415. r = mmu_topup_memory_caches(vcpu);
  416. if (r)
  417. return r;
  418. /*
  419. * Look up the shadow pte for the faulting address.
  420. */
  421. r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
  422. fetch_fault);
  423. /*
  424. * The page is not mapped by the guest. Let the guest handle it.
  425. */
  426. if (!r) {
  427. pgprintk("%s: guest page fault\n", __FUNCTION__);
  428. inject_page_fault(vcpu, addr, walker.error_code);
  429. FNAME(release_walker)(&walker);
  430. vcpu->last_pt_write_count = 0; /* reset fork detector */
  431. return 0;
  432. }
  433. shadow_pte = FNAME(fetch)(vcpu, addr, &walker);
  434. pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__,
  435. shadow_pte, *shadow_pte);
  436. /*
  437. * Update the shadow pte.
  438. */
  439. if (write_fault)
  440. fixed = FNAME(fix_write_pf)(vcpu, shadow_pte, &walker, addr,
  441. user_fault, &write_pt);
  442. else
  443. fixed = fix_read_pf(shadow_pte);
  444. pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__,
  445. shadow_pte, *shadow_pte);
  446. FNAME(release_walker)(&walker);
  447. if (!write_pt)
  448. vcpu->last_pt_write_count = 0; /* reset fork detector */
  449. /*
  450. * mmio: emulate if accessible, otherwise its a guest fault.
  451. */
  452. if (is_io_pte(*shadow_pte))
  453. return 1;
  454. ++vcpu->stat.pf_fixed;
  455. kvm_mmu_audit(vcpu, "post page fault (fixed)");
  456. return write_pt;
  457. }
  458. static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
  459. {
  460. struct guest_walker walker;
  461. gpa_t gpa = UNMAPPED_GVA;
  462. int r;
  463. r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
  464. if (r) {
  465. gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
  466. gpa |= vaddr & ~PAGE_MASK;
  467. }
  468. FNAME(release_walker)(&walker);
  469. return gpa;
  470. }
  471. #undef pt_element_t
  472. #undef guest_walker
  473. #undef FNAME
  474. #undef PT_BASE_ADDR_MASK
  475. #undef PT_INDEX
  476. #undef SHADOW_PT_INDEX
  477. #undef PT_LEVEL_MASK
  478. #undef PT_PTE_COPY_MASK
  479. #undef PT_NON_PTE_COPY_MASK
  480. #undef PT_DIR_BASE_ADDR_MASK
  481. #undef PT_MAX_FULL_LEVELS