i2c.c 4.3 KB

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  1. /*
  2. * Helper module for board specific I2C bus registration
  3. *
  4. * Copyright (C) 2009 Nokia Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include "soc.h"
  22. #include "common.h"
  23. #include "omap_hwmod.h"
  24. #include "omap_device.h"
  25. #include "mux.h"
  26. #include "i2c.h"
  27. /* In register I2C_CON, Bit 15 is the I2C enable bit */
  28. #define I2C_EN BIT(15)
  29. #define OMAP2_I2C_CON_OFFSET 0x24
  30. #define OMAP4_I2C_CON_OFFSET 0xA4
  31. /* Maximum microseconds to wait for OMAP module to softreset */
  32. #define MAX_MODULE_SOFTRESET_WAIT 10000
  33. #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
  34. static void __init omap2_i2c_mux_pins(int bus_id)
  35. {
  36. char mux_name[sizeof("i2c2_scl.i2c2_scl")];
  37. /* First I2C bus is not muxable */
  38. if (bus_id == 1)
  39. return;
  40. sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
  41. omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
  42. sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
  43. omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
  44. }
  45. /**
  46. * omap_i2c_reset - reset the omap i2c module.
  47. * @oh: struct omap_hwmod *
  48. *
  49. * The i2c moudle in omap2, omap3 had a special sequence to reset. The
  50. * sequence is:
  51. * - Disable the I2C.
  52. * - Write to SOFTRESET bit.
  53. * - Enable the I2C.
  54. * - Poll on the RESETDONE bit.
  55. * The sequence is implemented in below function. This is called for 2420,
  56. * 2430 and omap3.
  57. */
  58. int omap_i2c_reset(struct omap_hwmod *oh)
  59. {
  60. u32 v;
  61. u16 i2c_con;
  62. int c = 0;
  63. if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
  64. i2c_con = OMAP4_I2C_CON_OFFSET;
  65. } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
  66. i2c_con = OMAP2_I2C_CON_OFFSET;
  67. } else {
  68. WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
  69. oh->name);
  70. return -EINVAL;
  71. }
  72. /* Disable I2C */
  73. v = omap_hwmod_read(oh, i2c_con);
  74. v &= ~I2C_EN;
  75. omap_hwmod_write(v, oh, i2c_con);
  76. /* Write to the SOFTRESET bit */
  77. omap_hwmod_softreset(oh);
  78. /* Enable I2C */
  79. v = omap_hwmod_read(oh, i2c_con);
  80. v |= I2C_EN;
  81. omap_hwmod_write(v, oh, i2c_con);
  82. /* Poll on RESETDONE bit */
  83. omap_test_timeout((omap_hwmod_read(oh,
  84. oh->class->sysc->syss_offs)
  85. & SYSS_RESETDONE_MASK),
  86. MAX_MODULE_SOFTRESET_WAIT, c);
  87. if (c == MAX_MODULE_SOFTRESET_WAIT)
  88. pr_warning("%s: %s: softreset failed (waited %d usec)\n",
  89. __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
  90. else
  91. pr_debug("%s: %s: softreset in %d usec\n", __func__,
  92. oh->name, c);
  93. return 0;
  94. }
  95. static int __init omap_i2c_nr_ports(void)
  96. {
  97. int ports = 0;
  98. if (cpu_is_omap24xx())
  99. ports = 2;
  100. else if (cpu_is_omap34xx())
  101. ports = 3;
  102. else if (cpu_is_omap44xx())
  103. ports = 4;
  104. return ports;
  105. }
  106. static const char name[] = "omap_i2c";
  107. int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
  108. int bus_id)
  109. {
  110. int l;
  111. struct omap_hwmod *oh;
  112. struct platform_device *pdev;
  113. char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
  114. struct omap_i2c_bus_platform_data *pdata;
  115. struct omap_i2c_dev_attr *dev_attr;
  116. if (bus_id > omap_i2c_nr_ports())
  117. return -EINVAL;
  118. omap2_i2c_mux_pins(bus_id);
  119. l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
  120. WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
  121. "String buffer overflow in I2C%d device setup\n", bus_id);
  122. oh = omap_hwmod_lookup(oh_name);
  123. if (!oh) {
  124. pr_err("Could not look up %s\n", oh_name);
  125. return -EEXIST;
  126. }
  127. pdata = i2c_pdata;
  128. /*
  129. * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
  130. * use, and functionality implementation flags, up to the OMAP I2C
  131. * driver via platform data
  132. */
  133. pdata->rev = oh->class->rev;
  134. dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
  135. pdata->flags = dev_attr->flags;
  136. pdev = omap_device_build(name, bus_id, oh, pdata,
  137. sizeof(struct omap_i2c_bus_platform_data),
  138. NULL, 0, 0);
  139. WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
  140. return PTR_RET(pdev);
  141. }