cx88-dvb.c 24 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h"
  36. # ifdef HAVE_VP3054_I2C
  37. # include "cx88-vp3054-i2c.h"
  38. # endif
  39. #endif
  40. #ifdef HAVE_ZL10353
  41. # include "zl10353.h"
  42. #endif
  43. #ifdef HAVE_CX22702
  44. # include "cx22702.h"
  45. #endif
  46. #ifdef HAVE_OR51132
  47. # include "or51132.h"
  48. #endif
  49. #ifdef HAVE_LGDT330X
  50. # include "lgdt330x.h"
  51. # include "lg_h06xf.h"
  52. #endif
  53. #ifdef HAVE_NXT200X
  54. # include "nxt200x.h"
  55. #endif
  56. #ifdef HAVE_CX24123
  57. # include "cx24123.h"
  58. #endif
  59. #include "isl6421.h"
  60. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  61. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  62. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  63. MODULE_LICENSE("GPL");
  64. static unsigned int debug = 0;
  65. module_param(debug, int, 0644);
  66. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  67. #define dprintk(level,fmt, arg...) if (debug >= level) \
  68. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  69. /* ------------------------------------------------------------------ */
  70. static int dvb_buf_setup(struct videobuf_queue *q,
  71. unsigned int *count, unsigned int *size)
  72. {
  73. struct cx8802_dev *dev = q->priv_data;
  74. dev->ts_packet_size = 188 * 4;
  75. dev->ts_packet_count = 32;
  76. *size = dev->ts_packet_size * dev->ts_packet_count;
  77. *count = 32;
  78. return 0;
  79. }
  80. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  81. enum v4l2_field field)
  82. {
  83. struct cx8802_dev *dev = q->priv_data;
  84. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  85. }
  86. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  87. {
  88. struct cx8802_dev *dev = q->priv_data;
  89. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  90. }
  91. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  92. {
  93. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  94. }
  95. static struct videobuf_queue_ops dvb_qops = {
  96. .buf_setup = dvb_buf_setup,
  97. .buf_prepare = dvb_buf_prepare,
  98. .buf_queue = dvb_buf_queue,
  99. .buf_release = dvb_buf_release,
  100. };
  101. /* ------------------------------------------------------------------ */
  102. #ifdef HAVE_MT352
  103. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  104. {
  105. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  106. static u8 reset [] = { RESET, 0x80 };
  107. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  108. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  109. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  110. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  111. mt352_write(fe, clock_config, sizeof(clock_config));
  112. udelay(200);
  113. mt352_write(fe, reset, sizeof(reset));
  114. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  115. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  116. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  117. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  118. return 0;
  119. }
  120. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  121. {
  122. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  123. static u8 reset [] = { RESET, 0x80 };
  124. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  125. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  126. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  127. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  128. mt352_write(fe, clock_config, sizeof(clock_config));
  129. udelay(200);
  130. mt352_write(fe, reset, sizeof(reset));
  131. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  132. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  133. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  134. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  135. return 0;
  136. }
  137. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  138. {
  139. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  140. static u8 reset [] = { 0x50, 0x80 };
  141. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  142. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  143. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  144. static u8 dntv_extra[] = { 0xB5, 0x7A };
  145. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  146. mt352_write(fe, clock_config, sizeof(clock_config));
  147. udelay(2000);
  148. mt352_write(fe, reset, sizeof(reset));
  149. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  150. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  151. udelay(2000);
  152. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  153. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  154. return 0;
  155. }
  156. static struct mt352_config dvico_fusionhdtv = {
  157. .demod_address = 0x0F,
  158. .demod_init = dvico_fusionhdtv_demod_init,
  159. };
  160. static struct mt352_config dntv_live_dvbt_config = {
  161. .demod_address = 0x0f,
  162. .demod_init = dntv_live_dvbt_demod_init,
  163. };
  164. static struct mt352_config dvico_fusionhdtv_dual = {
  165. .demod_address = 0x0F,
  166. .demod_init = dvico_dual_demod_init,
  167. };
  168. #ifdef HAVE_VP3054_I2C
  169. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  170. {
  171. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  172. static u8 reset [] = { 0x50, 0x80 };
  173. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  174. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  175. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  176. static u8 dntv_extra[] = { 0xB5, 0x7A };
  177. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  178. mt352_write(fe, clock_config, sizeof(clock_config));
  179. udelay(2000);
  180. mt352_write(fe, reset, sizeof(reset));
  181. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  182. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  183. udelay(2000);
  184. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  185. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  186. return 0;
  187. }
  188. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  189. {
  190. struct cx8802_dev *dev= fe->dvb->priv;
  191. /* this message is to set up ATC and ALC */
  192. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  193. struct i2c_msg msg =
  194. { .addr = dev->core->pll_addr, .flags = 0,
  195. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  196. int err;
  197. if (fe->ops.i2c_gate_ctrl)
  198. fe->ops.i2c_gate_ctrl(fe, 1);
  199. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  200. if (err < 0)
  201. return err;
  202. else
  203. return -EREMOTEIO;
  204. }
  205. return 0;
  206. }
  207. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  208. struct dvb_frontend_parameters* params)
  209. {
  210. struct cx8802_dev *dev= fe->dvb->priv;
  211. u8 buf[4];
  212. struct i2c_msg msg =
  213. { .addr = dev->core->pll_addr, .flags = 0,
  214. .buf = buf, .len = 4 };
  215. int err;
  216. /* Switch PLL to DVB mode */
  217. err = philips_fmd1216_pll_init(fe);
  218. if (err)
  219. return err;
  220. /* Tune PLL */
  221. dvb_pll_configure(dev->core->pll_desc, buf,
  222. params->frequency,
  223. params->u.ofdm.bandwidth);
  224. if (fe->ops.i2c_gate_ctrl)
  225. fe->ops.i2c_gate_ctrl(fe, 1);
  226. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  227. printk(KERN_WARNING "cx88-dvb: %s error "
  228. "(addr %02x <- %02x, err = %i)\n",
  229. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  230. if (err < 0)
  231. return err;
  232. else
  233. return -EREMOTEIO;
  234. }
  235. return 0;
  236. }
  237. static struct mt352_config dntv_live_dvbt_pro_config = {
  238. .demod_address = 0x0f,
  239. .no_tuner = 1,
  240. .demod_init = dntv_live_dvbt_pro_demod_init,
  241. };
  242. #endif
  243. #endif
  244. #ifdef HAVE_ZL10353
  245. static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
  246. struct dvb_frontend_parameters *params)
  247. {
  248. u8 pllbuf[4];
  249. struct cx8802_dev *dev= fe->dvb->priv;
  250. struct i2c_msg msg =
  251. { .addr = dev->core->pll_addr, .flags = 0,
  252. .buf = pllbuf, .len = 4 };
  253. int err;
  254. dvb_pll_configure(dev->core->pll_desc, pllbuf,
  255. params->frequency,
  256. params->u.ofdm.bandwidth);
  257. if (fe->ops.i2c_gate_ctrl)
  258. fe->ops.i2c_gate_ctrl(fe, 1);
  259. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  260. printk(KERN_WARNING "cx88-dvb: %s error "
  261. "(addr %02x <- %02x, err = %i)\n",
  262. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  263. if (err < 0)
  264. return err;
  265. else
  266. return -EREMOTEIO;
  267. }
  268. return 0;
  269. }
  270. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  271. .demod_address = 0x0F,
  272. .no_tuner = 1,
  273. };
  274. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  275. .demod_address = 0x0F,
  276. };
  277. #endif
  278. #ifdef HAVE_CX22702
  279. static struct cx22702_config connexant_refboard_config = {
  280. .demod_address = 0x43,
  281. .output_mode = CX22702_SERIAL_OUTPUT,
  282. };
  283. static struct cx22702_config hauppauge_novat_config = {
  284. .demod_address = 0x43,
  285. .output_mode = CX22702_SERIAL_OUTPUT,
  286. };
  287. static struct cx22702_config hauppauge_hvr1100_config = {
  288. .demod_address = 0x63,
  289. .output_mode = CX22702_SERIAL_OUTPUT,
  290. };
  291. #endif
  292. #ifdef HAVE_OR51132
  293. static int or51132_set_ts_param(struct dvb_frontend* fe,
  294. int is_punctured)
  295. {
  296. struct cx8802_dev *dev= fe->dvb->priv;
  297. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  298. return 0;
  299. }
  300. static struct or51132_config pchdtv_hd3000 = {
  301. .demod_address = 0x15,
  302. .set_ts_params = or51132_set_ts_param,
  303. };
  304. #endif
  305. #ifdef HAVE_LGDT330X
  306. static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
  307. struct dvb_frontend_parameters* params)
  308. {
  309. /* FIXME make this routine use the tuner-simple code.
  310. * It could probably be shared with a number of ATSC
  311. * frontends. Many share the same tuner with analog TV. */
  312. struct cx8802_dev *dev= fe->dvb->priv;
  313. struct cx88_core *core = dev->core;
  314. u8 buf[4];
  315. struct i2c_msg msg =
  316. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  317. int err;
  318. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  319. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  320. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  321. if (fe->ops.i2c_gate_ctrl)
  322. fe->ops.i2c_gate_ctrl(fe, 1);
  323. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  324. printk(KERN_WARNING "cx88-dvb: %s error "
  325. "(addr %02x <- %02x, err = %i)\n",
  326. __FUNCTION__, buf[0], buf[1], err);
  327. if (err < 0)
  328. return err;
  329. else
  330. return -EREMOTEIO;
  331. }
  332. return 0;
  333. }
  334. static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
  335. struct dvb_frontend_parameters* params)
  336. {
  337. struct cx8802_dev *dev= fe->dvb->priv;
  338. struct cx88_core *core = dev->core;
  339. /* Put the analog decoder in standby to keep it quiet */
  340. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  341. return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
  342. }
  343. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  344. {
  345. struct cx8802_dev *dev= fe->dvb->priv;
  346. struct cx88_core *core = dev->core;
  347. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  348. if (index == 0)
  349. cx_clear(MO_GP0_IO, 8);
  350. else
  351. cx_set(MO_GP0_IO, 8);
  352. return 0;
  353. }
  354. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  355. {
  356. struct cx8802_dev *dev= fe->dvb->priv;
  357. if (is_punctured)
  358. dev->ts_gen_cntrl |= 0x04;
  359. else
  360. dev->ts_gen_cntrl &= ~0x04;
  361. return 0;
  362. }
  363. static struct lgdt330x_config fusionhdtv_3_gold = {
  364. .demod_address = 0x0e,
  365. .demod_chip = LGDT3302,
  366. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  367. .set_ts_params = lgdt330x_set_ts_param,
  368. };
  369. static struct lgdt330x_config fusionhdtv_5_gold = {
  370. .demod_address = 0x0e,
  371. .demod_chip = LGDT3303,
  372. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  373. .set_ts_params = lgdt330x_set_ts_param,
  374. };
  375. static struct lgdt330x_config pchdtv_hd5500 = {
  376. .demod_address = 0x59,
  377. .demod_chip = LGDT3303,
  378. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  379. .set_ts_params = lgdt330x_set_ts_param,
  380. };
  381. #endif
  382. #ifdef HAVE_NXT200X
  383. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  384. int is_punctured)
  385. {
  386. struct cx8802_dev *dev= fe->dvb->priv;
  387. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  388. return 0;
  389. }
  390. static int nxt200x_set_pll_input(u8* buf, int input)
  391. {
  392. if (input)
  393. buf[3] |= 0x08;
  394. else
  395. buf[3] &= ~0x08;
  396. return 0;
  397. }
  398. static struct nxt200x_config ati_hdtvwonder = {
  399. .demod_address = 0x0a,
  400. .set_pll_input = nxt200x_set_pll_input,
  401. .set_ts_params = nxt200x_set_ts_param,
  402. };
  403. #endif
  404. #ifdef HAVE_CX24123
  405. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  406. int is_punctured)
  407. {
  408. struct cx8802_dev *dev= fe->dvb->priv;
  409. dev->ts_gen_cntrl = 0x2;
  410. return 0;
  411. }
  412. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
  413. {
  414. struct cx8802_dev *dev= fe->dvb->priv;
  415. struct cx88_core *core = dev->core;
  416. if (voltage == SEC_VOLTAGE_OFF) {
  417. cx_write(MO_GP0_IO, 0x000006fB);
  418. } else {
  419. cx_write(MO_GP0_IO, 0x000006f9);
  420. }
  421. if (core->prev_set_voltage)
  422. return core->prev_set_voltage(fe, voltage);
  423. return 0;
  424. }
  425. static struct cx24123_config hauppauge_novas_config = {
  426. .demod_address = 0x55,
  427. .set_ts_params = cx24123_set_ts_param,
  428. };
  429. static struct cx24123_config kworld_dvbs_100_config = {
  430. .demod_address = 0x15,
  431. .set_ts_params = cx24123_set_ts_param,
  432. };
  433. #endif
  434. static int dvb_register(struct cx8802_dev *dev)
  435. {
  436. /* init struct videobuf_dvb */
  437. dev->dvb.name = dev->core->name;
  438. dev->ts_gen_cntrl = 0x0c;
  439. /* init frontend */
  440. switch (dev->core->board) {
  441. #ifdef HAVE_CX22702
  442. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  443. dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
  444. &dev->core->i2c_adap);
  445. if (dev->dvb.frontend != NULL) {
  446. dvb_pll_attach(dev->dvb.frontend, 0x61,
  447. &dev->core->i2c_adap,
  448. &dvb_pll_thomson_dtt759x);
  449. }
  450. break;
  451. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  452. case CX88_BOARD_CONEXANT_DVB_T1:
  453. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  454. case CX88_BOARD_WINFAST_DTV1000:
  455. dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
  456. &dev->core->i2c_adap);
  457. if (dev->dvb.frontend != NULL) {
  458. dvb_pll_attach(dev->dvb.frontend, 0x60,
  459. &dev->core->i2c_adap,
  460. &dvb_pll_thomson_dtt7579);
  461. }
  462. break;
  463. case CX88_BOARD_WINFAST_DTV2000H:
  464. case CX88_BOARD_HAUPPAUGE_HVR1100:
  465. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  466. dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
  467. &dev->core->i2c_adap);
  468. if (dev->dvb.frontend != NULL) {
  469. dvb_pll_attach(dev->dvb.frontend, 0x61,
  470. &dev->core->i2c_adap,
  471. &dvb_pll_fmd1216me);
  472. }
  473. break;
  474. #endif
  475. #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
  476. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  477. #ifdef HAVE_MT352
  478. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  479. &dev->core->i2c_adap);
  480. if (dev->dvb.frontend != NULL) {
  481. dvb_pll_attach(dev->dvb.frontend, 0x60,
  482. &dev->core->i2c_adap,
  483. &dvb_pll_thomson_dtt7579);
  484. break;
  485. }
  486. #endif
  487. #ifdef HAVE_ZL10353
  488. /* ZL10353 replaces MT352 on later cards */
  489. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
  490. &dev->core->i2c_adap);
  491. if (dev->dvb.frontend != NULL) {
  492. dvb_pll_attach(dev->dvb.frontend, 0x60,
  493. &dev->core->i2c_adap,
  494. &dvb_pll_thomson_dtt7579);
  495. }
  496. #endif
  497. break;
  498. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  499. #ifdef HAVE_MT352
  500. /* The tin box says DEE1601, but it seems to be DTT7579
  501. * compatible, with a slightly different MT352 AGC gain. */
  502. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
  503. &dev->core->i2c_adap);
  504. if (dev->dvb.frontend != NULL) {
  505. dvb_pll_attach(dev->dvb.frontend, 0x61,
  506. &dev->core->i2c_adap,
  507. &dvb_pll_thomson_dtt7579);
  508. break;
  509. }
  510. #endif
  511. #ifdef HAVE_ZL10353
  512. /* ZL10353 replaces MT352 on later cards */
  513. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
  514. &dev->core->i2c_adap);
  515. if (dev->dvb.frontend != NULL) {
  516. dvb_pll_attach(dev->dvb.frontend, 0x61,
  517. &dev->core->i2c_adap,
  518. &dvb_pll_thomson_dtt7579);
  519. }
  520. #endif
  521. break;
  522. #endif /* HAVE_MT352 || HAVE_ZL10353 */
  523. #ifdef HAVE_MT352
  524. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  525. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  526. &dev->core->i2c_adap);
  527. if (dev->dvb.frontend != NULL) {
  528. dvb_pll_attach(dev->dvb.frontend, 0x61,
  529. &dev->core->i2c_adap,
  530. &dvb_pll_lg_z201);
  531. }
  532. break;
  533. case CX88_BOARD_KWORLD_DVB_T:
  534. case CX88_BOARD_DNTV_LIVE_DVB_T:
  535. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  536. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
  537. &dev->core->i2c_adap);
  538. if (dev->dvb.frontend != NULL) {
  539. dvb_pll_attach(dev->dvb.frontend, 0x61,
  540. &dev->core->i2c_adap,
  541. &dvb_pll_unknown_1);
  542. }
  543. break;
  544. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  545. #ifdef HAVE_VP3054_I2C
  546. dev->core->pll_addr = 0x61;
  547. dev->core->pll_desc = &dvb_pll_fmd1216me;
  548. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
  549. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  550. if (dev->dvb.frontend != NULL) {
  551. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  552. }
  553. #else
  554. printk("%s: built without vp3054 support\n", dev->core->name);
  555. #endif
  556. break;
  557. #endif
  558. #ifdef HAVE_ZL10353
  559. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  560. dev->core->pll_addr = 0x61;
  561. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  562. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
  563. &dev->core->i2c_adap);
  564. if (dev->dvb.frontend != NULL) {
  565. dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
  566. }
  567. break;
  568. #endif
  569. #ifdef HAVE_OR51132
  570. case CX88_BOARD_PCHDTV_HD3000:
  571. dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
  572. &dev->core->i2c_adap);
  573. if (dev->dvb.frontend != NULL) {
  574. dvb_pll_attach(dev->dvb.frontend, 0x61,
  575. &dev->core->i2c_adap,
  576. &dvb_pll_thomson_dtt761x);
  577. }
  578. break;
  579. #endif
  580. #ifdef HAVE_LGDT330X
  581. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  582. dev->ts_gen_cntrl = 0x08;
  583. {
  584. /* Do a hardware reset of chip before using it. */
  585. struct cx88_core *core = dev->core;
  586. cx_clear(MO_GP0_IO, 1);
  587. mdelay(100);
  588. cx_set(MO_GP0_IO, 1);
  589. mdelay(200);
  590. /* Select RF connector callback */
  591. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  592. dev->core->pll_addr = 0x61;
  593. dev->core->pll_desc = &dvb_pll_microtune_4042;
  594. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  595. &dev->core->i2c_adap);
  596. if (dev->dvb.frontend != NULL) {
  597. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  598. }
  599. }
  600. break;
  601. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  602. dev->ts_gen_cntrl = 0x08;
  603. {
  604. /* Do a hardware reset of chip before using it. */
  605. struct cx88_core *core = dev->core;
  606. cx_clear(MO_GP0_IO, 1);
  607. mdelay(100);
  608. cx_set(MO_GP0_IO, 9);
  609. mdelay(200);
  610. dev->core->pll_addr = 0x61;
  611. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  612. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  613. &dev->core->i2c_adap);
  614. if (dev->dvb.frontend != NULL) {
  615. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  616. }
  617. }
  618. break;
  619. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  620. dev->ts_gen_cntrl = 0x08;
  621. {
  622. /* Do a hardware reset of chip before using it. */
  623. struct cx88_core *core = dev->core;
  624. cx_clear(MO_GP0_IO, 1);
  625. mdelay(100);
  626. cx_set(MO_GP0_IO, 1);
  627. mdelay(200);
  628. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
  629. &dev->core->i2c_adap);
  630. if (dev->dvb.frontend != NULL) {
  631. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  632. }
  633. }
  634. break;
  635. case CX88_BOARD_PCHDTV_HD5500:
  636. dev->ts_gen_cntrl = 0x08;
  637. {
  638. /* Do a hardware reset of chip before using it. */
  639. struct cx88_core *core = dev->core;
  640. cx_clear(MO_GP0_IO, 1);
  641. mdelay(100);
  642. cx_set(MO_GP0_IO, 1);
  643. mdelay(200);
  644. dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
  645. &dev->core->i2c_adap);
  646. if (dev->dvb.frontend != NULL) {
  647. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  648. }
  649. }
  650. break;
  651. #endif
  652. #ifdef HAVE_NXT200X
  653. case CX88_BOARD_ATI_HDTVWONDER:
  654. dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
  655. &dev->core->i2c_adap);
  656. if (dev->dvb.frontend != NULL) {
  657. dvb_pll_attach(dev->dvb.frontend, 0x61,
  658. &dev->core->i2c_adap,
  659. &dvb_pll_tuv1236d);
  660. }
  661. break;
  662. #endif
  663. #ifdef HAVE_CX24123
  664. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  665. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  666. dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
  667. &dev->core->i2c_adap);
  668. if (dev->dvb.frontend) {
  669. isl6421_attach(dev->dvb.frontend, &dev->core->i2c_adap,
  670. 0x08, 0x00, 0x00);
  671. }
  672. break;
  673. case CX88_BOARD_KWORLD_DVBS_100:
  674. dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
  675. &dev->core->i2c_adap);
  676. if (dev->dvb.frontend) {
  677. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  678. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  679. }
  680. break;
  681. #endif
  682. default:
  683. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  684. dev->core->name);
  685. break;
  686. }
  687. if (NULL == dev->dvb.frontend) {
  688. printk("%s: frontend initialization failed\n",dev->core->name);
  689. return -1;
  690. }
  691. if (dev->core->pll_desc) {
  692. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  693. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  694. }
  695. /* Put the analog decoder in standby to keep it quiet */
  696. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  697. /* register everything */
  698. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  699. }
  700. /* ----------------------------------------------------------- */
  701. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  702. const struct pci_device_id *pci_id)
  703. {
  704. struct cx8802_dev *dev;
  705. struct cx88_core *core;
  706. int err;
  707. /* general setup */
  708. core = cx88_core_get(pci_dev);
  709. if (NULL == core)
  710. return -EINVAL;
  711. err = -ENODEV;
  712. if (!cx88_boards[core->board].dvb)
  713. goto fail_core;
  714. err = -ENOMEM;
  715. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  716. if (NULL == dev)
  717. goto fail_core;
  718. dev->pci = pci_dev;
  719. dev->core = core;
  720. err = cx8802_init_common(dev);
  721. if (0 != err)
  722. goto fail_free;
  723. #ifdef HAVE_VP3054_I2C
  724. err = vp3054_i2c_probe(dev);
  725. if (0 != err)
  726. goto fail_free;
  727. #endif
  728. /* dvb stuff */
  729. printk("%s/2: cx2388x based dvb card\n", core->name);
  730. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  731. dev->pci, &dev->slock,
  732. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  733. V4L2_FIELD_TOP,
  734. sizeof(struct cx88_buffer),
  735. dev);
  736. err = dvb_register(dev);
  737. if (0 != err)
  738. goto fail_fini;
  739. /* Maintain a reference to cx88-video can query the 8802 device. */
  740. core->dvbdev = dev;
  741. return 0;
  742. fail_fini:
  743. cx8802_fini_common(dev);
  744. fail_free:
  745. kfree(dev);
  746. fail_core:
  747. cx88_core_put(core,pci_dev);
  748. return err;
  749. }
  750. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  751. {
  752. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  753. /* Destroy any 8802 reference. */
  754. dev->core->dvbdev = NULL;
  755. /* dvb */
  756. videobuf_dvb_unregister(&dev->dvb);
  757. #ifdef HAVE_VP3054_I2C
  758. vp3054_i2c_remove(dev);
  759. #endif
  760. /* common */
  761. cx8802_fini_common(dev);
  762. cx88_core_put(dev->core,dev->pci);
  763. kfree(dev);
  764. }
  765. static struct pci_device_id cx8802_pci_tbl[] = {
  766. {
  767. .vendor = 0x14f1,
  768. .device = 0x8802,
  769. .subvendor = PCI_ANY_ID,
  770. .subdevice = PCI_ANY_ID,
  771. },{
  772. /* --- end of list --- */
  773. }
  774. };
  775. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  776. static struct pci_driver dvb_pci_driver = {
  777. .name = "cx88-dvb",
  778. .id_table = cx8802_pci_tbl,
  779. .probe = dvb_probe,
  780. .remove = __devexit_p(dvb_remove),
  781. .suspend = cx8802_suspend_common,
  782. .resume = cx8802_resume_common,
  783. };
  784. static int dvb_init(void)
  785. {
  786. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  787. (CX88_VERSION_CODE >> 16) & 0xff,
  788. (CX88_VERSION_CODE >> 8) & 0xff,
  789. CX88_VERSION_CODE & 0xff);
  790. #ifdef SNAPSHOT
  791. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  792. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  793. #endif
  794. return pci_register_driver(&dvb_pci_driver);
  795. }
  796. static void dvb_fini(void)
  797. {
  798. pci_unregister_driver(&dvb_pci_driver);
  799. }
  800. module_init(dvb_init);
  801. module_exit(dvb_fini);
  802. /*
  803. * Local variables:
  804. * c-basic-offset: 8
  805. * compile-command: "make DVB=1"
  806. * End:
  807. */