sscape.c 35 KB

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  1. /*
  2. * sound/oss/sscape.c
  3. *
  4. * Low level driver for Ensoniq SoundScape
  5. *
  6. *
  7. * Copyright (C) by Hannu Savolainen 1993-1997
  8. *
  9. * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
  10. * Version 2 (June 1991). See the "COPYING" file distributed with this software
  11. * for more info.
  12. *
  13. *
  14. * Thomas Sailer : ioctl code reworked (vmalloc/vfree removed)
  15. * Sergey Smitienko : ensoniq p'n'p support
  16. * Christoph Hellwig : adapted to module_init/module_exit
  17. * Bartlomiej Zolnierkiewicz : added __init to attach_sscape()
  18. * Chris Rankin : Specify that this module owns the coprocessor
  19. * Arnaldo C. de Melo : added missing restore_flags in sscape_pnp_upload_file
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include "sound_config.h"
  24. #include "sound_firmware.h"
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/signal.h>
  28. #include <linux/fcntl.h>
  29. #include <linux/ctype.h>
  30. #include <linux/stddef.h>
  31. #include <linux/kmod.h>
  32. #include <asm/dma.h>
  33. #include <asm/io.h>
  34. #include <linux/wait.h>
  35. #include <linux/slab.h>
  36. #include <linux/ioport.h>
  37. #include <linux/delay.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/mm.h>
  40. #include <linux/spinlock.h>
  41. #include "coproc.h"
  42. #include "ad1848.h"
  43. #include "mpu401.h"
  44. /*
  45. * I/O ports
  46. */
  47. #define MIDI_DATA 0
  48. #define MIDI_CTRL 1
  49. #define HOST_CTRL 2
  50. #define TX_READY 0x02
  51. #define RX_READY 0x01
  52. #define HOST_DATA 3
  53. #define ODIE_ADDR 4
  54. #define ODIE_DATA 5
  55. /*
  56. * Indirect registers
  57. */
  58. #define GA_INTSTAT_REG 0
  59. #define GA_INTENA_REG 1
  60. #define GA_DMAA_REG 2
  61. #define GA_DMAB_REG 3
  62. #define GA_INTCFG_REG 4
  63. #define GA_DMACFG_REG 5
  64. #define GA_CDCFG_REG 6
  65. #define GA_SMCFGA_REG 7
  66. #define GA_SMCFGB_REG 8
  67. #define GA_HMCTL_REG 9
  68. /*
  69. * DMA channel identifiers (A and B)
  70. */
  71. #define SSCAPE_DMA_A 0
  72. #define SSCAPE_DMA_B 1
  73. #define PORT(name) (devc->base+name)
  74. /*
  75. * Host commands recognized by the OBP microcode
  76. */
  77. #define CMD_GEN_HOST_ACK 0x80
  78. #define CMD_GEN_MPU_ACK 0x81
  79. #define CMD_GET_BOARD_TYPE 0x82
  80. #define CMD_SET_CONTROL 0x88 /* Old firmware only */
  81. #define CMD_GET_CONTROL 0x89 /* Old firmware only */
  82. #define CTL_MASTER_VOL 0
  83. #define CTL_MIC_MODE 2
  84. #define CTL_SYNTH_VOL 4
  85. #define CTL_WAVE_VOL 7
  86. #define CMD_SET_EXTMIDI 0x8a
  87. #define CMD_GET_EXTMIDI 0x8b
  88. #define CMD_SET_MT32 0x8c
  89. #define CMD_GET_MT32 0x8d
  90. #define CMD_ACK 0x80
  91. #define IC_ODIE 1
  92. #define IC_OPUS 2
  93. typedef struct sscape_info
  94. {
  95. int base, irq, dma;
  96. int codec, codec_irq; /* required to setup pnp cards*/
  97. int codec_type;
  98. int ic_type;
  99. char* raw_buf;
  100. unsigned long raw_buf_phys;
  101. int buffsize; /* -------------------------- */
  102. spinlock_t lock;
  103. int ok; /* Properly detected */
  104. int failed;
  105. int dma_allocated;
  106. int codec_audiodev;
  107. int opened;
  108. int *osp;
  109. int my_audiodev;
  110. } sscape_info;
  111. static struct sscape_info adev_info = {
  112. 0
  113. };
  114. static struct sscape_info *devc = &adev_info;
  115. static int sscape_mididev = -1;
  116. /* Some older cards have assigned interrupt bits differently than new ones */
  117. static char valid_interrupts_old[] = {
  118. 9, 7, 5, 15
  119. };
  120. static char valid_interrupts_new[] = {
  121. 9, 5, 7, 10
  122. };
  123. static char *valid_interrupts = valid_interrupts_new;
  124. /*
  125. * See the bottom of the driver. This can be set by spea =0/1.
  126. */
  127. #ifdef REVEAL_SPEA
  128. static char old_hardware = 1;
  129. #else
  130. static char old_hardware;
  131. #endif
  132. static void sleep(unsigned howlong)
  133. {
  134. current->state = TASK_INTERRUPTIBLE;
  135. schedule_timeout(howlong);
  136. }
  137. static unsigned char sscape_read(struct sscape_info *devc, int reg)
  138. {
  139. unsigned long flags;
  140. unsigned char val;
  141. spin_lock_irqsave(&devc->lock,flags);
  142. outb(reg, PORT(ODIE_ADDR));
  143. val = inb(PORT(ODIE_DATA));
  144. spin_unlock_irqrestore(&devc->lock,flags);
  145. return val;
  146. }
  147. static void __sscape_write(int reg, int data)
  148. {
  149. outb(reg, PORT(ODIE_ADDR));
  150. outb(data, PORT(ODIE_DATA));
  151. }
  152. static void sscape_write(struct sscape_info *devc, int reg, int data)
  153. {
  154. unsigned long flags;
  155. spin_lock_irqsave(&devc->lock,flags);
  156. __sscape_write(reg, data);
  157. spin_unlock_irqrestore(&devc->lock,flags);
  158. }
  159. static unsigned char sscape_pnp_read_codec(sscape_info* devc, unsigned char reg)
  160. {
  161. unsigned char res;
  162. unsigned long flags;
  163. spin_lock_irqsave(&devc->lock,flags);
  164. outb( reg, devc -> codec);
  165. res = inb (devc -> codec + 1);
  166. spin_unlock_irqrestore(&devc->lock,flags);
  167. return res;
  168. }
  169. static void sscape_pnp_write_codec(sscape_info* devc, unsigned char reg, unsigned char data)
  170. {
  171. unsigned long flags;
  172. spin_lock_irqsave(&devc->lock,flags);
  173. outb( reg, devc -> codec);
  174. outb( data, devc -> codec + 1);
  175. spin_unlock_irqrestore(&devc->lock,flags);
  176. }
  177. static void host_open(struct sscape_info *devc)
  178. {
  179. outb((0x00), PORT(HOST_CTRL)); /* Put the board to the host mode */
  180. }
  181. static void host_close(struct sscape_info *devc)
  182. {
  183. outb((0x03), PORT(HOST_CTRL)); /* Put the board to the MIDI mode */
  184. }
  185. static int host_write(struct sscape_info *devc, unsigned char *data, int count)
  186. {
  187. unsigned long flags;
  188. int i, timeout_val;
  189. spin_lock_irqsave(&devc->lock,flags);
  190. /*
  191. * Send the command and data bytes
  192. */
  193. for (i = 0; i < count; i++)
  194. {
  195. for (timeout_val = 10000; timeout_val > 0; timeout_val--)
  196. if (inb(PORT(HOST_CTRL)) & TX_READY)
  197. break;
  198. if (timeout_val <= 0)
  199. {
  200. spin_unlock_irqrestore(&devc->lock,flags);
  201. return 0;
  202. }
  203. outb(data[i], PORT(HOST_DATA));
  204. }
  205. spin_unlock_irqrestore(&devc->lock,flags);
  206. return 1;
  207. }
  208. static int host_read(struct sscape_info *devc)
  209. {
  210. unsigned long flags;
  211. int timeout_val;
  212. unsigned char data;
  213. spin_lock_irqsave(&devc->lock,flags);
  214. /*
  215. * Read a byte
  216. */
  217. for (timeout_val = 10000; timeout_val > 0; timeout_val--)
  218. if (inb(PORT(HOST_CTRL)) & RX_READY)
  219. break;
  220. if (timeout_val <= 0)
  221. {
  222. spin_unlock_irqrestore(&devc->lock,flags);
  223. return -1;
  224. }
  225. data = inb(PORT(HOST_DATA));
  226. spin_unlock_irqrestore(&devc->lock,flags);
  227. return data;
  228. }
  229. #if 0 /* unused */
  230. static int host_command1(struct sscape_info *devc, int cmd)
  231. {
  232. unsigned char buf[10];
  233. buf[0] = (unsigned char) (cmd & 0xff);
  234. return host_write(devc, buf, 1);
  235. }
  236. #endif /* unused */
  237. static int host_command2(struct sscape_info *devc, int cmd, int parm1)
  238. {
  239. unsigned char buf[10];
  240. buf[0] = (unsigned char) (cmd & 0xff);
  241. buf[1] = (unsigned char) (parm1 & 0xff);
  242. return host_write(devc, buf, 2);
  243. }
  244. static int host_command3(struct sscape_info *devc, int cmd, int parm1, int parm2)
  245. {
  246. unsigned char buf[10];
  247. buf[0] = (unsigned char) (cmd & 0xff);
  248. buf[1] = (unsigned char) (parm1 & 0xff);
  249. buf[2] = (unsigned char) (parm2 & 0xff);
  250. return host_write(devc, buf, 3);
  251. }
  252. static void set_mt32(struct sscape_info *devc, int value)
  253. {
  254. host_open(devc);
  255. host_command2(devc, CMD_SET_MT32, value ? 1 : 0);
  256. if (host_read(devc) != CMD_ACK)
  257. {
  258. /* printk( "SNDSCAPE: Setting MT32 mode failed\n"); */
  259. }
  260. host_close(devc);
  261. }
  262. static void set_control(struct sscape_info *devc, int ctrl, int value)
  263. {
  264. host_open(devc);
  265. host_command3(devc, CMD_SET_CONTROL, ctrl, value);
  266. if (host_read(devc) != CMD_ACK)
  267. {
  268. /* printk( "SNDSCAPE: Setting control (%d) failed\n", ctrl); */
  269. }
  270. host_close(devc);
  271. }
  272. static void do_dma(struct sscape_info *devc, int dma_chan, unsigned long buf, int blk_size, int mode)
  273. {
  274. unsigned char temp;
  275. if (dma_chan != SSCAPE_DMA_A)
  276. {
  277. printk(KERN_WARNING "soundscape: Tried to use DMA channel != A. Why?\n");
  278. return;
  279. }
  280. audio_devs[devc->codec_audiodev]->flags &= ~DMA_AUTOMODE;
  281. DMAbuf_start_dma(devc->codec_audiodev, buf, blk_size, mode);
  282. audio_devs[devc->codec_audiodev]->flags |= DMA_AUTOMODE;
  283. temp = devc->dma << 4; /* Setup DMA channel select bits */
  284. if (devc->dma <= 3)
  285. temp |= 0x80; /* 8 bit DMA channel */
  286. temp |= 1; /* Trigger DMA */
  287. sscape_write(devc, GA_DMAA_REG, temp);
  288. temp &= 0xfe; /* Clear DMA trigger */
  289. sscape_write(devc, GA_DMAA_REG, temp);
  290. }
  291. static int verify_mpu(struct sscape_info *devc)
  292. {
  293. /*
  294. * The SoundScape board could be in three modes (MPU, 8250 and host).
  295. * If the card is not in the MPU mode, enabling the MPU driver will
  296. * cause infinite loop (the driver believes that there is always some
  297. * received data in the buffer.
  298. *
  299. * Detect this by looking if there are more than 10 received MIDI bytes
  300. * (0x00) in the buffer.
  301. */
  302. int i;
  303. for (i = 0; i < 10; i++)
  304. {
  305. if (inb(devc->base + HOST_CTRL) & 0x80)
  306. return 1;
  307. if (inb(devc->base) != 0x00)
  308. return 1;
  309. }
  310. printk(KERN_WARNING "SoundScape: The device is not in the MPU-401 mode\n");
  311. return 0;
  312. }
  313. static int sscape_coproc_open(void *dev_info, int sub_device)
  314. {
  315. if (sub_device == COPR_MIDI)
  316. {
  317. set_mt32(devc, 0);
  318. if (!verify_mpu(devc))
  319. return -EIO;
  320. }
  321. return 0;
  322. }
  323. static void sscape_coproc_close(void *dev_info, int sub_device)
  324. {
  325. struct sscape_info *devc = dev_info;
  326. unsigned long flags;
  327. spin_lock_irqsave(&devc->lock,flags);
  328. if (devc->dma_allocated)
  329. {
  330. __sscape_write(GA_DMAA_REG, 0x20); /* DMA channel disabled */
  331. devc->dma_allocated = 0;
  332. }
  333. spin_unlock_irqrestore(&devc->lock,flags);
  334. return;
  335. }
  336. static void sscape_coproc_reset(void *dev_info)
  337. {
  338. }
  339. static int sscape_download_boot(struct sscape_info *devc, unsigned char *block, int size, int flag)
  340. {
  341. unsigned long flags;
  342. unsigned char temp;
  343. volatile int done, timeout_val;
  344. static unsigned char codec_dma_bits;
  345. if (flag & CPF_FIRST)
  346. {
  347. /*
  348. * First block. Have to allocate DMA and to reset the board
  349. * before continuing.
  350. */
  351. spin_lock_irqsave(&devc->lock,flags);
  352. codec_dma_bits = sscape_read(devc, GA_CDCFG_REG);
  353. if (devc->dma_allocated == 0)
  354. devc->dma_allocated = 1;
  355. spin_unlock_irqrestore(&devc->lock,flags);
  356. sscape_write(devc, GA_HMCTL_REG,
  357. (temp = sscape_read(devc, GA_HMCTL_REG)) & 0x3f); /*Reset */
  358. for (timeout_val = 10000; timeout_val > 0; timeout_val--)
  359. sscape_read(devc, GA_HMCTL_REG); /* Delay */
  360. /* Take board out of reset */
  361. sscape_write(devc, GA_HMCTL_REG,
  362. (temp = sscape_read(devc, GA_HMCTL_REG)) | 0x80);
  363. }
  364. /*
  365. * Transfer one code block using DMA
  366. */
  367. if (audio_devs[devc->codec_audiodev]->dmap_out->raw_buf == NULL)
  368. {
  369. printk(KERN_WARNING "soundscape: DMA buffer not available\n");
  370. return 0;
  371. }
  372. memcpy(audio_devs[devc->codec_audiodev]->dmap_out->raw_buf, block, size);
  373. spin_lock_irqsave(&devc->lock,flags);
  374. /******** INTERRUPTS DISABLED NOW ********/
  375. do_dma(devc, SSCAPE_DMA_A,
  376. audio_devs[devc->codec_audiodev]->dmap_out->raw_buf_phys,
  377. size, DMA_MODE_WRITE);
  378. /*
  379. * Wait until transfer completes.
  380. */
  381. done = 0;
  382. timeout_val = 30;
  383. while (!done && timeout_val-- > 0)
  384. {
  385. int resid;
  386. if (HZ / 50)
  387. sleep(HZ / 50);
  388. clear_dma_ff(devc->dma);
  389. if ((resid = get_dma_residue(devc->dma)) == 0)
  390. done = 1;
  391. }
  392. spin_unlock_irqrestore(&devc->lock,flags);
  393. if (!done)
  394. return 0;
  395. if (flag & CPF_LAST)
  396. {
  397. /*
  398. * Take the board out of reset
  399. */
  400. outb((0x00), PORT(HOST_CTRL));
  401. outb((0x00), PORT(MIDI_CTRL));
  402. temp = sscape_read(devc, GA_HMCTL_REG);
  403. temp |= 0x40;
  404. sscape_write(devc, GA_HMCTL_REG, temp); /* Kickstart the board */
  405. /*
  406. * Wait until the ODB wakes up
  407. */
  408. spin_lock_irqsave(&devc->lock,flags);
  409. done = 0;
  410. timeout_val = 5 * HZ;
  411. while (!done && timeout_val-- > 0)
  412. {
  413. unsigned char x;
  414. sleep(1);
  415. x = inb(PORT(HOST_DATA));
  416. if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */
  417. {
  418. DDB(printk("Soundscape: Acknowledge = %x\n", x));
  419. done = 1;
  420. }
  421. }
  422. sscape_write(devc, GA_CDCFG_REG, codec_dma_bits);
  423. spin_unlock_irqrestore(&devc->lock,flags);
  424. if (!done)
  425. {
  426. printk(KERN_ERR "soundscape: The OBP didn't respond after code download\n");
  427. return 0;
  428. }
  429. spin_lock_irqsave(&devc->lock,flags);
  430. done = 0;
  431. timeout_val = 5 * HZ;
  432. while (!done && timeout_val-- > 0)
  433. {
  434. sleep(1);
  435. if (inb(PORT(HOST_DATA)) == 0xfe) /* Host startup acknowledge */
  436. done = 1;
  437. }
  438. spin_unlock_irqrestore(&devc->lock,flags);
  439. if (!done)
  440. {
  441. printk(KERN_ERR "soundscape: OBP Initialization failed.\n");
  442. return 0;
  443. }
  444. printk(KERN_INFO "SoundScape board initialized OK\n");
  445. set_control(devc, CTL_MASTER_VOL, 100);
  446. set_control(devc, CTL_SYNTH_VOL, 100);
  447. #ifdef SSCAPE_DEBUG3
  448. /*
  449. * Temporary debugging aid. Print contents of the registers after
  450. * downloading the code.
  451. */
  452. {
  453. int i;
  454. for (i = 0; i < 13; i++)
  455. printk("I%d = %02x (new value)\n", i, sscape_read(devc, i));
  456. }
  457. #endif
  458. }
  459. return 1;
  460. }
  461. static int download_boot_block(void *dev_info, copr_buffer * buf)
  462. {
  463. if (buf->len <= 0 || buf->len > sizeof(buf->data))
  464. return -EINVAL;
  465. if (!sscape_download_boot(devc, buf->data, buf->len, buf->flags))
  466. {
  467. printk(KERN_ERR "soundscape: Unable to load microcode block to the OBP.\n");
  468. return -EIO;
  469. }
  470. return 0;
  471. }
  472. static int sscape_coproc_ioctl(void *dev_info, unsigned int cmd, void __user *arg, int local)
  473. {
  474. copr_buffer *buf;
  475. int err;
  476. switch (cmd)
  477. {
  478. case SNDCTL_COPR_RESET:
  479. sscape_coproc_reset(dev_info);
  480. return 0;
  481. case SNDCTL_COPR_LOAD:
  482. buf = (copr_buffer *) vmalloc(sizeof(copr_buffer));
  483. if (buf == NULL)
  484. return -ENOSPC;
  485. if (copy_from_user(buf, arg, sizeof(copr_buffer)))
  486. {
  487. vfree(buf);
  488. return -EFAULT;
  489. }
  490. err = download_boot_block(dev_info, buf);
  491. vfree(buf);
  492. return err;
  493. default:
  494. return -EINVAL;
  495. }
  496. }
  497. static coproc_operations sscape_coproc_operations =
  498. {
  499. "SoundScape M68K",
  500. THIS_MODULE,
  501. sscape_coproc_open,
  502. sscape_coproc_close,
  503. sscape_coproc_ioctl,
  504. sscape_coproc_reset,
  505. &adev_info
  506. };
  507. static struct resource *sscape_ports;
  508. static int sscape_is_pnp;
  509. static void __init attach_sscape(struct address_info *hw_config)
  510. {
  511. #ifndef SSCAPE_REGS
  512. /*
  513. * Config register values for Spea/V7 Media FX and Ensoniq S-2000.
  514. * These values are card
  515. * dependent. If you have another SoundScape based card, you have to
  516. * find the correct values. Do the following:
  517. * - Compile this driver with SSCAPE_DEBUG1 defined.
  518. * - Shut down and power off your machine.
  519. * - Boot with DOS so that the SSINIT.EXE program is run.
  520. * - Warm boot to {Linux|SYSV|BSD} and write down the lines displayed
  521. * when detecting the SoundScape.
  522. * - Modify the following list to use the values printed during boot.
  523. * Undefine the SSCAPE_DEBUG1
  524. */
  525. #define SSCAPE_REGS { \
  526. /* I0 */ 0x00, \
  527. /* I1 */ 0xf0, /* Note! Ignored. Set always to 0xf0 */ \
  528. /* I2 */ 0x20, /* Note! Ignored. Set always to 0x20 */ \
  529. /* I3 */ 0x20, /* Note! Ignored. Set always to 0x20 */ \
  530. /* I4 */ 0xf5, /* Ignored */ \
  531. /* I5 */ 0x10, \
  532. /* I6 */ 0x00, \
  533. /* I7 */ 0x2e, /* I7 MEM config A. Likely to vary between models */ \
  534. /* I8 */ 0x00, /* I8 MEM config B. Likely to vary between models */ \
  535. /* I9 */ 0x40 /* Ignored */ \
  536. }
  537. #endif
  538. unsigned long flags;
  539. static unsigned char regs[10] = SSCAPE_REGS;
  540. int i, irq_bits = 0xff;
  541. if (old_hardware)
  542. {
  543. valid_interrupts = valid_interrupts_old;
  544. conf_printf("Ensoniq SoundScape (old)", hw_config);
  545. }
  546. else
  547. conf_printf("Ensoniq SoundScape", hw_config);
  548. for (i = 0; i < 4; i++)
  549. {
  550. if (hw_config->irq == valid_interrupts[i])
  551. {
  552. irq_bits = i;
  553. break;
  554. }
  555. }
  556. if (hw_config->irq > 15 || (regs[4] = irq_bits == 0xff))
  557. {
  558. printk(KERN_ERR "Invalid IRQ%d\n", hw_config->irq);
  559. release_region(devc->base, 2);
  560. release_region(devc->base + 2, 6);
  561. if (sscape_is_pnp)
  562. release_region(devc->codec, 2);
  563. return;
  564. }
  565. if (!sscape_is_pnp) {
  566. spin_lock_irqsave(&devc->lock,flags);
  567. /* Host interrupt enable */
  568. sscape_write(devc, 1, 0xf0); /* All interrupts enabled */
  569. /* DMA A status/trigger register */
  570. sscape_write(devc, 2, 0x20); /* DMA channel disabled */
  571. /* DMA B status/trigger register */
  572. sscape_write(devc, 3, 0x20); /* DMA channel disabled */
  573. /* Host interrupt config reg */
  574. sscape_write(devc, 4, 0xf0 | (irq_bits << 2) | irq_bits);
  575. /* Don't destroy CD-ROM DMA config bits (0xc0) */
  576. sscape_write(devc, 5, (regs[5] & 0x3f) | (sscape_read(devc, 5) & 0xc0));
  577. /* CD-ROM config (WSS codec actually) */
  578. sscape_write(devc, 6, regs[6]);
  579. sscape_write(devc, 7, regs[7]);
  580. sscape_write(devc, 8, regs[8]);
  581. /* Master control reg. Don't modify CR-ROM bits. Disable SB emul */
  582. sscape_write(devc, 9, (sscape_read(devc, 9) & 0xf0) | 0x08);
  583. spin_unlock_irqrestore(&devc->lock,flags);
  584. }
  585. #ifdef SSCAPE_DEBUG2
  586. /*
  587. * Temporary debugging aid. Print contents of the registers after
  588. * changing them.
  589. */
  590. {
  591. int i;
  592. for (i = 0; i < 13; i++)
  593. printk("I%d = %02x (new value)\n", i, sscape_read(devc, i));
  594. }
  595. #endif
  596. if (probe_mpu401(hw_config, sscape_ports))
  597. hw_config->always_detect = 1;
  598. hw_config->name = "SoundScape";
  599. hw_config->irq *= -1; /* Negative value signals IRQ sharing */
  600. attach_mpu401(hw_config, THIS_MODULE);
  601. hw_config->irq *= -1; /* Restore it */
  602. if (hw_config->slots[1] != -1) /* The MPU driver installed itself */
  603. {
  604. sscape_mididev = hw_config->slots[1];
  605. midi_devs[hw_config->slots[1]]->coproc = &sscape_coproc_operations;
  606. }
  607. sscape_write(devc, GA_INTENA_REG, 0x80); /* Master IRQ enable */
  608. devc->ok = 1;
  609. devc->failed = 0;
  610. }
  611. static int detect_ga(sscape_info * devc)
  612. {
  613. unsigned char save;
  614. DDB(printk("Entered Soundscape detect_ga(%x)\n", devc->base));
  615. /*
  616. * First check that the address register of "ODIE" is
  617. * there and that it has exactly 4 writable bits.
  618. * First 4 bits
  619. */
  620. if ((save = inb(PORT(ODIE_ADDR))) & 0xf0)
  621. {
  622. DDB(printk("soundscape: Detect error A\n"));
  623. return 0;
  624. }
  625. outb((0x00), PORT(ODIE_ADDR));
  626. if (inb(PORT(ODIE_ADDR)) != 0x00)
  627. {
  628. DDB(printk("soundscape: Detect error B\n"));
  629. return 0;
  630. }
  631. outb((0xff), PORT(ODIE_ADDR));
  632. if (inb(PORT(ODIE_ADDR)) != 0x0f)
  633. {
  634. DDB(printk("soundscape: Detect error C\n"));
  635. return 0;
  636. }
  637. outb((save), PORT(ODIE_ADDR));
  638. /*
  639. * Now verify that some indirect registers return zero on some bits.
  640. * This may break the driver with some future revisions of "ODIE" but...
  641. */
  642. if (sscape_read(devc, 0) & 0x0c)
  643. {
  644. DDB(printk("soundscape: Detect error D (%x)\n", sscape_read(devc, 0)));
  645. return 0;
  646. }
  647. if (sscape_read(devc, 1) & 0x0f)
  648. {
  649. DDB(printk("soundscape: Detect error E\n"));
  650. return 0;
  651. }
  652. if (sscape_read(devc, 5) & 0x0f)
  653. {
  654. DDB(printk("soundscape: Detect error F\n"));
  655. return 0;
  656. }
  657. return 1;
  658. }
  659. static int sscape_read_host_ctrl(sscape_info* devc)
  660. {
  661. return host_read(devc);
  662. }
  663. static void sscape_write_host_ctrl2(sscape_info *devc, int a, int b)
  664. {
  665. host_command2(devc, a, b);
  666. }
  667. static int sscape_alloc_dma(sscape_info *devc)
  668. {
  669. char *start_addr, *end_addr;
  670. int dma_pagesize;
  671. int sz, size;
  672. struct page *page;
  673. if (devc->raw_buf != NULL) return 0; /* Already done */
  674. dma_pagesize = (devc->dma < 4) ? (64 * 1024) : (128 * 1024);
  675. devc->raw_buf = NULL;
  676. devc->buffsize = 8192*4;
  677. if (devc->buffsize > dma_pagesize) devc->buffsize = dma_pagesize;
  678. start_addr = NULL;
  679. /*
  680. * Now loop until we get a free buffer. Try to get smaller buffer if
  681. * it fails. Don't accept smaller than 8k buffer for performance
  682. * reasons.
  683. */
  684. while (start_addr == NULL && devc->buffsize > PAGE_SIZE) {
  685. for (sz = 0, size = PAGE_SIZE; size < devc->buffsize; sz++, size <<= 1);
  686. devc->buffsize = PAGE_SIZE * (1 << sz);
  687. start_addr = (char *) __get_free_pages(GFP_ATOMIC|GFP_DMA, sz);
  688. if (start_addr == NULL) devc->buffsize /= 2;
  689. }
  690. if (start_addr == NULL) {
  691. printk(KERN_ERR "sscape pnp init error: Couldn't allocate DMA buffer\n");
  692. return 0;
  693. } else {
  694. /* make some checks */
  695. end_addr = start_addr + devc->buffsize - 1;
  696. /* now check if it fits into the same dma-pagesize */
  697. if (((long) start_addr & ~(dma_pagesize - 1)) != ((long) end_addr & ~(dma_pagesize - 1))
  698. || end_addr >= (char *) (MAX_DMA_ADDRESS)) {
  699. printk(KERN_ERR "sscape pnp: Got invalid address 0x%lx for %db DMA-buffer\n", (long) start_addr, devc->buffsize);
  700. return 0;
  701. }
  702. }
  703. devc->raw_buf = start_addr;
  704. devc->raw_buf_phys = virt_to_bus(start_addr);
  705. for (page = virt_to_page(start_addr); page <= virt_to_page(end_addr); page++)
  706. SetPageReserved(page);
  707. return 1;
  708. }
  709. static void sscape_free_dma(sscape_info *devc)
  710. {
  711. int sz, size;
  712. unsigned long start_addr, end_addr;
  713. struct page *page;
  714. if (devc->raw_buf == NULL) return;
  715. for (sz = 0, size = PAGE_SIZE; size < devc->buffsize; sz++, size <<= 1);
  716. start_addr = (unsigned long) devc->raw_buf;
  717. end_addr = start_addr + devc->buffsize;
  718. for (page = virt_to_page(start_addr); page <= virt_to_page(end_addr); page++)
  719. ClearPageReserved(page);
  720. free_pages((unsigned long) devc->raw_buf, sz);
  721. devc->raw_buf = NULL;
  722. }
  723. /* Intel version !!!!!!!!! */
  724. static int sscape_start_dma(int chan, unsigned long physaddr, int count, int dma_mode)
  725. {
  726. unsigned long flags;
  727. flags = claim_dma_lock();
  728. disable_dma(chan);
  729. clear_dma_ff(chan);
  730. set_dma_mode(chan, dma_mode);
  731. set_dma_addr(chan, physaddr);
  732. set_dma_count(chan, count);
  733. enable_dma(chan);
  734. release_dma_lock(flags);
  735. return 0;
  736. }
  737. static void sscape_pnp_start_dma(sscape_info* devc, int arg )
  738. {
  739. int reg;
  740. if (arg == 0) reg = 2;
  741. else reg = 3;
  742. sscape_write(devc, reg, sscape_read( devc, reg) | 0x01);
  743. sscape_write(devc, reg, sscape_read( devc, reg) & 0xFE);
  744. }
  745. static int sscape_pnp_wait_dma (sscape_info* devc, int arg )
  746. {
  747. int reg;
  748. unsigned long i;
  749. unsigned char d;
  750. if (arg == 0) reg = 2;
  751. else reg = 3;
  752. sleep ( 1 );
  753. i = 0;
  754. do {
  755. d = sscape_read(devc, reg) & 1;
  756. if ( d == 1) break;
  757. i++;
  758. } while (i < 500000);
  759. d = sscape_read(devc, reg) & 1;
  760. return d;
  761. }
  762. static int sscape_pnp_alloc_dma(sscape_info* devc)
  763. {
  764. /* printk(KERN_INFO "sscape: requesting dma\n"); */
  765. if (request_dma(devc -> dma, "sscape")) return 0;
  766. /* printk(KERN_INFO "sscape: dma channel allocated\n"); */
  767. if (!sscape_alloc_dma(devc)) {
  768. free_dma(devc -> dma);
  769. return 0;
  770. };
  771. return 1;
  772. }
  773. static void sscape_pnp_free_dma(sscape_info* devc)
  774. {
  775. sscape_free_dma( devc);
  776. free_dma(devc -> dma );
  777. /* printk(KERN_INFO "sscape: dma released\n"); */
  778. }
  779. static int sscape_pnp_upload_file(sscape_info* devc, char* fn)
  780. {
  781. int done = 0;
  782. int timeout_val;
  783. char* data,*dt;
  784. int len,l;
  785. unsigned long flags;
  786. sscape_write( devc, 9, sscape_read(devc, 9 ) & 0x3F );
  787. sscape_write( devc, 2, (devc -> dma << 4) | 0x80 );
  788. sscape_write( devc, 3, 0x20 );
  789. sscape_write( devc, 9, sscape_read( devc, 9 ) | 0x80 );
  790. len = mod_firmware_load(fn, &data);
  791. if (len == 0) {
  792. printk(KERN_ERR "sscape: file not found: %s\n", fn);
  793. return 0;
  794. }
  795. dt = data;
  796. spin_lock_irqsave(&devc->lock,flags);
  797. while ( len > 0 ) {
  798. if (len > devc -> buffsize) l = devc->buffsize;
  799. else l = len;
  800. len -= l;
  801. memcpy(devc->raw_buf, dt, l); dt += l;
  802. sscape_start_dma(devc->dma, devc->raw_buf_phys, l, 0x48);
  803. sscape_pnp_start_dma ( devc, 0 );
  804. if (sscape_pnp_wait_dma ( devc, 0 ) == 0) {
  805. spin_unlock_irqrestore(&devc->lock,flags);
  806. return 0;
  807. }
  808. }
  809. spin_unlock_irqrestore(&devc->lock,flags);
  810. vfree(data);
  811. outb(0, devc -> base + 2);
  812. outb(0, devc -> base);
  813. sscape_write ( devc, 9, sscape_read( devc, 9 ) | 0x40);
  814. timeout_val = 5 * HZ;
  815. while (!done && timeout_val-- > 0)
  816. {
  817. unsigned char x;
  818. sleep(1);
  819. x = inb( devc -> base + 3);
  820. if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */
  821. {
  822. //printk(KERN_ERR "Soundscape: Acknowledge = %x\n", x);
  823. done = 1;
  824. }
  825. }
  826. timeout_val = 5 * HZ;
  827. done = 0;
  828. while (!done && timeout_val-- > 0)
  829. {
  830. unsigned char x;
  831. sleep(1);
  832. x = inb( devc -> base + 3);
  833. if (x == 0xfe) /* OBP startup acknowledge */
  834. {
  835. //printk(KERN_ERR "Soundscape: Acknowledge = %x\n", x);
  836. done = 1;
  837. }
  838. }
  839. if ( !done ) printk(KERN_ERR "soundscape: OBP Initialization failed.\n");
  840. sscape_write( devc, 2, devc->ic_type == IC_ODIE ? 0x70 : 0x40);
  841. sscape_write( devc, 3, (devc -> dma << 4) + 0x80);
  842. return 1;
  843. }
  844. static void __init sscape_pnp_init_hw(sscape_info* devc)
  845. {
  846. unsigned char midi_irq = 0, sb_irq = 0;
  847. unsigned i;
  848. static char code_file_name[23] = "/sndscape/sndscape.cox";
  849. int sscape_joystic_enable = 0x7f;
  850. int sscape_mic_enable = 0;
  851. int sscape_ext_midi = 0;
  852. if ( !sscape_pnp_alloc_dma(devc) ) {
  853. printk(KERN_ERR "sscape: faild to allocate dma\n");
  854. return;
  855. }
  856. for (i = 0; i < 4; i++) {
  857. if ( devc -> irq == valid_interrupts[i] )
  858. midi_irq = i;
  859. if ( devc -> codec_irq == valid_interrupts[i] )
  860. sb_irq = i;
  861. }
  862. sscape_write( devc, 5, 0x50);
  863. sscape_write( devc, 7, 0x2e);
  864. sscape_write( devc, 8, 0x00);
  865. sscape_write( devc, 2, devc->ic_type == IC_ODIE ? 0x70 : 0x40);
  866. sscape_write( devc, 3, ( devc -> dma << 4) | 0x80);
  867. sscape_write (devc, 4, 0xF0 | (midi_irq<<2) | midi_irq);
  868. i = 0x10; //sscape_read(devc, 9) & (devc->ic_type == IC_ODIE ? 0xf0 : 0xc0);
  869. if (sscape_joystic_enable) i |= 8;
  870. sscape_write (devc, 9, i);
  871. sscape_write (devc, 6, 0x80);
  872. sscape_write (devc, 1, 0x80);
  873. if (devc -> codec_type == 2) {
  874. sscape_pnp_write_codec( devc, 0x0C, 0x50);
  875. sscape_pnp_write_codec( devc, 0x10, sscape_pnp_read_codec( devc, 0x10) & 0x3F);
  876. sscape_pnp_write_codec( devc, 0x11, sscape_pnp_read_codec( devc, 0x11) | 0xC0);
  877. sscape_pnp_write_codec( devc, 29, 0x20);
  878. }
  879. if (sscape_pnp_upload_file(devc, "/sndscape/scope.cod") == 0 ) {
  880. printk(KERN_ERR "sscape: faild to upload file /sndscape/scope.cod\n");
  881. sscape_pnp_free_dma(devc);
  882. return;
  883. }
  884. i = sscape_read_host_ctrl( devc );
  885. if ( (i & 0x0F) > 7 ) {
  886. printk(KERN_ERR "sscape: scope.cod faild\n");
  887. sscape_pnp_free_dma(devc);
  888. return;
  889. }
  890. if ( i & 0x10 ) sscape_write( devc, 7, 0x2F);
  891. code_file_name[21] = (char) ( i & 0x0F) + 0x30;
  892. if (sscape_pnp_upload_file( devc, code_file_name) == 0) {
  893. printk(KERN_ERR "sscape: faild to upload file %s\n", code_file_name);
  894. sscape_pnp_free_dma(devc);
  895. return;
  896. }
  897. if (devc->ic_type != IC_ODIE) {
  898. sscape_pnp_write_codec( devc, 10, (sscape_pnp_read_codec(devc, 10) & 0x7f) |
  899. ( sscape_mic_enable == 0 ? 0x00 : 0x80) );
  900. }
  901. sscape_write_host_ctrl2( devc, 0x84, 0x64 ); /* MIDI volume */
  902. sscape_write_host_ctrl2( devc, 0x86, 0x64 ); /* MIDI volume?? */
  903. sscape_write_host_ctrl2( devc, 0x8A, sscape_ext_midi);
  904. sscape_pnp_write_codec ( devc, 6, 0x3f ); //WAV_VOL
  905. sscape_pnp_write_codec ( devc, 7, 0x3f ); //WAV_VOL
  906. sscape_pnp_write_codec ( devc, 2, 0x1F ); //WD_CDXVOLL
  907. sscape_pnp_write_codec ( devc, 3, 0x1F ); //WD_CDXVOLR
  908. if (devc -> codec_type == 1) {
  909. sscape_pnp_write_codec ( devc, 4, 0x1F );
  910. sscape_pnp_write_codec ( devc, 5, 0x1F );
  911. sscape_write_host_ctrl2( devc, 0x88, sscape_mic_enable);
  912. } else {
  913. int t;
  914. sscape_pnp_write_codec ( devc, 0x10, 0x1F << 1);
  915. sscape_pnp_write_codec ( devc, 0x11, 0xC0 | (0x1F << 1));
  916. t = sscape_pnp_read_codec( devc, 0x00) & 0xDF;
  917. if ( (sscape_mic_enable == 0)) t |= 0;
  918. else t |= 0x20;
  919. sscape_pnp_write_codec ( devc, 0x00, t);
  920. t = sscape_pnp_read_codec( devc, 0x01) & 0xDF;
  921. if ( (sscape_mic_enable == 0) ) t |= 0;
  922. else t |= 0x20;
  923. sscape_pnp_write_codec ( devc, 0x01, t);
  924. sscape_pnp_write_codec ( devc, 0x40 | 29 , 0x20);
  925. outb(0, devc -> codec);
  926. }
  927. if (devc -> ic_type == IC_OPUS ) {
  928. int i = sscape_read( devc, 9 );
  929. sscape_write( devc, 9, i | 3 );
  930. sscape_write( devc, 3, 0x40);
  931. if (request_region(0x228, 1, "sscape setup junk")) {
  932. outb(0, 0x228);
  933. release_region(0x228,1);
  934. }
  935. sscape_write( devc, 3, (devc -> dma << 4) | 0x80);
  936. sscape_write( devc, 9, i );
  937. }
  938. host_close ( devc );
  939. sscape_pnp_free_dma(devc);
  940. }
  941. static int __init detect_sscape_pnp(sscape_info* devc)
  942. {
  943. long i, irq_bits = 0xff;
  944. unsigned int d;
  945. DDB(printk("Entered detect_sscape_pnp(%x)\n", devc->base));
  946. if (!request_region(devc->codec, 2, "sscape codec")) {
  947. printk(KERN_ERR "detect_sscape_pnp: port %x is not free\n", devc->codec);
  948. return 0;
  949. }
  950. if ((inb(devc->base + 2) & 0x78) != 0)
  951. goto fail;
  952. d = inb ( devc -> base + 4) & 0xF0;
  953. if (d & 0x80)
  954. goto fail;
  955. if (d == 0) {
  956. devc->codec_type = 1;
  957. devc->ic_type = IC_ODIE;
  958. } else if ( (d & 0x60) != 0) {
  959. devc->codec_type = 2;
  960. devc->ic_type = IC_OPUS;
  961. } else if ( (d & 0x40) != 0) { /* WTF? */
  962. devc->codec_type = 2;
  963. devc->ic_type = IC_ODIE;
  964. } else
  965. goto fail;
  966. sscape_is_pnp = 1;
  967. outb(0xFA, devc -> base+4);
  968. if ((inb( devc -> base+4) & 0x9F) != 0x0A)
  969. goto fail;
  970. outb(0xFE, devc -> base+4);
  971. if ( (inb(devc -> base+4) & 0x9F) != 0x0E)
  972. goto fail;
  973. if ( (inb(devc -> base+5) & 0x9F) != 0x0E)
  974. goto fail;
  975. if (devc->codec_type == 2) {
  976. if (devc->codec != devc->base + 8) {
  977. printk("soundscape warning: incorrect codec port specified\n");
  978. goto fail;
  979. }
  980. d = 0x10 | (sscape_read(devc, 9) & 0xCF);
  981. sscape_write(devc, 9, d);
  982. sscape_write(devc, 6, 0x80);
  983. } else {
  984. //todo: check codec is not base + 8
  985. }
  986. d = (sscape_read(devc, 9) & 0x3F) | 0xC0;
  987. sscape_write(devc, 9, d);
  988. for (i = 0; i < 550000; i++)
  989. if ( !(inb(devc -> codec) & 0x80) ) break;
  990. d = inb(devc -> codec);
  991. if (d & 0x80)
  992. goto fail;
  993. if ( inb(devc -> codec + 2) == 0xFF)
  994. goto fail;
  995. sscape_write(devc, 9, sscape_read(devc, 9) & 0x3F );
  996. d = inb(devc -> codec) & 0x80;
  997. if ( d == 0) {
  998. printk(KERN_INFO "soundscape: hardware detected\n");
  999. valid_interrupts = valid_interrupts_new;
  1000. } else {
  1001. printk(KERN_INFO "soundscape: board looks like media fx\n");
  1002. valid_interrupts = valid_interrupts_old;
  1003. old_hardware = 1;
  1004. }
  1005. sscape_write( devc, 9, 0xC0 | (sscape_read(devc, 9) & 0x3F) );
  1006. for (i = 0; i < 550000; i++)
  1007. if ( !(inb(devc -> codec) & 0x80))
  1008. break;
  1009. sscape_pnp_init_hw(devc);
  1010. for (i = 0; i < 4; i++)
  1011. {
  1012. if (devc->codec_irq == valid_interrupts[i]) {
  1013. irq_bits = i;
  1014. break;
  1015. }
  1016. }
  1017. sscape_write(devc, GA_INTENA_REG, 0x00);
  1018. sscape_write(devc, GA_DMACFG_REG, 0x50);
  1019. sscape_write(devc, GA_DMAA_REG, 0x70);
  1020. sscape_write(devc, GA_DMAB_REG, 0x20);
  1021. sscape_write(devc, GA_INTCFG_REG, 0xf0);
  1022. sscape_write(devc, GA_CDCFG_REG, 0x89 | (devc->dma << 4) | (irq_bits << 1));
  1023. sscape_pnp_write_codec( devc, 0, sscape_pnp_read_codec( devc, 0) | 0x20);
  1024. sscape_pnp_write_codec( devc, 0, sscape_pnp_read_codec( devc, 1) | 0x20);
  1025. return 1;
  1026. fail:
  1027. release_region(devc->codec, 2);
  1028. return 0;
  1029. }
  1030. static int __init probe_sscape(struct address_info *hw_config)
  1031. {
  1032. devc->base = hw_config->io_base;
  1033. devc->irq = hw_config->irq;
  1034. devc->dma = hw_config->dma;
  1035. devc->osp = hw_config->osp;
  1036. #ifdef SSCAPE_DEBUG1
  1037. /*
  1038. * Temporary debugging aid. Print contents of the registers before
  1039. * changing them.
  1040. */
  1041. {
  1042. int i;
  1043. for (i = 0; i < 13; i++)
  1044. printk("I%d = %02x (old value)\n", i, sscape_read(devc, i));
  1045. }
  1046. #endif
  1047. devc->failed = 1;
  1048. sscape_ports = request_region(devc->base, 2, "mpu401");
  1049. if (!sscape_ports)
  1050. return 0;
  1051. if (!request_region(devc->base + 2, 6, "SoundScape")) {
  1052. release_region(devc->base, 2);
  1053. return 0;
  1054. }
  1055. if (!detect_ga(devc)) {
  1056. if (detect_sscape_pnp(devc))
  1057. return 1;
  1058. release_region(devc->base, 2);
  1059. release_region(devc->base + 2, 6);
  1060. return 0;
  1061. }
  1062. if (old_hardware) /* Check that it's really an old Spea/Reveal card. */
  1063. {
  1064. unsigned char tmp;
  1065. int cc;
  1066. if (!((tmp = sscape_read(devc, GA_HMCTL_REG)) & 0xc0))
  1067. {
  1068. sscape_write(devc, GA_HMCTL_REG, tmp | 0x80);
  1069. for (cc = 0; cc < 200000; ++cc)
  1070. inb(devc->base + ODIE_ADDR);
  1071. }
  1072. }
  1073. return 1;
  1074. }
  1075. static int __init init_ss_ms_sound(struct address_info *hw_config)
  1076. {
  1077. int i, irq_bits = 0xff;
  1078. int ad_flags = 0;
  1079. struct resource *ports;
  1080. if (devc->failed)
  1081. {
  1082. printk(KERN_ERR "soundscape: Card not detected\n");
  1083. return 0;
  1084. }
  1085. if (devc->ok == 0)
  1086. {
  1087. printk(KERN_ERR "soundscape: Invalid initialization order.\n");
  1088. return 0;
  1089. }
  1090. for (i = 0; i < 4; i++)
  1091. {
  1092. if (hw_config->irq == valid_interrupts[i])
  1093. {
  1094. irq_bits = i;
  1095. break;
  1096. }
  1097. }
  1098. if (irq_bits == 0xff) {
  1099. printk(KERN_ERR "soundscape: Invalid MSS IRQ%d\n", hw_config->irq);
  1100. return 0;
  1101. }
  1102. if (old_hardware)
  1103. ad_flags = 0x12345677; /* Tell that we may have a CS4248 chip (Spea-V7 Media FX) */
  1104. else if (sscape_is_pnp)
  1105. ad_flags = 0x87654321; /* Tell that we have a soundscape pnp with 1845 chip */
  1106. ports = request_region(hw_config->io_base, 4, "ad1848");
  1107. if (!ports) {
  1108. printk(KERN_ERR "soundscape: ports busy\n");
  1109. return 0;
  1110. }
  1111. if (!ad1848_detect(ports, &ad_flags, hw_config->osp)) {
  1112. release_region(hw_config->io_base, 4);
  1113. return 0;
  1114. }
  1115. if (!sscape_is_pnp) /*pnp is already setup*/
  1116. {
  1117. /*
  1118. * Setup the DMA polarity.
  1119. */
  1120. sscape_write(devc, GA_DMACFG_REG, 0x50);
  1121. /*
  1122. * Take the gate-array off of the DMA channel.
  1123. */
  1124. sscape_write(devc, GA_DMAB_REG, 0x20);
  1125. /*
  1126. * Init the AD1848 (CD-ROM) config reg.
  1127. */
  1128. sscape_write(devc, GA_CDCFG_REG, 0x89 | (hw_config->dma << 4) | (irq_bits << 1));
  1129. }
  1130. if (hw_config->irq == devc->irq)
  1131. printk(KERN_WARNING "soundscape: Warning! The WSS mode can't share IRQ with MIDI\n");
  1132. hw_config->slots[0] = ad1848_init(
  1133. sscape_is_pnp ? "SoundScape" : "SoundScape PNP",
  1134. ports,
  1135. hw_config->irq,
  1136. hw_config->dma,
  1137. hw_config->dma,
  1138. 0,
  1139. devc->osp,
  1140. THIS_MODULE);
  1141. if (hw_config->slots[0] != -1) /* The AD1848 driver installed itself */
  1142. {
  1143. audio_devs[hw_config->slots[0]]->coproc = &sscape_coproc_operations;
  1144. devc->codec_audiodev = hw_config->slots[0];
  1145. devc->my_audiodev = hw_config->slots[0];
  1146. /* Set proper routings here (what are they) */
  1147. AD1848_REROUTE(SOUND_MIXER_LINE1, SOUND_MIXER_LINE);
  1148. }
  1149. #ifdef SSCAPE_DEBUG5
  1150. /*
  1151. * Temporary debugging aid. Print contents of the registers
  1152. * after the AD1848 device has been initialized.
  1153. */
  1154. {
  1155. int i;
  1156. for (i = 0; i < 13; i++)
  1157. printk("I%d = %02x\n", i, sscape_read(devc, i));
  1158. }
  1159. #endif
  1160. return 1;
  1161. }
  1162. static void __exit unload_sscape(struct address_info *hw_config)
  1163. {
  1164. release_region(devc->base + 2, 6);
  1165. unload_mpu401(hw_config);
  1166. if (sscape_is_pnp)
  1167. release_region(devc->codec, 2);
  1168. }
  1169. static void __exit unload_ss_ms_sound(struct address_info *hw_config)
  1170. {
  1171. ad1848_unload(hw_config->io_base,
  1172. hw_config->irq,
  1173. devc->dma,
  1174. devc->dma,
  1175. 0);
  1176. sound_unload_audiodev(hw_config->slots[0]);
  1177. }
  1178. static struct address_info cfg;
  1179. static struct address_info cfg_mpu;
  1180. static int __initdata spea = -1;
  1181. static int mss = 0;
  1182. static int __initdata dma = -1;
  1183. static int __initdata irq = -1;
  1184. static int __initdata io = -1;
  1185. static int __initdata mpu_irq = -1;
  1186. static int __initdata mpu_io = -1;
  1187. module_param(dma, int, 0);
  1188. module_param(irq, int, 0);
  1189. module_param(io, int, 0);
  1190. module_param(spea, int, 0); /* spea=0/1 set the old_hardware */
  1191. module_param(mpu_irq, int, 0);
  1192. module_param(mpu_io, int, 0);
  1193. module_param(mss, int, 0);
  1194. static int __init init_sscape(void)
  1195. {
  1196. printk(KERN_INFO "Soundscape driver Copyright (C) by Hannu Savolainen 1993-1996\n");
  1197. cfg.irq = irq;
  1198. cfg.dma = dma;
  1199. cfg.io_base = io;
  1200. cfg_mpu.irq = mpu_irq;
  1201. cfg_mpu.io_base = mpu_io;
  1202. /* WEH - Try to get right dma channel */
  1203. cfg_mpu.dma = dma;
  1204. devc->codec = cfg.io_base;
  1205. devc->codec_irq = cfg.irq;
  1206. devc->codec_type = 0;
  1207. devc->ic_type = 0;
  1208. devc->raw_buf = NULL;
  1209. spin_lock_init(&devc->lock);
  1210. if (cfg.dma == -1 || cfg.irq == -1 || cfg.io_base == -1) {
  1211. printk(KERN_ERR "DMA, IRQ, and IO port must be specified.\n");
  1212. return -EINVAL;
  1213. }
  1214. if (cfg_mpu.irq == -1 && cfg_mpu.io_base != -1) {
  1215. printk(KERN_ERR "MPU_IRQ must be specified if MPU_IO is set.\n");
  1216. return -EINVAL;
  1217. }
  1218. if(spea != -1) {
  1219. old_hardware = spea;
  1220. printk(KERN_INFO "Forcing %s hardware support.\n",
  1221. spea?"new":"old");
  1222. }
  1223. if (probe_sscape(&cfg_mpu) == 0)
  1224. return -ENODEV;
  1225. attach_sscape(&cfg_mpu);
  1226. mss = init_ss_ms_sound(&cfg);
  1227. return 0;
  1228. }
  1229. static void __exit cleanup_sscape(void)
  1230. {
  1231. if (mss)
  1232. unload_ss_ms_sound(&cfg);
  1233. unload_sscape(&cfg_mpu);
  1234. }
  1235. module_init(init_sscape);
  1236. module_exit(cleanup_sscape);
  1237. #ifndef MODULE
  1238. static int __init setup_sscape(char *str)
  1239. {
  1240. /* io, irq, dma, mpu_io, mpu_irq */
  1241. int ints[6];
  1242. str = get_options(str, ARRAY_SIZE(ints), ints);
  1243. io = ints[1];
  1244. irq = ints[2];
  1245. dma = ints[3];
  1246. mpu_io = ints[4];
  1247. mpu_irq = ints[5];
  1248. return 1;
  1249. }
  1250. __setup("sscape=", setup_sscape);
  1251. #endif
  1252. MODULE_LICENSE("GPL");