swiotlb.c 25 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. * 08/12/11 beckyb Add highmem support
  18. */
  19. #include <linux/cache.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/module.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/pfn.h>
  27. #include <linux/types.h>
  28. #include <linux/ctype.h>
  29. #include <linux/highmem.h>
  30. #include <asm/io.h>
  31. #include <asm/dma.h>
  32. #include <asm/scatterlist.h>
  33. #include <linux/init.h>
  34. #include <linux/bootmem.h>
  35. #include <linux/iommu-helper.h>
  36. #define OFFSET(val,align) ((unsigned long) \
  37. ( (val) & ( (align) - 1)))
  38. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  39. /*
  40. * Minimum IO TLB size to bother booting with. Systems with mainly
  41. * 64bit capable cards will only lightly use the swiotlb. If we can't
  42. * allocate a contiguous 1MB, we're probably in trouble anyway.
  43. */
  44. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  45. /*
  46. * Enumeration for sync targets
  47. */
  48. enum dma_sync_target {
  49. SYNC_FOR_CPU = 0,
  50. SYNC_FOR_DEVICE = 1,
  51. };
  52. int swiotlb_force;
  53. /*
  54. * Used to do a quick range check in unmap_single and
  55. * sync_single_*, to see if the memory was in fact allocated by this
  56. * API.
  57. */
  58. static char *io_tlb_start, *io_tlb_end;
  59. /*
  60. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  61. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  62. */
  63. static unsigned long io_tlb_nslabs;
  64. /*
  65. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  66. */
  67. static unsigned long io_tlb_overflow = 32*1024;
  68. void *io_tlb_overflow_buffer;
  69. /*
  70. * This is a free list describing the number of free entries available from
  71. * each index
  72. */
  73. static unsigned int *io_tlb_list;
  74. static unsigned int io_tlb_index;
  75. /*
  76. * We need to save away the original address corresponding to a mapped entry
  77. * for the sync operations.
  78. */
  79. static phys_addr_t *io_tlb_orig_addr;
  80. /*
  81. * Protect the above data structures in the map and unmap calls
  82. */
  83. static DEFINE_SPINLOCK(io_tlb_lock);
  84. static int __init
  85. setup_io_tlb_npages(char *str)
  86. {
  87. if (isdigit(*str)) {
  88. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  89. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  90. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  91. }
  92. if (*str == ',')
  93. ++str;
  94. if (!strcmp(str, "force"))
  95. swiotlb_force = 1;
  96. return 1;
  97. }
  98. __setup("swiotlb=", setup_io_tlb_npages);
  99. /* make io_tlb_overflow tunable too? */
  100. void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
  101. {
  102. return alloc_bootmem_low_pages(size);
  103. }
  104. void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
  105. {
  106. return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
  107. }
  108. dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
  109. {
  110. return paddr;
  111. }
  112. phys_addr_t __weak swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr)
  113. {
  114. return baddr;
  115. }
  116. static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
  117. volatile void *address)
  118. {
  119. return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
  120. }
  121. void * __weak swiotlb_bus_to_virt(struct device *hwdev, dma_addr_t address)
  122. {
  123. return phys_to_virt(swiotlb_bus_to_phys(hwdev, address));
  124. }
  125. int __weak swiotlb_arch_address_needs_mapping(struct device *hwdev,
  126. dma_addr_t addr, size_t size)
  127. {
  128. return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
  129. }
  130. int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
  131. {
  132. return 0;
  133. }
  134. static void swiotlb_print_info(unsigned long bytes)
  135. {
  136. phys_addr_t pstart, pend;
  137. pstart = virt_to_phys(io_tlb_start);
  138. pend = virt_to_phys(io_tlb_end);
  139. printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
  140. bytes >> 20, io_tlb_start, io_tlb_end);
  141. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
  142. (unsigned long long)pstart,
  143. (unsigned long long)pend);
  144. }
  145. /*
  146. * Statically reserve bounce buffer space and initialize bounce buffer data
  147. * structures for the software IO TLB used to implement the DMA API.
  148. */
  149. void __init
  150. swiotlb_init_with_default_size(size_t default_size)
  151. {
  152. unsigned long i, bytes;
  153. if (!io_tlb_nslabs) {
  154. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  155. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  156. }
  157. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  158. /*
  159. * Get IO TLB memory from the low pages
  160. */
  161. io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
  162. if (!io_tlb_start)
  163. panic("Cannot allocate SWIOTLB buffer");
  164. io_tlb_end = io_tlb_start + bytes;
  165. /*
  166. * Allocate and initialize the free list array. This array is used
  167. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  168. * between io_tlb_start and io_tlb_end.
  169. */
  170. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  171. for (i = 0; i < io_tlb_nslabs; i++)
  172. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  173. io_tlb_index = 0;
  174. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
  175. /*
  176. * Get the overflow emergency buffer
  177. */
  178. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  179. if (!io_tlb_overflow_buffer)
  180. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  181. swiotlb_print_info(bytes);
  182. }
  183. void __init
  184. swiotlb_init(void)
  185. {
  186. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  187. }
  188. /*
  189. * Systems with larger DMA zones (those that don't support ISA) can
  190. * initialize the swiotlb later using the slab allocator if needed.
  191. * This should be just like above, but with some error catching.
  192. */
  193. int
  194. swiotlb_late_init_with_default_size(size_t default_size)
  195. {
  196. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  197. unsigned int order;
  198. if (!io_tlb_nslabs) {
  199. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  200. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  201. }
  202. /*
  203. * Get IO TLB memory from the low pages
  204. */
  205. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  206. io_tlb_nslabs = SLABS_PER_PAGE << order;
  207. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  208. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  209. io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
  210. if (io_tlb_start)
  211. break;
  212. order--;
  213. }
  214. if (!io_tlb_start)
  215. goto cleanup1;
  216. if (order != get_order(bytes)) {
  217. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  218. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  219. io_tlb_nslabs = SLABS_PER_PAGE << order;
  220. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  221. }
  222. io_tlb_end = io_tlb_start + bytes;
  223. memset(io_tlb_start, 0, bytes);
  224. /*
  225. * Allocate and initialize the free list array. This array is used
  226. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  227. * between io_tlb_start and io_tlb_end.
  228. */
  229. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  230. get_order(io_tlb_nslabs * sizeof(int)));
  231. if (!io_tlb_list)
  232. goto cleanup2;
  233. for (i = 0; i < io_tlb_nslabs; i++)
  234. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  235. io_tlb_index = 0;
  236. io_tlb_orig_addr = (phys_addr_t *)
  237. __get_free_pages(GFP_KERNEL,
  238. get_order(io_tlb_nslabs *
  239. sizeof(phys_addr_t)));
  240. if (!io_tlb_orig_addr)
  241. goto cleanup3;
  242. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
  243. /*
  244. * Get the overflow emergency buffer
  245. */
  246. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  247. get_order(io_tlb_overflow));
  248. if (!io_tlb_overflow_buffer)
  249. goto cleanup4;
  250. swiotlb_print_info(bytes);
  251. return 0;
  252. cleanup4:
  253. free_pages((unsigned long)io_tlb_orig_addr,
  254. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  255. io_tlb_orig_addr = NULL;
  256. cleanup3:
  257. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  258. sizeof(int)));
  259. io_tlb_list = NULL;
  260. cleanup2:
  261. io_tlb_end = NULL;
  262. free_pages((unsigned long)io_tlb_start, order);
  263. io_tlb_start = NULL;
  264. cleanup1:
  265. io_tlb_nslabs = req_nslabs;
  266. return -ENOMEM;
  267. }
  268. static inline int
  269. address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
  270. {
  271. return swiotlb_arch_address_needs_mapping(hwdev, addr, size);
  272. }
  273. static inline int range_needs_mapping(phys_addr_t paddr, size_t size)
  274. {
  275. return swiotlb_force || swiotlb_arch_range_needs_mapping(paddr, size);
  276. }
  277. static int is_swiotlb_buffer(char *addr)
  278. {
  279. return addr >= io_tlb_start && addr < io_tlb_end;
  280. }
  281. /*
  282. * Bounce: copy the swiotlb buffer back to the original dma location
  283. */
  284. static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
  285. enum dma_data_direction dir)
  286. {
  287. unsigned long pfn = PFN_DOWN(phys);
  288. if (PageHighMem(pfn_to_page(pfn))) {
  289. /* The buffer does not have a mapping. Map it in and copy */
  290. unsigned int offset = phys & ~PAGE_MASK;
  291. char *buffer;
  292. unsigned int sz = 0;
  293. unsigned long flags;
  294. while (size) {
  295. sz = min_t(size_t, PAGE_SIZE - offset, size);
  296. local_irq_save(flags);
  297. buffer = kmap_atomic(pfn_to_page(pfn),
  298. KM_BOUNCE_READ);
  299. if (dir == DMA_TO_DEVICE)
  300. memcpy(dma_addr, buffer + offset, sz);
  301. else
  302. memcpy(buffer + offset, dma_addr, sz);
  303. kunmap_atomic(buffer, KM_BOUNCE_READ);
  304. local_irq_restore(flags);
  305. size -= sz;
  306. pfn++;
  307. dma_addr += sz;
  308. offset = 0;
  309. }
  310. } else {
  311. if (dir == DMA_TO_DEVICE)
  312. memcpy(dma_addr, phys_to_virt(phys), size);
  313. else
  314. memcpy(phys_to_virt(phys), dma_addr, size);
  315. }
  316. }
  317. /*
  318. * Allocates bounce buffer and returns its kernel virtual address.
  319. */
  320. static void *
  321. map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
  322. {
  323. unsigned long flags;
  324. char *dma_addr;
  325. unsigned int nslots, stride, index, wrap;
  326. int i;
  327. unsigned long start_dma_addr;
  328. unsigned long mask;
  329. unsigned long offset_slots;
  330. unsigned long max_slots;
  331. mask = dma_get_seg_boundary(hwdev);
  332. start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
  333. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  334. /*
  335. * Carefully handle integer overflow which can occur when mask == ~0UL.
  336. */
  337. max_slots = mask + 1
  338. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  339. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  340. /*
  341. * For mappings greater than a page, we limit the stride (and
  342. * hence alignment) to a page size.
  343. */
  344. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  345. if (size > PAGE_SIZE)
  346. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  347. else
  348. stride = 1;
  349. BUG_ON(!nslots);
  350. /*
  351. * Find suitable number of IO TLB entries size that will fit this
  352. * request and allocate a buffer from that IO TLB pool.
  353. */
  354. spin_lock_irqsave(&io_tlb_lock, flags);
  355. index = ALIGN(io_tlb_index, stride);
  356. if (index >= io_tlb_nslabs)
  357. index = 0;
  358. wrap = index;
  359. do {
  360. while (iommu_is_span_boundary(index, nslots, offset_slots,
  361. max_slots)) {
  362. index += stride;
  363. if (index >= io_tlb_nslabs)
  364. index = 0;
  365. if (index == wrap)
  366. goto not_found;
  367. }
  368. /*
  369. * If we find a slot that indicates we have 'nslots' number of
  370. * contiguous buffers, we allocate the buffers from that slot
  371. * and mark the entries as '0' indicating unavailable.
  372. */
  373. if (io_tlb_list[index] >= nslots) {
  374. int count = 0;
  375. for (i = index; i < (int) (index + nslots); i++)
  376. io_tlb_list[i] = 0;
  377. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  378. io_tlb_list[i] = ++count;
  379. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  380. /*
  381. * Update the indices to avoid searching in the next
  382. * round.
  383. */
  384. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  385. ? (index + nslots) : 0);
  386. goto found;
  387. }
  388. index += stride;
  389. if (index >= io_tlb_nslabs)
  390. index = 0;
  391. } while (index != wrap);
  392. not_found:
  393. spin_unlock_irqrestore(&io_tlb_lock, flags);
  394. return NULL;
  395. found:
  396. spin_unlock_irqrestore(&io_tlb_lock, flags);
  397. /*
  398. * Save away the mapping from the original address to the DMA address.
  399. * This is needed when we sync the memory. Then we sync the buffer if
  400. * needed.
  401. */
  402. for (i = 0; i < nslots; i++)
  403. io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
  404. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  405. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  406. return dma_addr;
  407. }
  408. /*
  409. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  410. */
  411. static void
  412. do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  413. {
  414. unsigned long flags;
  415. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  416. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  417. phys_addr_t phys = io_tlb_orig_addr[index];
  418. /*
  419. * First, sync the memory before unmapping the entry
  420. */
  421. if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  422. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  423. /*
  424. * Return the buffer to the free list by setting the corresponding
  425. * entries to indicate the number of contigous entries available.
  426. * While returning the entries to the free list, we merge the entries
  427. * with slots below and above the pool being returned.
  428. */
  429. spin_lock_irqsave(&io_tlb_lock, flags);
  430. {
  431. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  432. io_tlb_list[index + nslots] : 0);
  433. /*
  434. * Step 1: return the slots to the free list, merging the
  435. * slots with superceeding slots
  436. */
  437. for (i = index + nslots - 1; i >= index; i--)
  438. io_tlb_list[i] = ++count;
  439. /*
  440. * Step 2: merge the returned slots with the preceding slots,
  441. * if available (non zero)
  442. */
  443. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  444. io_tlb_list[i] = ++count;
  445. }
  446. spin_unlock_irqrestore(&io_tlb_lock, flags);
  447. }
  448. static void
  449. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  450. int dir, int target)
  451. {
  452. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  453. phys_addr_t phys = io_tlb_orig_addr[index];
  454. phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  455. switch (target) {
  456. case SYNC_FOR_CPU:
  457. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  458. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  459. else
  460. BUG_ON(dir != DMA_TO_DEVICE);
  461. break;
  462. case SYNC_FOR_DEVICE:
  463. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  464. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  465. else
  466. BUG_ON(dir != DMA_FROM_DEVICE);
  467. break;
  468. default:
  469. BUG();
  470. }
  471. }
  472. void *
  473. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  474. dma_addr_t *dma_handle, gfp_t flags)
  475. {
  476. dma_addr_t dev_addr;
  477. void *ret;
  478. int order = get_order(size);
  479. u64 dma_mask = DMA_BIT_MASK(32);
  480. if (hwdev && hwdev->coherent_dma_mask)
  481. dma_mask = hwdev->coherent_dma_mask;
  482. ret = (void *)__get_free_pages(flags, order);
  483. if (ret &&
  484. !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
  485. size)) {
  486. /*
  487. * The allocated memory isn't reachable by the device.
  488. */
  489. free_pages((unsigned long) ret, order);
  490. ret = NULL;
  491. }
  492. if (!ret) {
  493. /*
  494. * We are either out of memory or the device can't DMA
  495. * to GFP_DMA memory; fall back on map_single(), which
  496. * will grab memory from the lowest available address range.
  497. */
  498. ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
  499. if (!ret)
  500. return NULL;
  501. }
  502. memset(ret, 0, size);
  503. dev_addr = swiotlb_virt_to_bus(hwdev, ret);
  504. /* Confirm address can be DMA'd by device */
  505. if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
  506. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  507. (unsigned long long)dma_mask,
  508. (unsigned long long)dev_addr);
  509. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  510. do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  511. return NULL;
  512. }
  513. *dma_handle = dev_addr;
  514. return ret;
  515. }
  516. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  517. void
  518. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  519. dma_addr_t dma_handle)
  520. {
  521. WARN_ON(irqs_disabled());
  522. if (!is_swiotlb_buffer(vaddr))
  523. free_pages((unsigned long) vaddr, get_order(size));
  524. else
  525. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  526. do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  527. }
  528. EXPORT_SYMBOL(swiotlb_free_coherent);
  529. static void
  530. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  531. {
  532. /*
  533. * Ran out of IOMMU space for this operation. This is very bad.
  534. * Unfortunately the drivers cannot handle this operation properly.
  535. * unless they check for dma_mapping_error (most don't)
  536. * When the mapping is small enough return a static buffer to limit
  537. * the damage, or panic when the transfer is too big.
  538. */
  539. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  540. "device %s\n", size, dev ? dev_name(dev) : "?");
  541. if (size > io_tlb_overflow && do_panic) {
  542. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  543. panic("DMA: Memory would be corrupted\n");
  544. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  545. panic("DMA: Random memory would be DMAed\n");
  546. }
  547. }
  548. /*
  549. * Map a single buffer of the indicated size for DMA in streaming mode. The
  550. * physical address to use is returned.
  551. *
  552. * Once the device is given the dma address, the device owns this memory until
  553. * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
  554. */
  555. dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
  556. unsigned long offset, size_t size,
  557. enum dma_data_direction dir,
  558. struct dma_attrs *attrs)
  559. {
  560. phys_addr_t phys = page_to_phys(page) + offset;
  561. dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys);
  562. void *map;
  563. BUG_ON(dir == DMA_NONE);
  564. /*
  565. * If the address happens to be in the device's DMA window,
  566. * we can safely return the device addr and not worry about bounce
  567. * buffering it.
  568. */
  569. if (!address_needs_mapping(dev, dev_addr, size) &&
  570. !range_needs_mapping(phys, size))
  571. return dev_addr;
  572. /*
  573. * Oh well, have to allocate and map a bounce buffer.
  574. */
  575. map = map_single(dev, phys, size, dir);
  576. if (!map) {
  577. swiotlb_full(dev, size, dir, 1);
  578. map = io_tlb_overflow_buffer;
  579. }
  580. dev_addr = swiotlb_virt_to_bus(dev, map);
  581. /*
  582. * Ensure that the address returned is DMA'ble
  583. */
  584. if (address_needs_mapping(dev, dev_addr, size))
  585. panic("map_single: bounce buffer is not DMA'ble");
  586. return dev_addr;
  587. }
  588. EXPORT_SYMBOL_GPL(swiotlb_map_page);
  589. /*
  590. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  591. * match what was provided for in a previous swiotlb_map_page call. All
  592. * other usages are undefined.
  593. *
  594. * After this call, reads by the cpu to the buffer are guaranteed to see
  595. * whatever the device wrote there.
  596. */
  597. static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
  598. size_t size, int dir)
  599. {
  600. char *dma_addr = swiotlb_bus_to_virt(hwdev, dev_addr);
  601. BUG_ON(dir == DMA_NONE);
  602. if (is_swiotlb_buffer(dma_addr)) {
  603. do_unmap_single(hwdev, dma_addr, size, dir);
  604. return;
  605. }
  606. if (dir != DMA_FROM_DEVICE)
  607. return;
  608. dma_mark_clean(dma_addr, size);
  609. }
  610. void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  611. size_t size, enum dma_data_direction dir,
  612. struct dma_attrs *attrs)
  613. {
  614. unmap_single(hwdev, dev_addr, size, dir);
  615. }
  616. EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
  617. /*
  618. * Make physical memory consistent for a single streaming mode DMA translation
  619. * after a transfer.
  620. *
  621. * If you perform a swiotlb_map_page() but wish to interrogate the buffer
  622. * using the cpu, yet do not wish to teardown the dma mapping, you must
  623. * call this function before doing so. At the next point you give the dma
  624. * address back to the card, you must first perform a
  625. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  626. */
  627. static void
  628. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  629. size_t size, int dir, int target)
  630. {
  631. char *dma_addr = swiotlb_bus_to_virt(hwdev, dev_addr);
  632. BUG_ON(dir == DMA_NONE);
  633. if (is_swiotlb_buffer(dma_addr)) {
  634. sync_single(hwdev, dma_addr, size, dir, target);
  635. return;
  636. }
  637. if (dir != DMA_FROM_DEVICE)
  638. return;
  639. dma_mark_clean(dma_addr, size);
  640. }
  641. void
  642. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  643. size_t size, enum dma_data_direction dir)
  644. {
  645. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  646. }
  647. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  648. void
  649. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  650. size_t size, enum dma_data_direction dir)
  651. {
  652. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  653. }
  654. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  655. /*
  656. * Same as above, but for a sub-range of the mapping.
  657. */
  658. static void
  659. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  660. unsigned long offset, size_t size,
  661. int dir, int target)
  662. {
  663. swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target);
  664. }
  665. void
  666. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  667. unsigned long offset, size_t size,
  668. enum dma_data_direction dir)
  669. {
  670. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  671. SYNC_FOR_CPU);
  672. }
  673. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  674. void
  675. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  676. unsigned long offset, size_t size,
  677. enum dma_data_direction dir)
  678. {
  679. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  680. SYNC_FOR_DEVICE);
  681. }
  682. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  683. /*
  684. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  685. * This is the scatter-gather version of the above swiotlb_map_page
  686. * interface. Here the scatter gather list elements are each tagged with the
  687. * appropriate dma address and length. They are obtained via
  688. * sg_dma_{address,length}(SG).
  689. *
  690. * NOTE: An implementation may be able to use a smaller number of
  691. * DMA address/length pairs than there are SG table elements.
  692. * (for example via virtual mapping capabilities)
  693. * The routine returns the number of addr/length pairs actually
  694. * used, at most nents.
  695. *
  696. * Device ownership issues as mentioned above for swiotlb_map_page are the
  697. * same here.
  698. */
  699. int
  700. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  701. enum dma_data_direction dir, struct dma_attrs *attrs)
  702. {
  703. struct scatterlist *sg;
  704. int i;
  705. BUG_ON(dir == DMA_NONE);
  706. for_each_sg(sgl, sg, nelems, i) {
  707. phys_addr_t paddr = sg_phys(sg);
  708. dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr);
  709. if (range_needs_mapping(paddr, sg->length) ||
  710. address_needs_mapping(hwdev, dev_addr, sg->length)) {
  711. void *map = map_single(hwdev, sg_phys(sg),
  712. sg->length, dir);
  713. if (!map) {
  714. /* Don't panic here, we expect map_sg users
  715. to do proper error handling. */
  716. swiotlb_full(hwdev, sg->length, dir, 0);
  717. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  718. attrs);
  719. sgl[0].dma_length = 0;
  720. return 0;
  721. }
  722. sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
  723. } else
  724. sg->dma_address = dev_addr;
  725. sg->dma_length = sg->length;
  726. }
  727. return nelems;
  728. }
  729. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  730. int
  731. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  732. int dir)
  733. {
  734. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  735. }
  736. EXPORT_SYMBOL(swiotlb_map_sg);
  737. /*
  738. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  739. * concerning calls here are the same as for swiotlb_unmap_page() above.
  740. */
  741. void
  742. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  743. int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
  744. {
  745. struct scatterlist *sg;
  746. int i;
  747. BUG_ON(dir == DMA_NONE);
  748. for_each_sg(sgl, sg, nelems, i)
  749. unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
  750. }
  751. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  752. void
  753. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  754. int dir)
  755. {
  756. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  757. }
  758. EXPORT_SYMBOL(swiotlb_unmap_sg);
  759. /*
  760. * Make physical memory consistent for a set of streaming mode DMA translations
  761. * after a transfer.
  762. *
  763. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  764. * and usage.
  765. */
  766. static void
  767. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  768. int nelems, int dir, int target)
  769. {
  770. struct scatterlist *sg;
  771. int i;
  772. for_each_sg(sgl, sg, nelems, i)
  773. swiotlb_sync_single(hwdev, sg->dma_address,
  774. sg->dma_length, dir, target);
  775. }
  776. void
  777. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  778. int nelems, enum dma_data_direction dir)
  779. {
  780. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  781. }
  782. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  783. void
  784. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  785. int nelems, enum dma_data_direction dir)
  786. {
  787. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  788. }
  789. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  790. int
  791. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  792. {
  793. return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
  794. }
  795. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  796. /*
  797. * Return whether the given device DMA address mask can be supported
  798. * properly. For example, if your device can only drive the low 24-bits
  799. * during bus mastering, then you would pass 0x00ffffff as the mask to
  800. * this function.
  801. */
  802. int
  803. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  804. {
  805. return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
  806. }
  807. EXPORT_SYMBOL(swiotlb_dma_supported);