drm.h 22 KB

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  1. /**
  2. * \file drm.h
  3. * Header for the Direct Rendering Manager
  4. *
  5. * \author Rickard E. (Rik) Faith <faith@valinux.com>
  6. *
  7. * \par Acknowledgments:
  8. * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
  9. */
  10. /*
  11. * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  12. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  13. * All rights reserved.
  14. *
  15. * Permission is hereby granted, free of charge, to any person obtaining a
  16. * copy of this software and associated documentation files (the "Software"),
  17. * to deal in the Software without restriction, including without limitation
  18. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  19. * and/or sell copies of the Software, and to permit persons to whom the
  20. * Software is furnished to do so, subject to the following conditions:
  21. *
  22. * The above copyright notice and this permission notice (including the next
  23. * paragraph) shall be included in all copies or substantial portions of the
  24. * Software.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  27. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  28. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  29. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  30. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  31. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  32. * OTHER DEALINGS IN THE SOFTWARE.
  33. */
  34. #ifndef _DRM_H_
  35. #define _DRM_H_
  36. #include <linux/types.h>
  37. #include <asm/ioctl.h> /* For _IO* macros */
  38. #define DRM_IOCTL_NR(n) _IOC_NR(n)
  39. #define DRM_IOC_VOID _IOC_NONE
  40. #define DRM_IOC_READ _IOC_READ
  41. #define DRM_IOC_WRITE _IOC_WRITE
  42. #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
  43. #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  44. #define DRM_MAJOR 226
  45. #define DRM_MAX_MINOR 15
  46. #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
  47. #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
  48. #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
  49. #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
  50. #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
  51. #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
  52. #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
  53. #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
  54. #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  55. typedef unsigned int drm_handle_t;
  56. typedef unsigned int drm_context_t;
  57. typedef unsigned int drm_drawable_t;
  58. typedef unsigned int drm_magic_t;
  59. /**
  60. * Cliprect.
  61. *
  62. * \warning: If you change this structure, make sure you change
  63. * XF86DRIClipRectRec in the server as well
  64. *
  65. * \note KW: Actually it's illegal to change either for
  66. * backwards-compatibility reasons.
  67. */
  68. struct drm_clip_rect {
  69. unsigned short x1;
  70. unsigned short y1;
  71. unsigned short x2;
  72. unsigned short y2;
  73. };
  74. /**
  75. * Drawable information.
  76. */
  77. struct drm_drawable_info {
  78. unsigned int num_rects;
  79. struct drm_clip_rect *rects;
  80. };
  81. /**
  82. * Texture region,
  83. */
  84. struct drm_tex_region {
  85. unsigned char next;
  86. unsigned char prev;
  87. unsigned char in_use;
  88. unsigned char padding;
  89. unsigned int age;
  90. };
  91. /**
  92. * Hardware lock.
  93. *
  94. * The lock structure is a simple cache-line aligned integer. To avoid
  95. * processor bus contention on a multiprocessor system, there should not be any
  96. * other data stored in the same cache line.
  97. */
  98. struct drm_hw_lock {
  99. __volatile__ unsigned int lock; /**< lock variable */
  100. char padding[60]; /**< Pad to cache line */
  101. };
  102. /**
  103. * DRM_IOCTL_VERSION ioctl argument type.
  104. *
  105. * \sa drmGetVersion().
  106. */
  107. struct drm_version {
  108. int version_major; /**< Major version */
  109. int version_minor; /**< Minor version */
  110. int version_patchlevel; /**< Patch level */
  111. size_t name_len; /**< Length of name buffer */
  112. char __user *name; /**< Name of driver */
  113. size_t date_len; /**< Length of date buffer */
  114. char __user *date; /**< User-space buffer to hold date */
  115. size_t desc_len; /**< Length of desc buffer */
  116. char __user *desc; /**< User-space buffer to hold desc */
  117. };
  118. /**
  119. * DRM_IOCTL_GET_UNIQUE ioctl argument type.
  120. *
  121. * \sa drmGetBusid() and drmSetBusId().
  122. */
  123. struct drm_unique {
  124. size_t unique_len; /**< Length of unique */
  125. char __user *unique; /**< Unique name for driver instantiation */
  126. };
  127. struct drm_list {
  128. int count; /**< Length of user-space structures */
  129. struct drm_version __user *version;
  130. };
  131. struct drm_block {
  132. int unused;
  133. };
  134. /**
  135. * DRM_IOCTL_CONTROL ioctl argument type.
  136. *
  137. * \sa drmCtlInstHandler() and drmCtlUninstHandler().
  138. */
  139. struct drm_control {
  140. enum {
  141. DRM_ADD_COMMAND,
  142. DRM_RM_COMMAND,
  143. DRM_INST_HANDLER,
  144. DRM_UNINST_HANDLER
  145. } func;
  146. int irq;
  147. };
  148. /**
  149. * Type of memory to map.
  150. */
  151. enum drm_map_type {
  152. _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
  153. _DRM_REGISTERS = 1, /**< no caching, no core dump */
  154. _DRM_SHM = 2, /**< shared, cached */
  155. _DRM_AGP = 3, /**< AGP/GART */
  156. _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
  157. _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
  158. _DRM_GEM = 6, /**< GEM object */
  159. };
  160. /**
  161. * Memory mapping flags.
  162. */
  163. enum drm_map_flags {
  164. _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
  165. _DRM_READ_ONLY = 0x02,
  166. _DRM_LOCKED = 0x04, /**< shared, cached, locked */
  167. _DRM_KERNEL = 0x08, /**< kernel requires access */
  168. _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
  169. _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
  170. _DRM_REMOVABLE = 0x40, /**< Removable mapping */
  171. _DRM_DRIVER = 0x80 /**< Managed by driver */
  172. };
  173. struct drm_ctx_priv_map {
  174. unsigned int ctx_id; /**< Context requesting private mapping */
  175. void *handle; /**< Handle of map */
  176. };
  177. /**
  178. * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
  179. * argument type.
  180. *
  181. * \sa drmAddMap().
  182. */
  183. struct drm_map {
  184. unsigned long offset; /**< Requested physical address (0 for SAREA)*/
  185. unsigned long size; /**< Requested physical size (bytes) */
  186. enum drm_map_type type; /**< Type of memory to map */
  187. enum drm_map_flags flags; /**< Flags */
  188. void *handle; /**< User-space: "Handle" to pass to mmap() */
  189. /**< Kernel-space: kernel-virtual address */
  190. int mtrr; /**< MTRR slot used */
  191. /* Private data */
  192. };
  193. /**
  194. * DRM_IOCTL_GET_CLIENT ioctl argument type.
  195. */
  196. struct drm_client {
  197. int idx; /**< Which client desired? */
  198. int auth; /**< Is client authenticated? */
  199. unsigned long pid; /**< Process ID */
  200. unsigned long uid; /**< User ID */
  201. unsigned long magic; /**< Magic */
  202. unsigned long iocs; /**< Ioctl count */
  203. };
  204. enum drm_stat_type {
  205. _DRM_STAT_LOCK,
  206. _DRM_STAT_OPENS,
  207. _DRM_STAT_CLOSES,
  208. _DRM_STAT_IOCTLS,
  209. _DRM_STAT_LOCKS,
  210. _DRM_STAT_UNLOCKS,
  211. _DRM_STAT_VALUE, /**< Generic value */
  212. _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
  213. _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
  214. _DRM_STAT_IRQ, /**< IRQ */
  215. _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
  216. _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
  217. _DRM_STAT_DMA, /**< DMA */
  218. _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
  219. _DRM_STAT_MISSED /**< Missed DMA opportunity */
  220. /* Add to the *END* of the list */
  221. };
  222. /**
  223. * DRM_IOCTL_GET_STATS ioctl argument type.
  224. */
  225. struct drm_stats {
  226. unsigned long count;
  227. struct {
  228. unsigned long value;
  229. enum drm_stat_type type;
  230. } data[15];
  231. };
  232. /**
  233. * Hardware locking flags.
  234. */
  235. enum drm_lock_flags {
  236. _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
  237. _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
  238. _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
  239. _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
  240. /* These *HALT* flags aren't supported yet
  241. -- they will be used to support the
  242. full-screen DGA-like mode. */
  243. _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
  244. _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
  245. };
  246. /**
  247. * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
  248. *
  249. * \sa drmGetLock() and drmUnlock().
  250. */
  251. struct drm_lock {
  252. int context;
  253. enum drm_lock_flags flags;
  254. };
  255. /**
  256. * DMA flags
  257. *
  258. * \warning
  259. * These values \e must match xf86drm.h.
  260. *
  261. * \sa drm_dma.
  262. */
  263. enum drm_dma_flags {
  264. /* Flags for DMA buffer dispatch */
  265. _DRM_DMA_BLOCK = 0x01, /**<
  266. * Block until buffer dispatched.
  267. *
  268. * \note The buffer may not yet have
  269. * been processed by the hardware --
  270. * getting a hardware lock with the
  271. * hardware quiescent will ensure
  272. * that the buffer has been
  273. * processed.
  274. */
  275. _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
  276. _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
  277. /* Flags for DMA buffer request */
  278. _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
  279. _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
  280. _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
  281. };
  282. /**
  283. * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
  284. *
  285. * \sa drmAddBufs().
  286. */
  287. struct drm_buf_desc {
  288. int count; /**< Number of buffers of this size */
  289. int size; /**< Size in bytes */
  290. int low_mark; /**< Low water mark */
  291. int high_mark; /**< High water mark */
  292. enum {
  293. _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
  294. _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
  295. _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
  296. _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
  297. _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
  298. } flags;
  299. unsigned long agp_start; /**<
  300. * Start address of where the AGP buffers are
  301. * in the AGP aperture
  302. */
  303. };
  304. /**
  305. * DRM_IOCTL_INFO_BUFS ioctl argument type.
  306. */
  307. struct drm_buf_info {
  308. int count; /**< Entries in list */
  309. struct drm_buf_desc __user *list;
  310. };
  311. /**
  312. * DRM_IOCTL_FREE_BUFS ioctl argument type.
  313. */
  314. struct drm_buf_free {
  315. int count;
  316. int __user *list;
  317. };
  318. /**
  319. * Buffer information
  320. *
  321. * \sa drm_buf_map.
  322. */
  323. struct drm_buf_pub {
  324. int idx; /**< Index into the master buffer list */
  325. int total; /**< Buffer size */
  326. int used; /**< Amount of buffer in use (for DMA) */
  327. void __user *address; /**< Address of buffer */
  328. };
  329. /**
  330. * DRM_IOCTL_MAP_BUFS ioctl argument type.
  331. */
  332. struct drm_buf_map {
  333. int count; /**< Length of the buffer list */
  334. void __user *virtual; /**< Mmap'd area in user-virtual */
  335. struct drm_buf_pub __user *list; /**< Buffer information */
  336. };
  337. /**
  338. * DRM_IOCTL_DMA ioctl argument type.
  339. *
  340. * Indices here refer to the offset into the buffer list in drm_buf_get.
  341. *
  342. * \sa drmDMA().
  343. */
  344. struct drm_dma {
  345. int context; /**< Context handle */
  346. int send_count; /**< Number of buffers to send */
  347. int __user *send_indices; /**< List of handles to buffers */
  348. int __user *send_sizes; /**< Lengths of data to send */
  349. enum drm_dma_flags flags; /**< Flags */
  350. int request_count; /**< Number of buffers requested */
  351. int request_size; /**< Desired size for buffers */
  352. int __user *request_indices; /**< Buffer information */
  353. int __user *request_sizes;
  354. int granted_count; /**< Number of buffers granted */
  355. };
  356. enum drm_ctx_flags {
  357. _DRM_CONTEXT_PRESERVED = 0x01,
  358. _DRM_CONTEXT_2DONLY = 0x02
  359. };
  360. /**
  361. * DRM_IOCTL_ADD_CTX ioctl argument type.
  362. *
  363. * \sa drmCreateContext() and drmDestroyContext().
  364. */
  365. struct drm_ctx {
  366. drm_context_t handle;
  367. enum drm_ctx_flags flags;
  368. };
  369. /**
  370. * DRM_IOCTL_RES_CTX ioctl argument type.
  371. */
  372. struct drm_ctx_res {
  373. int count;
  374. struct drm_ctx __user *contexts;
  375. };
  376. /**
  377. * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
  378. */
  379. struct drm_draw {
  380. drm_drawable_t handle;
  381. };
  382. /**
  383. * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
  384. */
  385. typedef enum {
  386. DRM_DRAWABLE_CLIPRECTS,
  387. } drm_drawable_info_type_t;
  388. struct drm_update_draw {
  389. drm_drawable_t handle;
  390. unsigned int type;
  391. unsigned int num;
  392. unsigned long long data;
  393. };
  394. /**
  395. * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
  396. */
  397. struct drm_auth {
  398. drm_magic_t magic;
  399. };
  400. /**
  401. * DRM_IOCTL_IRQ_BUSID ioctl argument type.
  402. *
  403. * \sa drmGetInterruptFromBusID().
  404. */
  405. struct drm_irq_busid {
  406. int irq; /**< IRQ number */
  407. int busnum; /**< bus number */
  408. int devnum; /**< device number */
  409. int funcnum; /**< function number */
  410. };
  411. enum drm_vblank_seq_type {
  412. _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
  413. _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
  414. _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
  415. _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
  416. _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
  417. _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
  418. };
  419. #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
  420. #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
  421. _DRM_VBLANK_NEXTONMISS)
  422. struct drm_wait_vblank_request {
  423. enum drm_vblank_seq_type type;
  424. unsigned int sequence;
  425. unsigned long signal;
  426. };
  427. struct drm_wait_vblank_reply {
  428. enum drm_vblank_seq_type type;
  429. unsigned int sequence;
  430. long tval_sec;
  431. long tval_usec;
  432. };
  433. /**
  434. * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
  435. *
  436. * \sa drmWaitVBlank().
  437. */
  438. union drm_wait_vblank {
  439. struct drm_wait_vblank_request request;
  440. struct drm_wait_vblank_reply reply;
  441. };
  442. #define _DRM_PRE_MODESET 1
  443. #define _DRM_POST_MODESET 2
  444. /**
  445. * DRM_IOCTL_MODESET_CTL ioctl argument type
  446. *
  447. * \sa drmModesetCtl().
  448. */
  449. struct drm_modeset_ctl {
  450. __u32 crtc;
  451. __u32 cmd;
  452. };
  453. /**
  454. * DRM_IOCTL_AGP_ENABLE ioctl argument type.
  455. *
  456. * \sa drmAgpEnable().
  457. */
  458. struct drm_agp_mode {
  459. unsigned long mode; /**< AGP mode */
  460. };
  461. /**
  462. * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
  463. *
  464. * \sa drmAgpAlloc() and drmAgpFree().
  465. */
  466. struct drm_agp_buffer {
  467. unsigned long size; /**< In bytes -- will round to page boundary */
  468. unsigned long handle; /**< Used for binding / unbinding */
  469. unsigned long type; /**< Type of memory to allocate */
  470. unsigned long physical; /**< Physical used by i810 */
  471. };
  472. /**
  473. * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
  474. *
  475. * \sa drmAgpBind() and drmAgpUnbind().
  476. */
  477. struct drm_agp_binding {
  478. unsigned long handle; /**< From drm_agp_buffer */
  479. unsigned long offset; /**< In bytes -- will round to page boundary */
  480. };
  481. /**
  482. * DRM_IOCTL_AGP_INFO ioctl argument type.
  483. *
  484. * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
  485. * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
  486. * drmAgpVendorId() and drmAgpDeviceId().
  487. */
  488. struct drm_agp_info {
  489. int agp_version_major;
  490. int agp_version_minor;
  491. unsigned long mode;
  492. unsigned long aperture_base; /* physical address */
  493. unsigned long aperture_size; /* bytes */
  494. unsigned long memory_allowed; /* bytes */
  495. unsigned long memory_used;
  496. /* PCI information */
  497. unsigned short id_vendor;
  498. unsigned short id_device;
  499. };
  500. /**
  501. * DRM_IOCTL_SG_ALLOC ioctl argument type.
  502. */
  503. struct drm_scatter_gather {
  504. unsigned long size; /**< In bytes -- will round to page boundary */
  505. unsigned long handle; /**< Used for mapping / unmapping */
  506. };
  507. /**
  508. * DRM_IOCTL_SET_VERSION ioctl argument type.
  509. */
  510. struct drm_set_version {
  511. int drm_di_major;
  512. int drm_di_minor;
  513. int drm_dd_major;
  514. int drm_dd_minor;
  515. };
  516. /** DRM_IOCTL_GEM_CLOSE ioctl argument type */
  517. struct drm_gem_close {
  518. /** Handle of the object to be closed. */
  519. __u32 handle;
  520. __u32 pad;
  521. };
  522. /** DRM_IOCTL_GEM_FLINK ioctl argument type */
  523. struct drm_gem_flink {
  524. /** Handle for the object being named */
  525. __u32 handle;
  526. /** Returned global name */
  527. __u32 name;
  528. };
  529. /** DRM_IOCTL_GEM_OPEN ioctl argument type */
  530. struct drm_gem_open {
  531. /** Name of object being opened */
  532. __u32 name;
  533. /** Returned handle for the object */
  534. __u32 handle;
  535. /** Returned size of the object */
  536. __u64 size;
  537. };
  538. #include "drm_mode.h"
  539. #define DRM_IOCTL_BASE 'd'
  540. #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
  541. #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
  542. #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
  543. #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
  544. #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
  545. #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
  546. #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
  547. #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
  548. #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
  549. #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
  550. #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
  551. #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
  552. #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
  553. #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
  554. #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
  555. #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
  556. #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
  557. #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
  558. #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
  559. #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
  560. #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
  561. #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
  562. #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
  563. #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
  564. #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
  565. #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
  566. #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
  567. #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
  568. #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
  569. #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
  570. #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
  571. #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
  572. #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
  573. #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
  574. #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
  575. #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
  576. #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
  577. #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
  578. #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
  579. #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
  580. #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
  581. #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
  582. #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
  583. #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
  584. #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
  585. #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
  586. #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
  587. #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
  588. #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
  589. #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
  590. #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
  591. #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
  592. #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
  593. #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
  594. #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
  595. #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
  596. #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
  597. #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
  598. #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
  599. #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
  600. #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
  601. #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
  602. #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
  603. #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
  604. #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
  605. #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
  606. #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
  607. #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
  608. #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
  609. #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
  610. #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
  611. #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
  612. #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
  613. /**
  614. * Device specific ioctls should only be in their respective headers
  615. * The device specific ioctl range is from 0x40 to 0x99.
  616. * Generic IOCTLS restart at 0xA0.
  617. *
  618. * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
  619. * drmCommandReadWrite().
  620. */
  621. #define DRM_COMMAND_BASE 0x40
  622. #define DRM_COMMAND_END 0xA0
  623. /* typedef area */
  624. #ifndef __KERNEL__
  625. typedef struct drm_clip_rect drm_clip_rect_t;
  626. typedef struct drm_drawable_info drm_drawable_info_t;
  627. typedef struct drm_tex_region drm_tex_region_t;
  628. typedef struct drm_hw_lock drm_hw_lock_t;
  629. typedef struct drm_version drm_version_t;
  630. typedef struct drm_unique drm_unique_t;
  631. typedef struct drm_list drm_list_t;
  632. typedef struct drm_block drm_block_t;
  633. typedef struct drm_control drm_control_t;
  634. typedef enum drm_map_type drm_map_type_t;
  635. typedef enum drm_map_flags drm_map_flags_t;
  636. typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
  637. typedef struct drm_map drm_map_t;
  638. typedef struct drm_client drm_client_t;
  639. typedef enum drm_stat_type drm_stat_type_t;
  640. typedef struct drm_stats drm_stats_t;
  641. typedef enum drm_lock_flags drm_lock_flags_t;
  642. typedef struct drm_lock drm_lock_t;
  643. typedef enum drm_dma_flags drm_dma_flags_t;
  644. typedef struct drm_buf_desc drm_buf_desc_t;
  645. typedef struct drm_buf_info drm_buf_info_t;
  646. typedef struct drm_buf_free drm_buf_free_t;
  647. typedef struct drm_buf_pub drm_buf_pub_t;
  648. typedef struct drm_buf_map drm_buf_map_t;
  649. typedef struct drm_dma drm_dma_t;
  650. typedef union drm_wait_vblank drm_wait_vblank_t;
  651. typedef struct drm_agp_mode drm_agp_mode_t;
  652. typedef enum drm_ctx_flags drm_ctx_flags_t;
  653. typedef struct drm_ctx drm_ctx_t;
  654. typedef struct drm_ctx_res drm_ctx_res_t;
  655. typedef struct drm_draw drm_draw_t;
  656. typedef struct drm_update_draw drm_update_draw_t;
  657. typedef struct drm_auth drm_auth_t;
  658. typedef struct drm_irq_busid drm_irq_busid_t;
  659. typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
  660. typedef struct drm_agp_buffer drm_agp_buffer_t;
  661. typedef struct drm_agp_binding drm_agp_binding_t;
  662. typedef struct drm_agp_info drm_agp_info_t;
  663. typedef struct drm_scatter_gather drm_scatter_gather_t;
  664. typedef struct drm_set_version drm_set_version_t;
  665. #endif
  666. #endif