mct_u232.h 19 KB

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  1. /*
  2. * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
  3. *
  4. * Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
  12. * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
  13. * Model No. U232-P9). See http://www.mct.com.tw/p_u232.html for further
  14. * information. The properties of this device are listed at the end of this
  15. * file. This device is available from various distributors. I know Hana,
  16. * http://www.hana.de and D-Link, http://www.dlink.com/products/usb/dsbs25.
  17. *
  18. * All of the information about the device was acquired by using SniffUSB
  19. * on Windows98. The technical details of the reverse engineering are
  20. * summarized at the end of this file.
  21. */
  22. #ifndef __LINUX_USB_SERIAL_MCT_U232_H
  23. #define __LINUX_USB_SERIAL_MCT_U232_H
  24. #define MCT_U232_VID 0x0711 /* Vendor Id */
  25. #define MCT_U232_PID 0x0210 /* Original MCT Product Id */
  26. /* U232-P25, Sitecom */
  27. #define MCT_U232_SITECOM_PID 0x0230 /* Sitecom Product Id */
  28. /* DU-H3SP USB BAY hub */
  29. #define MCT_U232_DU_H3SP_PID 0x0200 /* D-Link DU-H3SP USB BAY */
  30. /* Belkin badge the MCT U232-P9 as the F5U109 */
  31. #define MCT_U232_BELKIN_F5U109_VID 0x050d /* Vendor Id */
  32. #define MCT_U232_BELKIN_F5U109_PID 0x0109 /* Product Id */
  33. /*
  34. * Vendor Request Interface
  35. */
  36. #define MCT_U232_SET_REQUEST_TYPE 0x40
  37. #define MCT_U232_GET_REQUEST_TYPE 0xc0
  38. #define MCT_U232_GET_MODEM_STAT_REQUEST 2 /* Get Modem Status Register (MSR) */
  39. #define MCT_U232_GET_MODEM_STAT_SIZE 1
  40. #define MCT_U232_GET_LINE_CTRL_REQUEST 6 /* Get Line Control Register (LCR) */
  41. #define MCT_U232_GET_LINE_CTRL_SIZE 1 /* ... not used by this driver */
  42. #define MCT_U232_SET_BAUD_RATE_REQUEST 5 /* Set Baud Rate Divisor */
  43. #define MCT_U232_SET_BAUD_RATE_SIZE 4
  44. #define MCT_U232_SET_LINE_CTRL_REQUEST 7 /* Set Line Control Register (LCR) */
  45. #define MCT_U232_SET_LINE_CTRL_SIZE 1
  46. #define MCT_U232_SET_MODEM_CTRL_REQUEST 10 /* Set Modem Control Register (MCR) */
  47. #define MCT_U232_SET_MODEM_CTRL_SIZE 1
  48. /* This USB device request code is not well understood. It is transmitted by
  49. the MCT-supplied Windows driver whenever the baud rate changes.
  50. */
  51. #define MCT_U232_SET_UNKNOWN1_REQUEST 11 /* Unknown functionality */
  52. #define MCT_U232_SET_UNKNOWN1_SIZE 1
  53. /* This USB device request code appears to control whether CTS is required
  54. during transmission.
  55. Sending a zero byte allows data transmission to a device which is not
  56. asserting CTS. Sending a '1' byte will cause transmission to be deferred
  57. until the device asserts CTS.
  58. */
  59. #define MCT_U232_SET_CTS_REQUEST 12
  60. #define MCT_U232_SET_CTS_SIZE 1
  61. /*
  62. * Baud rate (divisor)
  63. * Actually, there are two of them, MCT website calls them "Philips solution"
  64. * and "Intel solution". They are the regular MCT and "Sitecom" for us.
  65. * This is pointless to document in the header, see the code for the bits.
  66. */
  67. static int mct_u232_calculate_baud_rate(struct usb_serial *serial, speed_t value, speed_t *result);
  68. /*
  69. * Line Control Register (LCR)
  70. */
  71. #define MCT_U232_SET_BREAK 0x40
  72. #define MCT_U232_PARITY_SPACE 0x38
  73. #define MCT_U232_PARITY_MARK 0x28
  74. #define MCT_U232_PARITY_EVEN 0x18
  75. #define MCT_U232_PARITY_ODD 0x08
  76. #define MCT_U232_PARITY_NONE 0x00
  77. #define MCT_U232_DATA_BITS_5 0x00
  78. #define MCT_U232_DATA_BITS_6 0x01
  79. #define MCT_U232_DATA_BITS_7 0x02
  80. #define MCT_U232_DATA_BITS_8 0x03
  81. #define MCT_U232_STOP_BITS_2 0x04
  82. #define MCT_U232_STOP_BITS_1 0x00
  83. /*
  84. * Modem Control Register (MCR)
  85. */
  86. #define MCT_U232_MCR_NONE 0x8 /* Deactivate DTR and RTS */
  87. #define MCT_U232_MCR_RTS 0xa /* Activate RTS */
  88. #define MCT_U232_MCR_DTR 0x9 /* Activate DTR */
  89. /*
  90. * Modem Status Register (MSR)
  91. */
  92. #define MCT_U232_MSR_INDEX 0x0 /* data[index] */
  93. #define MCT_U232_MSR_CD 0x80 /* Current CD */
  94. #define MCT_U232_MSR_RI 0x40 /* Current RI */
  95. #define MCT_U232_MSR_DSR 0x20 /* Current DSR */
  96. #define MCT_U232_MSR_CTS 0x10 /* Current CTS */
  97. #define MCT_U232_MSR_DCD 0x08 /* Delta CD */
  98. #define MCT_U232_MSR_DRI 0x04 /* Delta RI */
  99. #define MCT_U232_MSR_DDSR 0x02 /* Delta DSR */
  100. #define MCT_U232_MSR_DCTS 0x01 /* Delta CTS */
  101. /*
  102. * Line Status Register (LSR)
  103. */
  104. #define MCT_U232_LSR_INDEX 1 /* data[index] */
  105. #define MCT_U232_LSR_ERR 0x80 /* OE | PE | FE | BI */
  106. #define MCT_U232_LSR_TEMT 0x40 /* transmit register empty */
  107. #define MCT_U232_LSR_THRE 0x20 /* transmit holding register empty */
  108. #define MCT_U232_LSR_BI 0x10 /* break indicator */
  109. #define MCT_U232_LSR_FE 0x08 /* framing error */
  110. #define MCT_U232_LSR_OE 0x02 /* overrun error */
  111. #define MCT_U232_LSR_PE 0x04 /* parity error */
  112. #define MCT_U232_LSR_OE 0x02 /* overrun error */
  113. #define MCT_U232_LSR_DR 0x01 /* receive data ready */
  114. /* -----------------------------------------------------------------------------
  115. * Technical Specification reverse engineered with SniffUSB on Windows98
  116. * =====================================================================
  117. *
  118. * The technical details of the device have been acquired be using "SniffUSB"
  119. * and the vendor-supplied device driver (version 2.3A) under Windows98. To
  120. * identify the USB vendor-specific requests and to assign them to terminal
  121. * settings (flow control, baud rate, etc.) the program "SerialSettings" from
  122. * William G. Greathouse has been proven to be very useful. I also used the
  123. * Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
  124. * observations are summarized below:
  125. *
  126. * The USB requests seem to be directly mapped to the registers of a 8250,
  127. * 16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
  128. * devices") contains a comprehensive description of UARTs and its registers.
  129. * The bit descriptions are actually taken from there.
  130. *
  131. *
  132. * Baud rate (divisor)
  133. * -------------------
  134. *
  135. * BmRequestType: 0x40 (0100 0000B)
  136. * bRequest: 0x05
  137. * wValue: 0x0000
  138. * wIndex: 0x0000
  139. * wLength: 0x0004
  140. * Data: divisor = 115200 / baud_rate
  141. *
  142. * SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
  143. * shown above, observations with a Belkin F5U109 adapter, using the
  144. * MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
  145. * Win98/Me"), show this request has a length of 1 byte, presumably because
  146. * of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
  147. * use a baud-rate code instead of a conventional RS-232 baud rate divisor.
  148. * The current source code for this driver does not reflect this fact, but
  149. * the driver works fine with this adapter/driver combination nonetheless.
  150. *
  151. *
  152. * Line Control Register (LCR)
  153. * ---------------------------
  154. *
  155. * BmRequestType: 0x40 (0100 0000B) 0xc0 (1100 0000B)
  156. * bRequest: 0x07 0x06
  157. * wValue: 0x0000
  158. * wIndex: 0x0000
  159. * wLength: 0x0001
  160. * Data: LCR (see below)
  161. *
  162. * Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
  163. * transmit/receive register (THR/RBR) and the Interrupt Enable Register
  164. * (IER) is disabled. Any access to these ports is now redirected to the
  165. * Divisor Latch Registers. Setting this bit, loading the Divisor
  166. * Registers, and clearing DLAB should be done with interrupts disabled.
  167. * Bit 6: Set Break. When set to "1", the transmitter begins to transmit
  168. * continuous Spacing until this bit is set to "0". This overrides any
  169. * bits of characters that are being transmitted.
  170. * Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
  171. * to always be "1" or "0", based on the value of Bit 4.
  172. * Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
  173. * setting this bit causes even parity to be transmitted and expected.
  174. * Otherwise, odd parity is used.
  175. * Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
  176. * between the last bit of the data and the Stop Bit. The UART will also
  177. * expect parity to be present in the received data.
  178. * Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
  179. * 1.5 Stop Bits are transmitted and expected in each data word. For
  180. * 6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
  181. * When this bit is set to "0", one Stop Bit is used on each data word.
  182. * Bit 1: Word Length Select Bit #1 (WLSB1)
  183. * Bit 0: Word Length Select Bit #0 (WLSB0)
  184. * Together these bits specify the number of bits in each data word.
  185. * 1 0 Word Length
  186. * 0 0 5 Data Bits
  187. * 0 1 6 Data Bits
  188. * 1 0 7 Data Bits
  189. * 1 1 8 Data Bits
  190. *
  191. * SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
  192. * in the Win98 driver: the break does not work (bit 6 is not asserted) and the
  193. * stick parity bit is not cleared when set once. The LCR can also be read
  194. * back with USB request 6 but this has never been observed with SniffUSB.
  195. *
  196. *
  197. * Modem Control Register (MCR)
  198. * ----------------------------
  199. *
  200. * BmRequestType: 0x40 (0100 0000B)
  201. * bRequest: 0x0a
  202. * wValue: 0x0000
  203. * wIndex: 0x0000
  204. * wLength: 0x0001
  205. * Data: MCR (Bit 4..7, see below)
  206. *
  207. * Bit 7: Reserved, always 0.
  208. * Bit 6: Reserved, always 0.
  209. * Bit 5: Reserved, always 0.
  210. * Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
  211. * are internally connected together to allow diagnostic operations. In
  212. * addition, the UART modem control outputs are connected to the UART
  213. * modem control inputs. CTS is connected to RTS, DTR is connected to
  214. * DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
  215. * Bit 3: OUT 2. An auxiliary output that the host processor may set high or
  216. * low. In the IBM PC serial adapter (and most clones), OUT 2 is used
  217. * to tri-state (disable) the interrupt signal from the
  218. * 8250/16450/16550 UART.
  219. * Bit 2: OUT 1. An auxiliary output that the host processor may set high or
  220. * low. This output is not used on the IBM PC serial adapter.
  221. * Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
  222. * line is Low (Active).
  223. * Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
  224. * -DTR line is Low (Active).
  225. *
  226. * SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
  227. * seen _always_ set.
  228. *
  229. *
  230. * Modem Status Register (MSR)
  231. * ---------------------------
  232. *
  233. * BmRequestType: 0xc0 (1100 0000B)
  234. * bRequest: 0x02
  235. * wValue: 0x0000
  236. * wIndex: 0x0000
  237. * wLength: 0x0001
  238. * Data: MSR (see below)
  239. *
  240. * Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
  241. * UART.
  242. * Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
  243. * Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
  244. * Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
  245. * Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
  246. * changed state one more more times since the last time the MSR was
  247. * read by the host.
  248. * Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
  249. * had a low to high transition since the last time the MSR was read by
  250. * the host.
  251. * Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
  252. * state one more more times since the last time the MSR was read by the
  253. * host.
  254. * Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
  255. * state one more times since the last time the MSR was read by the
  256. * host.
  257. *
  258. * SniffUSB observations: the MSR is also returned as first byte on the
  259. * interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
  260. * request to read MSR cannot be applied during normal device operation.
  261. *
  262. *
  263. * Line Status Register (LSR)
  264. * --------------------------
  265. *
  266. * Bit 7 Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
  267. * This bit is set to "1" when any of the bytes in the FIFO have one or
  268. * more of the following error conditions: PE, FE, or BI.
  269. * Bit 6 Transmitter Empty (TEMT). When set to "1", there are no words
  270. * remaining in the transmit FIFO or the transmit shift register. The
  271. * transmitter is completely idle.
  272. * Bit 5 Transmitter Holding Register Empty (THRE). When set to "1", the FIFO
  273. * (or holding register) now has room for at least one additional word
  274. * to transmit. The transmitter may still be transmitting when this bit
  275. * is set to "1".
  276. * Bit 4 Break Interrupt (BI). The receiver has detected a Break signal.
  277. * Bit 3 Framing Error (FE). A Start Bit was detected but the Stop Bit did not
  278. * appear at the expected time. The received word is probably garbled.
  279. * Bit 2 Parity Error (PE). The parity bit was incorrect for the word received.
  280. * Bit 1 Overrun Error (OE). A new word was received and there was no room in
  281. * the receive buffer. The newly-arrived word in the shift register is
  282. * discarded. On 8250/16450 UARTs, the word in the holding register is
  283. * discarded and the newly- arrived word is put in the holding register.
  284. * Bit 0 Data Ready (DR). One or more words are in the receive FIFO that the
  285. * host may read. A word must be completely received and moved from the
  286. * shift register into the FIFO (or holding register for 8250/16450
  287. * designs) before this bit is set.
  288. *
  289. * SniffUSB observations: the LSR is returned as second byte on the interrupt-in
  290. * endpoint 0x83 to signal error conditions. Such errors have been seen with
  291. * minicom/zmodem transfers (CRC errors).
  292. *
  293. *
  294. * Unknown #1
  295. * -------------------
  296. *
  297. * BmRequestType: 0x40 (0100 0000B)
  298. * bRequest: 0x0b
  299. * wValue: 0x0000
  300. * wIndex: 0x0000
  301. * wLength: 0x0001
  302. * Data: 0x00
  303. *
  304. * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
  305. * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
  306. * occurs immediately after a "Baud rate (divisor)" message. It was not
  307. * observed at any other time. It is unclear what purpose this message
  308. * serves.
  309. *
  310. *
  311. * Unknown #2
  312. * -------------------
  313. *
  314. * BmRequestType: 0x40 (0100 0000B)
  315. * bRequest: 0x0c
  316. * wValue: 0x0000
  317. * wIndex: 0x0000
  318. * wLength: 0x0001
  319. * Data: 0x00
  320. *
  321. * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
  322. * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
  323. * occurs immediately after the 'Unknown #1' message (see above). It was
  324. * not observed at any other time. It is unclear what other purpose (if
  325. * any) this message might serve, but without it, the USB/RS-232 adapter
  326. * will not write to RS-232 devices which do not assert the 'CTS' signal.
  327. *
  328. *
  329. * Flow control
  330. * ------------
  331. *
  332. * SniffUSB observations: no flow control specific requests have been realized
  333. * apart from DTR/RTS settings. Both signals are dropped for no flow control
  334. * but asserted for hardware or software flow control.
  335. *
  336. *
  337. * Endpoint usage
  338. * --------------
  339. *
  340. * SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
  341. * 0x81 is used to transmit and receive characters. The second interrupt-in
  342. * endpoint 0x83 signals exceptional conditions like modem line changes and
  343. * errors. The first byte returned is the MSR and the second byte the LSR.
  344. *
  345. *
  346. * Other observations
  347. * ------------------
  348. *
  349. * Queued bulk transfers like used in visor.c did not work.
  350. *
  351. *
  352. * Properties of the USB device used (as found in /var/log/messages)
  353. * -----------------------------------------------------------------
  354. *
  355. * Manufacturer: MCT Corporation.
  356. * Product: USB-232 Interfact Controller
  357. * SerialNumber: U2S22050
  358. *
  359. * Length = 18
  360. * DescriptorType = 01
  361. * USB version = 1.00
  362. * Vendor:Product = 0711:0210
  363. * MaxPacketSize0 = 8
  364. * NumConfigurations = 1
  365. * Device version = 1.02
  366. * Device Class:SubClass:Protocol = 00:00:00
  367. * Per-interface classes
  368. * Configuration:
  369. * bLength = 9
  370. * bDescriptorType = 02
  371. * wTotalLength = 0027
  372. * bNumInterfaces = 01
  373. * bConfigurationValue = 01
  374. * iConfiguration = 00
  375. * bmAttributes = c0
  376. * MaxPower = 100mA
  377. *
  378. * Interface: 0
  379. * Alternate Setting: 0
  380. * bLength = 9
  381. * bDescriptorType = 04
  382. * bInterfaceNumber = 00
  383. * bAlternateSetting = 00
  384. * bNumEndpoints = 03
  385. * bInterface Class:SubClass:Protocol = 00:00:00
  386. * iInterface = 00
  387. * Endpoint:
  388. * bLength = 7
  389. * bDescriptorType = 05
  390. * bEndpointAddress = 81 (in)
  391. * bmAttributes = 03 (Interrupt)
  392. * wMaxPacketSize = 0040
  393. * bInterval = 02
  394. * Endpoint:
  395. * bLength = 7
  396. * bDescriptorType = 05
  397. * bEndpointAddress = 01 (out)
  398. * bmAttributes = 02 (Bulk)
  399. * wMaxPacketSize = 0040
  400. * bInterval = 00
  401. * Endpoint:
  402. * bLength = 7
  403. * bDescriptorType = 05
  404. * bEndpointAddress = 83 (in)
  405. * bmAttributes = 03 (Interrupt)
  406. * wMaxPacketSize = 0002
  407. * bInterval = 02
  408. *
  409. *
  410. * Hardware details (added by Martin Hamilton, 2001/12/06)
  411. * -----------------------------------------------------------------
  412. *
  413. * This info was gleaned from opening a Belkin F5U109 DB9 USB serial
  414. * adaptor, which turns out to simply be a re-badged U232-P9. We
  415. * know this because there is a sticky label on the circuit board
  416. * which says "U232-P9" ;-)
  417. *
  418. * The circuit board inside the adaptor contains a Philips PDIUSBD12
  419. * USB endpoint chip and a Philips P87C52UBAA microcontroller with
  420. * embedded UART. Exhaustive documentation for these is available at:
  421. *
  422. * http://www.semiconductors.philips.com/pip/p87c52ubaa
  423. * http://www.semiconductors.philips.com/pip/pdiusbd12
  424. *
  425. * Thanks to Julian Highfield for the pointer to the Philips database.
  426. *
  427. */
  428. #endif /* __LINUX_USB_SERIAL_MCT_U232_H */