ohci-pci.c 12 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * [ Initialisation is based on Linus' ]
  8. * [ uhci code and gregs ohci fragments ]
  9. * [ (C) Copyright 1999 Linus Torvalds ]
  10. * [ (C) Copyright 1999 Gregory P. Smith]
  11. *
  12. * PCI Bus Glue
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #ifndef CONFIG_PCI
  17. #error "This file is PCI bus glue. CONFIG_PCI must be defined."
  18. #endif
  19. #include <linux/pci.h>
  20. #include <linux/io.h>
  21. /* constants used to work around PM-related transfer
  22. * glitches in some AMD 700 series southbridges
  23. */
  24. #define AB_REG_BAR 0xf0
  25. #define AB_INDX(addr) ((addr) + 0x00)
  26. #define AB_DATA(addr) ((addr) + 0x04)
  27. #define AX_INDXC 0X30
  28. #define AX_DATAC 0x34
  29. #define NB_PCIE_INDX_ADDR 0xe0
  30. #define NB_PCIE_INDX_DATA 0xe4
  31. #define PCIE_P_CNTL 0x10040
  32. #define BIF_NB 0x10002
  33. static struct pci_dev *amd_smbus_dev;
  34. static struct pci_dev *amd_hb_dev;
  35. static int amd_ohci_iso_count;
  36. /*-------------------------------------------------------------------------*/
  37. static int broken_suspend(struct usb_hcd *hcd)
  38. {
  39. device_init_wakeup(&hcd->self.root_hub->dev, 0);
  40. return 0;
  41. }
  42. /* AMD 756, for most chips (early revs), corrupts register
  43. * values on read ... so enable the vendor workaround.
  44. */
  45. static int ohci_quirk_amd756(struct usb_hcd *hcd)
  46. {
  47. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  48. ohci->flags = OHCI_QUIRK_AMD756;
  49. ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  50. /* also erratum 10 (suspend/resume issues) */
  51. return broken_suspend(hcd);
  52. }
  53. /* Apple's OHCI driver has a lot of bizarre workarounds
  54. * for this chip. Evidently control and bulk lists
  55. * can get confused. (B&W G3 models, and ...)
  56. */
  57. static int ohci_quirk_opti(struct usb_hcd *hcd)
  58. {
  59. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  60. ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
  61. return 0;
  62. }
  63. /* Check for NSC87560. We have to look at the bridge (fn1) to
  64. * identify the USB (fn2). This quirk might apply to more or
  65. * even all NSC stuff.
  66. */
  67. static int ohci_quirk_ns(struct usb_hcd *hcd)
  68. {
  69. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  70. struct pci_dev *b;
  71. b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  72. if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  73. && b->vendor == PCI_VENDOR_ID_NS) {
  74. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  75. ohci->flags |= OHCI_QUIRK_SUPERIO;
  76. ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  77. }
  78. pci_dev_put(b);
  79. return 0;
  80. }
  81. /* Check for Compaq's ZFMicro chipset, which needs short
  82. * delays before control or bulk queues get re-activated
  83. * in finish_unlinks()
  84. */
  85. static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
  86. {
  87. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  88. ohci->flags |= OHCI_QUIRK_ZFMICRO;
  89. ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
  90. return 0;
  91. }
  92. /* Check for Toshiba SCC OHCI which has big endian registers
  93. * and little endian in memory data structures
  94. */
  95. static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
  96. {
  97. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  98. /* That chip is only present in the southbridge of some
  99. * cell based platforms which are supposed to select
  100. * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
  101. * that was the case though.
  102. */
  103. #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
  104. ohci->flags |= OHCI_QUIRK_BE_MMIO;
  105. ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
  106. return 0;
  107. #else
  108. ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
  109. return -ENXIO;
  110. #endif
  111. }
  112. /* Check for NEC chip and apply quirk for allegedly lost interrupts.
  113. */
  114. static void ohci_quirk_nec_worker(struct work_struct *work)
  115. {
  116. struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
  117. int status;
  118. status = ohci_init(ohci);
  119. if (status != 0) {
  120. ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
  121. "ohci_init", status);
  122. return;
  123. }
  124. status = ohci_restart(ohci);
  125. if (status != 0)
  126. ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
  127. "ohci_restart", status);
  128. }
  129. static int ohci_quirk_nec(struct usb_hcd *hcd)
  130. {
  131. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  132. ohci->flags |= OHCI_QUIRK_NEC;
  133. INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
  134. ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
  135. return 0;
  136. }
  137. static int ohci_quirk_amd700(struct usb_hcd *hcd)
  138. {
  139. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  140. u8 rev = 0;
  141. if (!amd_smbus_dev)
  142. amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
  143. PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
  144. if (!amd_smbus_dev)
  145. return 0;
  146. pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
  147. if ((rev > 0x3b) || (rev < 0x30)) {
  148. pci_dev_put(amd_smbus_dev);
  149. amd_smbus_dev = NULL;
  150. return 0;
  151. }
  152. amd_ohci_iso_count++;
  153. if (!amd_hb_dev)
  154. amd_hb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x9600, NULL);
  155. ohci->flags |= OHCI_QUIRK_AMD_ISO;
  156. ohci_dbg(ohci, "enabled AMD ISO transfers quirk\n");
  157. return 0;
  158. }
  159. /*
  160. * The hardware normally enables the A-link power management feature, which
  161. * lets the system lower the power consumption in idle states.
  162. *
  163. * Assume the system is configured to have USB 1.1 ISO transfers going
  164. * to or from a USB device. Without this quirk, that stream may stutter
  165. * or have breaks occasionally. For transfers going to speakers, this
  166. * makes a very audible mess...
  167. *
  168. * That audio playback corruption is due to the audio stream getting
  169. * interrupted occasionally when the link goes in lower power state
  170. * This USB quirk prevents the link going into that lower power state
  171. * during audio playback or other ISO operations.
  172. */
  173. static void quirk_amd_pll(int on)
  174. {
  175. u32 addr;
  176. u32 val;
  177. u32 bit = (on > 0) ? 1 : 0;
  178. pci_read_config_dword(amd_smbus_dev, AB_REG_BAR, &addr);
  179. /* BIT names/meanings are NDA-protected, sorry ... */
  180. outl(AX_INDXC, AB_INDX(addr));
  181. outl(0x40, AB_DATA(addr));
  182. outl(AX_DATAC, AB_INDX(addr));
  183. val = inl(AB_DATA(addr));
  184. val &= ~((1 << 3) | (1 << 4) | (1 << 9));
  185. val |= (bit << 3) | ((!bit) << 4) | ((!bit) << 9);
  186. outl(val, AB_DATA(addr));
  187. if (amd_hb_dev) {
  188. addr = PCIE_P_CNTL;
  189. pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
  190. pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
  191. val &= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
  192. val |= bit | (bit << 3) | (bit << 12);
  193. val |= ((!bit) << 4) | ((!bit) << 9);
  194. pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
  195. addr = BIF_NB;
  196. pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
  197. pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
  198. val &= ~(1 << 8);
  199. val |= bit << 8;
  200. pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
  201. }
  202. }
  203. static void amd_iso_dev_put(void)
  204. {
  205. amd_ohci_iso_count--;
  206. if (amd_ohci_iso_count == 0) {
  207. if (amd_smbus_dev) {
  208. pci_dev_put(amd_smbus_dev);
  209. amd_smbus_dev = NULL;
  210. }
  211. if (amd_hb_dev) {
  212. pci_dev_put(amd_hb_dev);
  213. amd_hb_dev = NULL;
  214. }
  215. }
  216. }
  217. /* List of quirks for OHCI */
  218. static const struct pci_device_id ohci_pci_quirks[] = {
  219. {
  220. PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
  221. .driver_data = (unsigned long)ohci_quirk_amd756,
  222. },
  223. {
  224. PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
  225. .driver_data = (unsigned long)ohci_quirk_opti,
  226. },
  227. {
  228. PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
  229. .driver_data = (unsigned long)ohci_quirk_ns,
  230. },
  231. {
  232. PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
  233. .driver_data = (unsigned long)ohci_quirk_zfmicro,
  234. },
  235. {
  236. PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
  237. .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
  238. },
  239. {
  240. PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
  241. .driver_data = (unsigned long)ohci_quirk_nec,
  242. },
  243. {
  244. /* Toshiba portege 4000 */
  245. .vendor = PCI_VENDOR_ID_AL,
  246. .device = 0x5237,
  247. .subvendor = PCI_VENDOR_ID_TOSHIBA,
  248. .subdevice = 0x0004,
  249. .driver_data = (unsigned long) broken_suspend,
  250. },
  251. {
  252. PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
  253. .driver_data = (unsigned long) broken_suspend,
  254. },
  255. {
  256. PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
  257. .driver_data = (unsigned long)ohci_quirk_amd700,
  258. },
  259. {
  260. PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
  261. .driver_data = (unsigned long)ohci_quirk_amd700,
  262. },
  263. {
  264. PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
  265. .driver_data = (unsigned long)ohci_quirk_amd700,
  266. },
  267. /* FIXME for some of the early AMD 760 southbridges, OHCI
  268. * won't work at all. blacklist them.
  269. */
  270. {},
  271. };
  272. static int ohci_pci_reset (struct usb_hcd *hcd)
  273. {
  274. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  275. int ret = 0;
  276. if (hcd->self.controller) {
  277. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  278. const struct pci_device_id *quirk_id;
  279. quirk_id = pci_match_id(ohci_pci_quirks, pdev);
  280. if (quirk_id != NULL) {
  281. int (*quirk)(struct usb_hcd *ohci);
  282. quirk = (void *)quirk_id->driver_data;
  283. ret = quirk(hcd);
  284. }
  285. }
  286. if (ret == 0) {
  287. ohci_hcd_init (ohci);
  288. return ohci_init (ohci);
  289. }
  290. return ret;
  291. }
  292. static int __devinit ohci_pci_start (struct usb_hcd *hcd)
  293. {
  294. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  295. int ret;
  296. #ifdef CONFIG_PM /* avoid warnings about unused pdev */
  297. if (hcd->self.controller) {
  298. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  299. /* RWC may not be set for add-in PCI cards, since boot
  300. * firmware probably ignored them. This transfers PCI
  301. * PM wakeup capabilities.
  302. */
  303. if (device_can_wakeup(&pdev->dev))
  304. ohci->hc_control |= OHCI_CTRL_RWC;
  305. }
  306. #endif /* CONFIG_PM */
  307. ret = ohci_run (ohci);
  308. if (ret < 0) {
  309. ohci_err (ohci, "can't start\n");
  310. ohci_stop (hcd);
  311. }
  312. return ret;
  313. }
  314. #ifdef CONFIG_PM
  315. static int ohci_pci_suspend(struct usb_hcd *hcd)
  316. {
  317. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  318. unsigned long flags;
  319. int rc = 0;
  320. /* Root hub was already suspended. Disable irq emission and
  321. * mark HW unaccessible, bail out if RH has been resumed. Use
  322. * the spinlock to properly synchronize with possible pending
  323. * RH suspend or resume activity.
  324. *
  325. * This is still racy as hcd->state is manipulated outside of
  326. * any locks =P But that will be a different fix.
  327. */
  328. spin_lock_irqsave (&ohci->lock, flags);
  329. if (hcd->state != HC_STATE_SUSPENDED) {
  330. rc = -EINVAL;
  331. goto bail;
  332. }
  333. ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  334. (void)ohci_readl(ohci, &ohci->regs->intrdisable);
  335. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  336. bail:
  337. spin_unlock_irqrestore (&ohci->lock, flags);
  338. return rc;
  339. }
  340. static int ohci_pci_resume(struct usb_hcd *hcd, bool hibernated)
  341. {
  342. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  343. /* Make sure resume from hibernation re-enumerates everything */
  344. if (hibernated)
  345. ohci_usb_reset(hcd_to_ohci(hcd));
  346. ohci_finish_controller_resume(hcd);
  347. return 0;
  348. }
  349. #endif /* CONFIG_PM */
  350. /*-------------------------------------------------------------------------*/
  351. static const struct hc_driver ohci_pci_hc_driver = {
  352. .description = hcd_name,
  353. .product_desc = "OHCI Host Controller",
  354. .hcd_priv_size = sizeof(struct ohci_hcd),
  355. /*
  356. * generic hardware linkage
  357. */
  358. .irq = ohci_irq,
  359. .flags = HCD_MEMORY | HCD_USB11,
  360. /*
  361. * basic lifecycle operations
  362. */
  363. .reset = ohci_pci_reset,
  364. .start = ohci_pci_start,
  365. .stop = ohci_stop,
  366. .shutdown = ohci_shutdown,
  367. #ifdef CONFIG_PM
  368. .pci_suspend = ohci_pci_suspend,
  369. .pci_resume = ohci_pci_resume,
  370. #endif
  371. /*
  372. * managing i/o requests and associated device resources
  373. */
  374. .urb_enqueue = ohci_urb_enqueue,
  375. .urb_dequeue = ohci_urb_dequeue,
  376. .endpoint_disable = ohci_endpoint_disable,
  377. /*
  378. * scheduling support
  379. */
  380. .get_frame_number = ohci_get_frame,
  381. /*
  382. * root hub support
  383. */
  384. .hub_status_data = ohci_hub_status_data,
  385. .hub_control = ohci_hub_control,
  386. #ifdef CONFIG_PM
  387. .bus_suspend = ohci_bus_suspend,
  388. .bus_resume = ohci_bus_resume,
  389. #endif
  390. .start_port_reset = ohci_start_port_reset,
  391. };
  392. /*-------------------------------------------------------------------------*/
  393. static const struct pci_device_id pci_ids [] = { {
  394. /* handle any USB OHCI controller */
  395. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
  396. .driver_data = (unsigned long) &ohci_pci_hc_driver,
  397. }, { /* end: all zeroes */ }
  398. };
  399. MODULE_DEVICE_TABLE (pci, pci_ids);
  400. /* pci driver glue; this is a "new style" PCI driver module */
  401. static struct pci_driver ohci_pci_driver = {
  402. .name = (char *) hcd_name,
  403. .id_table = pci_ids,
  404. .probe = usb_hcd_pci_probe,
  405. .remove = usb_hcd_pci_remove,
  406. .shutdown = usb_hcd_pci_shutdown,
  407. #ifdef CONFIG_PM_SLEEP
  408. .driver = {
  409. .pm = &usb_hcd_pci_pm_ops
  410. },
  411. #endif
  412. };