ehci-dbg.c 25 KB

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  1. /*
  2. * Copyright (c) 2001-2002 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. #define ehci_dbg(ehci, fmt, args...) \
  20. dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  21. #define ehci_err(ehci, fmt, args...) \
  22. dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  23. #define ehci_info(ehci, fmt, args...) \
  24. dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  25. #define ehci_warn(ehci, fmt, args...) \
  26. dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  27. #ifdef VERBOSE_DEBUG
  28. # define vdbg dbg
  29. # define ehci_vdbg ehci_dbg
  30. #else
  31. # define vdbg(fmt,args...) do { } while (0)
  32. # define ehci_vdbg(ehci, fmt, args...) do { } while (0)
  33. #endif
  34. #ifdef DEBUG
  35. /* check the values in the HCSPARAMS register
  36. * (host controller _Structural_ parameters)
  37. * see EHCI spec, Table 2-4 for each value
  38. */
  39. static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
  40. {
  41. u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
  42. ehci_dbg (ehci,
  43. "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
  44. label, params,
  45. HCS_DEBUG_PORT (params),
  46. HCS_INDICATOR (params) ? " ind" : "",
  47. HCS_N_CC (params),
  48. HCS_N_PCC (params),
  49. HCS_PORTROUTED (params) ? "" : " ordered",
  50. HCS_PPC (params) ? "" : " !ppc",
  51. HCS_N_PORTS (params)
  52. );
  53. /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
  54. if (HCS_PORTROUTED (params)) {
  55. int i;
  56. char buf [46], tmp [7], byte;
  57. buf[0] = 0;
  58. for (i = 0; i < HCS_N_PORTS (params); i++) {
  59. // FIXME MIPS won't readb() ...
  60. byte = readb (&ehci->caps->portroute[(i>>1)]);
  61. sprintf(tmp, "%d ",
  62. ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
  63. strcat(buf, tmp);
  64. }
  65. ehci_dbg (ehci, "%s portroute %s\n",
  66. label, buf);
  67. }
  68. }
  69. #else
  70. static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
  71. #endif
  72. #ifdef DEBUG
  73. /* check the values in the HCCPARAMS register
  74. * (host controller _Capability_ parameters)
  75. * see EHCI Spec, Table 2-5 for each value
  76. * */
  77. static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
  78. {
  79. u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
  80. if (HCC_ISOC_CACHE (params)) {
  81. ehci_dbg (ehci,
  82. "%s hcc_params %04x caching frame %s%s%s\n",
  83. label, params,
  84. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  85. HCC_CANPARK(params) ? " park" : "",
  86. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  87. } else {
  88. ehci_dbg (ehci,
  89. "%s hcc_params %04x thresh %d uframes %s%s%s\n",
  90. label,
  91. params,
  92. HCC_ISOC_THRES(params),
  93. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  94. HCC_CANPARK(params) ? " park" : "",
  95. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  96. }
  97. }
  98. #else
  99. static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
  100. #endif
  101. #ifdef DEBUG
  102. static void __maybe_unused
  103. dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  104. {
  105. ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  106. hc32_to_cpup(ehci, &qtd->hw_next),
  107. hc32_to_cpup(ehci, &qtd->hw_alt_next),
  108. hc32_to_cpup(ehci, &qtd->hw_token),
  109. hc32_to_cpup(ehci, &qtd->hw_buf [0]));
  110. if (qtd->hw_buf [1])
  111. ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  112. hc32_to_cpup(ehci, &qtd->hw_buf[1]),
  113. hc32_to_cpup(ehci, &qtd->hw_buf[2]),
  114. hc32_to_cpup(ehci, &qtd->hw_buf[3]),
  115. hc32_to_cpup(ehci, &qtd->hw_buf[4]));
  116. }
  117. static void __maybe_unused
  118. dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  119. {
  120. ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
  121. qh, qh->hw_next, qh->hw_info1, qh->hw_info2,
  122. qh->hw_current);
  123. dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next);
  124. }
  125. static void __maybe_unused
  126. dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
  127. {
  128. ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
  129. label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
  130. itd->urb);
  131. ehci_dbg (ehci,
  132. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  133. hc32_to_cpu(ehci, itd->hw_transaction[0]),
  134. hc32_to_cpu(ehci, itd->hw_transaction[1]),
  135. hc32_to_cpu(ehci, itd->hw_transaction[2]),
  136. hc32_to_cpu(ehci, itd->hw_transaction[3]),
  137. hc32_to_cpu(ehci, itd->hw_transaction[4]),
  138. hc32_to_cpu(ehci, itd->hw_transaction[5]),
  139. hc32_to_cpu(ehci, itd->hw_transaction[6]),
  140. hc32_to_cpu(ehci, itd->hw_transaction[7]));
  141. ehci_dbg (ehci,
  142. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  143. hc32_to_cpu(ehci, itd->hw_bufp[0]),
  144. hc32_to_cpu(ehci, itd->hw_bufp[1]),
  145. hc32_to_cpu(ehci, itd->hw_bufp[2]),
  146. hc32_to_cpu(ehci, itd->hw_bufp[3]),
  147. hc32_to_cpu(ehci, itd->hw_bufp[4]),
  148. hc32_to_cpu(ehci, itd->hw_bufp[5]),
  149. hc32_to_cpu(ehci, itd->hw_bufp[6]));
  150. ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
  151. itd->index[0], itd->index[1], itd->index[2],
  152. itd->index[3], itd->index[4], itd->index[5],
  153. itd->index[6], itd->index[7]);
  154. }
  155. static void __maybe_unused
  156. dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
  157. {
  158. ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
  159. label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
  160. sitd->urb);
  161. ehci_dbg (ehci,
  162. " addr %08x sched %04x result %08x buf %08x %08x\n",
  163. hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
  164. hc32_to_cpu(ehci, sitd->hw_uframe),
  165. hc32_to_cpu(ehci, sitd->hw_results),
  166. hc32_to_cpu(ehci, sitd->hw_buf[0]),
  167. hc32_to_cpu(ehci, sitd->hw_buf[1]));
  168. }
  169. static int __maybe_unused
  170. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  171. {
  172. return scnprintf (buf, len,
  173. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
  174. label, label [0] ? " " : "", status,
  175. (status & STS_ASS) ? " Async" : "",
  176. (status & STS_PSS) ? " Periodic" : "",
  177. (status & STS_RECL) ? " Recl" : "",
  178. (status & STS_HALT) ? " Halt" : "",
  179. (status & STS_IAA) ? " IAA" : "",
  180. (status & STS_FATAL) ? " FATAL" : "",
  181. (status & STS_FLR) ? " FLR" : "",
  182. (status & STS_PCD) ? " PCD" : "",
  183. (status & STS_ERR) ? " ERR" : "",
  184. (status & STS_INT) ? " INT" : ""
  185. );
  186. }
  187. static int __maybe_unused
  188. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  189. {
  190. return scnprintf (buf, len,
  191. "%s%sintrenable %02x%s%s%s%s%s%s",
  192. label, label [0] ? " " : "", enable,
  193. (enable & STS_IAA) ? " IAA" : "",
  194. (enable & STS_FATAL) ? " FATAL" : "",
  195. (enable & STS_FLR) ? " FLR" : "",
  196. (enable & STS_PCD) ? " PCD" : "",
  197. (enable & STS_ERR) ? " ERR" : "",
  198. (enable & STS_INT) ? " INT" : ""
  199. );
  200. }
  201. static const char *const fls_strings [] =
  202. { "1024", "512", "256", "??" };
  203. static int
  204. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  205. {
  206. return scnprintf (buf, len,
  207. "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
  208. label, label [0] ? " " : "", command,
  209. (command & CMD_PARK) ? "park" : "(park)",
  210. CMD_PARK_CNT (command),
  211. (command >> 16) & 0x3f,
  212. (command & CMD_LRESET) ? " LReset" : "",
  213. (command & CMD_IAAD) ? " IAAD" : "",
  214. (command & CMD_ASE) ? " Async" : "",
  215. (command & CMD_PSE) ? " Periodic" : "",
  216. fls_strings [(command >> 2) & 0x3],
  217. (command & CMD_RESET) ? " Reset" : "",
  218. (command & CMD_RUN) ? "RUN" : "HALT"
  219. );
  220. }
  221. static int
  222. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  223. {
  224. char *sig;
  225. /* signaling state */
  226. switch (status & (3 << 10)) {
  227. case 0 << 10: sig = "se0"; break;
  228. case 1 << 10: sig = "k"; break; /* low speed */
  229. case 2 << 10: sig = "j"; break;
  230. default: sig = "?"; break;
  231. }
  232. return scnprintf (buf, len,
  233. "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
  234. label, label [0] ? " " : "", port, status,
  235. (status & PORT_POWER) ? " POWER" : "",
  236. (status & PORT_OWNER) ? " OWNER" : "",
  237. sig,
  238. (status & PORT_RESET) ? " RESET" : "",
  239. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  240. (status & PORT_RESUME) ? " RESUME" : "",
  241. (status & PORT_OCC) ? " OCC" : "",
  242. (status & PORT_OC) ? " OC" : "",
  243. (status & PORT_PEC) ? " PEC" : "",
  244. (status & PORT_PE) ? " PE" : "",
  245. (status & PORT_CSC) ? " CSC" : "",
  246. (status & PORT_CONNECT) ? " CONNECT" : "");
  247. }
  248. #else
  249. static inline void __maybe_unused
  250. dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  251. {}
  252. static inline int __maybe_unused
  253. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  254. { return 0; }
  255. static inline int __maybe_unused
  256. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  257. { return 0; }
  258. static inline int __maybe_unused
  259. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  260. { return 0; }
  261. static inline int __maybe_unused
  262. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  263. { return 0; }
  264. #endif /* DEBUG */
  265. /* functions have the "wrong" filename when they're output... */
  266. #define dbg_status(ehci, label, status) { \
  267. char _buf [80]; \
  268. dbg_status_buf (_buf, sizeof _buf, label, status); \
  269. ehci_dbg (ehci, "%s\n", _buf); \
  270. }
  271. #define dbg_cmd(ehci, label, command) { \
  272. char _buf [80]; \
  273. dbg_command_buf (_buf, sizeof _buf, label, command); \
  274. ehci_dbg (ehci, "%s\n", _buf); \
  275. }
  276. #define dbg_port(ehci, label, port, status) { \
  277. char _buf [80]; \
  278. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  279. ehci_dbg (ehci, "%s\n", _buf); \
  280. }
  281. /*-------------------------------------------------------------------------*/
  282. #ifdef STUB_DEBUG_FILES
  283. static inline void create_debug_files (struct ehci_hcd *bus) { }
  284. static inline void remove_debug_files (struct ehci_hcd *bus) { }
  285. #else
  286. /* troubleshooting help: expose state in debugfs */
  287. static int debug_async_open(struct inode *, struct file *);
  288. static int debug_periodic_open(struct inode *, struct file *);
  289. static int debug_registers_open(struct inode *, struct file *);
  290. static int debug_async_open(struct inode *, struct file *);
  291. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  292. static int debug_close(struct inode *, struct file *);
  293. static const struct file_operations debug_async_fops = {
  294. .owner = THIS_MODULE,
  295. .open = debug_async_open,
  296. .read = debug_output,
  297. .release = debug_close,
  298. };
  299. static const struct file_operations debug_periodic_fops = {
  300. .owner = THIS_MODULE,
  301. .open = debug_periodic_open,
  302. .read = debug_output,
  303. .release = debug_close,
  304. };
  305. static const struct file_operations debug_registers_fops = {
  306. .owner = THIS_MODULE,
  307. .open = debug_registers_open,
  308. .read = debug_output,
  309. .release = debug_close,
  310. };
  311. static struct dentry *ehci_debug_root;
  312. struct debug_buffer {
  313. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  314. struct usb_bus *bus;
  315. struct mutex mutex; /* protect filling of buffer */
  316. size_t count; /* number of characters filled into buffer */
  317. char *output_buf;
  318. size_t alloc_size;
  319. };
  320. #define speed_char(info1) ({ char tmp; \
  321. switch (info1 & (3 << 12)) { \
  322. case 0 << 12: tmp = 'f'; break; \
  323. case 1 << 12: tmp = 'l'; break; \
  324. case 2 << 12: tmp = 'h'; break; \
  325. default: tmp = '?'; break; \
  326. }; tmp; })
  327. static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
  328. {
  329. __u32 v = hc32_to_cpu(ehci, token);
  330. if (v & QTD_STS_ACTIVE)
  331. return '*';
  332. if (v & QTD_STS_HALT)
  333. return '-';
  334. if (!IS_SHORT_READ (v))
  335. return ' ';
  336. /* tries to advance through hw_alt_next */
  337. return '/';
  338. }
  339. static void qh_lines (
  340. struct ehci_hcd *ehci,
  341. struct ehci_qh *qh,
  342. char **nextp,
  343. unsigned *sizep
  344. )
  345. {
  346. u32 scratch;
  347. u32 hw_curr;
  348. struct list_head *entry;
  349. struct ehci_qtd *td;
  350. unsigned temp;
  351. unsigned size = *sizep;
  352. char *next = *nextp;
  353. char mark;
  354. __le32 list_end = EHCI_LIST_END(ehci);
  355. if (qh->hw_qtd_next == list_end) /* NEC does this */
  356. mark = '@';
  357. else
  358. mark = token_mark(ehci, qh->hw_token);
  359. if (mark == '/') { /* qh_alt_next controls qh advance? */
  360. if ((qh->hw_alt_next & QTD_MASK(ehci))
  361. == ehci->async->hw_alt_next)
  362. mark = '#'; /* blocked */
  363. else if (qh->hw_alt_next == list_end)
  364. mark = '.'; /* use hw_qtd_next */
  365. /* else alt_next points to some other qtd */
  366. }
  367. scratch = hc32_to_cpup(ehci, &qh->hw_info1);
  368. hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &qh->hw_current) : 0;
  369. temp = scnprintf (next, size,
  370. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  371. qh, scratch & 0x007f,
  372. speed_char (scratch),
  373. (scratch >> 8) & 0x000f,
  374. scratch, hc32_to_cpup(ehci, &qh->hw_info2),
  375. hc32_to_cpup(ehci, &qh->hw_token), mark,
  376. (cpu_to_hc32(ehci, QTD_TOGGLE) & qh->hw_token)
  377. ? "data1" : "data0",
  378. (hc32_to_cpup(ehci, &qh->hw_alt_next) >> 1) & 0x0f);
  379. size -= temp;
  380. next += temp;
  381. /* hc may be modifying the list as we read it ... */
  382. list_for_each (entry, &qh->qtd_list) {
  383. td = list_entry (entry, struct ehci_qtd, qtd_list);
  384. scratch = hc32_to_cpup(ehci, &td->hw_token);
  385. mark = ' ';
  386. if (hw_curr == td->qtd_dma)
  387. mark = '*';
  388. else if (qh->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma))
  389. mark = '+';
  390. else if (QTD_LENGTH (scratch)) {
  391. if (td->hw_alt_next == ehci->async->hw_alt_next)
  392. mark = '#';
  393. else if (td->hw_alt_next != list_end)
  394. mark = '/';
  395. }
  396. temp = snprintf (next, size,
  397. "\n\t%p%c%s len=%d %08x urb %p",
  398. td, mark, ({ char *tmp;
  399. switch ((scratch>>8)&0x03) {
  400. case 0: tmp = "out"; break;
  401. case 1: tmp = "in"; break;
  402. case 2: tmp = "setup"; break;
  403. default: tmp = "?"; break;
  404. } tmp;}),
  405. (scratch >> 16) & 0x7fff,
  406. scratch,
  407. td->urb);
  408. if (size < temp)
  409. temp = size;
  410. size -= temp;
  411. next += temp;
  412. if (temp == size)
  413. goto done;
  414. }
  415. temp = snprintf (next, size, "\n");
  416. if (size < temp)
  417. temp = size;
  418. size -= temp;
  419. next += temp;
  420. done:
  421. *sizep = size;
  422. *nextp = next;
  423. }
  424. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  425. {
  426. struct usb_hcd *hcd;
  427. struct ehci_hcd *ehci;
  428. unsigned long flags;
  429. unsigned temp, size;
  430. char *next;
  431. struct ehci_qh *qh;
  432. hcd = bus_to_hcd(buf->bus);
  433. ehci = hcd_to_ehci (hcd);
  434. next = buf->output_buf;
  435. size = buf->alloc_size;
  436. *next = 0;
  437. /* dumps a snapshot of the async schedule.
  438. * usually empty except for long-term bulk reads, or head.
  439. * one QH per line, and TDs we know about
  440. */
  441. spin_lock_irqsave (&ehci->lock, flags);
  442. for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  443. qh_lines (ehci, qh, &next, &size);
  444. if (ehci->reclaim && size > 0) {
  445. temp = scnprintf (next, size, "\nreclaim =\n");
  446. size -= temp;
  447. next += temp;
  448. for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
  449. qh_lines (ehci, qh, &next, &size);
  450. }
  451. spin_unlock_irqrestore (&ehci->lock, flags);
  452. return strlen(buf->output_buf);
  453. }
  454. #define DBG_SCHED_LIMIT 64
  455. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  456. {
  457. struct usb_hcd *hcd;
  458. struct ehci_hcd *ehci;
  459. unsigned long flags;
  460. union ehci_shadow p, *seen;
  461. unsigned temp, size, seen_count;
  462. char *next;
  463. unsigned i;
  464. __hc32 tag;
  465. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  466. return 0;
  467. seen_count = 0;
  468. hcd = bus_to_hcd(buf->bus);
  469. ehci = hcd_to_ehci (hcd);
  470. next = buf->output_buf;
  471. size = buf->alloc_size;
  472. temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
  473. size -= temp;
  474. next += temp;
  475. /* dump a snapshot of the periodic schedule.
  476. * iso changes, interrupt usually doesn't.
  477. */
  478. spin_lock_irqsave (&ehci->lock, flags);
  479. for (i = 0; i < ehci->periodic_size; i++) {
  480. p = ehci->pshadow [i];
  481. if (likely (!p.ptr))
  482. continue;
  483. tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]);
  484. temp = scnprintf (next, size, "%4d: ", i);
  485. size -= temp;
  486. next += temp;
  487. do {
  488. switch (hc32_to_cpu(ehci, tag)) {
  489. case Q_TYPE_QH:
  490. temp = scnprintf (next, size, " qh%d-%04x/%p",
  491. p.qh->period,
  492. hc32_to_cpup(ehci,
  493. &p.qh->hw_info2)
  494. /* uframe masks */
  495. & (QH_CMASK | QH_SMASK),
  496. p.qh);
  497. size -= temp;
  498. next += temp;
  499. /* don't repeat what follows this qh */
  500. for (temp = 0; temp < seen_count; temp++) {
  501. if (seen [temp].ptr != p.ptr)
  502. continue;
  503. if (p.qh->qh_next.ptr) {
  504. temp = scnprintf (next, size,
  505. " ...");
  506. size -= temp;
  507. next += temp;
  508. }
  509. break;
  510. }
  511. /* show more info the first time around */
  512. if (temp == seen_count) {
  513. u32 scratch = hc32_to_cpup(ehci,
  514. &p.qh->hw_info1);
  515. struct ehci_qtd *qtd;
  516. char *type = "";
  517. /* count tds, get ep direction */
  518. temp = 0;
  519. list_for_each_entry (qtd,
  520. &p.qh->qtd_list,
  521. qtd_list) {
  522. temp++;
  523. switch (0x03 & (hc32_to_cpu(
  524. ehci,
  525. qtd->hw_token) >> 8)) {
  526. case 0: type = "out"; continue;
  527. case 1: type = "in"; continue;
  528. }
  529. }
  530. temp = scnprintf (next, size,
  531. " (%c%d ep%d%s "
  532. "[%d/%d] q%d p%d)",
  533. speed_char (scratch),
  534. scratch & 0x007f,
  535. (scratch >> 8) & 0x000f, type,
  536. p.qh->usecs, p.qh->c_usecs,
  537. temp,
  538. 0x7ff & (scratch >> 16));
  539. if (seen_count < DBG_SCHED_LIMIT)
  540. seen [seen_count++].qh = p.qh;
  541. } else
  542. temp = 0;
  543. if (p.qh) {
  544. tag = Q_NEXT_TYPE(ehci, p.qh->hw_next);
  545. p = p.qh->qh_next;
  546. }
  547. break;
  548. case Q_TYPE_FSTN:
  549. temp = scnprintf (next, size,
  550. " fstn-%8x/%p", p.fstn->hw_prev,
  551. p.fstn);
  552. tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
  553. p = p.fstn->fstn_next;
  554. break;
  555. case Q_TYPE_ITD:
  556. temp = scnprintf (next, size,
  557. " itd/%p", p.itd);
  558. tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
  559. p = p.itd->itd_next;
  560. break;
  561. case Q_TYPE_SITD:
  562. temp = scnprintf (next, size,
  563. " sitd%d-%04x/%p",
  564. p.sitd->stream->interval,
  565. hc32_to_cpup(ehci, &p.sitd->hw_uframe)
  566. & 0x0000ffff,
  567. p.sitd);
  568. tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
  569. p = p.sitd->sitd_next;
  570. break;
  571. }
  572. size -= temp;
  573. next += temp;
  574. } while (p.ptr);
  575. temp = scnprintf (next, size, "\n");
  576. size -= temp;
  577. next += temp;
  578. }
  579. spin_unlock_irqrestore (&ehci->lock, flags);
  580. kfree (seen);
  581. return buf->alloc_size - size;
  582. }
  583. #undef DBG_SCHED_LIMIT
  584. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  585. {
  586. struct usb_hcd *hcd;
  587. struct ehci_hcd *ehci;
  588. unsigned long flags;
  589. unsigned temp, size, i;
  590. char *next, scratch [80];
  591. static char fmt [] = "%*s\n";
  592. static char label [] = "";
  593. hcd = bus_to_hcd(buf->bus);
  594. ehci = hcd_to_ehci (hcd);
  595. next = buf->output_buf;
  596. size = buf->alloc_size;
  597. spin_lock_irqsave (&ehci->lock, flags);
  598. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  599. size = scnprintf (next, size,
  600. "bus %s, device %s\n"
  601. "%s\n"
  602. "SUSPENDED (no register access)\n",
  603. hcd->self.controller->bus->name,
  604. dev_name(hcd->self.controller),
  605. hcd->product_desc);
  606. goto done;
  607. }
  608. /* Capability Registers */
  609. i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
  610. temp = scnprintf (next, size,
  611. "bus %s, device %s\n"
  612. "%s\n"
  613. "EHCI %x.%02x, hcd state %d\n",
  614. hcd->self.controller->bus->name,
  615. dev_name(hcd->self.controller),
  616. hcd->product_desc,
  617. i >> 8, i & 0x0ff, hcd->state);
  618. size -= temp;
  619. next += temp;
  620. #ifdef CONFIG_PCI
  621. /* EHCI 0.96 and later may have "extended capabilities" */
  622. if (hcd->self.controller->bus == &pci_bus_type) {
  623. struct pci_dev *pdev;
  624. u32 offset, cap, cap2;
  625. unsigned count = 256/4;
  626. pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
  627. offset = HCC_EXT_CAPS(ehci_readl(ehci,
  628. &ehci->caps->hcc_params));
  629. while (offset && count--) {
  630. pci_read_config_dword (pdev, offset, &cap);
  631. switch (cap & 0xff) {
  632. case 1:
  633. temp = scnprintf (next, size,
  634. "ownership %08x%s%s\n", cap,
  635. (cap & (1 << 24)) ? " linux" : "",
  636. (cap & (1 << 16)) ? " firmware" : "");
  637. size -= temp;
  638. next += temp;
  639. offset += 4;
  640. pci_read_config_dword (pdev, offset, &cap2);
  641. temp = scnprintf (next, size,
  642. "SMI sts/enable 0x%08x\n", cap2);
  643. size -= temp;
  644. next += temp;
  645. break;
  646. case 0: /* illegal reserved capability */
  647. cap = 0;
  648. /* FALLTHROUGH */
  649. default: /* unknown */
  650. break;
  651. }
  652. temp = (cap >> 8) & 0xff;
  653. }
  654. }
  655. #endif
  656. // FIXME interpret both types of params
  657. i = ehci_readl(ehci, &ehci->caps->hcs_params);
  658. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  659. size -= temp;
  660. next += temp;
  661. i = ehci_readl(ehci, &ehci->caps->hcc_params);
  662. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  663. size -= temp;
  664. next += temp;
  665. /* Operational Registers */
  666. temp = dbg_status_buf (scratch, sizeof scratch, label,
  667. ehci_readl(ehci, &ehci->regs->status));
  668. temp = scnprintf (next, size, fmt, temp, scratch);
  669. size -= temp;
  670. next += temp;
  671. temp = dbg_command_buf (scratch, sizeof scratch, label,
  672. ehci_readl(ehci, &ehci->regs->command));
  673. temp = scnprintf (next, size, fmt, temp, scratch);
  674. size -= temp;
  675. next += temp;
  676. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  677. ehci_readl(ehci, &ehci->regs->intr_enable));
  678. temp = scnprintf (next, size, fmt, temp, scratch);
  679. size -= temp;
  680. next += temp;
  681. temp = scnprintf (next, size, "uframe %04x\n",
  682. ehci_readl(ehci, &ehci->regs->frame_index));
  683. size -= temp;
  684. next += temp;
  685. for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
  686. temp = dbg_port_buf (scratch, sizeof scratch, label, i,
  687. ehci_readl(ehci,
  688. &ehci->regs->port_status[i - 1]));
  689. temp = scnprintf (next, size, fmt, temp, scratch);
  690. size -= temp;
  691. next += temp;
  692. if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
  693. temp = scnprintf (next, size,
  694. " debug control %08x\n",
  695. ehci_readl(ehci,
  696. &ehci->debug->control));
  697. size -= temp;
  698. next += temp;
  699. }
  700. }
  701. if (ehci->reclaim) {
  702. temp = scnprintf(next, size, "reclaim qh %p\n", ehci->reclaim);
  703. size -= temp;
  704. next += temp;
  705. }
  706. #ifdef EHCI_STATS
  707. temp = scnprintf (next, size,
  708. "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
  709. ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
  710. ehci->stats.lost_iaa);
  711. size -= temp;
  712. next += temp;
  713. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  714. ehci->stats.complete, ehci->stats.unlink);
  715. size -= temp;
  716. next += temp;
  717. #endif
  718. done:
  719. spin_unlock_irqrestore (&ehci->lock, flags);
  720. return buf->alloc_size - size;
  721. }
  722. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  723. ssize_t (*fill_func)(struct debug_buffer *))
  724. {
  725. struct debug_buffer *buf;
  726. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  727. if (buf) {
  728. buf->bus = bus;
  729. buf->fill_func = fill_func;
  730. mutex_init(&buf->mutex);
  731. buf->alloc_size = PAGE_SIZE;
  732. }
  733. return buf;
  734. }
  735. static int fill_buffer(struct debug_buffer *buf)
  736. {
  737. int ret = 0;
  738. if (!buf->output_buf)
  739. buf->output_buf = (char *)vmalloc(buf->alloc_size);
  740. if (!buf->output_buf) {
  741. ret = -ENOMEM;
  742. goto out;
  743. }
  744. ret = buf->fill_func(buf);
  745. if (ret >= 0) {
  746. buf->count = ret;
  747. ret = 0;
  748. }
  749. out:
  750. return ret;
  751. }
  752. static ssize_t debug_output(struct file *file, char __user *user_buf,
  753. size_t len, loff_t *offset)
  754. {
  755. struct debug_buffer *buf = file->private_data;
  756. int ret = 0;
  757. mutex_lock(&buf->mutex);
  758. if (buf->count == 0) {
  759. ret = fill_buffer(buf);
  760. if (ret != 0) {
  761. mutex_unlock(&buf->mutex);
  762. goto out;
  763. }
  764. }
  765. mutex_unlock(&buf->mutex);
  766. ret = simple_read_from_buffer(user_buf, len, offset,
  767. buf->output_buf, buf->count);
  768. out:
  769. return ret;
  770. }
  771. static int debug_close(struct inode *inode, struct file *file)
  772. {
  773. struct debug_buffer *buf = file->private_data;
  774. if (buf) {
  775. if (buf->output_buf)
  776. vfree(buf->output_buf);
  777. kfree(buf);
  778. }
  779. return 0;
  780. }
  781. static int debug_async_open(struct inode *inode, struct file *file)
  782. {
  783. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  784. return file->private_data ? 0 : -ENOMEM;
  785. }
  786. static int debug_periodic_open(struct inode *inode, struct file *file)
  787. {
  788. struct debug_buffer *buf;
  789. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  790. if (!buf)
  791. return -ENOMEM;
  792. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  793. file->private_data = buf;
  794. return 0;
  795. }
  796. static int debug_registers_open(struct inode *inode, struct file *file)
  797. {
  798. file->private_data = alloc_buffer(inode->i_private,
  799. fill_registers_buffer);
  800. return file->private_data ? 0 : -ENOMEM;
  801. }
  802. static inline void create_debug_files (struct ehci_hcd *ehci)
  803. {
  804. struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
  805. ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
  806. if (!ehci->debug_dir)
  807. goto dir_error;
  808. ehci->debug_async = debugfs_create_file("async", S_IRUGO,
  809. ehci->debug_dir, bus,
  810. &debug_async_fops);
  811. if (!ehci->debug_async)
  812. goto async_error;
  813. ehci->debug_periodic = debugfs_create_file("periodic", S_IRUGO,
  814. ehci->debug_dir, bus,
  815. &debug_periodic_fops);
  816. if (!ehci->debug_periodic)
  817. goto periodic_error;
  818. ehci->debug_registers = debugfs_create_file("registers", S_IRUGO,
  819. ehci->debug_dir, bus,
  820. &debug_registers_fops);
  821. if (!ehci->debug_registers)
  822. goto registers_error;
  823. return;
  824. registers_error:
  825. debugfs_remove(ehci->debug_periodic);
  826. periodic_error:
  827. debugfs_remove(ehci->debug_async);
  828. async_error:
  829. debugfs_remove(ehci->debug_dir);
  830. dir_error:
  831. ehci->debug_periodic = NULL;
  832. ehci->debug_async = NULL;
  833. ehci->debug_dir = NULL;
  834. }
  835. static inline void remove_debug_files (struct ehci_hcd *ehci)
  836. {
  837. debugfs_remove(ehci->debug_registers);
  838. debugfs_remove(ehci->debug_periodic);
  839. debugfs_remove(ehci->debug_async);
  840. debugfs_remove(ehci->debug_dir);
  841. }
  842. #endif /* STUB_DEBUG_FILES */