imx_udc.h 12 KB

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  1. /*
  2. * Copyright (C) 2005 Mike Lee(eemike@gmail.com)
  3. *
  4. * This udc driver is now under testing and code is based on pxa2xx_udc.h
  5. * Please use it with your own risk!
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #ifndef __LINUX_USB_GADGET_IMX_H
  18. #define __LINUX_USB_GADGET_IMX_H
  19. #include <linux/types.h>
  20. /* Helper macros */
  21. #define EP_NO(ep) ((ep->bEndpointAddress) & ~USB_DIR_IN) /* IN:1, OUT:0 */
  22. #define EP_DIR(ep) ((ep->bEndpointAddress) & USB_DIR_IN ? 1 : 0)
  23. #define irq_to_ep(irq) (((irq) >= USBD_INT0) || ((irq) <= USBD_INT6) \
  24. ? ((irq) - USBD_INT0) : (USBD_INT6)) /*should not happen*/
  25. #define ep_to_irq(ep) (EP_NO((ep)) + USBD_INT0)
  26. #define IMX_USB_NB_EP 6
  27. /* Driver structures */
  28. struct imx_request {
  29. struct usb_request req;
  30. struct list_head queue;
  31. unsigned int in_use;
  32. };
  33. enum ep0_state {
  34. EP0_IDLE,
  35. EP0_IN_DATA_PHASE,
  36. EP0_OUT_DATA_PHASE,
  37. EP0_CONFIG,
  38. EP0_STALL,
  39. };
  40. struct imx_ep_struct {
  41. struct usb_ep ep;
  42. struct imx_udc_struct *imx_usb;
  43. struct list_head queue;
  44. unsigned char stopped;
  45. unsigned char fifosize;
  46. unsigned char bEndpointAddress;
  47. unsigned char bmAttributes;
  48. };
  49. struct imx_udc_struct {
  50. struct usb_gadget gadget;
  51. struct usb_gadget_driver *driver;
  52. struct device *dev;
  53. struct imx_ep_struct imx_ep[IMX_USB_NB_EP];
  54. struct clk *clk;
  55. struct timer_list timer;
  56. enum ep0_state ep0state;
  57. struct resource *res;
  58. void __iomem *base;
  59. unsigned char set_config;
  60. int cfg,
  61. intf,
  62. alt,
  63. usbd_int[7];
  64. };
  65. /* USB registers */
  66. #define USB_FRAME (0x00) /* USB frame */
  67. #define USB_SPEC (0x04) /* USB Spec */
  68. #define USB_STAT (0x08) /* USB Status */
  69. #define USB_CTRL (0x0C) /* USB Control */
  70. #define USB_DADR (0x10) /* USB Desc RAM addr */
  71. #define USB_DDAT (0x14) /* USB Desc RAM/EP buffer data */
  72. #define USB_INTR (0x18) /* USB interrupt */
  73. #define USB_MASK (0x1C) /* USB Mask */
  74. #define USB_ENAB (0x24) /* USB Enable */
  75. #define USB_EP_STAT(x) (0x30 + (x*0x30)) /* USB status/control */
  76. #define USB_EP_INTR(x) (0x34 + (x*0x30)) /* USB interrupt */
  77. #define USB_EP_MASK(x) (0x38 + (x*0x30)) /* USB mask */
  78. #define USB_EP_FDAT(x) (0x3C + (x*0x30)) /* USB FIFO data */
  79. #define USB_EP_FDAT0(x) (0x3C + (x*0x30)) /* USB FIFO data */
  80. #define USB_EP_FDAT1(x) (0x3D + (x*0x30)) /* USB FIFO data */
  81. #define USB_EP_FDAT2(x) (0x3E + (x*0x30)) /* USB FIFO data */
  82. #define USB_EP_FDAT3(x) (0x3F + (x*0x30)) /* USB FIFO data */
  83. #define USB_EP_FSTAT(x) (0x40 + (x*0x30)) /* USB FIFO status */
  84. #define USB_EP_FCTRL(x) (0x44 + (x*0x30)) /* USB FIFO control */
  85. #define USB_EP_LRFP(x) (0x48 + (x*0x30)) /* USB last rd f. pointer */
  86. #define USB_EP_LWFP(x) (0x4C + (x*0x30)) /* USB last wr f. pointer */
  87. #define USB_EP_FALRM(x) (0x50 + (x*0x30)) /* USB FIFO alarm */
  88. #define USB_EP_FRDP(x) (0x54 + (x*0x30)) /* USB FIFO read pointer */
  89. #define USB_EP_FWRP(x) (0x58 + (x*0x30)) /* USB FIFO write pointer */
  90. /* USB Control Register Bit Fields.*/
  91. #define CTRL_CMDOVER (1<<6) /* UDC status */
  92. #define CTRL_CMDERROR (1<<5) /* UDC status */
  93. #define CTRL_FE_ENA (1<<3) /* Enable Font End logic */
  94. #define CTRL_UDC_RST (1<<2) /* UDC reset */
  95. #define CTRL_AFE_ENA (1<<1) /* Analog Font end enable */
  96. #define CTRL_RESUME (1<<0) /* UDC resume */
  97. /* USB Status Register Bit Fields.*/
  98. #define STAT_RST (1<<8)
  99. #define STAT_SUSP (1<<7)
  100. #define STAT_CFG (3<<5)
  101. #define STAT_INTF (3<<3)
  102. #define STAT_ALTSET (7<<0)
  103. /* USB Interrupt Status/Mask Registers Bit fields */
  104. #define INTR_WAKEUP (1<<31) /* Wake up Interrupt */
  105. #define INTR_MSOF (1<<7) /* Missed Start of Frame */
  106. #define INTR_SOF (1<<6) /* Start of Frame */
  107. #define INTR_RESET_STOP (1<<5) /* Reset Signaling stop */
  108. #define INTR_RESET_START (1<<4) /* Reset Signaling start */
  109. #define INTR_RESUME (1<<3) /* Suspend to resume */
  110. #define INTR_SUSPEND (1<<2) /* Active to suspend */
  111. #define INTR_FRAME_MATCH (1<<1) /* Frame matched */
  112. #define INTR_CFG_CHG (1<<0) /* Configuration change occurred */
  113. /* USB Enable Register Bit Fields.*/
  114. #define ENAB_RST (1<<31) /* Reset USB modules */
  115. #define ENAB_ENAB (1<<30) /* Enable USB modules*/
  116. #define ENAB_SUSPEND (1<<29) /* Suspend USB modules */
  117. #define ENAB_ENDIAN (1<<28) /* Endian of USB modules */
  118. #define ENAB_PWRMD (1<<0) /* Power mode of USB modules */
  119. /* USB Descriptor Ram Address Register bit fields */
  120. #define DADR_CFG (1<<31) /* Configuration */
  121. #define DADR_BSY (1<<30) /* Busy status */
  122. #define DADR_DADR (0x1FF) /* Descriptor Ram Address */
  123. /* USB Descriptor RAM/Endpoint Buffer Data Register bit fields */
  124. #define DDAT_DDAT (0xFF) /* Descriptor Endpoint Buffer */
  125. /* USB Endpoint Status Register bit fields */
  126. #define EPSTAT_BCOUNT (0x7F<<16) /* Endpoint FIFO byte count */
  127. #define EPSTAT_SIP (1<<8) /* Endpoint setup in progress */
  128. #define EPSTAT_DIR (1<<7) /* Endpoint transfer direction */
  129. #define EPSTAT_MAX (3<<5) /* Endpoint Max packet size */
  130. #define EPSTAT_TYP (3<<3) /* Endpoint type */
  131. #define EPSTAT_ZLPS (1<<2) /* Send zero length packet */
  132. #define EPSTAT_FLUSH (1<<1) /* Endpoint FIFO Flush */
  133. #define EPSTAT_STALL (1<<0) /* Force stall */
  134. /* USB Endpoint FIFO Status Register bit fields */
  135. #define FSTAT_FRAME_STAT (0xF<<24) /* Frame status bit [0-3] */
  136. #define FSTAT_ERR (1<<22) /* FIFO error */
  137. #define FSTAT_UF (1<<21) /* FIFO underflow */
  138. #define FSTAT_OF (1<<20) /* FIFO overflow */
  139. #define FSTAT_FR (1<<19) /* FIFO frame ready */
  140. #define FSTAT_FULL (1<<18) /* FIFO full */
  141. #define FSTAT_ALRM (1<<17) /* FIFO alarm */
  142. #define FSTAT_EMPTY (1<<16) /* FIFO empty */
  143. /* USB Endpoint FIFO Control Register bit fields */
  144. #define FCTRL_WFR (1<<29) /* Write frame end */
  145. /* USB Endpoint Interrupt Status Regsiter bit fields */
  146. #define EPINTR_FIFO_FULL (1<<8) /* fifo full */
  147. #define EPINTR_FIFO_EMPTY (1<<7) /* fifo empty */
  148. #define EPINTR_FIFO_ERROR (1<<6) /* fifo error */
  149. #define EPINTR_FIFO_HIGH (1<<5) /* fifo high */
  150. #define EPINTR_FIFO_LOW (1<<4) /* fifo low */
  151. #define EPINTR_MDEVREQ (1<<3) /* multi Device request */
  152. #define EPINTR_EOT (1<<2) /* fifo end of transfer */
  153. #define EPINTR_DEVREQ (1<<1) /* Device request */
  154. #define EPINTR_EOF (1<<0) /* fifo end of frame */
  155. /* Debug macros */
  156. #ifdef DEBUG
  157. /* #define DEBUG_REQ */
  158. /* #define DEBUG_TRX */
  159. /* #define DEBUG_INIT */
  160. /* #define DEBUG_EP0 */
  161. /* #define DEBUG_EPX */
  162. /* #define DEBUG_IRQ */
  163. /* #define DEBUG_EPIRQ */
  164. /* #define DEBUG_DUMP */
  165. /* #define DEBUG_ERR */
  166. #ifdef DEBUG_REQ
  167. #define D_REQ(dev, args...) dev_dbg(dev, ## args)
  168. #else
  169. #define D_REQ(dev, args...) do {} while (0)
  170. #endif /* DEBUG_REQ */
  171. #ifdef DEBUG_TRX
  172. #define D_TRX(dev, args...) dev_dbg(dev, ## args)
  173. #else
  174. #define D_TRX(dev, args...) do {} while (0)
  175. #endif /* DEBUG_TRX */
  176. #ifdef DEBUG_INIT
  177. #define D_INI(dev, args...) dev_dbg(dev, ## args)
  178. #else
  179. #define D_INI(dev, args...) do {} while (0)
  180. #endif /* DEBUG_INIT */
  181. #ifdef DEBUG_EP0
  182. static const char *state_name[] = {
  183. "EP0_IDLE",
  184. "EP0_IN_DATA_PHASE",
  185. "EP0_OUT_DATA_PHASE",
  186. "EP0_CONFIG",
  187. "EP0_STALL"
  188. };
  189. #define D_EP0(dev, args...) dev_dbg(dev, ## args)
  190. #else
  191. #define D_EP0(dev, args...) do {} while (0)
  192. #endif /* DEBUG_EP0 */
  193. #ifdef DEBUG_EPX
  194. #define D_EPX(dev, args...) dev_dbg(dev, ## args)
  195. #else
  196. #define D_EPX(dev, args...) do {} while (0)
  197. #endif /* DEBUG_EP0 */
  198. #ifdef DEBUG_IRQ
  199. static void dump_intr(const char *label, int irqreg, struct device *dev)
  200. {
  201. dev_dbg(dev, "<%s> USB_INTR=[%s%s%s%s%s%s%s%s%s]\n", label,
  202. (irqreg & INTR_WAKEUP) ? " wake" : "",
  203. (irqreg & INTR_MSOF) ? " msof" : "",
  204. (irqreg & INTR_SOF) ? " sof" : "",
  205. (irqreg & INTR_RESUME) ? " resume" : "",
  206. (irqreg & INTR_SUSPEND) ? " suspend" : "",
  207. (irqreg & INTR_RESET_STOP) ? " noreset" : "",
  208. (irqreg & INTR_RESET_START) ? " reset" : "",
  209. (irqreg & INTR_FRAME_MATCH) ? " fmatch" : "",
  210. (irqreg & INTR_CFG_CHG) ? " config" : "");
  211. }
  212. #else
  213. #define dump_intr(x, y, z) do {} while (0)
  214. #endif /* DEBUG_IRQ */
  215. #ifdef DEBUG_EPIRQ
  216. static void dump_ep_intr(const char *label, int nr, int irqreg,
  217. struct device *dev)
  218. {
  219. dev_dbg(dev, "<%s> EP%d_INTR=[%s%s%s%s%s%s%s%s%s]\n", label, nr,
  220. (irqreg & EPINTR_FIFO_FULL) ? " full" : "",
  221. (irqreg & EPINTR_FIFO_EMPTY) ? " fempty" : "",
  222. (irqreg & EPINTR_FIFO_ERROR) ? " ferr" : "",
  223. (irqreg & EPINTR_FIFO_HIGH) ? " fhigh" : "",
  224. (irqreg & EPINTR_FIFO_LOW) ? " flow" : "",
  225. (irqreg & EPINTR_MDEVREQ) ? " mreq" : "",
  226. (irqreg & EPINTR_EOF) ? " eof" : "",
  227. (irqreg & EPINTR_DEVREQ) ? " devreq" : "",
  228. (irqreg & EPINTR_EOT) ? " eot" : "");
  229. }
  230. #else
  231. #define dump_ep_intr(x, y, z, i) do {} while (0)
  232. #endif /* DEBUG_IRQ */
  233. #ifdef DEBUG_DUMP
  234. static void dump_usb_stat(const char *label,
  235. struct imx_udc_struct *imx_usb)
  236. {
  237. int temp = __raw_readl(imx_usb->base + USB_STAT);
  238. dev_dbg(imx_usb->dev,
  239. "<%s> USB_STAT=[%s%s CFG=%d, INTF=%d, ALTR=%d]\n", label,
  240. (temp & STAT_RST) ? " reset" : "",
  241. (temp & STAT_SUSP) ? " suspend" : "",
  242. (temp & STAT_CFG) >> 5,
  243. (temp & STAT_INTF) >> 3,
  244. (temp & STAT_ALTSET));
  245. }
  246. static void dump_ep_stat(const char *label,
  247. struct imx_ep_struct *imx_ep)
  248. {
  249. int temp = __raw_readl(imx_ep->imx_usb->base
  250. + USB_EP_INTR(EP_NO(imx_ep)));
  251. dev_dbg(imx_ep->imx_usb->dev,
  252. "<%s> EP%d_INTR=[%s%s%s%s%s%s%s%s%s]\n",
  253. label, EP_NO(imx_ep),
  254. (temp & EPINTR_FIFO_FULL) ? " full" : "",
  255. (temp & EPINTR_FIFO_EMPTY) ? " fempty" : "",
  256. (temp & EPINTR_FIFO_ERROR) ? " ferr" : "",
  257. (temp & EPINTR_FIFO_HIGH) ? " fhigh" : "",
  258. (temp & EPINTR_FIFO_LOW) ? " flow" : "",
  259. (temp & EPINTR_MDEVREQ) ? " mreq" : "",
  260. (temp & EPINTR_EOF) ? " eof" : "",
  261. (temp & EPINTR_DEVREQ) ? " devreq" : "",
  262. (temp & EPINTR_EOT) ? " eot" : "");
  263. temp = __raw_readl(imx_ep->imx_usb->base
  264. + USB_EP_STAT(EP_NO(imx_ep)));
  265. dev_dbg(imx_ep->imx_usb->dev,
  266. "<%s> EP%d_STAT=[%s%s bcount=%d]\n",
  267. label, EP_NO(imx_ep),
  268. (temp & EPSTAT_SIP) ? " sip" : "",
  269. (temp & EPSTAT_STALL) ? " stall" : "",
  270. (temp & EPSTAT_BCOUNT) >> 16);
  271. temp = __raw_readl(imx_ep->imx_usb->base
  272. + USB_EP_FSTAT(EP_NO(imx_ep)));
  273. dev_dbg(imx_ep->imx_usb->dev,
  274. "<%s> EP%d_FSTAT=[%s%s%s%s%s%s%s]\n",
  275. label, EP_NO(imx_ep),
  276. (temp & FSTAT_ERR) ? " ferr" : "",
  277. (temp & FSTAT_UF) ? " funder" : "",
  278. (temp & FSTAT_OF) ? " fover" : "",
  279. (temp & FSTAT_FR) ? " fready" : "",
  280. (temp & FSTAT_FULL) ? " ffull" : "",
  281. (temp & FSTAT_ALRM) ? " falarm" : "",
  282. (temp & FSTAT_EMPTY) ? " fempty" : "");
  283. }
  284. static void dump_req(const char *label, struct imx_ep_struct *imx_ep,
  285. struct usb_request *req)
  286. {
  287. int i;
  288. if (!req || !req->buf) {
  289. dev_dbg(imx_ep->imx_usb->dev,
  290. "<%s> req or req buf is free\n", label);
  291. return;
  292. }
  293. if ((!EP_NO(imx_ep) && imx_ep->imx_usb->ep0state
  294. == EP0_IN_DATA_PHASE)
  295. || (EP_NO(imx_ep) && EP_DIR(imx_ep))) {
  296. dev_dbg(imx_ep->imx_usb->dev,
  297. "<%s> request dump <", label);
  298. for (i = 0; i < req->length; i++)
  299. printk("%02x-", *((u8 *)req->buf + i));
  300. printk(">\n");
  301. }
  302. }
  303. #else
  304. #define dump_ep_stat(x, y) do {} while (0)
  305. #define dump_usb_stat(x, y) do {} while (0)
  306. #define dump_req(x, y, z) do {} while (0)
  307. #endif /* DEBUG_DUMP */
  308. #ifdef DEBUG_ERR
  309. #define D_ERR(dev, args...) dev_dbg(dev, ## args)
  310. #else
  311. #define D_ERR(dev, args...) do {} while (0)
  312. #endif
  313. #else
  314. #define D_REQ(dev, args...) do {} while (0)
  315. #define D_TRX(dev, args...) do {} while (0)
  316. #define D_INI(dev, args...) do {} while (0)
  317. #define D_EP0(dev, args...) do {} while (0)
  318. #define D_EPX(dev, args...) do {} while (0)
  319. #define dump_ep_intr(x, y, z, i) do {} while (0)
  320. #define dump_intr(x, y, z) do {} while (0)
  321. #define dump_ep_stat(x, y) do {} while (0)
  322. #define dump_usb_stat(x, y) do {} while (0)
  323. #define dump_req(x, y, z) do {} while (0)
  324. #define D_ERR(dev, args...) do {} while (0)
  325. #endif /* DEBUG */
  326. #endif /* __LINUX_USB_GADGET_IMX_H */