timbuart.c 13 KB

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  1. /*
  2. * timbuart.c timberdale FPGA UART driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * Timberdale FPGA UART
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/kernel.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/ioport.h>
  27. #include "timbuart.h"
  28. struct timbuart_port {
  29. struct uart_port port;
  30. struct tasklet_struct tasklet;
  31. int usedma;
  32. u32 last_ier;
  33. struct platform_device *dev;
  34. };
  35. static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
  36. 921600, 1843200, 3250000};
  37. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
  38. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
  39. static void timbuart_stop_rx(struct uart_port *port)
  40. {
  41. /* spin lock held by upper layer, disable all RX interrupts */
  42. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
  43. iowrite32(ier, port->membase + TIMBUART_IER);
  44. }
  45. static void timbuart_stop_tx(struct uart_port *port)
  46. {
  47. /* spinlock held by upper layer, disable TX interrupt */
  48. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
  49. iowrite32(ier, port->membase + TIMBUART_IER);
  50. }
  51. static void timbuart_start_tx(struct uart_port *port)
  52. {
  53. struct timbuart_port *uart =
  54. container_of(port, struct timbuart_port, port);
  55. /* do not transfer anything here -> fire off the tasklet */
  56. tasklet_schedule(&uart->tasklet);
  57. }
  58. static void timbuart_flush_buffer(struct uart_port *port)
  59. {
  60. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX;
  61. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  62. iowrite32(TXBF, port->membase + TIMBUART_ISR);
  63. }
  64. static void timbuart_rx_chars(struct uart_port *port)
  65. {
  66. struct tty_struct *tty = port->info->port.tty;
  67. while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
  68. u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
  69. port->icount.rx++;
  70. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  71. }
  72. spin_unlock(&port->lock);
  73. tty_flip_buffer_push(port->info->port.tty);
  74. spin_lock(&port->lock);
  75. dev_dbg(port->dev, "%s - total read %d bytes\n",
  76. __func__, port->icount.rx);
  77. }
  78. static void timbuart_tx_chars(struct uart_port *port)
  79. {
  80. struct circ_buf *xmit = &port->info->xmit;
  81. while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
  82. !uart_circ_empty(xmit)) {
  83. iowrite8(xmit->buf[xmit->tail],
  84. port->membase + TIMBUART_TXFIFO);
  85. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  86. port->icount.tx++;
  87. }
  88. dev_dbg(port->dev,
  89. "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
  90. __func__,
  91. port->icount.tx,
  92. ioread8(port->membase + TIMBUART_CTRL),
  93. port->mctrl & TIOCM_RTS,
  94. ioread8(port->membase + TIMBUART_BAUDRATE));
  95. }
  96. static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
  97. {
  98. struct timbuart_port *uart =
  99. container_of(port, struct timbuart_port, port);
  100. struct circ_buf *xmit = &port->info->xmit;
  101. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  102. return;
  103. if (port->x_char)
  104. return;
  105. if (isr & TXFLAGS) {
  106. timbuart_tx_chars(port);
  107. /* clear all TX interrupts */
  108. iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
  109. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  110. uart_write_wakeup(port);
  111. } else
  112. /* Re-enable any tx interrupt */
  113. *ier |= uart->last_ier & TXFLAGS;
  114. /* enable interrupts if there are chars in the transmit buffer,
  115. * Or if we delivered some bytes and want the almost empty interrupt
  116. * we wake up the upper layer later when we got the interrupt
  117. * to give it some time to go out...
  118. */
  119. if (!uart_circ_empty(xmit))
  120. *ier |= TXBAE;
  121. dev_dbg(port->dev, "%s - leaving\n", __func__);
  122. }
  123. void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
  124. {
  125. if (isr & RXFLAGS) {
  126. /* Some RX status is set */
  127. if (isr & RXBF) {
  128. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  129. TIMBUART_CTRL_FLSHRX;
  130. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  131. port->icount.overrun++;
  132. } else if (isr & (RXDP))
  133. timbuart_rx_chars(port);
  134. /* ack all RX interrupts */
  135. iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
  136. }
  137. /* always have the RX interrupts enabled */
  138. *ier |= RXBAF | RXBF | RXTT;
  139. dev_dbg(port->dev, "%s - leaving\n", __func__);
  140. }
  141. void timbuart_tasklet(unsigned long arg)
  142. {
  143. struct timbuart_port *uart = (struct timbuart_port *)arg;
  144. u32 isr, ier = 0;
  145. spin_lock(&uart->port.lock);
  146. isr = ioread32(uart->port.membase + TIMBUART_ISR);
  147. dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
  148. if (!uart->usedma)
  149. timbuart_handle_tx_port(&uart->port, isr, &ier);
  150. timbuart_mctrl_check(&uart->port, isr, &ier);
  151. if (!uart->usedma)
  152. timbuart_handle_rx_port(&uart->port, isr, &ier);
  153. iowrite32(ier, uart->port.membase + TIMBUART_IER);
  154. spin_unlock(&uart->port.lock);
  155. dev_dbg(uart->port.dev, "%s leaving\n", __func__);
  156. }
  157. static unsigned int timbuart_tx_empty(struct uart_port *port)
  158. {
  159. u32 isr = ioread32(port->membase + TIMBUART_ISR);
  160. return (isr & TXBE) ? TIOCSER_TEMT : 0;
  161. }
  162. static unsigned int timbuart_get_mctrl(struct uart_port *port)
  163. {
  164. u8 cts = ioread8(port->membase + TIMBUART_CTRL);
  165. dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
  166. if (cts & TIMBUART_CTRL_CTS)
  167. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  168. else
  169. return TIOCM_DSR | TIOCM_CAR;
  170. }
  171. static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  172. {
  173. dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
  174. if (mctrl & TIOCM_RTS)
  175. iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
  176. else
  177. iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
  178. }
  179. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
  180. {
  181. unsigned int cts;
  182. if (isr & CTS_DELTA) {
  183. /* ack */
  184. iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
  185. cts = timbuart_get_mctrl(port);
  186. uart_handle_cts_change(port, cts & TIOCM_CTS);
  187. wake_up_interruptible(&port->info->delta_msr_wait);
  188. }
  189. *ier |= CTS_DELTA;
  190. }
  191. static void timbuart_enable_ms(struct uart_port *port)
  192. {
  193. /* N/A */
  194. }
  195. static void timbuart_break_ctl(struct uart_port *port, int ctl)
  196. {
  197. /* N/A */
  198. }
  199. static int timbuart_startup(struct uart_port *port)
  200. {
  201. struct timbuart_port *uart =
  202. container_of(port, struct timbuart_port, port);
  203. dev_dbg(port->dev, "%s\n", __func__);
  204. iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
  205. iowrite32(0x1ff, port->membase + TIMBUART_ISR);
  206. /* Enable all but TX interrupts */
  207. iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
  208. port->membase + TIMBUART_IER);
  209. return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
  210. "timb-uart", uart);
  211. }
  212. static void timbuart_shutdown(struct uart_port *port)
  213. {
  214. struct timbuart_port *uart =
  215. container_of(port, struct timbuart_port, port);
  216. dev_dbg(port->dev, "%s\n", __func__);
  217. free_irq(port->irq, uart);
  218. iowrite32(0, port->membase + TIMBUART_IER);
  219. }
  220. static int get_bindex(int baud)
  221. {
  222. int i;
  223. for (i = 0; i < ARRAY_SIZE(baudrates); i++)
  224. if (baud <= baudrates[i])
  225. return i;
  226. return -1;
  227. }
  228. static void timbuart_set_termios(struct uart_port *port,
  229. struct ktermios *termios,
  230. struct ktermios *old)
  231. {
  232. unsigned int baud;
  233. short bindex;
  234. unsigned long flags;
  235. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  236. bindex = get_bindex(baud);
  237. dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
  238. if (bindex < 0)
  239. bindex = 0;
  240. baud = baudrates[bindex];
  241. /* The serial layer calls into this once with old = NULL when setting
  242. up initially */
  243. if (old)
  244. tty_termios_copy_hw(termios, old);
  245. tty_termios_encode_baud_rate(termios, baud, baud);
  246. spin_lock_irqsave(&port->lock, flags);
  247. iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
  248. uart_update_timeout(port, termios->c_cflag, baud);
  249. spin_unlock_irqrestore(&port->lock, flags);
  250. }
  251. static const char *timbuart_type(struct uart_port *port)
  252. {
  253. return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
  254. }
  255. /* We do not request/release mappings of the registers here,
  256. * currently it's done in the proble function.
  257. */
  258. static void timbuart_release_port(struct uart_port *port)
  259. {
  260. struct platform_device *pdev = to_platform_device(port->dev);
  261. int size =
  262. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  263. if (port->flags & UPF_IOREMAP) {
  264. iounmap(port->membase);
  265. port->membase = NULL;
  266. }
  267. release_mem_region(port->mapbase, size);
  268. }
  269. static int timbuart_request_port(struct uart_port *port)
  270. {
  271. struct platform_device *pdev = to_platform_device(port->dev);
  272. int size =
  273. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  274. if (!request_mem_region(port->mapbase, size, "timb-uart"))
  275. return -EBUSY;
  276. if (port->flags & UPF_IOREMAP) {
  277. port->membase = ioremap(port->mapbase, size);
  278. if (port->membase == NULL) {
  279. release_mem_region(port->mapbase, size);
  280. return -ENOMEM;
  281. }
  282. }
  283. return 0;
  284. }
  285. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
  286. {
  287. struct timbuart_port *uart = (struct timbuart_port *)devid;
  288. if (ioread8(uart->port.membase + TIMBUART_IPR)) {
  289. uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
  290. /* disable interrupts, the tasklet enables them again */
  291. iowrite32(0, uart->port.membase + TIMBUART_IER);
  292. /* fire off bottom half */
  293. tasklet_schedule(&uart->tasklet);
  294. return IRQ_HANDLED;
  295. } else
  296. return IRQ_NONE;
  297. }
  298. /*
  299. * Configure/autoconfigure the port.
  300. */
  301. static void timbuart_config_port(struct uart_port *port, int flags)
  302. {
  303. if (flags & UART_CONFIG_TYPE) {
  304. port->type = PORT_TIMBUART;
  305. timbuart_request_port(port);
  306. }
  307. }
  308. static int timbuart_verify_port(struct uart_port *port,
  309. struct serial_struct *ser)
  310. {
  311. /* we don't want the core code to modify any port params */
  312. return -EINVAL;
  313. }
  314. static struct uart_ops timbuart_ops = {
  315. .tx_empty = timbuart_tx_empty,
  316. .set_mctrl = timbuart_set_mctrl,
  317. .get_mctrl = timbuart_get_mctrl,
  318. .stop_tx = timbuart_stop_tx,
  319. .start_tx = timbuart_start_tx,
  320. .flush_buffer = timbuart_flush_buffer,
  321. .stop_rx = timbuart_stop_rx,
  322. .enable_ms = timbuart_enable_ms,
  323. .break_ctl = timbuart_break_ctl,
  324. .startup = timbuart_startup,
  325. .shutdown = timbuart_shutdown,
  326. .set_termios = timbuart_set_termios,
  327. .type = timbuart_type,
  328. .release_port = timbuart_release_port,
  329. .request_port = timbuart_request_port,
  330. .config_port = timbuart_config_port,
  331. .verify_port = timbuart_verify_port
  332. };
  333. static struct uart_driver timbuart_driver = {
  334. .owner = THIS_MODULE,
  335. .driver_name = "timberdale_uart",
  336. .dev_name = "ttyTU",
  337. .major = TIMBUART_MAJOR,
  338. .minor = TIMBUART_MINOR,
  339. .nr = 1
  340. };
  341. static int timbuart_probe(struct platform_device *dev)
  342. {
  343. int err;
  344. struct timbuart_port *uart;
  345. struct resource *iomem;
  346. dev_dbg(&dev->dev, "%s\n", __func__);
  347. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  348. if (!uart) {
  349. err = -EINVAL;
  350. goto err_mem;
  351. }
  352. uart->usedma = 0;
  353. uart->port.uartclk = 3250000 * 16;
  354. uart->port.fifosize = TIMBUART_FIFO_SIZE;
  355. uart->port.regshift = 2;
  356. uart->port.iotype = UPIO_MEM;
  357. uart->port.ops = &timbuart_ops;
  358. uart->port.irq = 0;
  359. uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
  360. uart->port.line = 0;
  361. uart->port.dev = &dev->dev;
  362. iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
  363. if (!iomem) {
  364. err = -ENOMEM;
  365. goto err_register;
  366. }
  367. uart->port.mapbase = iomem->start;
  368. uart->port.membase = NULL;
  369. uart->port.irq = platform_get_irq(dev, 0);
  370. if (uart->port.irq < 0) {
  371. err = -EINVAL;
  372. goto err_register;
  373. }
  374. tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
  375. err = uart_register_driver(&timbuart_driver);
  376. if (err)
  377. goto err_register;
  378. err = uart_add_one_port(&timbuart_driver, &uart->port);
  379. if (err)
  380. goto err_add_port;
  381. platform_set_drvdata(dev, uart);
  382. return 0;
  383. err_add_port:
  384. uart_unregister_driver(&timbuart_driver);
  385. err_register:
  386. kfree(uart);
  387. err_mem:
  388. printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
  389. err);
  390. return err;
  391. }
  392. static int timbuart_remove(struct platform_device *dev)
  393. {
  394. struct timbuart_port *uart = platform_get_drvdata(dev);
  395. tasklet_kill(&uart->tasklet);
  396. uart_remove_one_port(&timbuart_driver, &uart->port);
  397. uart_unregister_driver(&timbuart_driver);
  398. kfree(uart);
  399. return 0;
  400. }
  401. static struct platform_driver timbuart_platform_driver = {
  402. .driver = {
  403. .name = "timb-uart",
  404. .owner = THIS_MODULE,
  405. },
  406. .probe = timbuart_probe,
  407. .remove = timbuart_remove,
  408. };
  409. /*--------------------------------------------------------------------------*/
  410. static int __init timbuart_init(void)
  411. {
  412. return platform_driver_register(&timbuart_platform_driver);
  413. }
  414. static void __exit timbuart_exit(void)
  415. {
  416. platform_driver_unregister(&timbuart_platform_driver);
  417. }
  418. module_init(timbuart_init);
  419. module_exit(timbuart_exit);
  420. MODULE_DESCRIPTION("Timberdale UART driver");
  421. MODULE_LICENSE("GPL v2");
  422. MODULE_ALIAS("platform:timb-uart");