pxa.c 20 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/ioport.h>
  31. #include <linux/init.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/serial_reg.h>
  35. #include <linux/circ_buf.h>
  36. #include <linux/delay.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/tty.h>
  40. #include <linux/tty_flip.h>
  41. #include <linux/serial_core.h>
  42. #include <linux/clk.h>
  43. #include <linux/io.h>
  44. struct uart_pxa_port {
  45. struct uart_port port;
  46. unsigned char ier;
  47. unsigned char lcr;
  48. unsigned char mcr;
  49. unsigned int lsr_break_flag;
  50. struct clk *clk;
  51. char *name;
  52. };
  53. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  54. {
  55. offset <<= 2;
  56. return readl(up->port.membase + offset);
  57. }
  58. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  59. {
  60. offset <<= 2;
  61. writel(value, up->port.membase + offset);
  62. }
  63. static void serial_pxa_enable_ms(struct uart_port *port)
  64. {
  65. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  66. up->ier |= UART_IER_MSI;
  67. serial_out(up, UART_IER, up->ier);
  68. }
  69. static void serial_pxa_stop_tx(struct uart_port *port)
  70. {
  71. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  72. if (up->ier & UART_IER_THRI) {
  73. up->ier &= ~UART_IER_THRI;
  74. serial_out(up, UART_IER, up->ier);
  75. }
  76. }
  77. static void serial_pxa_stop_rx(struct uart_port *port)
  78. {
  79. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  80. up->ier &= ~UART_IER_RLSI;
  81. up->port.read_status_mask &= ~UART_LSR_DR;
  82. serial_out(up, UART_IER, up->ier);
  83. }
  84. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  85. {
  86. struct tty_struct *tty = up->port.info->port.tty;
  87. unsigned int ch, flag;
  88. int max_count = 256;
  89. do {
  90. ch = serial_in(up, UART_RX);
  91. flag = TTY_NORMAL;
  92. up->port.icount.rx++;
  93. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  94. UART_LSR_FE | UART_LSR_OE))) {
  95. /*
  96. * For statistics only
  97. */
  98. if (*status & UART_LSR_BI) {
  99. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  100. up->port.icount.brk++;
  101. /*
  102. * We do the SysRQ and SAK checking
  103. * here because otherwise the break
  104. * may get masked by ignore_status_mask
  105. * or read_status_mask.
  106. */
  107. if (uart_handle_break(&up->port))
  108. goto ignore_char;
  109. } else if (*status & UART_LSR_PE)
  110. up->port.icount.parity++;
  111. else if (*status & UART_LSR_FE)
  112. up->port.icount.frame++;
  113. if (*status & UART_LSR_OE)
  114. up->port.icount.overrun++;
  115. /*
  116. * Mask off conditions which should be ignored.
  117. */
  118. *status &= up->port.read_status_mask;
  119. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  120. if (up->port.line == up->port.cons->index) {
  121. /* Recover the break flag from console xmit */
  122. *status |= up->lsr_break_flag;
  123. up->lsr_break_flag = 0;
  124. }
  125. #endif
  126. if (*status & UART_LSR_BI) {
  127. flag = TTY_BREAK;
  128. } else if (*status & UART_LSR_PE)
  129. flag = TTY_PARITY;
  130. else if (*status & UART_LSR_FE)
  131. flag = TTY_FRAME;
  132. }
  133. if (uart_handle_sysrq_char(&up->port, ch))
  134. goto ignore_char;
  135. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  136. ignore_char:
  137. *status = serial_in(up, UART_LSR);
  138. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  139. tty_flip_buffer_push(tty);
  140. }
  141. static void transmit_chars(struct uart_pxa_port *up)
  142. {
  143. struct circ_buf *xmit = &up->port.info->xmit;
  144. int count;
  145. if (up->port.x_char) {
  146. serial_out(up, UART_TX, up->port.x_char);
  147. up->port.icount.tx++;
  148. up->port.x_char = 0;
  149. return;
  150. }
  151. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  152. serial_pxa_stop_tx(&up->port);
  153. return;
  154. }
  155. count = up->port.fifosize / 2;
  156. do {
  157. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  158. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  159. up->port.icount.tx++;
  160. if (uart_circ_empty(xmit))
  161. break;
  162. } while (--count > 0);
  163. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  164. uart_write_wakeup(&up->port);
  165. if (uart_circ_empty(xmit))
  166. serial_pxa_stop_tx(&up->port);
  167. }
  168. static void serial_pxa_start_tx(struct uart_port *port)
  169. {
  170. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  171. if (!(up->ier & UART_IER_THRI)) {
  172. up->ier |= UART_IER_THRI;
  173. serial_out(up, UART_IER, up->ier);
  174. }
  175. }
  176. static inline void check_modem_status(struct uart_pxa_port *up)
  177. {
  178. int status;
  179. status = serial_in(up, UART_MSR);
  180. if ((status & UART_MSR_ANY_DELTA) == 0)
  181. return;
  182. if (status & UART_MSR_TERI)
  183. up->port.icount.rng++;
  184. if (status & UART_MSR_DDSR)
  185. up->port.icount.dsr++;
  186. if (status & UART_MSR_DDCD)
  187. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  188. if (status & UART_MSR_DCTS)
  189. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  190. wake_up_interruptible(&up->port.info->delta_msr_wait);
  191. }
  192. /*
  193. * This handles the interrupt from one port.
  194. */
  195. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  196. {
  197. struct uart_pxa_port *up = dev_id;
  198. unsigned int iir, lsr;
  199. iir = serial_in(up, UART_IIR);
  200. if (iir & UART_IIR_NO_INT)
  201. return IRQ_NONE;
  202. lsr = serial_in(up, UART_LSR);
  203. if (lsr & UART_LSR_DR)
  204. receive_chars(up, &lsr);
  205. check_modem_status(up);
  206. if (lsr & UART_LSR_THRE)
  207. transmit_chars(up);
  208. return IRQ_HANDLED;
  209. }
  210. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  211. {
  212. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  213. unsigned long flags;
  214. unsigned int ret;
  215. spin_lock_irqsave(&up->port.lock, flags);
  216. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  217. spin_unlock_irqrestore(&up->port.lock, flags);
  218. return ret;
  219. }
  220. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  221. {
  222. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  223. unsigned char status;
  224. unsigned int ret;
  225. status = serial_in(up, UART_MSR);
  226. ret = 0;
  227. if (status & UART_MSR_DCD)
  228. ret |= TIOCM_CAR;
  229. if (status & UART_MSR_RI)
  230. ret |= TIOCM_RNG;
  231. if (status & UART_MSR_DSR)
  232. ret |= TIOCM_DSR;
  233. if (status & UART_MSR_CTS)
  234. ret |= TIOCM_CTS;
  235. return ret;
  236. }
  237. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  238. {
  239. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  240. unsigned char mcr = 0;
  241. if (mctrl & TIOCM_RTS)
  242. mcr |= UART_MCR_RTS;
  243. if (mctrl & TIOCM_DTR)
  244. mcr |= UART_MCR_DTR;
  245. if (mctrl & TIOCM_OUT1)
  246. mcr |= UART_MCR_OUT1;
  247. if (mctrl & TIOCM_OUT2)
  248. mcr |= UART_MCR_OUT2;
  249. if (mctrl & TIOCM_LOOP)
  250. mcr |= UART_MCR_LOOP;
  251. mcr |= up->mcr;
  252. serial_out(up, UART_MCR, mcr);
  253. }
  254. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  255. {
  256. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  257. unsigned long flags;
  258. spin_lock_irqsave(&up->port.lock, flags);
  259. if (break_state == -1)
  260. up->lcr |= UART_LCR_SBC;
  261. else
  262. up->lcr &= ~UART_LCR_SBC;
  263. serial_out(up, UART_LCR, up->lcr);
  264. spin_unlock_irqrestore(&up->port.lock, flags);
  265. }
  266. #if 0
  267. static void serial_pxa_dma_init(struct pxa_uart *up)
  268. {
  269. up->rxdma =
  270. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  271. if (up->rxdma < 0)
  272. goto out;
  273. up->txdma =
  274. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  275. if (up->txdma < 0)
  276. goto err_txdma;
  277. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  278. if (!up->dmadesc)
  279. goto err_alloc;
  280. /* ... */
  281. err_alloc:
  282. pxa_free_dma(up->txdma);
  283. err_rxdma:
  284. pxa_free_dma(up->rxdma);
  285. out:
  286. return;
  287. }
  288. #endif
  289. static int serial_pxa_startup(struct uart_port *port)
  290. {
  291. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  292. unsigned long flags;
  293. int retval;
  294. if (port->line == 3) /* HWUART */
  295. up->mcr |= UART_MCR_AFE;
  296. else
  297. up->mcr = 0;
  298. up->port.uartclk = clk_get_rate(up->clk);
  299. /*
  300. * Allocate the IRQ
  301. */
  302. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  303. if (retval)
  304. return retval;
  305. /*
  306. * Clear the FIFO buffers and disable them.
  307. * (they will be reenabled in set_termios())
  308. */
  309. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  310. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  311. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  312. serial_out(up, UART_FCR, 0);
  313. /*
  314. * Clear the interrupt registers.
  315. */
  316. (void) serial_in(up, UART_LSR);
  317. (void) serial_in(up, UART_RX);
  318. (void) serial_in(up, UART_IIR);
  319. (void) serial_in(up, UART_MSR);
  320. /*
  321. * Now, initialize the UART
  322. */
  323. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  324. spin_lock_irqsave(&up->port.lock, flags);
  325. up->port.mctrl |= TIOCM_OUT2;
  326. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  327. spin_unlock_irqrestore(&up->port.lock, flags);
  328. /*
  329. * Finally, enable interrupts. Note: Modem status interrupts
  330. * are set via set_termios(), which will be occurring imminently
  331. * anyway, so we don't enable them here.
  332. */
  333. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  334. serial_out(up, UART_IER, up->ier);
  335. /*
  336. * And clear the interrupt registers again for luck.
  337. */
  338. (void) serial_in(up, UART_LSR);
  339. (void) serial_in(up, UART_RX);
  340. (void) serial_in(up, UART_IIR);
  341. (void) serial_in(up, UART_MSR);
  342. return 0;
  343. }
  344. static void serial_pxa_shutdown(struct uart_port *port)
  345. {
  346. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  347. unsigned long flags;
  348. free_irq(up->port.irq, up);
  349. /*
  350. * Disable interrupts from this port
  351. */
  352. up->ier = 0;
  353. serial_out(up, UART_IER, 0);
  354. spin_lock_irqsave(&up->port.lock, flags);
  355. up->port.mctrl &= ~TIOCM_OUT2;
  356. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  357. spin_unlock_irqrestore(&up->port.lock, flags);
  358. /*
  359. * Disable break condition and FIFOs
  360. */
  361. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  362. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  363. UART_FCR_CLEAR_RCVR |
  364. UART_FCR_CLEAR_XMIT);
  365. serial_out(up, UART_FCR, 0);
  366. }
  367. static void
  368. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  369. struct ktermios *old)
  370. {
  371. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  372. unsigned char cval, fcr = 0;
  373. unsigned long flags;
  374. unsigned int baud, quot;
  375. switch (termios->c_cflag & CSIZE) {
  376. case CS5:
  377. cval = UART_LCR_WLEN5;
  378. break;
  379. case CS6:
  380. cval = UART_LCR_WLEN6;
  381. break;
  382. case CS7:
  383. cval = UART_LCR_WLEN7;
  384. break;
  385. default:
  386. case CS8:
  387. cval = UART_LCR_WLEN8;
  388. break;
  389. }
  390. if (termios->c_cflag & CSTOPB)
  391. cval |= UART_LCR_STOP;
  392. if (termios->c_cflag & PARENB)
  393. cval |= UART_LCR_PARITY;
  394. if (!(termios->c_cflag & PARODD))
  395. cval |= UART_LCR_EPAR;
  396. /*
  397. * Ask the core to calculate the divisor for us.
  398. */
  399. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  400. quot = uart_get_divisor(port, baud);
  401. if ((up->port.uartclk / quot) < (2400 * 16))
  402. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  403. else if ((up->port.uartclk / quot) < (230400 * 16))
  404. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  405. else
  406. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  407. /*
  408. * Ok, we're now changing the port state. Do it with
  409. * interrupts disabled.
  410. */
  411. spin_lock_irqsave(&up->port.lock, flags);
  412. /*
  413. * Ensure the port will be enabled.
  414. * This is required especially for serial console.
  415. */
  416. up->ier |= UART_IER_UUE;
  417. /*
  418. * Update the per-port timeout.
  419. */
  420. uart_update_timeout(port, termios->c_cflag, baud);
  421. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  422. if (termios->c_iflag & INPCK)
  423. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  424. if (termios->c_iflag & (BRKINT | PARMRK))
  425. up->port.read_status_mask |= UART_LSR_BI;
  426. /*
  427. * Characters to ignore
  428. */
  429. up->port.ignore_status_mask = 0;
  430. if (termios->c_iflag & IGNPAR)
  431. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  432. if (termios->c_iflag & IGNBRK) {
  433. up->port.ignore_status_mask |= UART_LSR_BI;
  434. /*
  435. * If we're ignoring parity and break indicators,
  436. * ignore overruns too (for real raw support).
  437. */
  438. if (termios->c_iflag & IGNPAR)
  439. up->port.ignore_status_mask |= UART_LSR_OE;
  440. }
  441. /*
  442. * ignore all characters if CREAD is not set
  443. */
  444. if ((termios->c_cflag & CREAD) == 0)
  445. up->port.ignore_status_mask |= UART_LSR_DR;
  446. /*
  447. * CTS flow control flag and modem status interrupts
  448. */
  449. up->ier &= ~UART_IER_MSI;
  450. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  451. up->ier |= UART_IER_MSI;
  452. serial_out(up, UART_IER, up->ier);
  453. if (termios->c_cflag & CRTSCTS)
  454. up->mcr |= UART_MCR_AFE;
  455. else
  456. up->mcr &= ~UART_MCR_AFE;
  457. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  458. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  459. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  460. serial_out(up, UART_LCR, cval); /* reset DLAB */
  461. up->lcr = cval; /* Save LCR */
  462. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  463. serial_out(up, UART_FCR, fcr);
  464. spin_unlock_irqrestore(&up->port.lock, flags);
  465. }
  466. static void
  467. serial_pxa_pm(struct uart_port *port, unsigned int state,
  468. unsigned int oldstate)
  469. {
  470. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  471. if (!state)
  472. clk_enable(up->clk);
  473. else
  474. clk_disable(up->clk);
  475. }
  476. static void serial_pxa_release_port(struct uart_port *port)
  477. {
  478. }
  479. static int serial_pxa_request_port(struct uart_port *port)
  480. {
  481. return 0;
  482. }
  483. static void serial_pxa_config_port(struct uart_port *port, int flags)
  484. {
  485. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  486. up->port.type = PORT_PXA;
  487. }
  488. static int
  489. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  490. {
  491. /* we don't want the core code to modify any port params */
  492. return -EINVAL;
  493. }
  494. static const char *
  495. serial_pxa_type(struct uart_port *port)
  496. {
  497. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  498. return up->name;
  499. }
  500. static struct uart_pxa_port *serial_pxa_ports[4];
  501. static struct uart_driver serial_pxa_reg;
  502. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  503. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  504. /*
  505. * Wait for transmitter & holding register to empty
  506. */
  507. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  508. {
  509. unsigned int status, tmout = 10000;
  510. /* Wait up to 10ms for the character(s) to be sent. */
  511. do {
  512. status = serial_in(up, UART_LSR);
  513. if (status & UART_LSR_BI)
  514. up->lsr_break_flag = UART_LSR_BI;
  515. if (--tmout == 0)
  516. break;
  517. udelay(1);
  518. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  519. /* Wait up to 1s for flow control if necessary */
  520. if (up->port.flags & UPF_CONS_FLOW) {
  521. tmout = 1000000;
  522. while (--tmout &&
  523. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  524. udelay(1);
  525. }
  526. }
  527. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  528. {
  529. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  530. wait_for_xmitr(up);
  531. serial_out(up, UART_TX, ch);
  532. }
  533. /*
  534. * Print a string to the serial port trying not to disturb
  535. * any possible real use of the port...
  536. *
  537. * The console_lock must be held when we get here.
  538. */
  539. static void
  540. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  541. {
  542. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  543. unsigned int ier;
  544. clk_enable(up->clk);
  545. /*
  546. * First save the IER then disable the interrupts
  547. */
  548. ier = serial_in(up, UART_IER);
  549. serial_out(up, UART_IER, UART_IER_UUE);
  550. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  551. /*
  552. * Finally, wait for transmitter to become empty
  553. * and restore the IER
  554. */
  555. wait_for_xmitr(up);
  556. serial_out(up, UART_IER, ier);
  557. clk_disable(up->clk);
  558. }
  559. static int __init
  560. serial_pxa_console_setup(struct console *co, char *options)
  561. {
  562. struct uart_pxa_port *up;
  563. int baud = 9600;
  564. int bits = 8;
  565. int parity = 'n';
  566. int flow = 'n';
  567. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  568. co->index = 0;
  569. up = serial_pxa_ports[co->index];
  570. if (!up)
  571. return -ENODEV;
  572. if (options)
  573. uart_parse_options(options, &baud, &parity, &bits, &flow);
  574. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  575. }
  576. static struct console serial_pxa_console = {
  577. .name = "ttyS",
  578. .write = serial_pxa_console_write,
  579. .device = uart_console_device,
  580. .setup = serial_pxa_console_setup,
  581. .flags = CON_PRINTBUFFER,
  582. .index = -1,
  583. .data = &serial_pxa_reg,
  584. };
  585. #define PXA_CONSOLE &serial_pxa_console
  586. #else
  587. #define PXA_CONSOLE NULL
  588. #endif
  589. struct uart_ops serial_pxa_pops = {
  590. .tx_empty = serial_pxa_tx_empty,
  591. .set_mctrl = serial_pxa_set_mctrl,
  592. .get_mctrl = serial_pxa_get_mctrl,
  593. .stop_tx = serial_pxa_stop_tx,
  594. .start_tx = serial_pxa_start_tx,
  595. .stop_rx = serial_pxa_stop_rx,
  596. .enable_ms = serial_pxa_enable_ms,
  597. .break_ctl = serial_pxa_break_ctl,
  598. .startup = serial_pxa_startup,
  599. .shutdown = serial_pxa_shutdown,
  600. .set_termios = serial_pxa_set_termios,
  601. .pm = serial_pxa_pm,
  602. .type = serial_pxa_type,
  603. .release_port = serial_pxa_release_port,
  604. .request_port = serial_pxa_request_port,
  605. .config_port = serial_pxa_config_port,
  606. .verify_port = serial_pxa_verify_port,
  607. };
  608. static struct uart_driver serial_pxa_reg = {
  609. .owner = THIS_MODULE,
  610. .driver_name = "PXA serial",
  611. .dev_name = "ttyS",
  612. .major = TTY_MAJOR,
  613. .minor = 64,
  614. .nr = 4,
  615. .cons = PXA_CONSOLE,
  616. };
  617. static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
  618. {
  619. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  620. if (sport)
  621. uart_suspend_port(&serial_pxa_reg, &sport->port);
  622. return 0;
  623. }
  624. static int serial_pxa_resume(struct platform_device *dev)
  625. {
  626. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  627. if (sport)
  628. uart_resume_port(&serial_pxa_reg, &sport->port);
  629. return 0;
  630. }
  631. static int serial_pxa_probe(struct platform_device *dev)
  632. {
  633. struct uart_pxa_port *sport;
  634. struct resource *mmres, *irqres;
  635. int ret;
  636. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  637. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  638. if (!mmres || !irqres)
  639. return -ENODEV;
  640. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  641. if (!sport)
  642. return -ENOMEM;
  643. sport->clk = clk_get(&dev->dev, NULL);
  644. if (IS_ERR(sport->clk)) {
  645. ret = PTR_ERR(sport->clk);
  646. goto err_free;
  647. }
  648. sport->port.type = PORT_PXA;
  649. sport->port.iotype = UPIO_MEM;
  650. sport->port.mapbase = mmres->start;
  651. sport->port.irq = irqres->start;
  652. sport->port.fifosize = 64;
  653. sport->port.ops = &serial_pxa_pops;
  654. sport->port.line = dev->id;
  655. sport->port.dev = &dev->dev;
  656. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  657. sport->port.uartclk = clk_get_rate(sport->clk);
  658. switch (dev->id) {
  659. case 0: sport->name = "FFUART"; break;
  660. case 1: sport->name = "BTUART"; break;
  661. case 2: sport->name = "STUART"; break;
  662. case 3: sport->name = "HWUART"; break;
  663. default:
  664. sport->name = "???";
  665. break;
  666. }
  667. sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1);
  668. if (!sport->port.membase) {
  669. ret = -ENOMEM;
  670. goto err_clk;
  671. }
  672. serial_pxa_ports[dev->id] = sport;
  673. uart_add_one_port(&serial_pxa_reg, &sport->port);
  674. platform_set_drvdata(dev, sport);
  675. return 0;
  676. err_clk:
  677. clk_put(sport->clk);
  678. err_free:
  679. kfree(sport);
  680. return ret;
  681. }
  682. static int serial_pxa_remove(struct platform_device *dev)
  683. {
  684. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  685. platform_set_drvdata(dev, NULL);
  686. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  687. clk_put(sport->clk);
  688. kfree(sport);
  689. return 0;
  690. }
  691. static struct platform_driver serial_pxa_driver = {
  692. .probe = serial_pxa_probe,
  693. .remove = serial_pxa_remove,
  694. .suspend = serial_pxa_suspend,
  695. .resume = serial_pxa_resume,
  696. .driver = {
  697. .name = "pxa2xx-uart",
  698. .owner = THIS_MODULE,
  699. },
  700. };
  701. int __init serial_pxa_init(void)
  702. {
  703. int ret;
  704. ret = uart_register_driver(&serial_pxa_reg);
  705. if (ret != 0)
  706. return ret;
  707. ret = platform_driver_register(&serial_pxa_driver);
  708. if (ret != 0)
  709. uart_unregister_driver(&serial_pxa_reg);
  710. return ret;
  711. }
  712. void __exit serial_pxa_exit(void)
  713. {
  714. platform_driver_unregister(&serial_pxa_driver);
  715. uart_unregister_driver(&serial_pxa_reg);
  716. }
  717. module_init(serial_pxa_init);
  718. module_exit(serial_pxa_exit);
  719. MODULE_LICENSE("GPL");
  720. MODULE_ALIAS("platform:pxa2xx-uart");