bfin_5xx.c 37 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2008 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #include <linux/module.h>
  14. #include <linux/ioport.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/sysrq.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/tty.h>
  20. #include <linux/tty_flip.h>
  21. #include <linux/serial_core.h>
  22. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  23. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  24. #include <linux/kgdb.h>
  25. #include <asm/irq_regs.h>
  26. #endif
  27. #include <asm/gpio.h>
  28. #include <mach/bfin_serial_5xx.h>
  29. #ifdef CONFIG_SERIAL_BFIN_DMA
  30. #include <linux/dma-mapping.h>
  31. #include <asm/io.h>
  32. #include <asm/irq.h>
  33. #include <asm/cacheflush.h>
  34. #endif
  35. #ifdef CONFIG_SERIAL_BFIN_MODULE
  36. # undef CONFIG_EARLY_PRINTK
  37. #endif
  38. /* UART name and device definitions */
  39. #define BFIN_SERIAL_NAME "ttyBF"
  40. #define BFIN_SERIAL_MAJOR 204
  41. #define BFIN_SERIAL_MINOR 64
  42. static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
  43. static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
  44. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  45. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  46. # ifndef CONFIG_SERIAL_BFIN_PIO
  47. # error KGDB only support UART in PIO mode.
  48. # endif
  49. static int kgdboc_port_line;
  50. static int kgdboc_break_enabled;
  51. #endif
  52. /*
  53. * Setup for console. Argument comes from the menuconfig
  54. */
  55. #define DMA_RX_XCOUNT 512
  56. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  57. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  58. #ifdef CONFIG_SERIAL_BFIN_DMA
  59. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  60. #else
  61. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  62. #endif
  63. static void bfin_serial_reset_irda(struct uart_port *port);
  64. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  65. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  66. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  67. {
  68. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  69. if (uart->cts_pin < 0)
  70. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  71. /* CTS PIN is negative assertive. */
  72. if (UART_GET_CTS(uart))
  73. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  74. else
  75. return TIOCM_DSR | TIOCM_CAR;
  76. }
  77. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  78. {
  79. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  80. if (uart->rts_pin < 0)
  81. return;
  82. /* RTS PIN is negative assertive. */
  83. if (mctrl & TIOCM_RTS)
  84. UART_ENABLE_RTS(uart);
  85. else
  86. UART_DISABLE_RTS(uart);
  87. }
  88. /*
  89. * Handle any change of modem status signal.
  90. */
  91. static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
  92. {
  93. struct bfin_serial_port *uart = dev_id;
  94. unsigned int status;
  95. status = bfin_serial_get_mctrl(&uart->port);
  96. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  97. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  98. uart->scts = 1;
  99. UART_CLEAR_SCTS(uart);
  100. UART_CLEAR_IER(uart, EDSSI);
  101. #endif
  102. return IRQ_HANDLED;
  103. }
  104. #else
  105. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  106. {
  107. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  108. }
  109. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  110. {
  111. }
  112. #endif
  113. /*
  114. * interrupts are disabled on entry
  115. */
  116. static void bfin_serial_stop_tx(struct uart_port *port)
  117. {
  118. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  119. #ifdef CONFIG_SERIAL_BFIN_DMA
  120. struct circ_buf *xmit = &uart->port.info->xmit;
  121. #endif
  122. while (!(UART_GET_LSR(uart) & TEMT))
  123. cpu_relax();
  124. #ifdef CONFIG_SERIAL_BFIN_DMA
  125. disable_dma(uart->tx_dma_channel);
  126. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  127. uart->port.icount.tx += uart->tx_count;
  128. uart->tx_count = 0;
  129. uart->tx_done = 1;
  130. #else
  131. #ifdef CONFIG_BF54x
  132. /* Clear TFI bit */
  133. UART_PUT_LSR(uart, TFI);
  134. #endif
  135. UART_CLEAR_IER(uart, ETBEI);
  136. #endif
  137. }
  138. /*
  139. * port is locked and interrupts are disabled
  140. */
  141. static void bfin_serial_start_tx(struct uart_port *port)
  142. {
  143. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  144. struct tty_struct *tty = uart->port.info->port.tty;
  145. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  146. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
  147. uart->scts = 0;
  148. uart_handle_cts_change(&uart->port, uart->scts);
  149. }
  150. #endif
  151. /*
  152. * To avoid losting RX interrupt, we reset IR function
  153. * before sending data.
  154. */
  155. if (tty->termios->c_line == N_IRDA)
  156. bfin_serial_reset_irda(port);
  157. #ifdef CONFIG_SERIAL_BFIN_DMA
  158. if (uart->tx_done)
  159. bfin_serial_dma_tx_chars(uart);
  160. #else
  161. UART_SET_IER(uart, ETBEI);
  162. bfin_serial_tx_chars(uart);
  163. #endif
  164. }
  165. /*
  166. * Interrupts are enabled
  167. */
  168. static void bfin_serial_stop_rx(struct uart_port *port)
  169. {
  170. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  171. UART_CLEAR_IER(uart, ERBFI);
  172. }
  173. /*
  174. * Set the modem control timer to fire immediately.
  175. */
  176. static void bfin_serial_enable_ms(struct uart_port *port)
  177. {
  178. }
  179. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  180. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  181. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  182. #else
  183. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  184. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  185. #endif
  186. #ifdef CONFIG_SERIAL_BFIN_PIO
  187. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  188. {
  189. struct tty_struct *tty = NULL;
  190. unsigned int status, ch, flg;
  191. static struct timeval anomaly_start = { .tv_sec = 0 };
  192. status = UART_GET_LSR(uart);
  193. UART_CLEAR_LSR(uart);
  194. ch = UART_GET_CHAR(uart);
  195. uart->port.icount.rx++;
  196. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  197. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  198. if (kgdb_connected && kgdboc_port_line == uart->port.line)
  199. if (ch == 0x3) {/* Ctrl + C */
  200. kgdb_breakpoint();
  201. return;
  202. }
  203. if (!uart->port.info || !uart->port.info->port.tty)
  204. return;
  205. #endif
  206. tty = uart->port.info->port.tty;
  207. if (ANOMALY_05000363) {
  208. /* The BF533 (and BF561) family of processors have a nice anomaly
  209. * where they continuously generate characters for a "single" break.
  210. * We have to basically ignore this flood until the "next" valid
  211. * character comes across. Due to the nature of the flood, it is
  212. * not possible to reliably catch bytes that are sent too quickly
  213. * after this break. So application code talking to the Blackfin
  214. * which sends a break signal must allow at least 1.5 character
  215. * times after the end of the break for things to stabilize. This
  216. * timeout was picked as it must absolutely be larger than 1
  217. * character time +/- some percent. So 1.5 sounds good. All other
  218. * Blackfin families operate properly. Woo.
  219. */
  220. if (anomaly_start.tv_sec) {
  221. struct timeval curr;
  222. suseconds_t usecs;
  223. if ((~ch & (~ch + 1)) & 0xff)
  224. goto known_good_char;
  225. do_gettimeofday(&curr);
  226. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  227. goto known_good_char;
  228. usecs = 0;
  229. if (curr.tv_sec != anomaly_start.tv_sec)
  230. usecs += USEC_PER_SEC;
  231. usecs += curr.tv_usec - anomaly_start.tv_usec;
  232. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  233. goto known_good_char;
  234. if (ch)
  235. anomaly_start.tv_sec = 0;
  236. else
  237. anomaly_start = curr;
  238. return;
  239. known_good_char:
  240. status &= ~BI;
  241. anomaly_start.tv_sec = 0;
  242. }
  243. }
  244. if (status & BI) {
  245. if (ANOMALY_05000363)
  246. if (bfin_revid() < 5)
  247. do_gettimeofday(&anomaly_start);
  248. uart->port.icount.brk++;
  249. if (uart_handle_break(&uart->port))
  250. goto ignore_char;
  251. status &= ~(PE | FE);
  252. }
  253. if (status & PE)
  254. uart->port.icount.parity++;
  255. if (status & OE)
  256. uart->port.icount.overrun++;
  257. if (status & FE)
  258. uart->port.icount.frame++;
  259. status &= uart->port.read_status_mask;
  260. if (status & BI)
  261. flg = TTY_BREAK;
  262. else if (status & PE)
  263. flg = TTY_PARITY;
  264. else if (status & FE)
  265. flg = TTY_FRAME;
  266. else
  267. flg = TTY_NORMAL;
  268. if (uart_handle_sysrq_char(&uart->port, ch))
  269. goto ignore_char;
  270. uart_insert_char(&uart->port, status, OE, ch, flg);
  271. ignore_char:
  272. tty_flip_buffer_push(tty);
  273. }
  274. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  275. {
  276. struct circ_buf *xmit = &uart->port.info->xmit;
  277. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  278. #ifdef CONFIG_BF54x
  279. /* Clear TFI bit */
  280. UART_PUT_LSR(uart, TFI);
  281. #endif
  282. /* Anomaly notes:
  283. * 05000215 - we always clear ETBEI within last UART TX
  284. * interrupt to end a string. It is always set
  285. * when start a new tx.
  286. */
  287. UART_CLEAR_IER(uart, ETBEI);
  288. return;
  289. }
  290. if (uart->port.x_char) {
  291. UART_PUT_CHAR(uart, uart->port.x_char);
  292. uart->port.icount.tx++;
  293. uart->port.x_char = 0;
  294. }
  295. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  296. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  297. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  298. uart->port.icount.tx++;
  299. SSYNC();
  300. }
  301. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  302. uart_write_wakeup(&uart->port);
  303. }
  304. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  305. {
  306. struct bfin_serial_port *uart = dev_id;
  307. spin_lock(&uart->port.lock);
  308. while (UART_GET_LSR(uart) & DR)
  309. bfin_serial_rx_chars(uart);
  310. spin_unlock(&uart->port.lock);
  311. return IRQ_HANDLED;
  312. }
  313. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  314. {
  315. struct bfin_serial_port *uart = dev_id;
  316. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  317. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
  318. uart->scts = 0;
  319. uart_handle_cts_change(&uart->port, uart->scts);
  320. }
  321. #endif
  322. spin_lock(&uart->port.lock);
  323. if (UART_GET_LSR(uart) & THRE)
  324. bfin_serial_tx_chars(uart);
  325. spin_unlock(&uart->port.lock);
  326. return IRQ_HANDLED;
  327. }
  328. #endif
  329. #ifdef CONFIG_SERIAL_BFIN_DMA
  330. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  331. {
  332. struct circ_buf *xmit = &uart->port.info->xmit;
  333. uart->tx_done = 0;
  334. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  335. uart->tx_count = 0;
  336. uart->tx_done = 1;
  337. return;
  338. }
  339. if (uart->port.x_char) {
  340. UART_PUT_CHAR(uart, uart->port.x_char);
  341. uart->port.icount.tx++;
  342. uart->port.x_char = 0;
  343. }
  344. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  345. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  346. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  347. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  348. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  349. set_dma_config(uart->tx_dma_channel,
  350. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  351. INTR_ON_BUF,
  352. DIMENSION_LINEAR,
  353. DATA_SIZE_8,
  354. DMA_SYNC_RESTART));
  355. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  356. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  357. set_dma_x_modify(uart->tx_dma_channel, 1);
  358. SSYNC();
  359. enable_dma(uart->tx_dma_channel);
  360. UART_SET_IER(uart, ETBEI);
  361. }
  362. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  363. {
  364. struct tty_struct *tty = uart->port.info->port.tty;
  365. int i, flg, status;
  366. status = UART_GET_LSR(uart);
  367. UART_CLEAR_LSR(uart);
  368. uart->port.icount.rx +=
  369. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  370. UART_XMIT_SIZE);
  371. if (status & BI) {
  372. uart->port.icount.brk++;
  373. if (uart_handle_break(&uart->port))
  374. goto dma_ignore_char;
  375. status &= ~(PE | FE);
  376. }
  377. if (status & PE)
  378. uart->port.icount.parity++;
  379. if (status & OE)
  380. uart->port.icount.overrun++;
  381. if (status & FE)
  382. uart->port.icount.frame++;
  383. status &= uart->port.read_status_mask;
  384. if (status & BI)
  385. flg = TTY_BREAK;
  386. else if (status & PE)
  387. flg = TTY_PARITY;
  388. else if (status & FE)
  389. flg = TTY_FRAME;
  390. else
  391. flg = TTY_NORMAL;
  392. for (i = uart->rx_dma_buf.tail; ; i++) {
  393. if (i >= UART_XMIT_SIZE)
  394. i = 0;
  395. if (i == uart->rx_dma_buf.head)
  396. break;
  397. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  398. uart_insert_char(&uart->port, status, OE,
  399. uart->rx_dma_buf.buf[i], flg);
  400. }
  401. dma_ignore_char:
  402. tty_flip_buffer_push(tty);
  403. }
  404. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  405. {
  406. int x_pos, pos;
  407. dma_disable_irq(uart->rx_dma_channel);
  408. spin_lock_bh(&uart->port.lock);
  409. /* 2D DMA RX buffer ring is used. Because curr_y_count and
  410. * curr_x_count can't be read as an atomic operation,
  411. * curr_y_count should be read before curr_x_count. When
  412. * curr_x_count is read, curr_y_count may already indicate
  413. * next buffer line. But, the position calculated here is
  414. * still indicate the old line. The wrong position data may
  415. * be smaller than current buffer tail, which cause garbages
  416. * are received if it is not prohibit.
  417. */
  418. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  419. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  420. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  421. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  422. uart->rx_dma_nrows = 0;
  423. x_pos = DMA_RX_XCOUNT - x_pos;
  424. if (x_pos == DMA_RX_XCOUNT)
  425. x_pos = 0;
  426. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  427. /* Ignore receiving data if new position is in the same line of
  428. * current buffer tail and small.
  429. */
  430. if (pos > uart->rx_dma_buf.tail ||
  431. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  432. uart->rx_dma_buf.head = pos;
  433. bfin_serial_dma_rx_chars(uart);
  434. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  435. }
  436. spin_unlock_bh(&uart->port.lock);
  437. dma_enable_irq(uart->rx_dma_channel);
  438. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  439. }
  440. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  441. {
  442. struct bfin_serial_port *uart = dev_id;
  443. struct circ_buf *xmit = &uart->port.info->xmit;
  444. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  445. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
  446. uart->scts = 0;
  447. uart_handle_cts_change(&uart->port, uart->scts);
  448. }
  449. #endif
  450. spin_lock(&uart->port.lock);
  451. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  452. disable_dma(uart->tx_dma_channel);
  453. clear_dma_irqstat(uart->tx_dma_channel);
  454. /* Anomaly notes:
  455. * 05000215 - we always clear ETBEI within last UART TX
  456. * interrupt to end a string. It is always set
  457. * when start a new tx.
  458. */
  459. UART_CLEAR_IER(uart, ETBEI);
  460. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  461. uart->port.icount.tx += uart->tx_count;
  462. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  463. uart_write_wakeup(&uart->port);
  464. bfin_serial_dma_tx_chars(uart);
  465. }
  466. spin_unlock(&uart->port.lock);
  467. return IRQ_HANDLED;
  468. }
  469. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  470. {
  471. struct bfin_serial_port *uart = dev_id;
  472. unsigned short irqstat;
  473. int x_pos, pos;
  474. spin_lock(&uart->port.lock);
  475. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  476. clear_dma_irqstat(uart->rx_dma_channel);
  477. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  478. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  479. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  480. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  481. uart->rx_dma_nrows = 0;
  482. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
  483. if (pos > uart->rx_dma_buf.tail ||
  484. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  485. uart->rx_dma_buf.head = pos;
  486. bfin_serial_dma_rx_chars(uart);
  487. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  488. }
  489. spin_unlock(&uart->port.lock);
  490. return IRQ_HANDLED;
  491. }
  492. #endif
  493. /*
  494. * Return TIOCSER_TEMT when transmitter is not busy.
  495. */
  496. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  497. {
  498. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  499. unsigned short lsr;
  500. lsr = UART_GET_LSR(uart);
  501. if (lsr & TEMT)
  502. return TIOCSER_TEMT;
  503. else
  504. return 0;
  505. }
  506. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  507. {
  508. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  509. u16 lcr = UART_GET_LCR(uart);
  510. if (break_state)
  511. lcr |= SB;
  512. else
  513. lcr &= ~SB;
  514. UART_PUT_LCR(uart, lcr);
  515. SSYNC();
  516. }
  517. static int bfin_serial_startup(struct uart_port *port)
  518. {
  519. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  520. #ifdef CONFIG_SERIAL_BFIN_DMA
  521. dma_addr_t dma_handle;
  522. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  523. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  524. return -EBUSY;
  525. }
  526. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  527. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  528. free_dma(uart->rx_dma_channel);
  529. return -EBUSY;
  530. }
  531. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  532. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  533. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  534. uart->rx_dma_buf.head = 0;
  535. uart->rx_dma_buf.tail = 0;
  536. uart->rx_dma_nrows = 0;
  537. set_dma_config(uart->rx_dma_channel,
  538. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  539. INTR_ON_ROW, DIMENSION_2D,
  540. DATA_SIZE_8,
  541. DMA_SYNC_RESTART));
  542. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  543. set_dma_x_modify(uart->rx_dma_channel, 1);
  544. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  545. set_dma_y_modify(uart->rx_dma_channel, 1);
  546. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  547. enable_dma(uart->rx_dma_channel);
  548. uart->rx_dma_timer.data = (unsigned long)(uart);
  549. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  550. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  551. add_timer(&(uart->rx_dma_timer));
  552. #else
  553. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  554. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  555. if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
  556. kgdboc_break_enabled = 0;
  557. else {
  558. # endif
  559. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  560. "BFIN_UART_RX", uart)) {
  561. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  562. return -EBUSY;
  563. }
  564. if (request_irq
  565. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  566. "BFIN_UART_TX", uart)) {
  567. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  568. free_irq(uart->port.irq, uart);
  569. return -EBUSY;
  570. }
  571. # ifdef CONFIG_BF54x
  572. {
  573. unsigned uart_dma_ch_rx, uart_dma_ch_tx;
  574. switch (uart->port.irq) {
  575. case IRQ_UART3_RX:
  576. uart_dma_ch_rx = CH_UART3_RX;
  577. uart_dma_ch_tx = CH_UART3_TX;
  578. break;
  579. case IRQ_UART2_RX:
  580. uart_dma_ch_rx = CH_UART2_RX;
  581. uart_dma_ch_tx = CH_UART2_TX;
  582. break;
  583. default:
  584. uart_dma_ch_rx = uart_dma_ch_tx = 0;
  585. break;
  586. };
  587. if (uart_dma_ch_rx &&
  588. request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
  589. printk(KERN_NOTICE"Fail to attach UART interrupt\n");
  590. free_irq(uart->port.irq, uart);
  591. free_irq(uart->port.irq + 1, uart);
  592. return -EBUSY;
  593. }
  594. if (uart_dma_ch_tx &&
  595. request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
  596. printk(KERN_NOTICE "Fail to attach UART interrupt\n");
  597. free_dma(uart_dma_ch_rx);
  598. free_irq(uart->port.irq, uart);
  599. free_irq(uart->port.irq + 1, uart);
  600. return -EBUSY;
  601. }
  602. }
  603. # endif
  604. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  605. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  606. }
  607. # endif
  608. #endif
  609. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  610. if (uart->cts_pin >= 0) {
  611. if (request_irq(gpio_to_irq(uart->cts_pin),
  612. bfin_serial_mctrl_cts_int,
  613. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
  614. IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
  615. uart->cts_pin = -1;
  616. pr_info("Unable to attach BlackFin UART CTS interrupt.\
  617. So, disable it.\n");
  618. }
  619. }
  620. if (uart->rts_pin >= 0) {
  621. gpio_request(uart->rts_pin, DRIVER_NAME);
  622. gpio_direction_output(uart->rts_pin, 0);
  623. }
  624. #endif
  625. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  626. if (request_irq(uart->status_irq,
  627. bfin_serial_mctrl_cts_int,
  628. IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
  629. pr_info("Unable to attach BlackFin UART Modem \
  630. Status interrupt.\n");
  631. }
  632. if (uart->cts_pin >= 0) {
  633. gpio_request(uart->cts_pin, DRIVER_NAME);
  634. gpio_direction_output(uart->cts_pin, 1);
  635. }
  636. if (uart->rts_pin >= 0) {
  637. gpio_request(uart->rts_pin, DRIVER_NAME);
  638. gpio_direction_output(uart->rts_pin, 0);
  639. }
  640. /* CTS RTS PINs are negative assertive. */
  641. UART_PUT_MCR(uart, ACTS);
  642. UART_SET_IER(uart, EDSSI);
  643. #endif
  644. UART_SET_IER(uart, ERBFI);
  645. return 0;
  646. }
  647. static void bfin_serial_shutdown(struct uart_port *port)
  648. {
  649. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  650. #ifdef CONFIG_SERIAL_BFIN_DMA
  651. disable_dma(uart->tx_dma_channel);
  652. free_dma(uart->tx_dma_channel);
  653. disable_dma(uart->rx_dma_channel);
  654. free_dma(uart->rx_dma_channel);
  655. del_timer(&(uart->rx_dma_timer));
  656. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  657. #else
  658. #ifdef CONFIG_BF54x
  659. switch (uart->port.irq) {
  660. case IRQ_UART3_RX:
  661. free_dma(CH_UART3_RX);
  662. free_dma(CH_UART3_TX);
  663. break;
  664. case IRQ_UART2_RX:
  665. free_dma(CH_UART2_RX);
  666. free_dma(CH_UART2_TX);
  667. break;
  668. default:
  669. break;
  670. };
  671. #endif
  672. free_irq(uart->port.irq, uart);
  673. free_irq(uart->port.irq+1, uart);
  674. #endif
  675. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  676. if (uart->cts_pin >= 0)
  677. free_irq(gpio_to_irq(uart->cts_pin), uart);
  678. if (uart->rts_pin >= 0)
  679. gpio_free(uart->rts_pin);
  680. #endif
  681. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  682. if (uart->cts_pin >= 0)
  683. gpio_free(uart->cts_pin);
  684. if (uart->rts_pin >= 0)
  685. gpio_free(uart->rts_pin);
  686. if (UART_GET_IER(uart) && EDSSI)
  687. free_irq(uart->status_irq, uart);
  688. #endif
  689. }
  690. static void
  691. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  692. struct ktermios *old)
  693. {
  694. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  695. unsigned long flags;
  696. unsigned int baud, quot;
  697. unsigned short val, ier, lcr = 0;
  698. switch (termios->c_cflag & CSIZE) {
  699. case CS8:
  700. lcr = WLS(8);
  701. break;
  702. case CS7:
  703. lcr = WLS(7);
  704. break;
  705. case CS6:
  706. lcr = WLS(6);
  707. break;
  708. case CS5:
  709. lcr = WLS(5);
  710. break;
  711. default:
  712. printk(KERN_ERR "%s: word lengh not supported\n",
  713. __func__);
  714. }
  715. /* Anomaly notes:
  716. * 05000231 - STOP bit is always set to 1 whatever the user is set.
  717. */
  718. if (termios->c_cflag & CSTOPB) {
  719. if (ANOMALY_05000231)
  720. printk(KERN_WARNING "STOP bits other than 1 is not "
  721. "supported in case of anomaly 05000231.\n");
  722. else
  723. lcr |= STB;
  724. }
  725. if (termios->c_cflag & PARENB)
  726. lcr |= PEN;
  727. if (!(termios->c_cflag & PARODD))
  728. lcr |= EPS;
  729. if (termios->c_cflag & CMSPAR)
  730. lcr |= STP;
  731. port->read_status_mask = OE;
  732. if (termios->c_iflag & INPCK)
  733. port->read_status_mask |= (FE | PE);
  734. if (termios->c_iflag & (BRKINT | PARMRK))
  735. port->read_status_mask |= BI;
  736. /*
  737. * Characters to ignore
  738. */
  739. port->ignore_status_mask = 0;
  740. if (termios->c_iflag & IGNPAR)
  741. port->ignore_status_mask |= FE | PE;
  742. if (termios->c_iflag & IGNBRK) {
  743. port->ignore_status_mask |= BI;
  744. /*
  745. * If we're ignoring parity and break indicators,
  746. * ignore overruns too (for real raw support).
  747. */
  748. if (termios->c_iflag & IGNPAR)
  749. port->ignore_status_mask |= OE;
  750. }
  751. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  752. quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
  753. spin_lock_irqsave(&uart->port.lock, flags);
  754. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  755. /* Disable UART */
  756. ier = UART_GET_IER(uart);
  757. UART_DISABLE_INTS(uart);
  758. /* Set DLAB in LCR to Access DLL and DLH */
  759. UART_SET_DLAB(uart);
  760. UART_PUT_DLL(uart, quot & 0xFF);
  761. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  762. SSYNC();
  763. /* Clear DLAB in LCR to Access THR RBR IER */
  764. UART_CLEAR_DLAB(uart);
  765. UART_PUT_LCR(uart, lcr);
  766. /* Enable UART */
  767. UART_ENABLE_INTS(uart, ier);
  768. val = UART_GET_GCTL(uart);
  769. val |= UCEN;
  770. UART_PUT_GCTL(uart, val);
  771. /* Port speed changed, update the per-port timeout. */
  772. uart_update_timeout(port, termios->c_cflag, baud);
  773. spin_unlock_irqrestore(&uart->port.lock, flags);
  774. }
  775. static const char *bfin_serial_type(struct uart_port *port)
  776. {
  777. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  778. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  779. }
  780. /*
  781. * Release the memory region(s) being used by 'port'.
  782. */
  783. static void bfin_serial_release_port(struct uart_port *port)
  784. {
  785. }
  786. /*
  787. * Request the memory region(s) being used by 'port'.
  788. */
  789. static int bfin_serial_request_port(struct uart_port *port)
  790. {
  791. return 0;
  792. }
  793. /*
  794. * Configure/autoconfigure the port.
  795. */
  796. static void bfin_serial_config_port(struct uart_port *port, int flags)
  797. {
  798. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  799. if (flags & UART_CONFIG_TYPE &&
  800. bfin_serial_request_port(&uart->port) == 0)
  801. uart->port.type = PORT_BFIN;
  802. }
  803. /*
  804. * Verify the new serial_struct (for TIOCSSERIAL).
  805. * The only change we allow are to the flags and type, and
  806. * even then only between PORT_BFIN and PORT_UNKNOWN
  807. */
  808. static int
  809. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  810. {
  811. return 0;
  812. }
  813. /*
  814. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  815. * In other cases, disable IrDA function.
  816. */
  817. static void bfin_serial_set_ldisc(struct uart_port *port)
  818. {
  819. int line = port->line;
  820. unsigned short val;
  821. if (line >= port->info->port.tty->driver->num)
  822. return;
  823. switch (port->info->port.tty->termios->c_line) {
  824. case N_IRDA:
  825. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  826. val |= (IREN | RPOLC);
  827. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  828. break;
  829. default:
  830. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  831. val &= ~(IREN | RPOLC);
  832. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  833. }
  834. }
  835. static void bfin_serial_reset_irda(struct uart_port *port)
  836. {
  837. int line = port->line;
  838. unsigned short val;
  839. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  840. val &= ~(IREN | RPOLC);
  841. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  842. SSYNC();
  843. val |= (IREN | RPOLC);
  844. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  845. SSYNC();
  846. }
  847. #ifdef CONFIG_CONSOLE_POLL
  848. /* Anomaly notes:
  849. * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
  850. * losing other bits of UART_LSR is not a problem here.
  851. */
  852. static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
  853. {
  854. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  855. while (!(UART_GET_LSR(uart) & THRE))
  856. cpu_relax();
  857. UART_CLEAR_DLAB(uart);
  858. UART_PUT_CHAR(uart, (unsigned char)chr);
  859. }
  860. static int bfin_serial_poll_get_char(struct uart_port *port)
  861. {
  862. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  863. unsigned char chr;
  864. while (!(UART_GET_LSR(uart) & DR))
  865. cpu_relax();
  866. UART_CLEAR_DLAB(uart);
  867. chr = UART_GET_CHAR(uart);
  868. return chr;
  869. }
  870. #endif
  871. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  872. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  873. static void bfin_kgdboc_port_shutdown(struct uart_port *port)
  874. {
  875. if (kgdboc_break_enabled) {
  876. kgdboc_break_enabled = 0;
  877. bfin_serial_shutdown(port);
  878. }
  879. }
  880. static int bfin_kgdboc_port_startup(struct uart_port *port)
  881. {
  882. kgdboc_port_line = port->line;
  883. kgdboc_break_enabled = !bfin_serial_startup(port);
  884. return 0;
  885. }
  886. #endif
  887. static struct uart_ops bfin_serial_pops = {
  888. .tx_empty = bfin_serial_tx_empty,
  889. .set_mctrl = bfin_serial_set_mctrl,
  890. .get_mctrl = bfin_serial_get_mctrl,
  891. .stop_tx = bfin_serial_stop_tx,
  892. .start_tx = bfin_serial_start_tx,
  893. .stop_rx = bfin_serial_stop_rx,
  894. .enable_ms = bfin_serial_enable_ms,
  895. .break_ctl = bfin_serial_break_ctl,
  896. .startup = bfin_serial_startup,
  897. .shutdown = bfin_serial_shutdown,
  898. .set_termios = bfin_serial_set_termios,
  899. .set_ldisc = bfin_serial_set_ldisc,
  900. .type = bfin_serial_type,
  901. .release_port = bfin_serial_release_port,
  902. .request_port = bfin_serial_request_port,
  903. .config_port = bfin_serial_config_port,
  904. .verify_port = bfin_serial_verify_port,
  905. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  906. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  907. .kgdboc_port_startup = bfin_kgdboc_port_startup,
  908. .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
  909. #endif
  910. #ifdef CONFIG_CONSOLE_POLL
  911. .poll_put_char = bfin_serial_poll_put_char,
  912. .poll_get_char = bfin_serial_poll_get_char,
  913. #endif
  914. };
  915. static void __init bfin_serial_hw_init(void)
  916. {
  917. #ifdef CONFIG_SERIAL_BFIN_UART0
  918. peripheral_request(P_UART0_TX, DRIVER_NAME);
  919. peripheral_request(P_UART0_RX, DRIVER_NAME);
  920. #endif
  921. #ifdef CONFIG_SERIAL_BFIN_UART1
  922. peripheral_request(P_UART1_TX, DRIVER_NAME);
  923. peripheral_request(P_UART1_RX, DRIVER_NAME);
  924. # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
  925. peripheral_request(P_UART1_RTS, DRIVER_NAME);
  926. peripheral_request(P_UART1_CTS, DRIVER_NAME);
  927. # endif
  928. #endif
  929. #ifdef CONFIG_SERIAL_BFIN_UART2
  930. peripheral_request(P_UART2_TX, DRIVER_NAME);
  931. peripheral_request(P_UART2_RX, DRIVER_NAME);
  932. #endif
  933. #ifdef CONFIG_SERIAL_BFIN_UART3
  934. peripheral_request(P_UART3_TX, DRIVER_NAME);
  935. peripheral_request(P_UART3_RX, DRIVER_NAME);
  936. # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
  937. peripheral_request(P_UART3_RTS, DRIVER_NAME);
  938. peripheral_request(P_UART3_CTS, DRIVER_NAME);
  939. # endif
  940. #endif
  941. }
  942. static void __init bfin_serial_init_ports(void)
  943. {
  944. static int first = 1;
  945. int i;
  946. if (!first)
  947. return;
  948. first = 0;
  949. bfin_serial_hw_init();
  950. for (i = 0; i < nr_active_ports; i++) {
  951. spin_lock_init(&bfin_serial_ports[i].port.lock);
  952. bfin_serial_ports[i].port.uartclk = get_sclk();
  953. bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  954. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  955. bfin_serial_ports[i].port.line = i;
  956. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  957. bfin_serial_ports[i].port.membase =
  958. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  959. bfin_serial_ports[i].port.mapbase =
  960. bfin_serial_resource[i].uart_base_addr;
  961. bfin_serial_ports[i].port.irq =
  962. bfin_serial_resource[i].uart_irq;
  963. bfin_serial_ports[i].status_irq =
  964. bfin_serial_resource[i].uart_status_irq;
  965. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  966. #ifdef CONFIG_SERIAL_BFIN_DMA
  967. bfin_serial_ports[i].tx_done = 1;
  968. bfin_serial_ports[i].tx_count = 0;
  969. bfin_serial_ports[i].tx_dma_channel =
  970. bfin_serial_resource[i].uart_tx_dma_channel;
  971. bfin_serial_ports[i].rx_dma_channel =
  972. bfin_serial_resource[i].uart_rx_dma_channel;
  973. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  974. #endif
  975. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  976. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  977. bfin_serial_ports[i].cts_pin =
  978. bfin_serial_resource[i].uart_cts_pin;
  979. bfin_serial_ports[i].rts_pin =
  980. bfin_serial_resource[i].uart_rts_pin;
  981. #endif
  982. }
  983. }
  984. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  985. /*
  986. * If the port was already initialised (eg, by a boot loader),
  987. * try to determine the current setup.
  988. */
  989. static void __init
  990. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  991. int *parity, int *bits)
  992. {
  993. unsigned short status;
  994. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  995. if (status == (ERBFI | ETBEI)) {
  996. /* ok, the port was enabled */
  997. u16 lcr, dlh, dll;
  998. lcr = UART_GET_LCR(uart);
  999. *parity = 'n';
  1000. if (lcr & PEN) {
  1001. if (lcr & EPS)
  1002. *parity = 'e';
  1003. else
  1004. *parity = 'o';
  1005. }
  1006. switch (lcr & 0x03) {
  1007. case 0: *bits = 5; break;
  1008. case 1: *bits = 6; break;
  1009. case 2: *bits = 7; break;
  1010. case 3: *bits = 8; break;
  1011. }
  1012. /* Set DLAB in LCR to Access DLL and DLH */
  1013. UART_SET_DLAB(uart);
  1014. dll = UART_GET_DLL(uart);
  1015. dlh = UART_GET_DLH(uart);
  1016. /* Clear DLAB in LCR to Access THR RBR IER */
  1017. UART_CLEAR_DLAB(uart);
  1018. *baud = get_sclk() / (16*(dll | dlh << 8));
  1019. }
  1020. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
  1021. }
  1022. static struct uart_driver bfin_serial_reg;
  1023. static int __init
  1024. bfin_serial_console_setup(struct console *co, char *options)
  1025. {
  1026. struct bfin_serial_port *uart;
  1027. int baud = 57600;
  1028. int bits = 8;
  1029. int parity = 'n';
  1030. # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1031. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1032. int flow = 'r';
  1033. # else
  1034. int flow = 'n';
  1035. # endif
  1036. /*
  1037. * Check whether an invalid uart number has been specified, and
  1038. * if so, search for the first available port that does have
  1039. * console support.
  1040. */
  1041. if (co->index == -1 || co->index >= nr_active_ports)
  1042. co->index = 0;
  1043. uart = &bfin_serial_ports[co->index];
  1044. if (options)
  1045. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1046. else
  1047. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  1048. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  1049. }
  1050. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  1051. defined (CONFIG_EARLY_PRINTK) */
  1052. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1053. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  1054. {
  1055. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  1056. while (!(UART_GET_LSR(uart) & THRE))
  1057. barrier();
  1058. UART_PUT_CHAR(uart, ch);
  1059. SSYNC();
  1060. }
  1061. /*
  1062. * Interrupts are disabled on entering
  1063. */
  1064. static void
  1065. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  1066. {
  1067. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  1068. unsigned long flags;
  1069. spin_lock_irqsave(&uart->port.lock, flags);
  1070. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  1071. spin_unlock_irqrestore(&uart->port.lock, flags);
  1072. }
  1073. static struct console bfin_serial_console = {
  1074. .name = BFIN_SERIAL_NAME,
  1075. .write = bfin_serial_console_write,
  1076. .device = uart_console_device,
  1077. .setup = bfin_serial_console_setup,
  1078. .flags = CON_PRINTBUFFER,
  1079. .index = -1,
  1080. .data = &bfin_serial_reg,
  1081. };
  1082. static int __init bfin_serial_rs_console_init(void)
  1083. {
  1084. bfin_serial_init_ports();
  1085. register_console(&bfin_serial_console);
  1086. return 0;
  1087. }
  1088. console_initcall(bfin_serial_rs_console_init);
  1089. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  1090. #else
  1091. #define BFIN_SERIAL_CONSOLE NULL
  1092. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1093. #ifdef CONFIG_EARLY_PRINTK
  1094. static __init void early_serial_putc(struct uart_port *port, int ch)
  1095. {
  1096. unsigned timeout = 0xffff;
  1097. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  1098. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  1099. cpu_relax();
  1100. UART_PUT_CHAR(uart, ch);
  1101. }
  1102. static __init void early_serial_write(struct console *con, const char *s,
  1103. unsigned int n)
  1104. {
  1105. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  1106. unsigned int i;
  1107. for (i = 0; i < n; i++, s++) {
  1108. if (*s == '\n')
  1109. early_serial_putc(&uart->port, '\r');
  1110. early_serial_putc(&uart->port, *s);
  1111. }
  1112. }
  1113. /*
  1114. * This should have a .setup or .early_setup in it, but then things get called
  1115. * without the command line options, and the baud rate gets messed up - so
  1116. * don't let the common infrastructure play with things. (see calls to setup
  1117. * & earlysetup in ./kernel/printk.c:register_console()
  1118. */
  1119. static struct __initdata console bfin_early_serial_console = {
  1120. .name = "early_BFuart",
  1121. .write = early_serial_write,
  1122. .device = uart_console_device,
  1123. .flags = CON_PRINTBUFFER,
  1124. .index = -1,
  1125. .data = &bfin_serial_reg,
  1126. };
  1127. struct console __init *bfin_earlyserial_init(unsigned int port,
  1128. unsigned int cflag)
  1129. {
  1130. struct bfin_serial_port *uart;
  1131. struct ktermios t;
  1132. if (port == -1 || port >= nr_active_ports)
  1133. port = 0;
  1134. bfin_serial_init_ports();
  1135. bfin_early_serial_console.index = port;
  1136. uart = &bfin_serial_ports[port];
  1137. t.c_cflag = cflag;
  1138. t.c_iflag = 0;
  1139. t.c_oflag = 0;
  1140. t.c_lflag = ICANON;
  1141. t.c_line = port;
  1142. bfin_serial_set_termios(&uart->port, &t, &t);
  1143. return &bfin_early_serial_console;
  1144. }
  1145. #endif /* CONFIG_EARLY_PRINTK */
  1146. static struct uart_driver bfin_serial_reg = {
  1147. .owner = THIS_MODULE,
  1148. .driver_name = "bfin-uart",
  1149. .dev_name = BFIN_SERIAL_NAME,
  1150. .major = BFIN_SERIAL_MAJOR,
  1151. .minor = BFIN_SERIAL_MINOR,
  1152. .nr = BFIN_UART_NR_PORTS,
  1153. .cons = BFIN_SERIAL_CONSOLE,
  1154. };
  1155. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  1156. {
  1157. int i;
  1158. for (i = 0; i < nr_active_ports; i++) {
  1159. if (bfin_serial_ports[i].port.dev != &dev->dev)
  1160. continue;
  1161. uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1162. }
  1163. return 0;
  1164. }
  1165. static int bfin_serial_resume(struct platform_device *dev)
  1166. {
  1167. int i;
  1168. for (i = 0; i < nr_active_ports; i++) {
  1169. if (bfin_serial_ports[i].port.dev != &dev->dev)
  1170. continue;
  1171. uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1172. }
  1173. return 0;
  1174. }
  1175. static int bfin_serial_probe(struct platform_device *dev)
  1176. {
  1177. struct resource *res = dev->resource;
  1178. int i;
  1179. for (i = 0; i < dev->num_resources; i++, res++)
  1180. if (res->flags & IORESOURCE_MEM)
  1181. break;
  1182. if (i < dev->num_resources) {
  1183. for (i = 0; i < nr_active_ports; i++, res++) {
  1184. if (bfin_serial_ports[i].port.mapbase != res->start)
  1185. continue;
  1186. bfin_serial_ports[i].port.dev = &dev->dev;
  1187. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1188. }
  1189. }
  1190. return 0;
  1191. }
  1192. static int bfin_serial_remove(struct platform_device *dev)
  1193. {
  1194. int i;
  1195. for (i = 0; i < nr_active_ports; i++) {
  1196. if (bfin_serial_ports[i].port.dev != &dev->dev)
  1197. continue;
  1198. uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1199. bfin_serial_ports[i].port.dev = NULL;
  1200. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1201. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1202. gpio_free(bfin_serial_ports[i].cts_pin);
  1203. gpio_free(bfin_serial_ports[i].rts_pin);
  1204. #endif
  1205. }
  1206. return 0;
  1207. }
  1208. static struct platform_driver bfin_serial_driver = {
  1209. .probe = bfin_serial_probe,
  1210. .remove = bfin_serial_remove,
  1211. .suspend = bfin_serial_suspend,
  1212. .resume = bfin_serial_resume,
  1213. .driver = {
  1214. .name = "bfin-uart",
  1215. .owner = THIS_MODULE,
  1216. },
  1217. };
  1218. static int __init bfin_serial_init(void)
  1219. {
  1220. int ret;
  1221. pr_info("Serial: Blackfin serial driver\n");
  1222. bfin_serial_init_ports();
  1223. ret = uart_register_driver(&bfin_serial_reg);
  1224. if (ret == 0) {
  1225. ret = platform_driver_register(&bfin_serial_driver);
  1226. if (ret) {
  1227. pr_debug("uart register failed\n");
  1228. uart_unregister_driver(&bfin_serial_reg);
  1229. }
  1230. }
  1231. return ret;
  1232. }
  1233. static void __exit bfin_serial_exit(void)
  1234. {
  1235. platform_driver_unregister(&bfin_serial_driver);
  1236. uart_unregister_driver(&bfin_serial_reg);
  1237. }
  1238. module_init(bfin_serial_init);
  1239. module_exit(bfin_serial_exit);
  1240. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1241. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1242. MODULE_LICENSE("GPL");
  1243. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1244. MODULE_ALIAS("platform:bfin-uart");