nsp32.c 89 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/module.h>
  26. #include <linux/init.h>
  27. #include <linux/kernel.h>
  28. #include <linux/slab.h>
  29. #include <linux/string.h>
  30. #include <linux/timer.h>
  31. #include <linux/ioport.h>
  32. #include <linux/major.h>
  33. #include <linux/blkdev.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/pci.h>
  36. #include <linux/delay.h>
  37. #include <linux/ctype.h>
  38. #include <linux/dma-mapping.h>
  39. #include <asm/dma.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <scsi/scsi.h>
  43. #include <scsi/scsi_cmnd.h>
  44. #include <scsi/scsi_device.h>
  45. #include <scsi/scsi_host.h>
  46. #include <scsi/scsi_ioctl.h>
  47. #include "nsp32.h"
  48. /***********************************************************************
  49. * Module parameters
  50. */
  51. static int trans_mode = 0; /* default: BIOS */
  52. module_param (trans_mode, int, 0);
  53. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  54. #define ASYNC_MODE 1
  55. #define ULTRA20M_MODE 2
  56. static int auto_param = 0; /* default: ON */
  57. module_param (auto_param, bool, 0);
  58. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  59. static int disc_priv = 1; /* default: OFF */
  60. module_param (disc_priv, bool, 0);
  61. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  62. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  63. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  64. MODULE_LICENSE("GPL");
  65. static const char *nsp32_release_version = "1.2";
  66. /****************************************************************************
  67. * Supported hardware
  68. */
  69. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  70. {
  71. .vendor = PCI_VENDOR_ID_IODATA,
  72. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  73. .subvendor = PCI_ANY_ID,
  74. .subdevice = PCI_ANY_ID,
  75. .driver_data = MODEL_IODATA,
  76. },
  77. {
  78. .vendor = PCI_VENDOR_ID_WORKBIT,
  79. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  80. .subvendor = PCI_ANY_ID,
  81. .subdevice = PCI_ANY_ID,
  82. .driver_data = MODEL_KME,
  83. },
  84. {
  85. .vendor = PCI_VENDOR_ID_WORKBIT,
  86. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  87. .subvendor = PCI_ANY_ID,
  88. .subdevice = PCI_ANY_ID,
  89. .driver_data = MODEL_WORKBIT,
  90. },
  91. {
  92. .vendor = PCI_VENDOR_ID_WORKBIT,
  93. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  94. .subvendor = PCI_ANY_ID,
  95. .subdevice = PCI_ANY_ID,
  96. .driver_data = MODEL_PCI_WORKBIT,
  97. },
  98. {
  99. .vendor = PCI_VENDOR_ID_WORKBIT,
  100. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  101. .subvendor = PCI_ANY_ID,
  102. .subdevice = PCI_ANY_ID,
  103. .driver_data = MODEL_LOGITEC,
  104. },
  105. {
  106. .vendor = PCI_VENDOR_ID_WORKBIT,
  107. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  108. .subvendor = PCI_ANY_ID,
  109. .subdevice = PCI_ANY_ID,
  110. .driver_data = MODEL_PCI_LOGITEC,
  111. },
  112. {
  113. .vendor = PCI_VENDOR_ID_WORKBIT,
  114. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  115. .subvendor = PCI_ANY_ID,
  116. .subdevice = PCI_ANY_ID,
  117. .driver_data = MODEL_PCI_MELCO,
  118. },
  119. {
  120. .vendor = PCI_VENDOR_ID_WORKBIT,
  121. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  122. .subvendor = PCI_ANY_ID,
  123. .subdevice = PCI_ANY_ID,
  124. .driver_data = MODEL_PCI_MELCO,
  125. },
  126. {0,0,},
  127. };
  128. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  129. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  130. /*
  131. * Period/AckWidth speed conversion table
  132. *
  133. * Note: This period/ackwidth speed table must be in descending order.
  134. */
  135. static nsp32_sync_table nsp32_sync_table_40M[] = {
  136. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  137. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  138. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  139. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  140. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  141. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  142. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  143. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  144. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  145. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  146. };
  147. static nsp32_sync_table nsp32_sync_table_20M[] = {
  148. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  149. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  150. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  151. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  152. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  153. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  154. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  155. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  156. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  157. };
  158. static nsp32_sync_table nsp32_sync_table_pci[] = {
  159. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  160. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  161. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  162. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  163. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  164. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  165. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  166. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  167. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  168. };
  169. /*
  170. * function declaration
  171. */
  172. /* module entry point */
  173. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  174. static void __devexit nsp32_remove(struct pci_dev *);
  175. static int __init init_nsp32 (void);
  176. static void __exit exit_nsp32 (void);
  177. /* struct struct scsi_host_template */
  178. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  179. static int nsp32_detect (struct pci_dev *pdev);
  180. static int nsp32_queuecommand(struct scsi_cmnd *,
  181. void (*done)(struct scsi_cmnd *));
  182. static const char *nsp32_info (struct Scsi_Host *);
  183. static int nsp32_release (struct Scsi_Host *);
  184. /* SCSI error handler */
  185. static int nsp32_eh_abort (struct scsi_cmnd *);
  186. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  187. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  188. /* generate SCSI message */
  189. static void nsp32_build_identify(struct scsi_cmnd *);
  190. static void nsp32_build_nop (struct scsi_cmnd *);
  191. static void nsp32_build_reject (struct scsi_cmnd *);
  192. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  193. /* SCSI message handler */
  194. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  195. static void nsp32_msgout_occur (struct scsi_cmnd *);
  196. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  197. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  198. static int nsp32_selection_autopara(struct scsi_cmnd *);
  199. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  200. static void nsp32_scsi_done (struct scsi_cmnd *);
  201. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  202. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  203. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  204. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  205. /* SCSI SDTR */
  206. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  207. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  208. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  209. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  210. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  211. /* SCSI bus status handler */
  212. static void nsp32_wait_req (nsp32_hw_data *, int);
  213. static void nsp32_wait_sack (nsp32_hw_data *, int);
  214. static void nsp32_sack_assert (nsp32_hw_data *);
  215. static void nsp32_sack_negate (nsp32_hw_data *);
  216. static void nsp32_do_bus_reset(nsp32_hw_data *);
  217. /* hardware interrupt handler */
  218. static irqreturn_t do_nsp32_isr(int, void *);
  219. /* initialize hardware */
  220. static int nsp32hw_init(nsp32_hw_data *);
  221. /* EEPROM handler */
  222. static int nsp32_getprom_param (nsp32_hw_data *);
  223. static int nsp32_getprom_at24 (nsp32_hw_data *);
  224. static int nsp32_getprom_c16 (nsp32_hw_data *);
  225. static void nsp32_prom_start (nsp32_hw_data *);
  226. static void nsp32_prom_stop (nsp32_hw_data *);
  227. static int nsp32_prom_read (nsp32_hw_data *, int);
  228. static int nsp32_prom_read_bit (nsp32_hw_data *);
  229. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  230. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  231. static int nsp32_prom_get (nsp32_hw_data *, int);
  232. /* debug/warning/info message */
  233. static void nsp32_message (const char *, int, char *, char *, ...);
  234. #ifdef NSP32_DEBUG
  235. static void nsp32_dmessage(const char *, int, int, char *, ...);
  236. #endif
  237. /*
  238. * max_sectors is currently limited up to 128.
  239. */
  240. static struct scsi_host_template nsp32_template = {
  241. .proc_name = "nsp32",
  242. .name = "Workbit NinjaSCSI-32Bi/UDE",
  243. .proc_info = nsp32_proc_info,
  244. .info = nsp32_info,
  245. .queuecommand = nsp32_queuecommand,
  246. .can_queue = 1,
  247. .sg_tablesize = NSP32_SG_SIZE,
  248. .max_sectors = 128,
  249. .cmd_per_lun = 1,
  250. .this_id = NSP32_HOST_SCSIID,
  251. .use_clustering = DISABLE_CLUSTERING,
  252. .eh_abort_handler = nsp32_eh_abort,
  253. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  254. .eh_host_reset_handler = nsp32_eh_host_reset,
  255. /* .highmem_io = 1, */
  256. };
  257. #include "nsp32_io.h"
  258. /***********************************************************************
  259. * debug, error print
  260. */
  261. #ifndef NSP32_DEBUG
  262. # define NSP32_DEBUG_MASK 0x000000
  263. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  264. # define nsp32_dbg(mask, args...) /* */
  265. #else
  266. # define NSP32_DEBUG_MASK 0xffffff
  267. # define nsp32_msg(type, args...) \
  268. nsp32_message (__func__, __LINE__, (type), args)
  269. # define nsp32_dbg(mask, args...) \
  270. nsp32_dmessage(__func__, __LINE__, (mask), args)
  271. #endif
  272. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  273. #define NSP32_DEBUG_REGISTER BIT(1)
  274. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  275. #define NSP32_DEBUG_INTR BIT(3)
  276. #define NSP32_DEBUG_SGLIST BIT(4)
  277. #define NSP32_DEBUG_BUSFREE BIT(5)
  278. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  279. #define NSP32_DEBUG_RESELECTION BIT(7)
  280. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  281. #define NSP32_DEBUG_EEPROM BIT(9)
  282. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  283. #define NSP32_DEBUG_BUSRESET BIT(11)
  284. #define NSP32_DEBUG_RESTART BIT(12)
  285. #define NSP32_DEBUG_SYNC BIT(13)
  286. #define NSP32_DEBUG_WAIT BIT(14)
  287. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  288. #define NSP32_DEBUG_PROC BIT(16)
  289. #define NSP32_DEBUG_INIT BIT(17)
  290. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  291. #define NSP32_DEBUG_BUF_LEN 100
  292. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  293. {
  294. va_list args;
  295. char buf[NSP32_DEBUG_BUF_LEN];
  296. va_start(args, fmt);
  297. vsnprintf(buf, sizeof(buf), fmt, args);
  298. va_end(args);
  299. #ifndef NSP32_DEBUG
  300. printk("%snsp32: %s\n", type, buf);
  301. #else
  302. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  303. #endif
  304. }
  305. #ifdef NSP32_DEBUG
  306. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  307. {
  308. va_list args;
  309. char buf[NSP32_DEBUG_BUF_LEN];
  310. va_start(args, fmt);
  311. vsnprintf(buf, sizeof(buf), fmt, args);
  312. va_end(args);
  313. if (mask & NSP32_DEBUG_MASK) {
  314. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  315. }
  316. }
  317. #endif
  318. #ifdef NSP32_DEBUG
  319. # include "nsp32_debug.c"
  320. #else
  321. # define show_command(arg) /* */
  322. # define show_busphase(arg) /* */
  323. # define show_autophase(arg) /* */
  324. #endif
  325. /*
  326. * IDENTIFY Message
  327. */
  328. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  329. {
  330. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  331. int pos = data->msgout_len;
  332. int mode = FALSE;
  333. /* XXX: Auto DiscPriv detection is progressing... */
  334. if (disc_priv == 0) {
  335. /* mode = TRUE; */
  336. }
  337. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  338. data->msgout_len = pos;
  339. }
  340. /*
  341. * SDTR Message Routine
  342. */
  343. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  344. unsigned char period,
  345. unsigned char offset)
  346. {
  347. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  348. int pos = data->msgout_len;
  349. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  350. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  351. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  352. data->msgoutbuf[pos] = period; pos++;
  353. data->msgoutbuf[pos] = offset; pos++;
  354. data->msgout_len = pos;
  355. }
  356. /*
  357. * No Operation Message
  358. */
  359. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  360. {
  361. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  362. int pos = data->msgout_len;
  363. if (pos != 0) {
  364. nsp32_msg(KERN_WARNING,
  365. "Some messages are already contained!");
  366. return;
  367. }
  368. data->msgoutbuf[pos] = NOP; pos++;
  369. data->msgout_len = pos;
  370. }
  371. /*
  372. * Reject Message
  373. */
  374. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  375. {
  376. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  377. int pos = data->msgout_len;
  378. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  379. data->msgout_len = pos;
  380. }
  381. /*
  382. * timer
  383. */
  384. #if 0
  385. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  386. {
  387. unsigned int base = SCpnt->host->io_port;
  388. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  389. if (time & (~TIMER_CNT_MASK)) {
  390. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  391. }
  392. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  393. }
  394. #endif
  395. /*
  396. * set SCSI command and other parameter to asic, and start selection phase
  397. */
  398. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  399. {
  400. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  401. unsigned int base = SCpnt->device->host->io_port;
  402. unsigned int host_id = SCpnt->device->host->this_id;
  403. unsigned char target = scmd_id(SCpnt);
  404. nsp32_autoparam *param = data->autoparam;
  405. unsigned char phase;
  406. int i, ret;
  407. unsigned int msgout;
  408. u16_le s;
  409. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  410. /*
  411. * check bus free
  412. */
  413. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  414. if (phase != BUSMON_BUS_FREE) {
  415. nsp32_msg(KERN_WARNING, "bus busy");
  416. show_busphase(phase & BUSMON_PHASE_MASK);
  417. SCpnt->result = DID_BUS_BUSY << 16;
  418. return FALSE;
  419. }
  420. /*
  421. * message out
  422. *
  423. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  424. * over 3 messages needs another routine.
  425. */
  426. if (data->msgout_len == 0) {
  427. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  428. SCpnt->result = DID_ERROR << 16;
  429. return FALSE;
  430. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  431. msgout = 0;
  432. for (i = 0; i < data->msgout_len; i++) {
  433. /*
  434. * the sending order of the message is:
  435. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  436. * MCNT 2: MSG#1 -> MSG#2
  437. * MCNT 1: MSG#2
  438. */
  439. msgout >>= 8;
  440. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  441. }
  442. msgout |= MV_VALID; /* MV valid */
  443. msgout |= (unsigned int)data->msgout_len; /* len */
  444. } else {
  445. /* data->msgout_len > 3 */
  446. msgout = 0;
  447. }
  448. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  449. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  450. /*
  451. * setup asic parameter
  452. */
  453. memset(param, 0, sizeof(nsp32_autoparam));
  454. /* cdb */
  455. for (i = 0; i < SCpnt->cmd_len; i++) {
  456. param->cdb[4 * i] = SCpnt->cmnd[i];
  457. }
  458. /* outgoing messages */
  459. param->msgout = cpu_to_le32(msgout);
  460. /* syncreg, ackwidth, target id, SREQ sampling rate */
  461. param->syncreg = data->cur_target->syncreg;
  462. param->ackwidth = data->cur_target->ackwidth;
  463. param->target_id = BIT(host_id) | BIT(target);
  464. param->sample_reg = data->cur_target->sample_reg;
  465. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  466. /* command control */
  467. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  468. AUTOSCSI_START |
  469. AUTO_MSGIN_00_OR_04 |
  470. AUTO_MSGIN_02 |
  471. AUTO_ATN );
  472. /* transfer control */
  473. s = 0;
  474. switch (data->trans_method) {
  475. case NSP32_TRANSFER_BUSMASTER:
  476. s |= BM_START;
  477. break;
  478. case NSP32_TRANSFER_MMIO:
  479. s |= CB_MMIO_MODE;
  480. break;
  481. case NSP32_TRANSFER_PIO:
  482. s |= CB_IO_MODE;
  483. break;
  484. default:
  485. nsp32_msg(KERN_ERR, "unknown trans_method");
  486. break;
  487. }
  488. /*
  489. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  490. * For bus master transfer, it's taken off.
  491. */
  492. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  493. param->transfer_control = cpu_to_le16(s);
  494. /* sg table addr */
  495. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  496. /*
  497. * transfer parameter to ASIC
  498. */
  499. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  500. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  501. AUTO_PARAMETER );
  502. /*
  503. * Check arbitration
  504. */
  505. ret = nsp32_arbitration(SCpnt, base);
  506. return ret;
  507. }
  508. /*
  509. * Selection with AUTO SCSI (without AUTO PARAMETER)
  510. */
  511. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  512. {
  513. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  514. unsigned int base = SCpnt->device->host->io_port;
  515. unsigned int host_id = SCpnt->device->host->this_id;
  516. unsigned char target = scmd_id(SCpnt);
  517. unsigned char phase;
  518. int status;
  519. unsigned short command = 0;
  520. unsigned int msgout = 0;
  521. unsigned short execph;
  522. int i;
  523. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  524. /*
  525. * IRQ disable
  526. */
  527. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  528. /*
  529. * check bus line
  530. */
  531. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  532. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  533. nsp32_msg(KERN_WARNING, "bus busy");
  534. SCpnt->result = DID_BUS_BUSY << 16;
  535. status = 1;
  536. goto out;
  537. }
  538. /*
  539. * clear execph
  540. */
  541. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  542. /*
  543. * clear FIFO counter to set CDBs
  544. */
  545. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  546. /*
  547. * set CDB0 - CDB15
  548. */
  549. for (i = 0; i < SCpnt->cmd_len; i++) {
  550. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  551. }
  552. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  553. /*
  554. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  555. */
  556. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  557. /*
  558. * set SCSI MSGOUT REG
  559. *
  560. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  561. * over 3 messages needs another routine.
  562. */
  563. if (data->msgout_len == 0) {
  564. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  565. SCpnt->result = DID_ERROR << 16;
  566. status = 1;
  567. goto out;
  568. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  569. msgout = 0;
  570. for (i = 0; i < data->msgout_len; i++) {
  571. /*
  572. * the sending order of the message is:
  573. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  574. * MCNT 2: MSG#1 -> MSG#2
  575. * MCNT 1: MSG#2
  576. */
  577. msgout >>= 8;
  578. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  579. }
  580. msgout |= MV_VALID; /* MV valid */
  581. msgout |= (unsigned int)data->msgout_len; /* len */
  582. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  583. } else {
  584. /* data->msgout_len > 3 */
  585. nsp32_write4(base, SCSI_MSG_OUT, 0);
  586. }
  587. /*
  588. * set selection timeout(= 250ms)
  589. */
  590. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  591. /*
  592. * set SREQ hazard killer sampling rate
  593. *
  594. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  595. * check other internal clock!
  596. */
  597. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  598. /*
  599. * clear Arbit
  600. */
  601. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  602. /*
  603. * set SYNCREG
  604. * Don't set BM_START_ADR before setting this register.
  605. */
  606. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  607. /*
  608. * set ACKWIDTH
  609. */
  610. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  611. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  612. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  613. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  614. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  615. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  616. data->msgout_len, msgout);
  617. /*
  618. * set SGT ADDR (physical address)
  619. */
  620. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  621. /*
  622. * set TRANSFER CONTROL REG
  623. */
  624. command = 0;
  625. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  626. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  627. if (scsi_bufflen(SCpnt) > 0) {
  628. command |= BM_START;
  629. }
  630. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  631. command |= CB_MMIO_MODE;
  632. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  633. command |= CB_IO_MODE;
  634. }
  635. nsp32_write2(base, TRANSFER_CONTROL, command);
  636. /*
  637. * start AUTO SCSI, kick off arbitration
  638. */
  639. command = (CLEAR_CDB_FIFO_POINTER |
  640. AUTOSCSI_START |
  641. AUTO_MSGIN_00_OR_04 |
  642. AUTO_MSGIN_02 |
  643. AUTO_ATN );
  644. nsp32_write2(base, COMMAND_CONTROL, command);
  645. /*
  646. * Check arbitration
  647. */
  648. status = nsp32_arbitration(SCpnt, base);
  649. out:
  650. /*
  651. * IRQ enable
  652. */
  653. nsp32_write2(base, IRQ_CONTROL, 0);
  654. return status;
  655. }
  656. /*
  657. * Arbitration Status Check
  658. *
  659. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  660. * Using udelay(1) consumes CPU time and system time, but
  661. * arbitration delay time is defined minimal 2.4us in SCSI
  662. * specification, thus udelay works as coarse grained wait timer.
  663. */
  664. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  665. {
  666. unsigned char arbit;
  667. int status = TRUE;
  668. int time = 0;
  669. do {
  670. arbit = nsp32_read1(base, ARBIT_STATUS);
  671. time++;
  672. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  673. (time <= ARBIT_TIMEOUT_TIME));
  674. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  675. "arbit: 0x%x, delay time: %d", arbit, time);
  676. if (arbit & ARBIT_WIN) {
  677. /* Arbitration succeeded */
  678. SCpnt->result = DID_OK << 16;
  679. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  680. } else if (arbit & ARBIT_FAIL) {
  681. /* Arbitration failed */
  682. SCpnt->result = DID_BUS_BUSY << 16;
  683. status = FALSE;
  684. } else {
  685. /*
  686. * unknown error or ARBIT_GO timeout,
  687. * something lock up! guess no connection.
  688. */
  689. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  690. SCpnt->result = DID_NO_CONNECT << 16;
  691. status = FALSE;
  692. }
  693. /*
  694. * clear Arbit
  695. */
  696. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  697. return status;
  698. }
  699. /*
  700. * reselection
  701. *
  702. * Note: This reselection routine is called from msgin_occur,
  703. * reselection target id&lun must be already set.
  704. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  705. */
  706. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  707. {
  708. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  709. unsigned int host_id = SCpnt->device->host->this_id;
  710. unsigned int base = SCpnt->device->host->io_port;
  711. unsigned char tmpid, newid;
  712. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  713. /*
  714. * calculate reselected SCSI ID
  715. */
  716. tmpid = nsp32_read1(base, RESELECT_ID);
  717. tmpid &= (~BIT(host_id));
  718. newid = 0;
  719. while (tmpid) {
  720. if (tmpid & 1) {
  721. break;
  722. }
  723. tmpid >>= 1;
  724. newid++;
  725. }
  726. /*
  727. * If reselected New ID:LUN is not existed
  728. * or current nexus is not existed, unexpected
  729. * reselection is occurred. Send reject message.
  730. */
  731. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  732. nsp32_msg(KERN_WARNING, "unknown id/lun");
  733. return FALSE;
  734. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  735. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  736. return FALSE;
  737. }
  738. data->cur_id = newid;
  739. data->cur_lun = newlun;
  740. data->cur_target = &(data->target[newid]);
  741. data->cur_lunt = &(data->lunt[newid][newlun]);
  742. /* reset SACK/SavedACK counter (or ALL clear?) */
  743. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  744. return TRUE;
  745. }
  746. /*
  747. * nsp32_setup_sg_table - build scatter gather list for transfer data
  748. * with bus master.
  749. *
  750. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  751. */
  752. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  753. {
  754. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  755. struct scatterlist *sg;
  756. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  757. int num, i;
  758. u32_le l;
  759. if (sgt == NULL) {
  760. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  761. return FALSE;
  762. }
  763. num = scsi_dma_map(SCpnt);
  764. if (!num)
  765. return TRUE;
  766. else if (num < 0)
  767. return FALSE;
  768. else {
  769. scsi_for_each_sg(SCpnt, sg, num, i) {
  770. /*
  771. * Build nsp32_sglist, substitute sg dma addresses.
  772. */
  773. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  774. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  775. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  776. nsp32_msg(KERN_ERR,
  777. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  778. return FALSE;
  779. }
  780. nsp32_dbg(NSP32_DEBUG_SGLIST,
  781. "num 0x%x : addr 0x%lx len 0x%lx",
  782. i,
  783. le32_to_cpu(sgt[i].addr),
  784. le32_to_cpu(sgt[i].len ));
  785. }
  786. /* set end mark */
  787. l = le32_to_cpu(sgt[num-1].len);
  788. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  789. }
  790. return TRUE;
  791. }
  792. static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  793. {
  794. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  795. nsp32_target *target;
  796. nsp32_lunt *cur_lunt;
  797. int ret;
  798. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  799. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  800. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  801. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  802. scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
  803. if (data->CurrentSC != NULL) {
  804. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  805. data->CurrentSC = NULL;
  806. SCpnt->result = DID_NO_CONNECT << 16;
  807. done(SCpnt);
  808. return 0;
  809. }
  810. /* check target ID is not same as this initiator ID */
  811. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  812. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  813. SCpnt->result = DID_BAD_TARGET << 16;
  814. done(SCpnt);
  815. return 0;
  816. }
  817. /* check target LUN is allowable value */
  818. if (SCpnt->device->lun >= MAX_LUN) {
  819. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  820. SCpnt->result = DID_BAD_TARGET << 16;
  821. done(SCpnt);
  822. return 0;
  823. }
  824. show_command(SCpnt);
  825. SCpnt->scsi_done = done;
  826. data->CurrentSC = SCpnt;
  827. SCpnt->SCp.Status = CHECK_CONDITION;
  828. SCpnt->SCp.Message = 0;
  829. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  830. SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
  831. SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
  832. SCpnt->SCp.buffer = NULL;
  833. SCpnt->SCp.buffers_residual = 0;
  834. /* initialize data */
  835. data->msgout_len = 0;
  836. data->msgin_len = 0;
  837. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  838. cur_lunt->SCpnt = SCpnt;
  839. cur_lunt->save_datp = 0;
  840. cur_lunt->msgin03 = FALSE;
  841. data->cur_lunt = cur_lunt;
  842. data->cur_id = SCpnt->device->id;
  843. data->cur_lun = SCpnt->device->lun;
  844. ret = nsp32_setup_sg_table(SCpnt);
  845. if (ret == FALSE) {
  846. nsp32_msg(KERN_ERR, "SGT fail");
  847. SCpnt->result = DID_ERROR << 16;
  848. nsp32_scsi_done(SCpnt);
  849. return 0;
  850. }
  851. /* Build IDENTIFY */
  852. nsp32_build_identify(SCpnt);
  853. /*
  854. * If target is the first time to transfer after the reset
  855. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  856. * message SDTR is needed to do synchronous transfer.
  857. */
  858. target = &data->target[scmd_id(SCpnt)];
  859. data->cur_target = target;
  860. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  861. unsigned char period, offset;
  862. if (trans_mode != ASYNC_MODE) {
  863. nsp32_set_max_sync(data, target, &period, &offset);
  864. nsp32_build_sdtr(SCpnt, period, offset);
  865. target->sync_flag |= SDTR_INITIATOR;
  866. } else {
  867. nsp32_set_async(data, target);
  868. target->sync_flag |= SDTR_DONE;
  869. }
  870. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  871. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  872. target->limit_entry, period, offset);
  873. } else if (target->sync_flag & SDTR_INITIATOR) {
  874. /*
  875. * It was negotiating SDTR with target, sending from the
  876. * initiator, but there are no chance to remove this flag.
  877. * Set async because we don't get proper negotiation.
  878. */
  879. nsp32_set_async(data, target);
  880. target->sync_flag &= ~SDTR_INITIATOR;
  881. target->sync_flag |= SDTR_DONE;
  882. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  883. "SDTR_INITIATOR: fall back to async");
  884. } else if (target->sync_flag & SDTR_TARGET) {
  885. /*
  886. * It was negotiating SDTR with target, sending from target,
  887. * but there are no chance to remove this flag. Set async
  888. * because we don't get proper negotiation.
  889. */
  890. nsp32_set_async(data, target);
  891. target->sync_flag &= ~SDTR_TARGET;
  892. target->sync_flag |= SDTR_DONE;
  893. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  894. "Unknown SDTR from target is reached, fall back to async.");
  895. }
  896. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  897. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  898. SCpnt->device->id, target->sync_flag, target->syncreg,
  899. target->ackwidth);
  900. /* Selection */
  901. if (auto_param == 0) {
  902. ret = nsp32_selection_autopara(SCpnt);
  903. } else {
  904. ret = nsp32_selection_autoscsi(SCpnt);
  905. }
  906. if (ret != TRUE) {
  907. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  908. nsp32_scsi_done(SCpnt);
  909. }
  910. return 0;
  911. }
  912. /* initialize asic */
  913. static int nsp32hw_init(nsp32_hw_data *data)
  914. {
  915. unsigned int base = data->BaseAddress;
  916. unsigned short irq_stat;
  917. unsigned long lc_reg;
  918. unsigned char power;
  919. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  920. if ((lc_reg & 0xff00) == 0) {
  921. lc_reg |= (0x20 << 8);
  922. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  923. }
  924. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  925. nsp32_write2(base, TRANSFER_CONTROL, 0);
  926. nsp32_write4(base, BM_CNT, 0);
  927. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  928. do {
  929. irq_stat = nsp32_read2(base, IRQ_STATUS);
  930. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  931. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  932. /*
  933. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  934. * designated by specification.
  935. */
  936. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  937. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  938. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  939. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  940. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  941. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  942. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  943. } else {
  944. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  945. }
  946. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  947. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  948. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  949. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  950. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  951. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  952. /*
  953. * initialize MISC_WRRD register
  954. *
  955. * Note: Designated parameters is obeyed as following:
  956. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  957. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  958. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  959. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  960. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  961. * MISC_DELAYED_BMSTART: It's selected for safety.
  962. *
  963. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  964. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  965. * appropriate value before restarting bus master transfer.
  966. */
  967. nsp32_index_write2(base, MISC_WR,
  968. (SCSI_DIRECTION_DETECTOR_SELECT |
  969. DELAYED_BMSTART |
  970. MASTER_TERMINATION_SELECT |
  971. BMREQ_NEGATE_TIMING_SEL |
  972. AUTOSEL_TIMING_SEL |
  973. BMSTOP_CHANGE2_NONDATA_PHASE));
  974. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  975. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  976. if (!(power & SENSE)) {
  977. nsp32_msg(KERN_INFO, "term power on");
  978. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  979. }
  980. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  981. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  982. nsp32_write1(base, SYNC_REG, 0);
  983. nsp32_write1(base, ACK_WIDTH, 0);
  984. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  985. /*
  986. * enable to select designated IRQ (except for
  987. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  988. */
  989. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  990. IRQSELECT_SCSIRESET_IRQ |
  991. IRQSELECT_FIFO_SHLD_IRQ |
  992. IRQSELECT_RESELECT_IRQ |
  993. IRQSELECT_PHASE_CHANGE_IRQ |
  994. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  995. // IRQSELECT_BMCNTERR_IRQ |
  996. IRQSELECT_TARGET_ABORT_IRQ |
  997. IRQSELECT_MASTER_ABORT_IRQ );
  998. nsp32_write2(base, IRQ_CONTROL, 0);
  999. /* PCI LED off */
  1000. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1001. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1002. return TRUE;
  1003. }
  1004. /* interrupt routine */
  1005. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1006. {
  1007. nsp32_hw_data *data = dev_id;
  1008. unsigned int base = data->BaseAddress;
  1009. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1010. unsigned short auto_stat, irq_stat, trans_stat;
  1011. unsigned char busmon, busphase;
  1012. unsigned long flags;
  1013. int ret;
  1014. int handled = 0;
  1015. struct Scsi_Host *host = data->Host;
  1016. spin_lock_irqsave(host->host_lock, flags);
  1017. /*
  1018. * IRQ check, then enable IRQ mask
  1019. */
  1020. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1021. nsp32_dbg(NSP32_DEBUG_INTR,
  1022. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1023. /* is this interrupt comes from Ninja asic? */
  1024. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1025. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1026. goto out2;
  1027. }
  1028. handled = 1;
  1029. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1030. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1031. busphase = busmon & BUSMON_PHASE_MASK;
  1032. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1033. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1034. nsp32_msg(KERN_INFO, "card disconnect");
  1035. if (data->CurrentSC != NULL) {
  1036. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1037. SCpnt->result = DID_BAD_TARGET << 16;
  1038. nsp32_scsi_done(SCpnt);
  1039. }
  1040. goto out;
  1041. }
  1042. /* Timer IRQ */
  1043. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1044. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1045. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1046. goto out;
  1047. }
  1048. /* SCSI reset */
  1049. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1050. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1051. nsp32_do_bus_reset(data);
  1052. if (SCpnt != NULL) {
  1053. SCpnt->result = DID_RESET << 16;
  1054. nsp32_scsi_done(SCpnt);
  1055. }
  1056. goto out;
  1057. }
  1058. if (SCpnt == NULL) {
  1059. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1060. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1061. goto out;
  1062. }
  1063. /*
  1064. * AutoSCSI Interrupt.
  1065. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1066. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1067. * recorded when AutoSCSI sequencer has been processed.
  1068. */
  1069. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1070. /* getting SCSI executed phase */
  1071. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1072. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1073. /* Selection Timeout, go busfree phase. */
  1074. if (auto_stat & SELECTION_TIMEOUT) {
  1075. nsp32_dbg(NSP32_DEBUG_INTR,
  1076. "selection timeout occurred");
  1077. SCpnt->result = DID_TIME_OUT << 16;
  1078. nsp32_scsi_done(SCpnt);
  1079. goto out;
  1080. }
  1081. if (auto_stat & MSGOUT_PHASE) {
  1082. /*
  1083. * MsgOut phase was processed.
  1084. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1085. * completed. Thus, msgout_len must reset. Otherwise,
  1086. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1087. * then we will encounter the condition and check.
  1088. */
  1089. if (!(auto_stat & MSG_IN_OCCUER) &&
  1090. (data->msgout_len <= 3)) {
  1091. /*
  1092. * !MSG_IN_OCCUER && msgout_len <=3
  1093. * ---> AutoSCSI with MSGOUTreg is processed.
  1094. */
  1095. data->msgout_len = 0;
  1096. };
  1097. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1098. }
  1099. if ((auto_stat & DATA_IN_PHASE) &&
  1100. (scsi_get_resid(SCpnt) > 0) &&
  1101. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1102. printk( "auto+fifo\n");
  1103. //nsp32_pio_read(SCpnt);
  1104. }
  1105. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1106. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1107. nsp32_dbg(NSP32_DEBUG_INTR,
  1108. "Data in/out phase processed");
  1109. /* read BMCNT, SGT pointer addr */
  1110. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1111. nsp32_read4(base, BM_CNT));
  1112. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1113. nsp32_read4(base, SGT_ADR));
  1114. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1115. nsp32_read4(base, SACK_CNT));
  1116. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1117. nsp32_read4(base, SAVED_SACK_CNT));
  1118. scsi_set_resid(SCpnt, 0); /* all data transfered! */
  1119. }
  1120. /*
  1121. * MsgIn Occur
  1122. */
  1123. if (auto_stat & MSG_IN_OCCUER) {
  1124. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1125. }
  1126. /*
  1127. * MsgOut Occur
  1128. */
  1129. if (auto_stat & MSG_OUT_OCCUER) {
  1130. nsp32_msgout_occur(SCpnt);
  1131. }
  1132. /*
  1133. * Bus Free Occur
  1134. */
  1135. if (auto_stat & BUS_FREE_OCCUER) {
  1136. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1137. if (ret == TRUE) {
  1138. goto out;
  1139. }
  1140. }
  1141. if (auto_stat & STATUS_PHASE) {
  1142. /*
  1143. * Read CSB and substitute CSB for SCpnt->result
  1144. * to save status phase stutas byte.
  1145. * scsi error handler checks host_byte (DID_*:
  1146. * low level driver to indicate status), then checks
  1147. * status_byte (SCSI status byte).
  1148. */
  1149. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1150. }
  1151. if (auto_stat & ILLEGAL_PHASE) {
  1152. /* Illegal phase is detected. SACK is not back. */
  1153. nsp32_msg(KERN_WARNING,
  1154. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1155. /* TODO: currently we don't have any action... bus reset? */
  1156. /*
  1157. * To send back SACK, assert, wait, and negate.
  1158. */
  1159. nsp32_sack_assert(data);
  1160. nsp32_wait_req(data, NEGATE);
  1161. nsp32_sack_negate(data);
  1162. }
  1163. if (auto_stat & COMMAND_PHASE) {
  1164. /* nothing to do */
  1165. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1166. }
  1167. if (auto_stat & AUTOSCSI_BUSY) {
  1168. /* AutoSCSI is running */
  1169. }
  1170. show_autophase(auto_stat);
  1171. }
  1172. /* FIFO_SHLD_IRQ */
  1173. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1174. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1175. switch(busphase) {
  1176. case BUSPHASE_DATA_OUT:
  1177. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1178. //nsp32_pio_write(SCpnt);
  1179. break;
  1180. case BUSPHASE_DATA_IN:
  1181. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1182. //nsp32_pio_read(SCpnt);
  1183. break;
  1184. case BUSPHASE_STATUS:
  1185. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1186. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1187. break;
  1188. default:
  1189. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1190. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1191. show_busphase(busphase);
  1192. break;
  1193. }
  1194. goto out;
  1195. }
  1196. /* Phase Change IRQ */
  1197. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1198. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1199. switch(busphase) {
  1200. case BUSPHASE_MESSAGE_IN:
  1201. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1202. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1203. break;
  1204. default:
  1205. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1206. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1207. irq_stat, trans_stat);
  1208. show_busphase(busphase);
  1209. break;
  1210. }
  1211. goto out;
  1212. }
  1213. /* PCI_IRQ */
  1214. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1215. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1216. /* Do nothing */
  1217. }
  1218. /* BMCNTERR_IRQ */
  1219. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1220. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1221. /*
  1222. * TODO: To be implemented improving bus master
  1223. * transfer reliablity when BMCNTERR is occurred in
  1224. * AutoSCSI phase described in specification.
  1225. */
  1226. }
  1227. #if 0
  1228. nsp32_dbg(NSP32_DEBUG_INTR,
  1229. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1230. show_busphase(busphase);
  1231. #endif
  1232. out:
  1233. /* disable IRQ mask */
  1234. nsp32_write2(base, IRQ_CONTROL, 0);
  1235. out2:
  1236. spin_unlock_irqrestore(host->host_lock, flags);
  1237. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1238. return IRQ_RETVAL(handled);
  1239. }
  1240. #undef SPRINTF
  1241. #define SPRINTF(args...) \
  1242. do { \
  1243. if(length > (pos - buffer)) { \
  1244. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1245. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1246. } \
  1247. } while(0)
  1248. static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1249. off_t offset, int length, int inout)
  1250. {
  1251. char *pos = buffer;
  1252. int thislength;
  1253. unsigned long flags;
  1254. nsp32_hw_data *data;
  1255. int hostno;
  1256. unsigned int base;
  1257. unsigned char mode_reg;
  1258. int id, speed;
  1259. long model;
  1260. /* Write is not supported, just return. */
  1261. if (inout == TRUE) {
  1262. return -EINVAL;
  1263. }
  1264. hostno = host->host_no;
  1265. data = (nsp32_hw_data *)host->hostdata;
  1266. base = host->io_port;
  1267. SPRINTF("NinjaSCSI-32 status\n\n");
  1268. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1269. SPRINTF("SCSI host No.: %d\n", hostno);
  1270. SPRINTF("IRQ: %d\n", host->irq);
  1271. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1272. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1273. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1274. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1275. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1276. model = data->pci_devid->driver_data;
  1277. #ifdef CONFIG_PM
  1278. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1279. #endif
  1280. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1281. spin_lock_irqsave(&(data->Lock), flags);
  1282. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1283. spin_unlock_irqrestore(&(data->Lock), flags);
  1284. SPRINTF("SDTR status\n");
  1285. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1286. SPRINTF("id %d: ", id);
  1287. if (id == host->this_id) {
  1288. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1289. continue;
  1290. }
  1291. if (data->target[id].sync_flag == SDTR_DONE) {
  1292. if (data->target[id].period == 0 &&
  1293. data->target[id].offset == ASYNC_OFFSET ) {
  1294. SPRINTF("async");
  1295. } else {
  1296. SPRINTF(" sync");
  1297. }
  1298. } else {
  1299. SPRINTF(" none");
  1300. }
  1301. if (data->target[id].period != 0) {
  1302. speed = 1000000 / (data->target[id].period * 4);
  1303. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1304. speed / 1000,
  1305. speed % 1000,
  1306. data->target[id].offset
  1307. );
  1308. }
  1309. SPRINTF("\n");
  1310. }
  1311. thislength = pos - (buffer + offset);
  1312. if(thislength < 0) {
  1313. *start = NULL;
  1314. return 0;
  1315. }
  1316. thislength = min(thislength, length);
  1317. *start = buffer + offset;
  1318. return thislength;
  1319. }
  1320. #undef SPRINTF
  1321. /*
  1322. * Reset parameters and call scsi_done for data->cur_lunt.
  1323. * Be careful setting SCpnt->result = DID_* before calling this function.
  1324. */
  1325. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1326. {
  1327. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1328. unsigned int base = SCpnt->device->host->io_port;
  1329. scsi_dma_unmap(SCpnt);
  1330. /*
  1331. * clear TRANSFERCONTROL_BM_START
  1332. */
  1333. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1334. nsp32_write4(base, BM_CNT, 0);
  1335. /*
  1336. * call scsi_done
  1337. */
  1338. (*SCpnt->scsi_done)(SCpnt);
  1339. /*
  1340. * reset parameters
  1341. */
  1342. data->cur_lunt->SCpnt = NULL;
  1343. data->cur_lunt = NULL;
  1344. data->cur_target = NULL;
  1345. data->CurrentSC = NULL;
  1346. }
  1347. /*
  1348. * Bus Free Occur
  1349. *
  1350. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1351. * with ACK reply when below condition is matched:
  1352. * MsgIn 00: Command Complete.
  1353. * MsgIn 02: Save Data Pointer.
  1354. * MsgIn 04: Diconnect.
  1355. * In other case, unexpected BUSFREE is detected.
  1356. */
  1357. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1358. {
  1359. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1360. unsigned int base = SCpnt->device->host->io_port;
  1361. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1362. show_autophase(execph);
  1363. nsp32_write4(base, BM_CNT, 0);
  1364. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1365. /*
  1366. * MsgIn 02: Save Data Pointer
  1367. *
  1368. * VALID:
  1369. * Save Data Pointer is received. Adjust pointer.
  1370. *
  1371. * NO-VALID:
  1372. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1373. * processing and we can't adjust any SCSI data pointer in next data
  1374. * phase.
  1375. */
  1376. if (execph & MSGIN_02_VALID) {
  1377. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1378. /*
  1379. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1380. * needed.
  1381. */
  1382. if (!(execph & MSGIN_00_VALID) &&
  1383. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1384. unsigned int sacklen, s_sacklen;
  1385. /*
  1386. * Read SACK count and SAVEDSACK count, then compare.
  1387. */
  1388. sacklen = nsp32_read4(base, SACK_CNT );
  1389. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1390. /*
  1391. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1392. * come after data transfering.
  1393. */
  1394. if (s_sacklen > 0) {
  1395. /*
  1396. * Comparing between sack and savedsack to
  1397. * check the condition of AutoMsgIn03.
  1398. *
  1399. * If they are same, set msgin03 == TRUE,
  1400. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1401. * reselection. On the other hand, if they
  1402. * aren't same, set msgin03 == FALSE, and
  1403. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1404. * reselection.
  1405. */
  1406. if (sacklen != s_sacklen) {
  1407. data->cur_lunt->msgin03 = FALSE;
  1408. } else {
  1409. data->cur_lunt->msgin03 = TRUE;
  1410. }
  1411. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1412. }
  1413. }
  1414. /* This value has not substitude with valid value yet... */
  1415. //data->cur_lunt->save_datp = data->cur_datp;
  1416. } else {
  1417. /*
  1418. * no processing.
  1419. */
  1420. }
  1421. if (execph & MSGIN_03_VALID) {
  1422. /* MsgIn03 was valid to be processed. No need processing. */
  1423. }
  1424. /*
  1425. * target SDTR check
  1426. */
  1427. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1428. /*
  1429. * SDTR negotiation pulled by the initiator has not
  1430. * finished yet. Fall back to ASYNC mode.
  1431. */
  1432. nsp32_set_async(data, data->cur_target);
  1433. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1434. data->cur_target->sync_flag |= SDTR_DONE;
  1435. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1436. /*
  1437. * SDTR negotiation pulled by the target has been
  1438. * negotiating.
  1439. */
  1440. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1441. /*
  1442. * If valid message is received, then
  1443. * negotiation is succeeded.
  1444. */
  1445. } else {
  1446. /*
  1447. * On the contrary, if unexpected bus free is
  1448. * occurred, then negotiation is failed. Fall
  1449. * back to ASYNC mode.
  1450. */
  1451. nsp32_set_async(data, data->cur_target);
  1452. }
  1453. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1454. data->cur_target->sync_flag |= SDTR_DONE;
  1455. }
  1456. /*
  1457. * It is always ensured by SCSI standard that initiator
  1458. * switches into Bus Free Phase after
  1459. * receiving message 00 (Command Complete), 04 (Disconnect).
  1460. * It's the reason that processing here is valid.
  1461. */
  1462. if (execph & MSGIN_00_VALID) {
  1463. /* MsgIn 00: Command Complete */
  1464. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1465. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1466. SCpnt->SCp.Message = 0;
  1467. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1468. "normal end stat=0x%x resid=0x%x\n",
  1469. SCpnt->SCp.Status, scsi_get_resid(SCpnt));
  1470. SCpnt->result = (DID_OK << 16) |
  1471. (SCpnt->SCp.Message << 8) |
  1472. (SCpnt->SCp.Status << 0);
  1473. nsp32_scsi_done(SCpnt);
  1474. /* All operation is done */
  1475. return TRUE;
  1476. } else if (execph & MSGIN_04_VALID) {
  1477. /* MsgIn 04: Disconnect */
  1478. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1479. SCpnt->SCp.Message = 4;
  1480. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1481. return TRUE;
  1482. } else {
  1483. /* Unexpected bus free */
  1484. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1485. /* DID_ERROR? */
  1486. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1487. SCpnt->result = DID_ERROR << 16;
  1488. nsp32_scsi_done(SCpnt);
  1489. return TRUE;
  1490. }
  1491. return FALSE;
  1492. }
  1493. /*
  1494. * nsp32_adjust_busfree - adjusting SG table
  1495. *
  1496. * Note: This driver adjust the SG table using SCSI ACK
  1497. * counter instead of BMCNT counter!
  1498. */
  1499. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1500. {
  1501. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1502. int old_entry = data->cur_entry;
  1503. int new_entry;
  1504. int sg_num = data->cur_lunt->sg_num;
  1505. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1506. unsigned int restlen, sentlen;
  1507. u32_le len, addr;
  1508. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1509. /* adjust saved SACK count with 4 byte start address boundary */
  1510. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1511. /*
  1512. * calculate new_entry from sack count and each sgt[].len
  1513. * calculate the byte which is intent to send
  1514. */
  1515. sentlen = 0;
  1516. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1517. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1518. if (sentlen > s_sacklen) {
  1519. break;
  1520. }
  1521. }
  1522. /* all sgt is processed */
  1523. if (new_entry == sg_num) {
  1524. goto last;
  1525. }
  1526. if (sentlen == s_sacklen) {
  1527. /* XXX: confirm it's ok or not */
  1528. /* In this case, it's ok because we are at
  1529. the head element of the sg. restlen is correctly calculated. */
  1530. }
  1531. /* calculate the rest length for transfering */
  1532. restlen = sentlen - s_sacklen;
  1533. /* update adjusting current SG table entry */
  1534. len = le32_to_cpu(sgt[new_entry].len);
  1535. addr = le32_to_cpu(sgt[new_entry].addr);
  1536. addr += (len - restlen);
  1537. sgt[new_entry].addr = cpu_to_le32(addr);
  1538. sgt[new_entry].len = cpu_to_le32(restlen);
  1539. /* set cur_entry with new_entry */
  1540. data->cur_entry = new_entry;
  1541. return;
  1542. last:
  1543. if (scsi_get_resid(SCpnt) < sentlen) {
  1544. nsp32_msg(KERN_ERR, "resid underflow");
  1545. }
  1546. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1547. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1548. /* update hostdata and lun */
  1549. return;
  1550. }
  1551. /*
  1552. * It's called MsgOut phase occur.
  1553. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1554. * message out phase. It, however, has more than 3 messages,
  1555. * HBA creates the interrupt and we have to process by hand.
  1556. */
  1557. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1558. {
  1559. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1560. unsigned int base = SCpnt->device->host->io_port;
  1561. //unsigned short command;
  1562. long new_sgtp;
  1563. int i;
  1564. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1565. "enter: msgout_len: 0x%x", data->msgout_len);
  1566. /*
  1567. * If MsgOut phase is occurred without having any
  1568. * message, then No_Operation is sent (SCSI-2).
  1569. */
  1570. if (data->msgout_len == 0) {
  1571. nsp32_build_nop(SCpnt);
  1572. }
  1573. /*
  1574. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1575. * because SGTP is incremented next point.
  1576. * There is few statement in the specification...
  1577. */
  1578. new_sgtp = data->cur_lunt->sglun_paddr +
  1579. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1580. /*
  1581. * send messages
  1582. */
  1583. for (i = 0; i < data->msgout_len; i++) {
  1584. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1585. "%d : 0x%x", i, data->msgoutbuf[i]);
  1586. /*
  1587. * Check REQ is asserted.
  1588. */
  1589. nsp32_wait_req(data, ASSERT);
  1590. if (i == (data->msgout_len - 1)) {
  1591. /*
  1592. * If the last message, set the AutoSCSI restart
  1593. * before send back the ack message. AutoSCSI
  1594. * restart automatically negate ATN signal.
  1595. */
  1596. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1597. //nsp32_restart_autoscsi(SCpnt, command);
  1598. nsp32_write2(base, COMMAND_CONTROL,
  1599. (CLEAR_CDB_FIFO_POINTER |
  1600. AUTO_COMMAND_PHASE |
  1601. AUTOSCSI_RESTART |
  1602. AUTO_MSGIN_00_OR_04 |
  1603. AUTO_MSGIN_02 ));
  1604. }
  1605. /*
  1606. * Write data with SACK, then wait sack is
  1607. * automatically negated.
  1608. */
  1609. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1610. nsp32_wait_sack(data, NEGATE);
  1611. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1612. nsp32_read1(base, SCSI_BUS_MONITOR));
  1613. };
  1614. data->msgout_len = 0;
  1615. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1616. }
  1617. /*
  1618. * Restart AutoSCSI
  1619. *
  1620. * Note: Restarting AutoSCSI needs set:
  1621. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1622. */
  1623. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1624. {
  1625. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1626. unsigned int base = data->BaseAddress;
  1627. unsigned short transfer = 0;
  1628. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1629. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1630. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1631. }
  1632. /*
  1633. * set SYNC_REG
  1634. * Don't set BM_START_ADR before setting this register.
  1635. */
  1636. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1637. /*
  1638. * set ACKWIDTH
  1639. */
  1640. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1641. /*
  1642. * set SREQ hazard killer sampling rate
  1643. */
  1644. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1645. /*
  1646. * set SGT ADDR (physical address)
  1647. */
  1648. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1649. /*
  1650. * set TRANSFER CONTROL REG
  1651. */
  1652. transfer = 0;
  1653. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1654. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1655. if (scsi_bufflen(SCpnt) > 0) {
  1656. transfer |= BM_START;
  1657. }
  1658. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1659. transfer |= CB_MMIO_MODE;
  1660. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1661. transfer |= CB_IO_MODE;
  1662. }
  1663. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1664. /*
  1665. * restart AutoSCSI
  1666. *
  1667. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1668. */
  1669. command |= (CLEAR_CDB_FIFO_POINTER |
  1670. AUTO_COMMAND_PHASE |
  1671. AUTOSCSI_RESTART );
  1672. nsp32_write2(base, COMMAND_CONTROL, command);
  1673. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1674. }
  1675. /*
  1676. * cannot run automatically message in occur
  1677. */
  1678. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1679. unsigned long irq_status,
  1680. unsigned short execph)
  1681. {
  1682. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1683. unsigned int base = SCpnt->device->host->io_port;
  1684. unsigned char msg;
  1685. unsigned char msgtype;
  1686. unsigned char newlun;
  1687. unsigned short command = 0;
  1688. int msgclear = TRUE;
  1689. long new_sgtp;
  1690. int ret;
  1691. /*
  1692. * read first message
  1693. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1694. * of Message-In have to be processed before sending back SCSI ACK.
  1695. */
  1696. msg = nsp32_read1(base, SCSI_DATA_IN);
  1697. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1698. msgtype = data->msginbuf[0];
  1699. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1700. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1701. data->msgin_len, msg, msgtype);
  1702. /*
  1703. * TODO: We need checking whether bus phase is message in?
  1704. */
  1705. /*
  1706. * assert SCSI ACK
  1707. */
  1708. nsp32_sack_assert(data);
  1709. /*
  1710. * processing IDENTIFY
  1711. */
  1712. if (msgtype & 0x80) {
  1713. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1714. /* Invalid (non reselect) phase */
  1715. goto reject;
  1716. }
  1717. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1718. ret = nsp32_reselection(SCpnt, newlun);
  1719. if (ret == TRUE) {
  1720. goto restart;
  1721. } else {
  1722. goto reject;
  1723. }
  1724. }
  1725. /*
  1726. * processing messages except for IDENTIFY
  1727. *
  1728. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1729. */
  1730. switch (msgtype) {
  1731. /*
  1732. * 1-byte message
  1733. */
  1734. case COMMAND_COMPLETE:
  1735. case DISCONNECT:
  1736. /*
  1737. * These messages should not be occurred.
  1738. * They should be processed on AutoSCSI sequencer.
  1739. */
  1740. nsp32_msg(KERN_WARNING,
  1741. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1742. break;
  1743. case RESTORE_POINTERS:
  1744. /*
  1745. * AutoMsgIn03 is disabled, and HBA gets this message.
  1746. */
  1747. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1748. unsigned int s_sacklen;
  1749. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1750. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1751. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1752. } else {
  1753. /* No need to rewrite SGT */
  1754. }
  1755. }
  1756. data->cur_lunt->msgin03 = FALSE;
  1757. /* Update with the new value */
  1758. /* reset SACK/SavedACK counter (or ALL clear?) */
  1759. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1760. /*
  1761. * set new sg pointer
  1762. */
  1763. new_sgtp = data->cur_lunt->sglun_paddr +
  1764. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1765. nsp32_write4(base, SGT_ADR, new_sgtp);
  1766. break;
  1767. case SAVE_POINTERS:
  1768. /*
  1769. * These messages should not be occurred.
  1770. * They should be processed on AutoSCSI sequencer.
  1771. */
  1772. nsp32_msg (KERN_WARNING,
  1773. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1774. break;
  1775. case MESSAGE_REJECT:
  1776. /* If previous message_out is sending SDTR, and get
  1777. message_reject from target, SDTR negotiation is failed */
  1778. if (data->cur_target->sync_flag &
  1779. (SDTR_INITIATOR | SDTR_TARGET)) {
  1780. /*
  1781. * Current target is negotiating SDTR, but it's
  1782. * failed. Fall back to async transfer mode, and set
  1783. * SDTR_DONE.
  1784. */
  1785. nsp32_set_async(data, data->cur_target);
  1786. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1787. data->cur_target->sync_flag |= SDTR_DONE;
  1788. }
  1789. break;
  1790. case LINKED_CMD_COMPLETE:
  1791. case LINKED_FLG_CMD_COMPLETE:
  1792. /* queue tag is not supported currently */
  1793. nsp32_msg (KERN_WARNING,
  1794. "unsupported message: 0x%x", msgtype);
  1795. break;
  1796. case INITIATE_RECOVERY:
  1797. /* staring ECA (Extended Contingent Allegiance) state. */
  1798. /* This message is declined in SPI2 or later. */
  1799. goto reject;
  1800. /*
  1801. * 2-byte message
  1802. */
  1803. case SIMPLE_QUEUE_TAG:
  1804. case 0x23:
  1805. /*
  1806. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1807. * No support is needed.
  1808. */
  1809. if (data->msgin_len >= 1) {
  1810. goto reject;
  1811. }
  1812. /* current position is 1-byte of 2 byte */
  1813. msgclear = FALSE;
  1814. break;
  1815. /*
  1816. * extended message
  1817. */
  1818. case EXTENDED_MESSAGE:
  1819. if (data->msgin_len < 1) {
  1820. /*
  1821. * Current position does not reach 2-byte
  1822. * (2-byte is extended message length).
  1823. */
  1824. msgclear = FALSE;
  1825. break;
  1826. }
  1827. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1828. /*
  1829. * Current extended message has msginbuf[1] + 2
  1830. * (msgin_len starts counting from 0, so buf[1] + 1).
  1831. * If current message position is not finished,
  1832. * continue receiving message.
  1833. */
  1834. msgclear = FALSE;
  1835. break;
  1836. }
  1837. /*
  1838. * Reach here means regular length of each type of
  1839. * extended messages.
  1840. */
  1841. switch (data->msginbuf[2]) {
  1842. case EXTENDED_MODIFY_DATA_POINTER:
  1843. /* TODO */
  1844. goto reject; /* not implemented yet */
  1845. break;
  1846. case EXTENDED_SDTR:
  1847. /*
  1848. * Exchange this message between initiator and target.
  1849. */
  1850. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1851. /*
  1852. * received inappropriate message.
  1853. */
  1854. goto reject;
  1855. break;
  1856. }
  1857. nsp32_analyze_sdtr(SCpnt);
  1858. break;
  1859. case EXTENDED_EXTENDED_IDENTIFY:
  1860. /* SCSI-I only, not supported. */
  1861. goto reject; /* not implemented yet */
  1862. break;
  1863. case EXTENDED_WDTR:
  1864. goto reject; /* not implemented yet */
  1865. break;
  1866. default:
  1867. goto reject;
  1868. }
  1869. break;
  1870. default:
  1871. goto reject;
  1872. }
  1873. restart:
  1874. if (msgclear == TRUE) {
  1875. data->msgin_len = 0;
  1876. /*
  1877. * If restarting AutoSCSI, but there are some message to out
  1878. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1879. * (MV_VALID = 0). When commandcontrol is written with
  1880. * AutoSCSI restart, at the same time MsgOutOccur should be
  1881. * happened (however, such situation is really possible...?).
  1882. */
  1883. if (data->msgout_len > 0) {
  1884. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1885. command |= AUTO_ATN;
  1886. }
  1887. /*
  1888. * restart AutoSCSI
  1889. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1890. */
  1891. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1892. /*
  1893. * If current msgin03 is TRUE, then flag on.
  1894. */
  1895. if (data->cur_lunt->msgin03 == TRUE) {
  1896. command |= AUTO_MSGIN_03;
  1897. }
  1898. data->cur_lunt->msgin03 = FALSE;
  1899. } else {
  1900. data->msgin_len++;
  1901. }
  1902. /*
  1903. * restart AutoSCSI
  1904. */
  1905. nsp32_restart_autoscsi(SCpnt, command);
  1906. /*
  1907. * wait SCSI REQ negate for REQ-ACK handshake
  1908. */
  1909. nsp32_wait_req(data, NEGATE);
  1910. /*
  1911. * negate SCSI ACK
  1912. */
  1913. nsp32_sack_negate(data);
  1914. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1915. return;
  1916. reject:
  1917. nsp32_msg(KERN_WARNING,
  1918. "invalid or unsupported MessageIn, rejected. "
  1919. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1920. msg, data->msgin_len, msgtype);
  1921. nsp32_build_reject(SCpnt);
  1922. data->msgin_len = 0;
  1923. goto restart;
  1924. }
  1925. /*
  1926. *
  1927. */
  1928. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1929. {
  1930. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1931. nsp32_target *target = data->cur_target;
  1932. nsp32_sync_table *synct;
  1933. unsigned char get_period = data->msginbuf[3];
  1934. unsigned char get_offset = data->msginbuf[4];
  1935. int entry;
  1936. int syncnum;
  1937. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1938. synct = data->synct;
  1939. syncnum = data->syncnum;
  1940. /*
  1941. * If this inititor sent the SDTR message, then target responds SDTR,
  1942. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1943. * Messages are not appropriate, then send back reject message.
  1944. * If initiator did not send the SDTR, but target sends SDTR,
  1945. * initiator calculator the appropriate parameter and send back SDTR.
  1946. */
  1947. if (target->sync_flag & SDTR_INITIATOR) {
  1948. /*
  1949. * Initiator sent SDTR, the target responds and
  1950. * send back negotiation SDTR.
  1951. */
  1952. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1953. target->sync_flag &= ~SDTR_INITIATOR;
  1954. target->sync_flag |= SDTR_DONE;
  1955. /*
  1956. * offset:
  1957. */
  1958. if (get_offset > SYNC_OFFSET) {
  1959. /*
  1960. * Negotiation is failed, the target send back
  1961. * unexpected offset value.
  1962. */
  1963. goto reject;
  1964. }
  1965. if (get_offset == ASYNC_OFFSET) {
  1966. /*
  1967. * Negotiation is succeeded, the target want
  1968. * to fall back into asynchronous transfer mode.
  1969. */
  1970. goto async;
  1971. }
  1972. /*
  1973. * period:
  1974. * Check whether sync period is too short. If too short,
  1975. * fall back to async mode. If it's ok, then investigate
  1976. * the received sync period. If sync period is acceptable
  1977. * between sync table start_period and end_period, then
  1978. * set this I_T nexus as sent offset and period.
  1979. * If it's not acceptable, send back reject and fall back
  1980. * to async mode.
  1981. */
  1982. if (get_period < data->synct[0].period_num) {
  1983. /*
  1984. * Negotiation is failed, the target send back
  1985. * unexpected period value.
  1986. */
  1987. goto reject;
  1988. }
  1989. entry = nsp32_search_period_entry(data, target, get_period);
  1990. if (entry < 0) {
  1991. /*
  1992. * Target want to use long period which is not
  1993. * acceptable NinjaSCSI-32Bi/UDE.
  1994. */
  1995. goto reject;
  1996. }
  1997. /*
  1998. * Set new sync table and offset in this I_T nexus.
  1999. */
  2000. nsp32_set_sync_entry(data, target, entry, get_offset);
  2001. } else {
  2002. /* Target send SDTR to initiator. */
  2003. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2004. target->sync_flag |= SDTR_INITIATOR;
  2005. /* offset: */
  2006. if (get_offset > SYNC_OFFSET) {
  2007. /* send back as SYNC_OFFSET */
  2008. get_offset = SYNC_OFFSET;
  2009. }
  2010. /* period: */
  2011. if (get_period < data->synct[0].period_num) {
  2012. get_period = data->synct[0].period_num;
  2013. }
  2014. entry = nsp32_search_period_entry(data, target, get_period);
  2015. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2016. nsp32_set_async(data, target);
  2017. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2018. } else {
  2019. nsp32_set_sync_entry(data, target, entry, get_offset);
  2020. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2021. }
  2022. }
  2023. target->period = get_period;
  2024. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2025. return;
  2026. reject:
  2027. /*
  2028. * If the current message is unacceptable, send back to the target
  2029. * with reject message.
  2030. */
  2031. nsp32_build_reject(SCpnt);
  2032. async:
  2033. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2034. target->period = 0;
  2035. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2036. return;
  2037. }
  2038. /*
  2039. * Search config entry number matched in sync_table from given
  2040. * target and speed period value. If failed to search, return negative value.
  2041. */
  2042. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2043. nsp32_target *target,
  2044. unsigned char period)
  2045. {
  2046. int i;
  2047. if (target->limit_entry >= data->syncnum) {
  2048. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2049. target->limit_entry = 0;
  2050. }
  2051. for (i = target->limit_entry; i < data->syncnum; i++) {
  2052. if (period >= data->synct[i].start_period &&
  2053. period <= data->synct[i].end_period) {
  2054. break;
  2055. }
  2056. }
  2057. /*
  2058. * Check given period value is over the sync_table value.
  2059. * If so, return max value.
  2060. */
  2061. if (i == data->syncnum) {
  2062. i = -1;
  2063. }
  2064. return i;
  2065. }
  2066. /*
  2067. * target <-> initiator use ASYNC transfer
  2068. */
  2069. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2070. {
  2071. unsigned char period = data->synct[target->limit_entry].period_num;
  2072. target->offset = ASYNC_OFFSET;
  2073. target->period = 0;
  2074. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2075. target->ackwidth = 0;
  2076. target->sample_reg = 0;
  2077. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2078. }
  2079. /*
  2080. * target <-> initiator use maximum SYNC transfer
  2081. */
  2082. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2083. nsp32_target *target,
  2084. unsigned char *period,
  2085. unsigned char *offset)
  2086. {
  2087. unsigned char period_num, ackwidth;
  2088. period_num = data->synct[target->limit_entry].period_num;
  2089. *period = data->synct[target->limit_entry].start_period;
  2090. ackwidth = data->synct[target->limit_entry].ackwidth;
  2091. *offset = SYNC_OFFSET;
  2092. target->syncreg = TO_SYNCREG(period_num, *offset);
  2093. target->ackwidth = ackwidth;
  2094. target->offset = *offset;
  2095. target->sample_reg = 0; /* disable SREQ sampling */
  2096. }
  2097. /*
  2098. * target <-> initiator use entry number speed
  2099. */
  2100. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2101. nsp32_target *target,
  2102. int entry,
  2103. unsigned char offset)
  2104. {
  2105. unsigned char period, ackwidth, sample_rate;
  2106. period = data->synct[entry].period_num;
  2107. ackwidth = data->synct[entry].ackwidth;
  2108. offset = offset;
  2109. sample_rate = data->synct[entry].sample_rate;
  2110. target->syncreg = TO_SYNCREG(period, offset);
  2111. target->ackwidth = ackwidth;
  2112. target->offset = offset;
  2113. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2114. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2115. }
  2116. /*
  2117. * It waits until SCSI REQ becomes assertion or negation state.
  2118. *
  2119. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2120. * connected target responds SCSI REQ negation. We have to wait
  2121. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2122. * REQ-ACK handshake.
  2123. */
  2124. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2125. {
  2126. unsigned int base = data->BaseAddress;
  2127. int wait_time = 0;
  2128. unsigned char bus, req_bit;
  2129. if (!((state == ASSERT) || (state == NEGATE))) {
  2130. nsp32_msg(KERN_ERR, "unknown state designation");
  2131. }
  2132. /* REQ is BIT(5) */
  2133. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2134. do {
  2135. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2136. if ((bus & BUSMON_REQ) == req_bit) {
  2137. nsp32_dbg(NSP32_DEBUG_WAIT,
  2138. "wait_time: %d", wait_time);
  2139. return;
  2140. }
  2141. udelay(1);
  2142. wait_time++;
  2143. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2144. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2145. }
  2146. /*
  2147. * It waits until SCSI SACK becomes assertion or negation state.
  2148. */
  2149. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2150. {
  2151. unsigned int base = data->BaseAddress;
  2152. int wait_time = 0;
  2153. unsigned char bus, ack_bit;
  2154. if (!((state == ASSERT) || (state == NEGATE))) {
  2155. nsp32_msg(KERN_ERR, "unknown state designation");
  2156. }
  2157. /* ACK is BIT(4) */
  2158. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2159. do {
  2160. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2161. if ((bus & BUSMON_ACK) == ack_bit) {
  2162. nsp32_dbg(NSP32_DEBUG_WAIT,
  2163. "wait_time: %d", wait_time);
  2164. return;
  2165. }
  2166. udelay(1);
  2167. wait_time++;
  2168. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2169. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2170. }
  2171. /*
  2172. * assert SCSI ACK
  2173. *
  2174. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2175. */
  2176. static void nsp32_sack_assert(nsp32_hw_data *data)
  2177. {
  2178. unsigned int base = data->BaseAddress;
  2179. unsigned char busctrl;
  2180. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2181. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2182. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2183. }
  2184. /*
  2185. * negate SCSI ACK
  2186. */
  2187. static void nsp32_sack_negate(nsp32_hw_data *data)
  2188. {
  2189. unsigned int base = data->BaseAddress;
  2190. unsigned char busctrl;
  2191. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2192. busctrl &= ~BUSCTL_ACK;
  2193. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2194. }
  2195. /*
  2196. * Note: n_io_port is defined as 0x7f because I/O register port is
  2197. * assigned as:
  2198. * 0x800-0x8ff: memory mapped I/O port
  2199. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2200. * 0xc00-0xfff: CardBus status registers
  2201. */
  2202. static int nsp32_detect(struct pci_dev *pdev)
  2203. {
  2204. struct Scsi_Host *host; /* registered host structure */
  2205. struct resource *res;
  2206. nsp32_hw_data *data;
  2207. int ret;
  2208. int i, j;
  2209. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2210. /*
  2211. * register this HBA as SCSI device
  2212. */
  2213. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2214. if (host == NULL) {
  2215. nsp32_msg (KERN_ERR, "failed to scsi register");
  2216. goto err;
  2217. }
  2218. /*
  2219. * set nsp32_hw_data
  2220. */
  2221. data = (nsp32_hw_data *)host->hostdata;
  2222. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2223. host->irq = data->IrqNumber;
  2224. host->io_port = data->BaseAddress;
  2225. host->unique_id = data->BaseAddress;
  2226. host->n_io_port = data->NumAddress;
  2227. host->base = (unsigned long)data->MmioAddress;
  2228. data->Host = host;
  2229. spin_lock_init(&(data->Lock));
  2230. data->cur_lunt = NULL;
  2231. data->cur_target = NULL;
  2232. /*
  2233. * Bus master transfer mode is supported currently.
  2234. */
  2235. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2236. /*
  2237. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2238. * dividing * 100ns/4).
  2239. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2240. */
  2241. data->clock = CLOCK_4;
  2242. /*
  2243. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2244. */
  2245. switch (data->clock) {
  2246. case CLOCK_4:
  2247. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2248. data->synct = nsp32_sync_table_40M;
  2249. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2250. break;
  2251. case CLOCK_2:
  2252. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2253. data->synct = nsp32_sync_table_20M;
  2254. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2255. break;
  2256. case PCICLK:
  2257. /* If data->clock is PCICLK, then select pci sync table. */
  2258. data->synct = nsp32_sync_table_pci;
  2259. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2260. break;
  2261. default:
  2262. nsp32_msg(KERN_WARNING,
  2263. "Invalid clock div is selected, set CLOCK_4.");
  2264. /* Use default value CLOCK_4 */
  2265. data->clock = CLOCK_4;
  2266. data->synct = nsp32_sync_table_40M;
  2267. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2268. }
  2269. /*
  2270. * setup nsp32_lunt
  2271. */
  2272. /*
  2273. * setup DMA
  2274. */
  2275. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
  2276. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2277. goto scsi_unregister;
  2278. }
  2279. /*
  2280. * allocate autoparam DMA resource.
  2281. */
  2282. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2283. if (data->autoparam == NULL) {
  2284. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2285. goto scsi_unregister;
  2286. }
  2287. /*
  2288. * allocate scatter-gather DMA resource.
  2289. */
  2290. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2291. &(data->sg_paddr));
  2292. if (data->sg_list == NULL) {
  2293. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2294. goto free_autoparam;
  2295. }
  2296. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2297. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2298. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2299. nsp32_lunt tmp = {
  2300. .SCpnt = NULL,
  2301. .save_datp = 0,
  2302. .msgin03 = FALSE,
  2303. .sg_num = 0,
  2304. .cur_entry = 0,
  2305. .sglun = &(data->sg_list[offset]),
  2306. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2307. };
  2308. data->lunt[i][j] = tmp;
  2309. }
  2310. }
  2311. /*
  2312. * setup target
  2313. */
  2314. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2315. nsp32_target *target = &(data->target[i]);
  2316. target->limit_entry = 0;
  2317. target->sync_flag = 0;
  2318. nsp32_set_async(data, target);
  2319. }
  2320. /*
  2321. * EEPROM check
  2322. */
  2323. ret = nsp32_getprom_param(data);
  2324. if (ret == FALSE) {
  2325. data->resettime = 3; /* default 3 */
  2326. }
  2327. /*
  2328. * setup HBA
  2329. */
  2330. nsp32hw_init(data);
  2331. snprintf(data->info_str, sizeof(data->info_str),
  2332. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2333. host->irq, host->io_port, host->n_io_port);
  2334. /*
  2335. * SCSI bus reset
  2336. *
  2337. * Note: It's important to reset SCSI bus in initialization phase.
  2338. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2339. * system is coming up, so SCSI devices connected to HBA is set as
  2340. * un-asynchronous mode. It brings the merit that this HBA is
  2341. * ready to start synchronous transfer without any preparation,
  2342. * but we are difficult to control transfer speed. In addition,
  2343. * it prevents device transfer speed from effecting EEPROM start-up
  2344. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2345. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2346. * connected same or more than 4 devices. It should be avoided
  2347. * depending on this specification. Thus, resetting the SCSI bus
  2348. * restores all connected SCSI devices to asynchronous mode, then
  2349. * this driver set SDTR safely later, and we can control all SCSI
  2350. * device transfer mode.
  2351. */
  2352. nsp32_do_bus_reset(data);
  2353. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2354. if (ret < 0) {
  2355. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2356. "SCSI PCI controller. Interrupt: %d", host->irq);
  2357. goto free_sg_list;
  2358. }
  2359. /*
  2360. * PCI IO register
  2361. */
  2362. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2363. if (res == NULL) {
  2364. nsp32_msg(KERN_ERR,
  2365. "I/O region 0x%lx+0x%lx is already used",
  2366. data->BaseAddress, data->NumAddress);
  2367. goto free_irq;
  2368. }
  2369. ret = scsi_add_host(host, &pdev->dev);
  2370. if (ret) {
  2371. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2372. goto free_region;
  2373. }
  2374. scsi_scan_host(host);
  2375. pci_set_drvdata(pdev, host);
  2376. return 0;
  2377. free_region:
  2378. release_region(host->io_port, host->n_io_port);
  2379. free_irq:
  2380. free_irq(host->irq, data);
  2381. free_sg_list:
  2382. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2383. data->sg_list, data->sg_paddr);
  2384. free_autoparam:
  2385. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2386. data->autoparam, data->auto_paddr);
  2387. scsi_unregister:
  2388. scsi_host_put(host);
  2389. err:
  2390. return 1;
  2391. }
  2392. static int nsp32_release(struct Scsi_Host *host)
  2393. {
  2394. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2395. if (data->autoparam) {
  2396. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2397. data->autoparam, data->auto_paddr);
  2398. }
  2399. if (data->sg_list) {
  2400. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2401. data->sg_list, data->sg_paddr);
  2402. }
  2403. if (host->irq) {
  2404. free_irq(host->irq, data);
  2405. }
  2406. if (host->io_port && host->n_io_port) {
  2407. release_region(host->io_port, host->n_io_port);
  2408. }
  2409. if (data->MmioAddress) {
  2410. iounmap(data->MmioAddress);
  2411. }
  2412. return 0;
  2413. }
  2414. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2415. {
  2416. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2417. return data->info_str;
  2418. }
  2419. /****************************************************************************
  2420. * error handler
  2421. */
  2422. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2423. {
  2424. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2425. unsigned int base = SCpnt->device->host->io_port;
  2426. nsp32_msg(KERN_WARNING, "abort");
  2427. if (data->cur_lunt->SCpnt == NULL) {
  2428. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2429. return FAILED;
  2430. }
  2431. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2432. /* reset SDTR negotiation */
  2433. data->cur_target->sync_flag = 0;
  2434. nsp32_set_async(data, data->cur_target);
  2435. }
  2436. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2437. nsp32_write2(base, BM_CNT, 0);
  2438. SCpnt->result = DID_ABORT << 16;
  2439. nsp32_scsi_done(SCpnt);
  2440. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2441. return SUCCESS;
  2442. }
  2443. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2444. {
  2445. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2446. unsigned int base = SCpnt->device->host->io_port;
  2447. spin_lock_irq(SCpnt->device->host->host_lock);
  2448. nsp32_msg(KERN_INFO, "Bus Reset");
  2449. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2450. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2451. nsp32_do_bus_reset(data);
  2452. nsp32_write2(base, IRQ_CONTROL, 0);
  2453. spin_unlock_irq(SCpnt->device->host->host_lock);
  2454. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2455. }
  2456. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2457. {
  2458. unsigned int base = data->BaseAddress;
  2459. unsigned short intrdat;
  2460. int i;
  2461. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2462. /*
  2463. * stop all transfer
  2464. * clear TRANSFERCONTROL_BM_START
  2465. * clear counter
  2466. */
  2467. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2468. nsp32_write4(base, BM_CNT, 0);
  2469. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2470. /*
  2471. * fall back to asynchronous transfer mode
  2472. * initialize SDTR negotiation flag
  2473. */
  2474. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2475. nsp32_target *target = &data->target[i];
  2476. target->sync_flag = 0;
  2477. nsp32_set_async(data, target);
  2478. }
  2479. /*
  2480. * reset SCSI bus
  2481. */
  2482. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2483. udelay(RESET_HOLD_TIME);
  2484. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2485. for(i = 0; i < 5; i++) {
  2486. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2487. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2488. }
  2489. data->CurrentSC = NULL;
  2490. }
  2491. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2492. {
  2493. struct Scsi_Host *host = SCpnt->device->host;
  2494. unsigned int base = SCpnt->device->host->io_port;
  2495. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2496. nsp32_msg(KERN_INFO, "Host Reset");
  2497. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2498. spin_lock_irq(SCpnt->device->host->host_lock);
  2499. nsp32hw_init(data);
  2500. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2501. nsp32_do_bus_reset(data);
  2502. nsp32_write2(base, IRQ_CONTROL, 0);
  2503. spin_unlock_irq(SCpnt->device->host->host_lock);
  2504. return SUCCESS; /* Host reset is succeeded at any time. */
  2505. }
  2506. /**************************************************************************
  2507. * EEPROM handler
  2508. */
  2509. /*
  2510. * getting EEPROM parameter
  2511. */
  2512. static int nsp32_getprom_param(nsp32_hw_data *data)
  2513. {
  2514. int vendor = data->pci_devid->vendor;
  2515. int device = data->pci_devid->device;
  2516. int ret, val, i;
  2517. /*
  2518. * EEPROM checking.
  2519. */
  2520. ret = nsp32_prom_read(data, 0x7e);
  2521. if (ret != 0x55) {
  2522. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2523. return FALSE;
  2524. }
  2525. ret = nsp32_prom_read(data, 0x7f);
  2526. if (ret != 0xaa) {
  2527. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2528. return FALSE;
  2529. }
  2530. /*
  2531. * check EEPROM type
  2532. */
  2533. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2534. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2535. ret = nsp32_getprom_c16(data);
  2536. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2537. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2538. ret = nsp32_getprom_at24(data);
  2539. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2540. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2541. ret = nsp32_getprom_at24(data);
  2542. } else {
  2543. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2544. ret = FALSE;
  2545. }
  2546. /* for debug : SPROM data full checking */
  2547. for (i = 0; i <= 0x1f; i++) {
  2548. val = nsp32_prom_read(data, i);
  2549. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2550. "rom address 0x%x : 0x%x", i, val);
  2551. }
  2552. return ret;
  2553. }
  2554. /*
  2555. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2556. *
  2557. * ROMADDR
  2558. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2559. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2560. * 0x07 : HBA Synchronous Transfer Period
  2561. * Value 0: AutoSync, 1: Manual Setting
  2562. * 0x08 - 0x0f : Not Used? (0x0)
  2563. * 0x10 : Bus Termination
  2564. * Value 0: Auto[ON], 1: ON, 2: OFF
  2565. * 0x11 : Not Used? (0)
  2566. * 0x12 : Bus Reset Delay Time (0x03)
  2567. * 0x13 : Bootable CD Support
  2568. * Value 0: Disable, 1: Enable
  2569. * 0x14 : Device Scan
  2570. * Bit 7 6 5 4 3 2 1 0
  2571. * | <----------------->
  2572. * | SCSI ID: Value 0: Skip, 1: YES
  2573. * |-> Value 0: ALL scan, Value 1: Manual
  2574. * 0x15 - 0x1b : Not Used? (0)
  2575. * 0x1c : Constant? (0x01) (clock div?)
  2576. * 0x1d - 0x7c : Not Used (0xff)
  2577. * 0x7d : Not Used? (0xff)
  2578. * 0x7e : Constant (0x55), Validity signature
  2579. * 0x7f : Constant (0xaa), Validity signature
  2580. */
  2581. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2582. {
  2583. int ret, i;
  2584. int auto_sync;
  2585. nsp32_target *target;
  2586. int entry;
  2587. /*
  2588. * Reset time which is designated by EEPROM.
  2589. *
  2590. * TODO: Not used yet.
  2591. */
  2592. data->resettime = nsp32_prom_read(data, 0x12);
  2593. /*
  2594. * HBA Synchronous Transfer Period
  2595. *
  2596. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2597. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2598. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2599. * On the contrary if connected SCSI devices are same or higher
  2600. * than 4, then transfer speed is set as FAST-10M.
  2601. *
  2602. * I break this rule. The number of connected SCSI devices are
  2603. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2604. * forced as ULTRA-20M.
  2605. */
  2606. ret = nsp32_prom_read(data, 0x07);
  2607. switch (ret) {
  2608. case 0:
  2609. auto_sync = TRUE;
  2610. break;
  2611. case 1:
  2612. auto_sync = FALSE;
  2613. break;
  2614. default:
  2615. nsp32_msg(KERN_WARNING,
  2616. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2617. auto_sync = TRUE;
  2618. }
  2619. if (trans_mode == ULTRA20M_MODE) {
  2620. auto_sync = TRUE;
  2621. }
  2622. /*
  2623. * each device Synchronous Transfer Period
  2624. */
  2625. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2626. target = &data->target[i];
  2627. if (auto_sync == TRUE) {
  2628. target->limit_entry = 0; /* set as ULTRA20M */
  2629. } else {
  2630. ret = nsp32_prom_read(data, i);
  2631. entry = nsp32_search_period_entry(data, target, ret);
  2632. if (entry < 0) {
  2633. /* search failed... set maximum speed */
  2634. entry = 0;
  2635. }
  2636. target->limit_entry = entry;
  2637. }
  2638. }
  2639. return TRUE;
  2640. }
  2641. /*
  2642. * C16 110 (I-O Data: SC-NBD) data map:
  2643. *
  2644. * ROMADDR
  2645. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2646. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2647. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2648. * 0x08 - 0x0f : Not Used? (0x0)
  2649. * 0x10 : Transfer Mode
  2650. * Value 0: PIO, 1: Busmater
  2651. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2652. * 0x12 : Bus Termination
  2653. * Value 0: Disable, 1: Enable
  2654. * 0x13 - 0x19 : Disconnection
  2655. * Value 0: Disable, 1: Enable
  2656. * 0x1a - 0x7c : Not Used? (0)
  2657. * 0x7d : Not Used? (0xf8)
  2658. * 0x7e : Constant (0x55), Validity signature
  2659. * 0x7f : Constant (0xaa), Validity signature
  2660. */
  2661. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2662. {
  2663. int ret, i;
  2664. nsp32_target *target;
  2665. int entry, val;
  2666. /*
  2667. * Reset time which is designated by EEPROM.
  2668. *
  2669. * TODO: Not used yet.
  2670. */
  2671. data->resettime = nsp32_prom_read(data, 0x11);
  2672. /*
  2673. * each device Synchronous Transfer Period
  2674. */
  2675. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2676. target = &data->target[i];
  2677. ret = nsp32_prom_read(data, i);
  2678. switch (ret) {
  2679. case 0: /* 20MB/s */
  2680. val = 0x0c;
  2681. break;
  2682. case 1: /* 10MB/s */
  2683. val = 0x19;
  2684. break;
  2685. case 2: /* 5MB/s */
  2686. val = 0x32;
  2687. break;
  2688. case 3: /* ASYNC */
  2689. val = 0x00;
  2690. break;
  2691. default: /* default 20MB/s */
  2692. val = 0x0c;
  2693. break;
  2694. }
  2695. entry = nsp32_search_period_entry(data, target, val);
  2696. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2697. /* search failed... set maximum speed */
  2698. entry = 0;
  2699. }
  2700. target->limit_entry = entry;
  2701. }
  2702. return TRUE;
  2703. }
  2704. /*
  2705. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2706. */
  2707. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2708. {
  2709. int i, val;
  2710. /* start condition */
  2711. nsp32_prom_start(data);
  2712. /* device address */
  2713. nsp32_prom_write_bit(data, 1); /* 1 */
  2714. nsp32_prom_write_bit(data, 0); /* 0 */
  2715. nsp32_prom_write_bit(data, 1); /* 1 */
  2716. nsp32_prom_write_bit(data, 0); /* 0 */
  2717. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2718. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2719. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2720. /* R/W: W for dummy write */
  2721. nsp32_prom_write_bit(data, 0);
  2722. /* ack */
  2723. nsp32_prom_write_bit(data, 0);
  2724. /* word address */
  2725. for (i = 7; i >= 0; i--) {
  2726. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2727. }
  2728. /* ack */
  2729. nsp32_prom_write_bit(data, 0);
  2730. /* start condition */
  2731. nsp32_prom_start(data);
  2732. /* device address */
  2733. nsp32_prom_write_bit(data, 1); /* 1 */
  2734. nsp32_prom_write_bit(data, 0); /* 0 */
  2735. nsp32_prom_write_bit(data, 1); /* 1 */
  2736. nsp32_prom_write_bit(data, 0); /* 0 */
  2737. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2738. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2739. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2740. /* R/W: R */
  2741. nsp32_prom_write_bit(data, 1);
  2742. /* ack */
  2743. nsp32_prom_write_bit(data, 0);
  2744. /* data... */
  2745. val = 0;
  2746. for (i = 7; i >= 0; i--) {
  2747. val += (nsp32_prom_read_bit(data) << i);
  2748. }
  2749. /* no ack */
  2750. nsp32_prom_write_bit(data, 1);
  2751. /* stop condition */
  2752. nsp32_prom_stop(data);
  2753. return val;
  2754. }
  2755. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2756. {
  2757. int base = data->BaseAddress;
  2758. int tmp;
  2759. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2760. if (val == 0) {
  2761. tmp &= ~bit;
  2762. } else {
  2763. tmp |= bit;
  2764. }
  2765. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2766. udelay(10);
  2767. }
  2768. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2769. {
  2770. int base = data->BaseAddress;
  2771. int tmp, ret;
  2772. if (bit != SDA) {
  2773. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2774. return 0;
  2775. }
  2776. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2777. if (tmp == 0) {
  2778. ret = 0;
  2779. } else {
  2780. ret = 1;
  2781. }
  2782. udelay(10);
  2783. return ret;
  2784. }
  2785. static void nsp32_prom_start (nsp32_hw_data *data)
  2786. {
  2787. /* start condition */
  2788. nsp32_prom_set(data, SCL, 1);
  2789. nsp32_prom_set(data, SDA, 1);
  2790. nsp32_prom_set(data, ENA, 1); /* output mode */
  2791. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2792. * SDA 1->0 is start condition */
  2793. nsp32_prom_set(data, SCL, 0);
  2794. }
  2795. static void nsp32_prom_stop (nsp32_hw_data *data)
  2796. {
  2797. /* stop condition */
  2798. nsp32_prom_set(data, SCL, 1);
  2799. nsp32_prom_set(data, SDA, 0);
  2800. nsp32_prom_set(data, ENA, 1); /* output mode */
  2801. nsp32_prom_set(data, SDA, 1);
  2802. nsp32_prom_set(data, SCL, 0);
  2803. }
  2804. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2805. {
  2806. /* write */
  2807. nsp32_prom_set(data, SDA, val);
  2808. nsp32_prom_set(data, SCL, 1 );
  2809. nsp32_prom_set(data, SCL, 0 );
  2810. }
  2811. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2812. {
  2813. int val;
  2814. /* read */
  2815. nsp32_prom_set(data, ENA, 0); /* input mode */
  2816. nsp32_prom_set(data, SCL, 1);
  2817. val = nsp32_prom_get(data, SDA);
  2818. nsp32_prom_set(data, SCL, 0);
  2819. nsp32_prom_set(data, ENA, 1); /* output mode */
  2820. return val;
  2821. }
  2822. /**************************************************************************
  2823. * Power Management
  2824. */
  2825. #ifdef CONFIG_PM
  2826. /* Device suspended */
  2827. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2828. {
  2829. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2830. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2831. pci_save_state (pdev);
  2832. pci_disable_device (pdev);
  2833. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2834. return 0;
  2835. }
  2836. /* Device woken up */
  2837. static int nsp32_resume(struct pci_dev *pdev)
  2838. {
  2839. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2840. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2841. unsigned short reg;
  2842. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2843. pci_set_power_state(pdev, PCI_D0);
  2844. pci_enable_wake (pdev, PCI_D0, 0);
  2845. pci_restore_state (pdev);
  2846. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2847. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2848. if (reg == 0xffff) {
  2849. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2850. return 0;
  2851. }
  2852. nsp32hw_init (data);
  2853. nsp32_do_bus_reset(data);
  2854. nsp32_msg(KERN_INFO, "resume success");
  2855. return 0;
  2856. }
  2857. #endif
  2858. /************************************************************************
  2859. * PCI/Cardbus probe/remove routine
  2860. */
  2861. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2862. {
  2863. int ret;
  2864. nsp32_hw_data *data = &nsp32_data_base;
  2865. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2866. ret = pci_enable_device(pdev);
  2867. if (ret) {
  2868. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2869. return ret;
  2870. }
  2871. data->Pci = pdev;
  2872. data->pci_devid = id;
  2873. data->IrqNumber = pdev->irq;
  2874. data->BaseAddress = pci_resource_start(pdev, 0);
  2875. data->NumAddress = pci_resource_len (pdev, 0);
  2876. data->MmioAddress = pci_ioremap_bar(pdev, 1);
  2877. data->MmioLength = pci_resource_len (pdev, 1);
  2878. pci_set_master(pdev);
  2879. ret = nsp32_detect(pdev);
  2880. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2881. pdev->irq,
  2882. data->MmioAddress, data->MmioLength,
  2883. pci_name(pdev),
  2884. nsp32_model[id->driver_data]);
  2885. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2886. return ret;
  2887. }
  2888. static void __devexit nsp32_remove(struct pci_dev *pdev)
  2889. {
  2890. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2891. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2892. scsi_remove_host(host);
  2893. nsp32_release(host);
  2894. scsi_host_put(host);
  2895. }
  2896. static struct pci_driver nsp32_driver = {
  2897. .name = "nsp32",
  2898. .id_table = nsp32_pci_table,
  2899. .probe = nsp32_probe,
  2900. .remove = __devexit_p(nsp32_remove),
  2901. #ifdef CONFIG_PM
  2902. .suspend = nsp32_suspend,
  2903. .resume = nsp32_resume,
  2904. #endif
  2905. };
  2906. /*********************************************************************
  2907. * Moule entry point
  2908. */
  2909. static int __init init_nsp32(void) {
  2910. nsp32_msg(KERN_INFO, "loading...");
  2911. return pci_register_driver(&nsp32_driver);
  2912. }
  2913. static void __exit exit_nsp32(void) {
  2914. nsp32_msg(KERN_INFO, "unloading...");
  2915. pci_unregister_driver(&nsp32_driver);
  2916. }
  2917. module_init(init_nsp32);
  2918. module_exit(exit_nsp32);
  2919. /* end */